A back-illuminated process optimization method and semiconductor device

Abstract

The present application relates to the field of semiconductor process technology, and discloses a method for optimizing a back-illuminated process flow and a semiconductor device, wherein the method includes etching an aluminum strip matching the photoelectron absorption band on the surface of a silicon dioxide layer, and increasing the thickness of the silicon dioxide layer so that the aluminum strip is wrapped in the silicon dioxide layer with increased thickness; etching the silicon dioxide layer, the metal film layer, and the silicon substrate with increased thickness in sequence to form a groove that passes through the metal wiring layer in the semiconductor component; etching the bottom of the groove and the designated position of the silicon dioxide layer with increased thickness to form an opening connected to the copper film at the bottom of the groove, and forming a grounding via at the designated position; etching the aluminum film for the opening and the grounding via to generate a metal gasket in contact with the copper film and a grounding connection matching the grounding via. The technical solution provided by the present application can simplify the process flow of back-illuminated etching of semiconductor devices, and reduce preparation time and production costs.

Description

Technical Field

[0001] The present application relates to the field of semiconductor process technology, and in particular to a method for optimizing a back-illuminated process flow and a semiconductor device. Background Art

[0002] The semiconductor manufacturing process usually includes wafer processing, oxidation, photolithography, etching, thin film deposition, interconnection, testing and packaging. In the photolithography and etching process, the BSI (Backside Illumination) process is usually used, that is, the back-illuminated process.

[0003] In the related technology, the BSI process includes at least five processes, such as BSGND etching (grounding via etching), BMG etching (photoelectron absorption band etching), BSL etching (wafer etching), BPAD etching (specified opening etching), BALPAD etching (aluminum film pad etching), and the semiconductor is photolithographically and etched according to the above process. However, the process involved in this method is relatively cumbersome, and it is difficult to avoid the increase of production cost and cycle.

[0004] In view of this, how to optimize the BSI process has become the current research focus in the field of semiconductor manufacturing. Summary of the invention

[0005] The present application provides a method for optimizing a back-illuminated process flow and a semiconductor device, which can simplify the process flow of back-illuminated etching of semiconductor devices and reduce preparation time and production costs.

[0006] On one hand, the present application provides a method for optimizing a back-illuminated process flow, the method being applied to a semiconductor component prepared according to the back-illuminated process flow, the semiconductor component comprising a silicon dioxide layer, a metal film layer, a silicon substrate and a metal wiring layer distributed from top to bottom, the silicon substrate comprising a photoelectron absorption band, the metal wiring layer comprising a copper film to be opened, the method comprising: etching an aluminum strip matching the photoelectron absorption band on the surface of the silicon dioxide layer, and increasing the thickness of the silicon dioxide layer so that the aluminum strip is wrapped in the silicon dioxide layer with increased thickness; etching the silicon dioxide layer with increased thickness in turn; The silicon dioxide layer, the metal film layer and the silicon substrate are etched to form a groove directly through the metal wiring layer in the semiconductor component; the bottom of the groove and the specified position of the silicon dioxide layer with increased thickness are etched at the same time to form an opening connected to the copper film at the bottom of the groove, and a grounding via is formed at the specified position, wherein the grounding via passes through the silicon dioxide layer with increased thickness and the metal film layer and enters the silicon substrate; aluminum film is etched for the opening and the grounding via to generate a metal gasket in contact with the copper film, and a grounding connection matching the grounding via is generated.

[0007] In one embodiment, etching an aluminum strip matching the photoelectron absorption band on the surface of the silicon dioxide layer comprises: depositing an aluminum film on the surface of the silicon dioxide layer, and determining a target position matching the photoelectron absorption band on the deposited aluminum film; spraying photoresist at the target position, etching the aluminum film sprayed with the photoresist, and cleaning the photoresist after etching to obtain an aluminum strip matching the photoelectron absorption band generated on the surface of the silicon dioxide layer.

[0008] In one embodiment, increasing the thickness of the silicon dioxide layer includes: depositing silicon dioxide of a specified thickness on the surface of the silicon dioxide layer to form a thickened silicon dioxide layer wrapping the aluminum tape.

[0009] In one embodiment, sequentially etching the silicon dioxide layer with increased thickness, the metal film layer, and the silicon substrate includes: pre-configuring a first gas combination and a second gas combination; when etching the silicon dioxide layer and the silicon substrate, etching is performed using the first gas combination, and when etching the metal film layer, etching is performed using the second gas combination; wherein, compared with the second gas combination, the first gas combination is more inclined to chemical reaction etching, and compared with the first gas combination, the second gas combination is more inclined to physical bombardment etching.

[0010] In one embodiment, simultaneously etching the bottom of the groove and the designated position of the silicon dioxide layer after the thickness is increased includes: depositing silicon dioxide on the bottom and the slope of the groove, and after depositing silicon dioxide, determining an opening position at the bottom of the groove; spraying photoresist on the surface of the silicon dioxide layer after the thickness is increased and the bottom and the slope of the groove after the silicon dioxide is deposited, except for the opening position and the designated position; etching the surface of the silicon dioxide layer after the thickness is increased and the bottom and the slope of the groove after the silicon dioxide is deposited, and cleaning the photoresist after etching.

[0011] In one embodiment, etching the surface of the silicon dioxide layer after the thickness is increased and the bottom and slope of the groove after the silicon dioxide is deposited includes: pre-configuring a third gas combination and a fourth gas combination; using the third gas combination to synchronously etch the silicon dioxide at the opening position and the silicon dioxide at the designated position; after the silicon dioxide at the opening position and the designated position are etched, using the fourth gas combination to synchronously etch the copper film and the metal film layer, respectively, wherein in the process of etching the copper film, the metal film layer is penetrated and a portion of the silicon substrate located below the metal film layer is also etched.

[0012] In one embodiment, a first thickness of silicon dioxide deposited on the bottom and the inclined surface of the trench is less than a second thickness of the increased silicon dioxide layer, and a thickness difference between the second thickness and the first thickness is 300 nm.

[0013] In one embodiment, etching the aluminum film for the opening and the ground via includes:

[0014] An aluminum film is deposited on the bottom, the inclined surface and the surface of the silicon dioxide layer after the thickness is increased in the groove. During the process of depositing the aluminum film, aluminum is poured into the opening and the grounding via. A first position of a metal gasket is determined at the bottom of the groove, and a second position of a grounding connection is determined on the surface of the silicon dioxide layer after the thickness is increased. Photoresist is sprayed on the surfaces of the aluminum film corresponding to the first position and the second position, respectively, the aluminum film sprayed with the photoresist is etched, and the photoresist is cleaned after the etching is completed.

[0015] On the other hand, the present application further provides a semiconductor device, which is manufactured according to the optimization method of the above-mentioned back-illuminated process flow.

[0016] The technical solution adopted in one or more embodiments of the present application is to use a back-illuminated process flow to perform photolithography and etching on semiconductor devices from top to bottom according to the distribution level of semiconductor components, and to etch the silicon dioxide layer, metal film layer, silicon substrate and metal wiring layer respectively to form an aluminum strip that matches the photoelectron absorption band, a copper film opening that passes through the metal wiring layer and a grounding through hole for grounding. While ensuring that the etching target remains unchanged, the process flow of back-illuminated etching of semiconductor devices is optimized by simplifying the etching steps, thereby reducing preparation time and production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 A schematic diagram of the structure of a semiconductor component prepared according to a back-illuminated process flow in one embodiment of the present application;

[0019] Figure 2 A schematic diagram of a scene of etching a ground via in one embodiment of the present application;

[0020] Figure 3A schematic diagram of the steps of a back-illuminated process flow optimization method in one embodiment of the present application;

[0021] Figure 4 A schematic diagram of a step of specifying a position of an etching target in one embodiment of the present application;

[0022] FIG5 (a) is a schematic diagram of a back-illuminated process flow in one embodiment of the present application;

[0023] FIG5( b ) is a schematic diagram of an optimized process flow of a back-illuminated process in one embodiment of the present application;

[0024] Figure 6 A schematic diagram of the steps of a method for optimizing a back-illuminated process flow in one embodiment of the present application.

[0025] Description of Reference Numerals

[0026] 110-semiconductor component, 111-silicon dioxide layer, 112-metal film layer, 113-silicon substrate, 114-metal wiring layer, 115-copper film, 116-photoelectron absorption band, 117-photoresist layer, 118-photoresist layer, 119-aluminum film, 120-aluminum tape, 121-aluminum gasket, 122-aluminum gasket. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0028] See also Figure 1The present specification provides a semiconductor component prepared according to a back-illuminated process flow, wherein the semiconductor component 110 includes a silicon dioxide layer 111, a metal film layer 112, a silicon substrate 113, and a metal wiring layer 114, which are distributed from top to bottom. The silicon substrate 113 includes a photoelectron absorption band 116, the main component of which is tungsten, which is used to absorb the incoming photoelectrons to prevent crosstalk, and the metal wiring layer includes a copper film 115 with openings. Among them, the main components of the silicon dioxide layer 111 and the metal wiring layer 114 are both silicon dioxide, which is used to isolate different conductive areas to etch different areas; the components of the metal film layer 112 can be aluminum, titanium nitride or titanium, which is used to selectively distinguish the incoming photoelectrons, isolate the photoelectrons from the photoelectron absorption band, and prevent crosstalk; the main component of the silicon substrate 113 is silicon, which is used to achieve electron conduction and control.

[0029] In the related art, etching of semiconductor components mainly includes mask lithography, dry etching and cleaning. First, mask lithography is performed to apply a layer of photoresist on the silicon dioxide layer. After exposure and development through the mask, a specific pattern will be formed on the photoresist layer. Among them, the pattern of the photoresist layer can be used as an etching position reference in the dry etching process, so as to form a structure corresponding to the photoresist pattern on the material layer. Specifically, the active ions in the plasma are used to chemically react or physically bombard the surface of the material to remove the material layer that is not protected by the photoresist. For example, when etching the silicon dioxide layer, etching gases containing fluorine elements (such as carbon tetrafluoride) are used. These gases will produce highly active fluorine ions in the plasma state. The fluorine ions react chemically with silicon dioxide and convert it into volatile compounds (such as silicon tetrafluoride). After the above steps are completed, the semiconductor material can be cleaned to remove impurities remaining in the etching process.

[0030] Specifically, see Figure 2 , Figure 2 This is an example of a scenario in which a grounding via is etched. First, a layer of photoresist is applied to the semiconductor component 110 to be etched, and a grounding via is formed on the photoresist layer 117 after exposure and development through a mask. Then, the silicon dioxide layer 111 under the via without photoresist protection is etched, and fluorine ions in a plasma state can be chemically reacted with silicon dioxide, and the metal film layer 112 is further etched. The metal film layer at the position corresponding to the via can be etched by physical bombardment to form a grounding via.

[0031] The traditional BSI process requires etching the target step by step, which involves relatively heavy steps and is difficult to avoid increasing production costs and cycles. Figure 3In a first aspect, the present application provides a method for optimizing a back-illuminated process flow, which is used for a semiconductor component prepared according to the back-illuminated process flow. The method may include the following steps:

[0032] Step S1: etching an aluminum strip matching the photoelectron absorption band on the surface of the silicon dioxide layer, and increasing the thickness of the silicon dioxide layer so that the aluminum strip is wrapped in the silicon dioxide layer with increased thickness.

[0033] In this embodiment, the photoelectron absorption band is included in the silicon substrate, and an aluminum band is etched at the position of the silicon dioxide layer above the photoelectron absorption band corresponding to the photoelectron absorption band. The main component of the above-mentioned photoelectron absorption band is tungsten. The above-mentioned aluminum band and tungsten can absorb and isolate the photoelectrons generated during the etching process to prevent photoelectron crosstalk. At the same time, after etching the aluminum band, the thickness of the silicon dioxide layer is increased. The silicon dioxide layer can isolate different conductive areas. The thickened silicon dioxide layer can be used to protect the etched aluminum band from interference from subsequent etching processes in other areas. At the same time, the etching condition of the thickened silicon dioxide layer can be monitored to ensure the accuracy of the etching process in other areas.

[0034] It should be noted that the position and shape of the aluminum strip are directly affected by the photoelectron absorption band. Therefore, when performing some processes of the back-illuminated process, it is necessary to refer to the position and structure of the photoelectron absorption band itself to obtain the silicon dioxide layer with increased thickness.

[0035] Step S3: etching the silicon dioxide layer with increased thickness, the metal film layer and the silicon substrate in sequence to form a groove directly passing through the metal wiring layer in the semiconductor component.

[0036] The metal film layer may be composed of aluminum, titanium nitride or titanium, and is used to selectively screen the incoming photoelectrons, and selectively pass the photoelectrons through the thin film interference effect of the metal film. For example, when etching a silicon substrate, photoelectrons of a specific wavelength may be required to stimulate the reaction between fluorine atoms and silicon, and the metal film layer can screen out suitable photoelectrons for etching.

[0037] In this embodiment, the semiconductor component is etched from top to bottom to form a groove connected to the metal wiring layer, so as to be used for further etching of the target to be etched contained in the metal wiring layer, thereby forming a through hole for accessing other electronic devices. Specifically, the silicon dioxide layer, the metal film layer and the silicon substrate after the thickness is increased need to be etched to form the above groove.

[0038] It should be noted that the above-mentioned photoelectrons that have not passed through the metal thin film layer can be absorbed by the aluminum strip and the photoelectron absorption band to prevent photoelectron crosstalk.

[0039] Step S5: Etching the bottom of the groove and the designated position of the increased thickness silicon dioxide layer simultaneously to form an opening connected to the copper film at the bottom of the groove, and forming a grounding via at the designated position, wherein the grounding via passes through the increased thickness silicon dioxide layer and the metal film layer and enters the silicon substrate.

[0040] In this embodiment, the opening of the copper film can be used as a metal connection channel between the semiconductor device and other electronic devices, and the signal transmission of the semiconductor device is realized through the external connection of the opening of the copper film. The grounding via can be used to provide a low-impedance path for the semiconductor device to access the ground layer, ensuring the normal operation and maintenance of the semiconductor device.

[0041] In this embodiment, in order to form copper film openings and grounding vias, the designated positions of the copper film openings and grounding vias are etched from top to bottom according to the structural hierarchy of the semiconductor component. Specifically, before etching begins, the silicon dioxide layer above the groove needs to be thickened to ensure the accuracy of the etching position. Etching the copper film openings requires etching the silicon dioxide layer at the designated position at the bottom of the groove and the copper film portion below the designated position to form the copper film openings. Etching the grounding vias requires etching the silicon dioxide layer, the metal film layer and the silicon substrate below the designated position of the grounding vias to form the grounding vias.

[0042] Step S7: etching the aluminum film for the opening and the grounding through hole to generate a metal pad in contact with the copper film, and generating a grounding connection matching the grounding through hole.

[0043] In this embodiment, the aluminum film is etched for the copper film openings and grounding vias to form metal gaskets for connecting with other electronic components. By adding the metal gaskets, it is ensured that the copper film is not lost during signal transmission with other electronic components, or that the grounding vias are not lost when making grounding connections.

[0044] In one embodiment, based on the above-mentioned step S1, etching an aluminum strip matching the photoelectron absorption band on the surface of the silicon dioxide layer may include: depositing an aluminum film on the surface of the silicon dioxide layer, and determining a target position matching the photoelectron absorption band on the deposited aluminum film; spraying photoresist at the target position, etching the aluminum film sprayed with the photoresist, and cleaning the photoresist after etching, to obtain an aluminum strip matching the photoelectron absorption band generated on the surface of the silicon dioxide layer.

[0045] In this embodiment, an aluminum film is first deposited on the silicon dioxide layer on the surface of the semiconductor chip. Alternatively, aluminum atoms can be transferred to the surface of the silicon dioxide layer by physical vapor deposition, using evaporation or sputtering, and a thin film is formed by deposition, namely, the aluminum film.

[0046] In this embodiment, a target position matching the photoelectron absorption band is determined on the deposited aluminum film and then etched. First, a layer of photoresist is applied to the target position of the aluminum film, and a pattern of the photoresist layer is formed at the target position after photolithography, and then the aluminum film is etched. Specifically, the ions and free radicals of the plasma can react with the aluminum film, and the aluminum film is etched by physical bombardment until the aluminum film is etched to the silicon dioxide layer, and the residual photoresist is cleaned after the etching is completed, so that an aluminum band matching the photoelectron absorption band is formed on the surface of the silicon dioxide layer.

[0047] Optionally, when depositing the aluminum film, the aluminum film may be deposited until the thickness of the aluminum film is 200 nm, so the thickness of the aluminum strip generated subsequently is also 200 nm. It should be noted that the thickness of the aluminum film and the aluminum strip may have errors in actual application scenarios, and the thickness of the aluminum film and the aluminum strip can be flexibly set according to actual needs in actual application scenarios.

[0048] In one embodiment, based on the above step S1, increasing the thickness of the silicon dioxide layer includes: depositing silicon dioxide of a specified thickness on the surface of the silicon dioxide layer to form a thickened silicon dioxide layer wrapping the aluminum strip.

[0049] In this embodiment, silicon dioxide may be deposited on the surface of the silicon dioxide layer by physical vapor deposition, using evaporation or sputtering to continuously transfer additional silicon dioxide atoms to the surface of the silicon dioxide layer, and the silicon dioxide layer is continuously thickened by deposition until a specified thickness is reached.

[0050] Optionally, the specified thickness of the increased silicon dioxide layer can eventually reach 800 nm. Similarly, the specified thickness of the increased silicon dioxide layer can be flexibly set according to actual needs in actual application scenarios.

[0051] In one embodiment, based on the above-mentioned step S3, sequentially etching the silicon dioxide layer with increased thickness, the metal film layer and the silicon substrate may include: pre-configuring a first gas combination and a second gas combination; when etching the silicon dioxide layer and the silicon substrate, etching is performed using the first gas combination, and when etching the metal film layer, etching is performed using the second gas combination.

[0052] In this embodiment, the first gas combination can be used to chemically etch the silicon dioxide layer and the silicon substrate. Specifically, the first gas combination may include one or more gases containing fluorine elements, such as carbon tetrafluoride and perfluorocyclobutane. The first gas combination will produce highly active fluorine ions in a plasma state. These fluorine ions react chemically with silicon atoms in silicon dioxide or silicon atoms in silicon to generate volatile gas silicon tetrafluoride, which can be pumped away by a vacuum pump. It should be noted that the first gas combination also includes oxygen. During the etching process, oxygen can react with carbon produced by decomposition of carbon tetrafluoride and perfluorocyclobutane to generate carbon dioxide, thereby preventing carbon from being deposited on the surface of the etched chip.

[0053] In this embodiment, the second gas combination can be used to perform physical bombardment etching on metals (such as copper films, metal film layers). Specifically, the second gas combination may include chlorine, boron trichloride, methane and argon, wherein the content of argon is greater than that of other gases. Specifically, in a plasma etching environment, argon is first ionized to form argon ions, which are accelerated under the action of a high-energy radio frequency electric field to obtain sufficient electrical energy for bombarding the etched metal surface. Among them, chlorine, boron trichloride and methane chemically react and surface modify the metal atoms after the collision during the physical bombardment of argon ions to assist argon in etching the metal.

[0054] It should be noted that both the first gas combination and the second gas combination can perform chemical reaction etching or physical bombardment etching. Compared with the second gas combination, the first gas combination is more inclined to chemical reaction etching, and compared with the first gas combination, the second gas combination is more inclined to physical bombardment etching.

[0055] In one embodiment, see Figure 4 On the basis of the above step S5, simultaneously etching the bottom of the groove and the designated position of the silicon dioxide layer after the thickness is increased may include the following steps:

[0056] S51: depositing silicon dioxide on the bottom and the inclined surface of the trench, and after depositing silicon dioxide, determining an opening position at the bottom of the trench.

[0057] S53: spraying photoresist on the surface of the silicon dioxide layer after the thickness is increased and the bottom and slope of the groove after the silicon dioxide is deposited, except for the opening position and the designated position.

[0058] S55: etching the surface of the silicon dioxide layer after the thickness is increased and the bottom and the slope of the groove after the silicon dioxide is deposited, and cleaning the photoresist after etching.

[0059] In this embodiment, the groove after etching in step S3 is concave, and the two sides of the groove are inclined bevels, and silicon dioxide is deposited on the surface of the above-mentioned groove. Similarly, silicon dioxide can be deposited by physical vapor deposition, using evaporation or sputtering, wherein the thickness of silicon dioxide on the inner surface of the groove is less than the thickness of silicon dioxide on the outer surface of the groove after the above-mentioned thickness increase.

[0060] In one embodiment, the first thickness of the silicon dioxide layer deposited on the bottom and the inclined surface of the groove is less than the second thickness of the silicon dioxide layer after the thickness is increased. Preferably, the difference between the first thickness and the second thickness is 300nm. If the second thickness can reach 800nm, the first thickness is preferably 500nm.

[0061] In this embodiment, the designated opening positions are etched after silicon dioxide is deposited. Specifically, the positions to be opened are determined on the surface of the groove and the surface of the silicon dioxide layer with increased thickness, and photoresist is sprayed to form a photoresist layer on the surface area other than the two positions to be opened, and the bottom and inclined surface of the groove after the deposition and the surface of the silicon dioxide layer after the thickness is increased are chemically etched or physically bombarded, and after the etching is completed, the residual photoresist on the chip surface is cleaned.

[0062] In one embodiment, the silicon dioxide layer at the position where the hole is to be opened in the groove and the silicon dioxide layer at the position where the hole is to be opened after the thickness of the silicon dioxide layer is increased are etched at the same time, and a pre-configured third gas combination can be used. Specifically, the main components of the third gas combination can refer to the first gas combination mentioned above, and the highly active fluorine ions generated in the plasma state react chemically with the silicon atoms in the silicon dioxide to etch.

[0063] In one embodiment, the copper film at the position where the hole is to be opened in the groove and the metal film layer at the position where the hole is to be opened in the silicon dioxide layer after the thickness is increased can be etched by using a pre-configured fourth gas combination. Specifically, the main components of the fourth gas combination can refer to the second gas combination mentioned above, and physical bombardment etching is performed by bombarding the metal surface to be etched with argon ions accelerated to obtain sufficient electrical energy under the action of a high-energy radio frequency electric field.

[0064] In the process of etching the copper film, the metal film layer is broken down and a portion of the silicon substrate below the metal film layer is also etched. The metal film layer is relatively thin, and the copper film etching time is longer than the metal film layer etching time. Therefore, after the metal film layer is etched, the fourth gas combination can continue to etch a portion of the silicon substrate below the metal film layer.

[0065] It should be noted that both the third gas combination and the fourth gas combination can perform chemical reaction etching or physical bombardment etching. Compared with the fourth gas combination, the third gas combination is more inclined to chemical reaction etching, and compared with the third gas combination, the fourth gas combination is more inclined to physical bombardment etching.

[0066] In one embodiment, based on step S7, etching the aluminum film for the opening and the grounding via may include: depositing an aluminum film on the bottom, the inclined surface and the surface of the silicon dioxide layer after the thickness is increased of the groove, and during the process of depositing the aluminum film, aluminum is poured into the opening and the grounding via; determining a first position of a metal gasket at the bottom of the groove, and determining a second position of a grounding connection line on the surface of the silicon dioxide layer after the thickness is increased; spraying photoresist on the aluminum film surface corresponding to the first position and the second position, respectively, etching the aluminum film sprayed with the photoresist, and cleaning the photoresist after the etching is completed.

[0067] In this embodiment, after forming the opening and grounding via of the copper film, aluminum film is deposited on the bottom and inclined surface of the above-mentioned groove and the surface of the silicon dioxide after the thickness is increased. Similarly, the aluminum film can be deposited by physical vapor deposition. At the same time, aluminum is poured into the above-mentioned opening and grounding via. After the above-mentioned aluminum film deposition and aluminum pouring operations are completed, the first position corresponding to the opening position on the surface of the aluminum film and the second position corresponding to the grounding via position are determined, and photoresist is sprayed and aluminum is etched. For details, reference can be made to the etching of the aluminum strip matching the above-mentioned photoelectron absorption band. After the etching is completed, metal pads will be formed at the above-mentioned opening position and grounding via position for connecting other electronic components.

[0068] Please refer to Figure 5(b) and Figure 6 The present application provides one or more embodiments of an optimization method for applying the above-mentioned back-illuminated process flow, wherein the embodiment is applied to a semiconductor component 110 prepared according to the back-illuminated process flow, wherein the semiconductor component includes a silicon dioxide layer 111, a metal film layer 112, a silicon substrate 113 and a metal wiring layer 114 distributed from top to bottom, wherein the silicon substrate 113 includes a photoelectron absorption band 116, and the metal wiring layer 114 includes a copper film 115 to be opened. The embodiment can be performed according to the steps of FIG. 5 (b):

[0069] Step S101: performing BMG etching.

[0070] In this embodiment, the aluminum strip 120 is first etched for the photoelectron absorption band 116. The above-mentioned photoelectron absorption band is a tungsten strip of the same size and shape, which acts as a double metal gate inside the semiconductor to absorb photoelectrons for isolation and prevent photoelectron crosstalk. Specifically, an aluminum film 119 is deposited on the surface of the semiconductor component 110. After the aluminum film 119 with a thickness of 200nm is formed, a layer of photoresist is applied on its surface. After masking, a photoresist layer 117 is formed at a specific position. The above-mentioned specific position is the position corresponding to the tungsten strip. The aluminum film 119 is etched, wherein the specific position protected by the photoresist layer 117 is not etched, and finally two aluminum strips 120 with a thickness of 200nm are formed. In addition, after the etching is completed, the residual photoresist on the surface is cleaned.

[0071] Step S103: performing BSL etching.

[0072] In this embodiment, the semiconductor wafer is etched to form a groove to facilitate the subsequent opening of the copper film 115. Specifically, silicon dioxide is first deposited on the surface of the semiconductor component 110 after etching in step S101, and the aluminum strip 120 is completely buried therein. The thickness of the silicon dioxide layer 111 on the surface after deposition can reach 800nm. The etching position of the groove is determined according to the position of the copper film 115 in the metal wiring layer 114, and a layer of photoresist is applied to the silicon dioxide layer 111 on the surface. After masking, a photoresist layer is formed except for the etching position of the groove, and the silicon dioxide layer 111, the metal film layer 112 and the silicon substrate 113 below the etching position of the groove are etched until the metal wiring layer 114 at the position of the copper film 115 is exposed.

[0073] Step S105: Etching BSGND and BPAD.

[0074] In this embodiment, the designated position of the semiconductor component 110 is etched to form a copper film opening and a grounding via. Specifically, silicon dioxide is first deposited on the inner surface of the groove, and the thickness of the silicon dioxide on the groove surface after deposition is 500nm, which is less than the thickness of the silicon dioxide layer 111 of 800nm ​​on the surface in step S103. The designated position at the bottom of the groove and the designated grounding position outside the groove are etched to form a copper film opening and a grounding via.

[0075] Step S107: performing BALPAD etching.

[0076] In this embodiment, the metal gasket is etched for the copper film opening and grounding through hole that have been formed. Preferably, the metal gasket can be made of metal aluminum. First, aluminum is injected and deposited at the opening position and the grounding position, and a 200nm aluminum film is formed on the surface, and then the aluminum film is etched to form 200nm aluminum gaskets 121 and aluminum gaskets 122 for wiring with other electronic components.

[0077] In the related art, when back-illuminated etching is performed on a semiconductor device, please refer to FIG. 5 (a), which generally includes at least five process flows. First, BSGND etching is performed to sequentially etch the silicon dioxide layer 111 and the metal film layer 112 at the designated positions, enter the silicon substrate 113 to form a grounding via, and etch out an aluminum film 119 at the position of the above-mentioned grounding via. Then, BMG etching is performed to etch at the position of the silicon dioxide layer 111 corresponding to the photoelectron absorption band. The corresponding positions of the photoelectron absorption band on the surface of the aluminum film 119 and the corresponding positions of the grounding via are covered with a photoresist layer 117 and a photoresist layer 118, and the corresponding aluminum strip 120 and aluminum gasket 121 are etched at the above-mentioned positions. Then, BSL etching is performed to increase the thickness of the silicon dioxide layer 111 on the surface appropriately, and then the silicon dioxide layer 111, the metal film layer 112 and the silicon substrate 113 are etched in sequence according to the position of the copper film 115 contained in the metal wiring layer 114 until the metal wiring layer 114 is reached. Secondly, BPAD etching is performed to thicken a layer of silicon dioxide layer 111 at the position above the metal wiring layer 114 corresponding to the copper film 115, and then the silicon dioxide layer 111 and the metal film layer 112 are etched at the specified position to form an opening connected to the copper film 115. Finally, BALPAD etching is performed to etch the aluminum film for the opening connected to the copper film 115, and an aluminum pad 122 connected to the aluminum film is generated.

[0078] The back-illuminated process flow for the semiconductor component is operated through steps S101 to S107. Compared with the five processes of the conventional back-illuminated process flow in FIG5 (a), there is no need to perform preliminary etching of the ground via position before step S101. The mask photolithography, dry etching, cleaning and other operations of the preliminary etching of the ground via are integrated with step S105, and the ground via and the copper film opening are etched at the same time, so that the process flow of the back-illuminated etching of the semiconductor device is simplified, and the preparation time and production cost are reduced.

[0079] In addition, when making grounding holes, the metal gasket of the grounding opening in the traditional process is wrapped in the silicon dioxide layer. In one or more embodiments provided in the present application, the metal gasket of the grounding opening is placed on the upper layer of the silicon dioxide layer, which is more convenient for wiring the grounding through hole than the traditional process, and is convenient for the grounding through hole to connect the grounding pin of the chip and the external grounding system.

[0080] One or more embodiments of the present application adopt a back-illuminated process flow to perform photolithography and etching on semiconductor devices from top to bottom according to the distribution level of semiconductor components, and respectively etch the silicon dioxide layer, metal film layer, silicon substrate and metal wiring layer to form an aluminum strip that matches the photoelectron absorption band, a copper film opening that passes through the metal wiring layer and a grounding via for grounding. While ensuring that the etching target remains unchanged, the process flow of back-illuminated etching of semiconductor devices is optimized by simplifying the etching steps, thereby reducing preparation time and production costs.

[0081] A second aspect of the present application further provides a semiconductor device, which may include the semiconductor component described in the first aspect, and the semiconductor device may be manufactured according to the optimization method of the above-mentioned back-illuminated process flow.

[0082] The process of preparing the semiconductor device can be implemented by a chip. The chip can be used to make a product with a certain function, a typical product being a computer. Specifically, the computer can be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0083] According to an embodiment of the present application, an embodiment of an optimization method for a back-illuminated process flow is provided. It should be noted that although the flowchart in the accompanying drawings shows a logical order, in some cases, the steps shown or described may be performed in an order different from that shown here.

[0084] In addition, the descriptions involving "first", "second", etc. in this application are for descriptive purposes only and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more. In addition, the use of "based on" or "according to" means openness and inclusiveness, because the process, steps, calculations or other actions "based on" or "according to" one or more of the conditions or values ​​can be based on additional conditions or beyond the described values ​​in practice.

[0085] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0086] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the embodiment of the semiconductor device, since its application scenario is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0087] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

[0088] Although the embodiments of the present application have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present application, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A method for optimizing a back-illuminated process flow, characterized in that: The method is applied to a semiconductor component prepared according to a back-illuminated process flow, wherein the semiconductor component comprises a silicon dioxide layer, a metal film layer, a silicon substrate and a metal wiring layer distributed from top to bottom, wherein the silicon substrate comprises a photoelectron absorption band, and the metal wiring layer comprises a copper film to be opened, and the method comprises: Etching an aluminum strip matching the photoelectron absorption band on the surface of the silicon dioxide layer, and increasing the thickness of the silicon dioxide layer so that the aluminum strip is wrapped in the silicon dioxide layer with increased thickness; Sequentially etching the increased thickness silicon dioxide layer, the metal film layer, and the silicon substrate to form a groove in the semiconductor component that passes through the metal wiring layer; Simultaneously etching the bottom of the trench and the designated position of the increased thickness silicon dioxide layer to form an opening connected to the copper film at the bottom of the trench, and forming a grounding through hole at the designated position, wherein the grounding through hole penetrates the increased thickness silicon dioxide layer and the metal film layer and enters the silicon substrate; Etching an aluminum film for the opening and the grounding through hole to generate a metal gasket in contact with the copper film, and generating a grounding connection line matching the grounding through hole; Wherein, etching an aluminum strip matching the photoelectron absorption strip on the surface of the silicon dioxide layer comprises: Depositing an aluminum film on the surface of the silicon dioxide layer, and determining a target position on the deposited aluminum film that matches the photoelectron absorption band; Photoresist is sprayed at the target position, the aluminum film sprayed with the photoresist is etched, and the photoresist is cleaned after the etching is completed, so as to obtain an aluminum band generated on the surface of the silicon dioxide layer and matching the photoelectron absorption band.

2. The method according to claim 1, characterized in that The height of the aluminum strips is 200 nm.

3. The method according to claim 1, characterized in that Increasing the thickness of the silicon dioxide layer comprises: Silicon dioxide with a specified thickness is deposited on the surface of the silicon dioxide layer to form a thickened silicon dioxide layer wrapping the aluminum tape.

4. The method according to claim 1, characterized in that Sequentially etching the increased thickness silicon dioxide layer, the metal film layer, and the silicon substrate comprises: pre-configuring a first gas combination and a second gas combination; When etching the silicon dioxide layer and the silicon substrate, the first gas combination is used for etching, and when etching the metal film layer, the second gas combination is used for etching; Compared with the second gas combination, the first gas combination is more inclined to chemical reaction etching, and compared with the first gas combination, the second gas combination is more inclined to physical bombardment etching.

5. The method according to claim 1, characterized in that Simultaneously etching the bottom of the trench and the designated position of the increased thickness silicon dioxide layer comprises: Depositing silicon dioxide on the bottom and the inclined surface of the trench, and after depositing silicon dioxide, determining the opening position at the bottom of the trench; Spraying photoresist on the surface of the silicon dioxide layer after the thickness is increased and the bottom and slope of the groove after the silicon dioxide is deposited, except for the opening position and the designated position; The surface of the silicon dioxide layer after the thickness is increased and the bottom and the inclined surface of the groove after the silicon dioxide is deposited are etched, and the photoresist is cleaned after the etching.

6. The method according to claim 5, characterized in that Etching the surface of the silicon dioxide layer after the thickness is increased and the bottom and the inclined surface of the groove after the silicon dioxide is deposited comprises: pre-configuring a third gas combination and a fourth gas combination; Using the third gas combination to synchronously etch the silicon dioxide at the opening position and the silicon dioxide at the designated position; After the etching of the silicon dioxide at the opening position and the designated position is completed, the copper film and the metal film layer are synchronously etched by using the fourth gas combination, wherein in the process of etching the copper film, the metal film layer is penetrated and a portion of the silicon substrate located below the metal film layer is also etched; Compared with the fourth gas combination, the third gas combination is more inclined to chemical reaction etching, and compared with the third gas combination, the fourth gas combination is more inclined to physical bombardment etching.

7. The method according to claim 5, characterized in that The first thickness of the silicon dioxide deposited on the bottom and the inclined surface of the trench is less than the second thickness of the silicon dioxide layer after the thickness is increased, and the thickness difference between the second thickness and the first thickness is 300 nm.

8. The method according to claim 1, characterized in that Etching the aluminum film for the opening and the grounding through hole comprises: Depositing an aluminum film on the bottom and the inclined surface of the groove and the surface of the silicon dioxide layer with increased thickness, and in the process of depositing the aluminum film, filling the opening and the grounding through hole with aluminum; Determine a first position of a metal pad at the bottom of the groove, and determine a second position of a ground connection line on the surface of the silicon dioxide layer after the thickness is increased; Photoresist is sprayed on the surface of the aluminum film corresponding to the first position and the second position respectively, the aluminum film sprayed with the photoresist is etched, and the photoresist is cleaned after the etching is completed.

9. A semiconductor device, characterized in that: The semiconductor device is manufactured according to the optimization method of the back-illuminated process flow as claimed in any one of claims 1 to 8.

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