Discharge circuit

Abstract

The embodiment of the invention provides a discharging circuit. The discharging circuit comprises at least one first switch and at least one second switch, the second switch comprises a depletion tube; one end of the first switch is connected with the energy storage element, the other end of the first switch is grounded, and the control end of the first switch receives an enable signal; the first switch is used for being switched on under the control of an enable signal when the power supply voltage is not less than the threshold voltage; and, when the power supply voltage is less than the threshold voltage, switching off; the at least one second switch forms a first series structure, one end of the first series structure is connected with the energy storage element, the other end of the first series structure is grounded, the control end of each second switch is connected with one end of the first switch, and the working state of the second switch is different from that of the first switch at the same moment. The circuit is used for solving the problem that an energy storage element cannot discharge under the low-voltage condition.

Description

Technical Field

[0001] The present application relates to the field of electronics, and in particular to a discharge circuit. Background Art

[0002] In modern electronic devices, especially mobile devices such as mobile phones, the efficiency and safety of power management are crucial. AC-DC (Alternating Current-Direct Current) power adapters are commonly used to convert AC power to DC power to charge devices such as mobile phones. After charging is completed, some charges may remain in the charging circuit, which may affect the stability and safety of the circuit if not handled. In order to effectively manage these residual charges, energy storage elements can be used to store them, such as in capacitors, and these charges can be released by designing special discharge circuits.

[0003] In practical applications, when the power supply voltage is not less than the threshold voltage, an enable signal is generated. The switch tube is designed to respond to the enable signal to open the path from the energy storage element to the ground and discharge the energy storage element. However, during the discharge of the energy storage element, the power supply voltage will be less than the threshold voltage, that is, the low voltage condition. At this time, the enable signal is cleared, and the charge in the energy storage element cannot be released. Therefore, it is hoped to provide a discharge circuit that can release the charge in the energy storage element under low voltage conditions. Summary of the invention

[0004] The embodiment of the present application provides a discharge circuit to solve the problem that the energy storage element cannot discharge under low voltage conditions.

[0005] In a first aspect, an embodiment of the present application provides a discharge circuit, comprising: at least one first switch and at least one second switch; the second switch comprises a dissipative switch; one end of the first switch is connected to an energy storage element, the other end of the first switch is grounded, and the control end of the first switch receives an enable signal; the first switch is used to be turned on when the power supply voltage is not less than a threshold voltage under the control of the enable signal; and to be turned off when the power supply voltage is less than the threshold voltage; at least one second switch constitutes a first series structure, one end of the first series structure is connected to the energy storage element, the other end of the first series structure is grounded, the control end of each second switch is connected to one end of the first switch, and the working state of the second switch is different from the working state of the first switch at the same time.

[0006] In a possible implementation, the number of the first switch is one, and the number of the second switches is multiple; the first switch is used to be turned on when the enable signal is in the first state to control the multiple second switches to be turned off, and to be turned off when the enable signal is in the second state to control the multiple second switches to be turned on; the control end of each second switch is connected to one end of the first switch.

[0007] In a possible implementation, there is one first switch and one second switch; one end of the second switch is connected to the energy storage element, the other end of the second switch is grounded, and the control end of the second switch is connected to one end of the first switch.

[0008] In a possible implementation, there are multiple first switches and multiple second switches; one end of each first switch is connected to the energy storage element, the other end of each first switch is grounded, and the control end of each first switch receives an enable signal; except for the grounded second switch, the control end of each of the multiple second switches is connected to one end of one of the first switches, and the control end of the grounded second switch is connected to one end of another first switch.

[0009] In a possible implementation, there are multiple first switches and one second switch; one end of the second switch is connected to the energy storage element, the other end of the second switch is grounded, and the control end of the second switch is connected to one end of one of the first switches.

[0010] In a possible implementation, the number of first switches is two; except for the last-stage grounded second switch among the plurality of second switches, the control end of each of the remaining second switches is connected to one end of one of the first switches, and the control end of the last-stage grounded second switch is connected to one end of another first switch.

[0011] In a possible implementation, the discharge circuit further includes: a first resistor; one end of the first resistor is connected to the energy storage element, and the other end of the first resistor is connected to one end of another first switch.

[0012] In a possible implementation, the energy storage element is connected to at least one first switch via a second series structure, the second series structure is composed of at least one voltage-dividing resistor connected in series to form at least one voltage-dividing node; the control end of each second switch is connected to the corresponding voltage-dividing node.

[0013] In a possible implementation, the discharge circuit further includes a second resistor; one end of the second resistor is connected to the energy storage element, and the other end of the second resistor is connected to one end of the first series structure.

[0014] In a possible implementation manner, the discharge circuit further includes a third resistor; one end of the third resistor is connected to the control end of the first switch, and the other end of the third resistor is grounded.

[0015] In a possible implementation, the discharge circuit further includes a second protection circuit; one end of the second protection circuit is connected to the control end of the grounded second switch, and the other end of the second protection circuit is grounded.

[0016] In a possible implementation, the second protection circuit includes: at least one diode; at least one diode connected in series to form a third series structure, one end of the third series structure is connected to the control end of the grounded second switch, and the other end of the third series structure is grounded.

[0017] On the other hand, the present application provides a charging circuit, comprising: a charging input terminal and a charging output terminal, wherein an energy storage element is connected between the charging input terminal and the ground; and, comprising a discharge circuit as described above.

[0018] In the discharge circuit provided in the embodiment of the present application, the discharge circuit includes at least one first switch and at least one second switch, and the second switch includes a power dissipation circuit; wherein, at least one second switch constitutes a first series structure; when the power supply voltage is not less than the threshold voltage, an enable signal is generated, and the first switch is turned on in response to the enable signal, thereby controlling the first series structure to be disconnected; when the power supply voltage is less than the threshold voltage, no enable signal is generated, and the first switch is disconnected, thereby controlling the first series structure to be turned on and release the charge in the energy storage element. The scheme of the present application sets a first series structure composed of power dissipation circuits, and utilizes the conduction characteristics of the power dissipation circuits to realize that when the power supply voltage is less than the threshold voltage, a discharge path can still be formed to release the charge in the energy storage element, thereby solving the problem that the energy storage element cannot be discharged under low voltage conditions. At the same time, the circuit structure is simple and has strong flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0020] Figure 1 This is a schematic diagram of a charging system using an isolation tube;

[0021] Figure 2 This is a schematic diagram of a charging system without an isolation tube;

[0022] Figure 3 is a schematic diagram of an exemplary discharge circuit;

[0023] Figure 4 exemplarily shows a structural schematic diagram of a discharge circuit provided in Embodiment 1 of the present application;

[0024] Figure 5 is a schematic structural diagram of an exemplary discharge circuit;

[0025] Figure 6 is a schematic structural diagram of an exemplary discharge circuit;

[0026] Figure 7 is a schematic structural diagram of an exemplary discharge circuit;

[0027] Figure 8 is a schematic structural diagram of an exemplary discharge circuit;

[0028] Fig. 9 is a schematic structural diagram of an exemplary discharge circuit;

[0029] Fig.10 A schematic diagram of the structure of a discharge circuit provided for this example.

[0030] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0031] Here, exemplary embodiments will be described in detail, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application.

[0032] The terms "including" and "having" in this application are used to express an open-ended inclusion, and mean that in addition to the listed elements / components / etc., there may be additional elements / components / etc.; the terms "first" and "second" etc. are only used as marks or distinctions, and are not intended to limit the order or quantity of their objects. In addition, the different elements and areas in the drawings are only shown schematically, and are therefore not limited to the sizes or distances shown in the drawings. The technical solution is described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0033] Discharge circuits are often used in scenarios where the system needs to discharge. Figure 1 The schematic diagram of the charging system using the isolation tube is shown in Figure 1. The charging system is used to charge the load. The load includes but is not limited to electronic devices such as mobile phones and computers. Figure 1For example, an isolation tube is used in the discharge circuit structure inside the chip. The left side of the isolation tube is the VBUSP terminal (i.e., the positive terminal), and the right side of the isolation tube is the VBUSM terminal (i.e., the negative terminal). The isolation tube isolates the VBUSP terminal and the VBUSM terminal, and the discharge paths are controlled independently of each other. The AC-DC power supply is connected to the load through a switching tube, and the charging current charges the load through this path. When the load is charged, there will still be residual charge in the path, and the residual charge will be stored in the capacitor. In order to prevent the residual charge from causing current shock or high voltage to the inserted load during the next charging, the residual charge stored in the capacitor needs to be released.

[0034] Figure 2 Figure 1 is a schematic diagram of a charging system without an isolation tube. Figure 2 As shown in the figure, there is no isolation tube in the discharge circuit structure inside the chip, and there is only one VBUSP terminal. Figure 3 shown. Figure 3 FIG. 1 is a schematic diagram of an exemplary discharge circuit. The terminal to be discharged, such as a capacitor or a VBUSP terminal, and the ground are connected via a switch tube and a resistor. As an example, Figure 3 The switch tube in is an NMOS tube. When the capacitor just starts to discharge, the voltage at the VBUSP terminal is not less than the threshold voltage (the threshold voltage is set according to the actual situation), and a high-level enable signal will be generated. The control end of the NMOS tube receives the high-level enable signal, controls the NMOS tube to turn on, and the charge in the capacitor passes through the NMOS tube and the resistor to release the charge to the ground. However, during the discharge of the capacitor, the voltage at the VBUSP terminal will become smaller and smaller. When the voltage at the VBUSP terminal is less than the threshold voltage, the enable signal will be cleared. At this time, the NMOS tube is disconnected, and then the discharge path is disconnected, so it cannot be discharged when the voltage at the VBUSP terminal is less than the threshold voltage. Since there is still charge in the capacitor, when a new load is inserted for the next charge, the residual charge may affect the load.

[0035] The technical content provided by this application is intended to solve the above-mentioned technical problems of related technologies. In the scheme of this application, the discharge circuit includes at least one first switch and at least one second switch, and the second switch includes a power dissipation circuit; wherein, at least one second switch constitutes a first series structure; when the power supply voltage is not less than the threshold voltage, an enable signal is generated, and the first switch is turned on in response to the enable signal, thereby controlling the first series structure to be disconnected; when the power supply voltage is less than the threshold voltage, no enable signal is generated, and the first switch is disconnected, thereby controlling the first series structure to be turned on and release the charge in the energy storage element. The scheme of this application sets a first series structure composed of power dissipation circuits, and utilizes the conduction characteristics of the power dissipation circuits to realize that when the power supply voltage is less than the threshold voltage, a discharge path can still be formed to release the charge in the energy storage element, thereby solving the problem that the energy storage element cannot be discharged under low voltage conditions. At the same time, the circuit structure is simple and has strong flexibility.

[0036] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0037] Embodiment 1

[0038] Figure 4 The structural diagram of the discharge circuit provided in the first embodiment of the present application is exemplarily shown in FIG. Figure 4 As shown, the circuit includes: at least one first switch K1, at least one second switch K2; the second switch K2 includes a power dissipation device;

[0039] One end of the first switch K1 is connected to the energy storage element 41, the other end of the first switch K1 is grounded, and the control end of the first switch K1 receives an enable signal; the first switch K1 is used to be turned on when the power supply voltage is not less than the threshold voltage UVLO under the control of the enable signal; and turned off when the power supply voltage is less than the threshold voltage UVLO;

[0040] At least one second switch K2 forms a first series structure 42, one end of the first series structure 42 is connected to the energy storage element 41, the other end of the first series structure 42 is grounded, the control end of each second switch K2 is connected to one end of the first switch K1, and the working state of the second switch K2 is different from the working state of the first switch K1 at the same time.

[0041] In this example, the power transistor is a Native MOS transistor. In another example, the power transistor can be a Native NMOS transistor or a Native PMOS transistor. The threshold voltage Vth of the power transistor is close to 0, so as long as there is a small voltage difference between the gate and source of the power transistor, that is, the voltage Vgs between the gate and source of the power transistor is not 0, the power transistor can be turned on.

[0042] The first switch K1 may be one or more. As an example, when there are multiple first switches K1, each first switch K1 is connected in parallel, one end of all first switches K1 is connected to the energy storage element 41, the other end is grounded, and the control end receives an enable signal. In one example, multiple first switches K1 receive the same enable signal. The energy storage element 41 may be a capacitor, an inductor or other components, which are not limited here. The more commonly used one is a capacitor. For example, if the energy storage element 41 is a capacitor, Figure 4As shown, one end of the energy storage element 41, i.e., the capacitor, is connected to the VBUSP end to receive the power supply voltage, and the other end of the energy storage element 41, i.e., the capacitor, is connected to the discharge circuit, and the residual charge in the capacitor is released through the discharge circuit. Among them, the enable signal for controlling the first switch K1 to be turned on or off is provided by the power supply voltage. A threshold voltage UVLO is set in the discharge circuit, and the value of the threshold voltage UVLO can be set according to the actual circuit working conditions. During the discharge process of the energy storage element 41, at first, the power supply voltage at the VBUSP end is not less than the threshold voltage UVLO, an enable signal is generated, and the first switch K1 responds to the enable signal to control the first switch K1 to be turned on, and the energy storage element 41 discharges to the ground through the discharge path formed by the turned-on first switch K1; as the energy storage element 41 discharges, the power supply voltage continues to drop, and when the power supply voltage at the VBUSP end drops to less than the threshold voltage UVLO, the enable signal is cleared, there is no enable signal, and the first switch K1 is disconnected. Among them, the first switch K1 can be an NMOS tube, a PMOS tube or other devices, which are not limited here.

[0043] For example, the first switch K1 is an NMOS tube. During the discharge of the energy storage element 41, when the power supply voltage at the VBUSP end is not less than the threshold voltage UVLO, a high-level enable signal is generated, and the NMOS tube responds to the high-level enable signal to control the NMOS tube to be turned on; as the energy storage element 41 discharges, the power supply voltage continues to drop. When the power supply voltage at the VBUSP end drops to less than the threshold voltage UVLO, the enable signal is cleared, there is no enable signal (for example, no signal is generated, or the enable signal switches state, such as switching to a low level), and the NMOS tube is controlled to be disconnected. At this time, the voltage at one end of the first series structure 42 formed by at least one second switch K2 is provided by the power supply voltage, and the other end is grounded. Since the second switches K2 are all power dissipation devices, that is, the control terminal voltage of each power dissipation device is provided by the power supply voltage, and the source of each power dissipation device is grounded, according to the conduction characteristics of the power dissipation device, each power dissipation device is turned on, and the transmission path from the energy storage element 41 to the ground is turned on, and the power supply voltage is less than the threshold voltage. Discharge.

[0044] The number of the second switches K2 may be one or more. As an example, when the second switch K2 is one, the so-called series connection refers to the single second switch K2 being connected in series between the energy storage element 41 and the ground. As an example, when the second switch K2 is multiple, multiple second switches K2 are connected in series to form a first series structure 42, and the entire first series structure 42 is connected in series between the energy storage element 41 and the ground. The second switch K2 in the first series structure 42 is controlled by the voltage state at one end of the first switch K1. When the first switch K1 is disconnected, the second switches K2 are all turned on to form a new discharge path. When the first switch K1 is turned on, the second switches K2 are all turned off to reduce power consumption. The second switch K2 may be a Native NMOS tube or a Native PMOS tube. In order to prevent the second switch K2 from being damaged, the number of the second switches K2 may be set according to the power supply voltage. For example, assuming that the second switch K2 is a 5V Native NMOS tube, that is, the maximum voltage that can be tolerated between the drain and source of the Native NMOS tube is 5V. Then, the number of second switches K2 to be set is calculated according to the value of the power supply voltage divided by the maximum voltage value that the Native NMOS tube can withstand. For example, when the power supply voltage is 30V, 6 5V Native NMOS tubes can be set; when the power supply voltage is 25V, 5 5V Native NMOS tubes can be set.

[0045] In this example, the working state of the first switch K1 and the working state of the second switch K2 are different at the same time. The first switch K1 receives an enable signal, and when the first switch K1 is turned on in response to the enable signal, the first series structure 42 is controlled to be disconnected; when the first switch K2 is turned off in response to the enable signal, the first series structure 42 is controlled to be turned on.

[0046] In the above example, by setting the first series structure 42, multiple energy storage elements are stacked, so that when the power supply voltage is less than the threshold voltage UVLO, the charge in the energy storage element can still be released, solving the problem that the energy storage element cannot be discharged under low voltage conditions. At the same time, the circuit structure is simple and has strong flexibility.

[0047] The number of the first switch K1 and the second switch K2 is not limited, and the first switch K1 and the second switch K2 can be one or more, and there are different combinations. For example, one first switch K1 and multiple second switches K2, one first switch K1 and one second switch K2, multiple first switches K1 and multiple second switches K2, and multiple first switches K1 and one second switch K2 can be set.

[0048] In an example, the number of the first switch K1 is one, and the number of the second switches K2 is multiple; the first switch K1 is used to be turned on when the enable signal is in the first state to control the multiple second switches K2 to be turned off, and to be turned off when the enable signal is in the second state to control the multiple second switches K2 to be turned on; the control end of each second switch K2 is connected to one end of the first switch K1.

[0049] In this example, when the first switch K1 is an NMOS tube, the first state is a high level, and the second state is a low level or no signal; when the first switch is a PMOS tube, the first state is a low level, and the second state is a high level or no signal. For example, the second switch K2 includes a plurality of Native NMOS tubes or a plurality of Native PMOS tubes, and the plurality of Native NMOS tubes or a plurality of Native PMOS tubes are connected in series to form a first series structure 42. As an example, the specific number of Native MOS tubes is set according to the power supply voltage.

[0050] See also Figure 5 , Figure 5 This is a schematic diagram of the structure of an exemplary discharge circuit. Taking the first switch K1 as an NMOS tube and the second switch K2 as a plurality of Native NMOS tubes connected in series as an example, the drain of the NMOS tube is connected to the energy storage element 41, the gate of the NMOS tube receives an enable signal, and the source of the NMOS tube is grounded. The plurality of Native NMOS tubes are connected in series, in the order from the energy storage element 41 to the ground, wherein the drain of the first Native NMOS tube is connected to the energy storage element 41, the gate of the first Native NMOS tube is connected to the drain of the first switch K1, and the source of the first Native NMOS tube is connected to the drain of the next Native NMOS tube; the drain of each of the intermediate Native NMOS tubes is connected to the source of the previous Native NMOS tube, and the gate is connected to the drain of the first switch K1, until the drain of the last Native NMOS tube is connected to the source of the previous Native NMOS tube, the gate of the last Native NMOS tube is connected to the drain of the first switch K1, and the source of the last Native NMOS tube is grounded.

[0051] Specifically, when the power supply voltage is not less than the threshold voltage UVLO, the enable signal is in a first state, i.e., a high level, the first switch K1 is turned on, the gates of multiple Native NMOS tubes are grounded through the turned-on first switch K1, the multiple Native NMOS tubes are all turned off, and the energy storage element 41 discharges through the discharge path formed by the first switch K1; when the power supply voltage is less than the threshold voltage UVLO, the enable signal is in a second state, i.e., a low level or no signal state, the first switch K1 is turned off, and at this time, the gate voltage of the last Native NMOS tube is generated based on the power supply voltage. Although the power supply voltage is very small at this time, the last Native NMOS tube is turned on and grounded by utilizing the conduction characteristics of the Native NMOS tube. Similarly, the gate voltage of the adjacent Native NMOS is not 0, and the source is grounded through the following Native NMOS tube, thereby controlling the conduction of multiple Native NMOS tubes in series, and the residual charge is released to the ground through the conduction paths of multiple Native NMOS tubes in series.

[0052] Through the solution of this example, the second switch K2 adopts a structure in which multiple Native NMOS tubes are connected in series, and a first switch K1 is used to simultaneously control the conduction or disconnection of multiple second switches K2. When the power supply voltage is less than the threshold voltage UVLO, the charge in the energy storage element can still be released. The structure is simple, the circuit layout is easy to implement, and it can also be applied to large power supply voltage scenarios. Multiple second switches K2 are connected in series to divide the voltage, thereby avoiding possible breakdown of the power supply under large power supply voltage, thereby improving the reliability and stability of the discharge circuit.

[0053] In one example, the number of the first switch K1 is one, and the number of the second switch K2 is one. Figure 6 , Figure 6 FIG. 1 is a schematic diagram of a discharge circuit of an example. Figure 6 As shown, one end of the second switch K2 is connected to the energy storage element 41 , the other end of the second switch K2 is grounded, and the control end of the second switch K2 is connected to one end of the first switch K1 .

[0054] In this example, the number of the second switch K2 is one, which can be a Native NMOS tube or a Native PMOS tube. Take the first switch K1 as an NMOS tube and the second switch K2 as a Native NMOS tube as an example. The drain of the NMOS tube is connected to the energy storage element 41, the gate of the NMOS tube receives an enable signal, and the source of the NMOS tube is grounded. The drain of the Native NMOS tube is connected to the energy storage element 41, the gate of the Native NMOS tube is connected to the drain of the first switch K1, and the source of the Native NMOS tube is grounded.

[0055] Specifically, when the power supply voltage is not less than the threshold voltage UVLO, the enable signal is in a first state, i.e., a high level, the first switch K1 is turned on, the gate of the Native NMOS tube is grounded through the turned-on first switch K1, the Native NMOS tube is turned off, and the energy storage element 41 discharges through the discharge path formed by the first switch K1; when the power supply voltage is less than the threshold voltage UVLO, the enable signal is in a second state, i.e., a low level or no signal state, the first switch K1 is turned off, and at this time, the gate voltage of the Native NMOS tube is generated based on the power supply voltage. Although the power supply voltage is very small at this time, the Native NMOS tube is turned on by utilizing the conduction characteristics of the Native NMOS tube, and the residual charge is released to the ground through the conduction path of the Native NMOS tube.

[0056] Through the solution of this example, a first switch K1 is used to control a second switch K2 to be turned on or off. When the power supply voltage is less than the threshold voltage UVLO, the charge in the energy storage element can still be released, saving resources.

[0057] In another example, the number of the first switch K1 is multiple, and the number of the second switch K2 is multiple; see Figure 7 , Figure 7 FIG. 1 is a schematic diagram of a discharge circuit of an example. Figure 7 As shown, one end of each first switch K1 is connected to the energy storage element 41, the other end of each first switch K1 is grounded, and the control end of each first switch K1 receives an enable signal;

[0058] Except for the grounded second switch K2 , the control end of each of the other second switches K2 is connected to one end of one of the first switches K1 , and the control end of the grounded second switch K2 is connected to one end of another first switch K1 .

[0059] In this example, multiple first switches K1 are connected in parallel, and the second switch K2 is a plurality of Native NMOS tubes or a plurality of Native PMOS tubes. Multiple Native NMOS tubes or multiple Native PMOS tubes are connected in series to form a first series structure 42, and the specific number of Native MOS tubes is set according to the power supply voltage. Take the first switch K1 as a plurality of NMOS tubes in parallel, and the second switch K2 as a plurality of Native NMOS tubes in series as an example. The number of NMOS tubes can be equal to the number of Native NMOS tubes, or the number can be set arbitrarily, and is not limited here. The drain of each NMOS tube is connected to the energy storage element 41, the gate of each NMOS tube receives the same enable signal, and the source of each NMOS tube is grounded. Multiple Native NMOS tubes are connected in series in the order from the energy storage element 41 to the ground, wherein the drain of the first Native NMOS tube is connected to the energy storage element 41, and the source of the first Native NMOS tube is connected to the drain of the next Native NMOS tube; the drain of each intermediate Native NMOS tube is connected to the source of the previous Native NMOS tube, until the drain of the last Native NMOS tube is connected to the source of the previous Native NMOS tube, and the source of the last Native NMOS tube is grounded. Among them, except for the last Native NMOS tube, the gates of the remaining Native NMOS tubes can be connected to the gate of the same first switch K1, or to the gates of different first switches K1; the gate of the last Native NMOS tube is connected to the gate of another first switch K1 except the above-mentioned first switch K1.

[0060] Specifically, when the power supply voltage is not less than the threshold voltage UVLO, the enable signal is in a first state, i.e., a high level, and multiple first switches K1 are turned on in response to the same enable signal, and the gates of multiple Native NMOS tubes are grounded by turning on the first switches K1, and multiple Native NMOS tubes are all disconnected, and the energy storage element 41 discharges through the discharge path formed by the first switch K1; when the power supply voltage is less than the threshold voltage UVLO, the enable signal is in a second state, i.e., a low level or no signal state, and multiple first switches K1 are disconnected in response to the same enable signal. At this time, the gate voltage of the last Native NMOS tube is generated based on the power supply voltage. Although the power supply voltage is very small at this time, the last Native NMOS tube is turned on and grounded by utilizing the conduction characteristics of the Native NMOS tube. Similarly, the gate voltage of the adjacent Native NMOS is not 0, and the source is grounded through the following Native NMOS tube, thereby controlling the conduction of multiple Native NMOS tubes in series, and the residual charge is released to the ground through the conduction paths of multiple Native NMOS tubes in series.

[0061] Through the solution of this example, multiple first switches K1 are used to control multiple second switches K2 to be turned on or off. When the power supply voltage is less than the threshold voltage UVLO, the charge in the energy storage element can still be released. It has strong flexibility and can be applied to more and richer working scenarios.

[0062] In one example, the number of the first switches K1 is multiple, and the number of the second switch K2 is one; see Figure 8 , Figure 8 FIG. 1 is a schematic diagram of a discharge circuit of an example. Figure 8 As shown, one end of the second switch K2 is connected to the energy storage element 41 , the other end of the second switch K2 is grounded, and the control end of the second switch K2 is connected to one end of one of the first switches K1 .

[0063] In this example, multiple first switches K1 are connected in parallel, and the number of second switches K2 is one. Take the first switch K1 as an NMOS tube and the second switch K2 as a Native NMOS tube as an example. The drain of each NMOS tube is connected to the energy storage element 41, the gate of each NMOS tube receives the same enable signal, and the source of each NMOS tube is grounded. The drain of the Native NMOS tube is connected to the energy storage element 41, the gate of the Native NMOS tube is connected to the drain of one of the first switches K1, and the source of the Native NMOS tube is grounded.

[0064] Specifically, when the power supply voltage is not less than the threshold voltage UVLO, the enable signal is in the first state, i.e., a high level, and multiple first switches K1 are turned on in response to the same enable signal, and the gate of the Native NMOS tube is grounded by turning on the first switch K1, the Native NMOS tube is disconnected, and the energy storage element 41 discharges through the discharge path formed by the first switch K1; when the power supply voltage is less than the threshold voltage UVLO, the enable signal is in the second state, i.e., a low level or no signal state, and multiple first switches K1 are disconnected in response to the same enable signal. At this time, the gate voltage of the Native NMOS tube is generated based on the power supply voltage. Although the power supply voltage is very small at this time, the Native NMOS tube is turned on and grounded by utilizing the conduction characteristics of the Native NMOS tube, and the residual charge is released to the ground through the conduction path of the Native NMOS tube. Through the scheme of this example, multiple first switches K1 are set, and multiple discharge branches can be formed in the early stage of discharge to improve the discharge efficiency.

[0065] Based on the previous example, see Fig. 9 , Fig. 9Schematic diagram of the structure of an exemplary discharge circuit. In one example, the number of first switches K1 is two; among the plurality of second switches K2, except for the last-stage grounded second switch K2, the control end of each of the remaining second switches K2 is connected to one end of one of the first switches K1, and the control end of the last-stage grounded second switch K2 is connected to one end of another first switch K1.

[0066] Fig. 9 In the example, two first switches K1 are provided, and the two first switches K1 are connected in parallel. The second switch K2 is a plurality of Native NMOS tubes or a plurality of Native PMOS tubes, and the plurality of Native NMOS tubes or a plurality of Native PMOS tubes are connected in series to form a first series structure 42, and the specific number of Native MOS tubes is set according to the power supply voltage.

[0067] Specifically, take the first switch K1 as two NMOS tubes in parallel, and the second switch K2 as multiple Native NMOS tubes in series as an example. The gates of the two NMOS tubes are connected to the energy storage element 41, the gates of the two NMOS tubes receive the same enable signal, and the sources of the two NMOS tubes are grounded. Multiple Native NMOS tubes are connected in series, in the order from the energy storage element 41 to the ground, wherein the drain of the first Native NMOS tube is connected to the energy storage element 41, the gate of the first Native NMOS tube is connected to the drain of one of the first switches K1, and the source of the first Native NMOS tube is connected to the drain of the next Native NMOS tube; the drain of each Native NMOS tube in the middle is connected to the source of the previous Native NMOS tube, and the gate is connected to the drain of one of the first switches K1, until the drain of the last Native NMOS tube is connected to the source of the previous Native NMOS tube, the gate of the last Native NMOS tube is connected to the drain of another first switch K1, and the source of the last Native NMOS tube is grounded. Specifically, when the power supply voltage is not less than the threshold voltage UVLO, the enable signal is in a first state, i.e., a high level, and the two first switches K1 are turned on in response to the same enable signal, and the gates of multiple Native NMOS tubes are grounded through the turned-on first switches K1, and the multiple Native NMOS tubes are all disconnected, and the energy storage element 41 discharges through the discharge path formed by the first switch K1; when the power supply voltage is less than the threshold voltage UVLO, the enable signal is in a second state, i.e., a low level or no signal state, and the two first switches K1 are disconnected in response to the same enable signal. At this time, the gate voltage of the last Native NMOS tube is generated based on the power supply voltage. Although the power supply voltage is very small at this time, the last Native NMOS tube is turned on and grounded by utilizing the conduction characteristics of the Native NMOS tube. Similarly, the gate voltage of the adjacent Native NMOS is not 0, and the source is grounded through the following Native NMOS tube, thereby controlling the conduction of multiple Native NMOS tubes in series, and the residual charge is released to the ground through the conduction path of multiple Native NMOS tubes in series.

[0068] Through the solution of this example, a separate first switch K1 is set for the last Native NMOS tube. When the power supply voltage is less than the threshold voltage UVLO, the last Native NMOS tube is first turned on and grounded, so that the sources of adjacent Native NMOS tubes are all grounded. Finally, all the Native NMOS tubes are turned on to release the charge in the energy storage element 41 through the path where the multiple Native NMOS tubes are turned on. In this example, by setting the corresponding first switch K1 for the last second switch K2, the control driving efficiency and response speed of the second switch K2 can be improved, thereby achieving rapid discharge.

[0069] Based on the previous example, see Fig. 9 As shown, the discharge circuit further includes: a first resistor R1; one end of the first resistor R1 is connected to the energy storage element 41, and the other end of the first resistor R1 is connected to one end of another first switch K1.

[0070] In one example, when the number of the first switch K1 is one, the first resistor R1 is arranged on the branch where the first switch K1 is located, one end of the first resistor R1 is connected to the energy storage element 41, and the other end is connected to one end of the first switch K1. Figure 7 and Figure 8 In a corresponding implementation mode, when there are multiple first switches K1, the first resistor R1 is arranged on the branch where the first switch K1 corresponding to the last second switch K2 is located, and one end of the first circuit R1 is connected to the energy storage element 41, and the other end is connected to one end of the first switch K1. R1 is a large resistor of megohm level. In the above example, by arranging the first resistor R1 on the branch where the first switch K1 is located, a first protection circuit is formed to improve the safety and stability of the entire circuit.

[0071] Based on any of the foregoing examples, the energy storage element 41 is connected to at least one first switch K1 via a second series structure 43, and the second series structure 43 is composed of at least one voltage-dividing resistor in series to form at least one voltage-dividing node; the control end of each second switch K2 is connected to the corresponding voltage-dividing node.

[0072] In this example, there is at least one voltage-dividing resistor between the energy storage element 41 and at least one first switch K1, and the at least one voltage-dividing resistor is connected in series to form a second series structure 43. For example, the second series structure 43 can be set between the energy storage element 41 and one first switch, or the second series structure 43 can be set between the energy storage element 41 and multiple first switches, that is, there can be multiple second series structures 43, which is not limited here.

[0073] For example, two second series structures 43 are provided, the first switch K1 includes two NMOS transistors, and the second switch K2 is a plurality of Native NMOS transistors connected in series. Fig. 9 , wherein Rs1…Rsn constitute a second series structure 43 between the energy storage element 41 and a first switch K1. The resistor R1 constitutes a second series structure 43 between the energy storage element 41 and another first switch K1. Specifically, one end of the second series structure 43 constituted by Rs1…Rsn is connected to the energy storage element 41, and the other end of the second series structure 43 is connected to the drain of the first NMOS tube; the gate of the first NMOS tube receives an enable signal, and the source of the first NMOS tube is grounded; one end of the second series structure 43 constituted by the resistor R1 is connected to the energy storage element 41, and the other end of the second series structure 43 is connected to the drain of another NMOS tube, the gate of the other NMOS tube receives the same enable signal, and the source of the other NMOS tube is grounded. Fig. 9 As shown in the example, the control end of each Native NMOS tube is connected to the voltage-dividing node corresponding to each voltage-dividing resistor. Specifically, resistor Rs1 provides a voltage-dividing node corresponding to MN1, resistor Rs2 provides a voltage-dividing node corresponding to MN2, and so on, until resistor Rsn provides a voltage-dividing node corresponding to MNn, and resistor R1 provides a voltage-dividing node corresponding to the last second switch MNn+1. It should be noted that each embodiment can be implemented separately or in combination. For example, when this example is implemented in combination with the aforementioned example of setting a first protection circuit, the first protection circuit and the second series structure 43 located between the energy storage element 41 and another first switch K1 can be implemented by the same structure, namely, the first resistor R1.

[0074] In one example, the number of the voltage-dividing resistors is the same as the number of the second switches K2. In the above example, by providing a voltage-dividing resistor between the first switch K1 and the energy storage element 41 to divide the voltage, the safety and stability of the circuit are improved.

[0075] On the basis of any of the above examples, the discharge circuit further includes a second resistor; one end of the second resistor is connected to the energy storage element 41, and the other end of the second resistor is connected to one end of the first series structure 42. Specifically, the second resistor is arranged on the branch where the first series structure 42 is located, and the second resistor is a small resistor of about 200 ohms. Through the solution of this example, the safety and stability of the circuit are improved.

[0076] Based on any of the above examples, the discharge circuit further includes a third resistor; one end of the third resistor is connected to the control end of the first switch K1, and the other end of the third resistor is grounded. Specifically, the third resistor is set at the control end and the ground end of the first switch K1, and the third resistor is a large resistor of megohm level. Through the solution of this example, the safety and stability of the circuit are improved.

[0077] Based on any of the above examples, the discharge circuit further includes a second protection circuit; one end of the second protection circuit is connected to the control end of the grounded second switch K2, and the other end of the second protection circuit is grounded. Specifically, the second protection circuit is provided at the control end and the ground end of the grounded second switch K2, and the second protection circuit may be a diode or a resistor.

[0078] In one example, the second protection circuit includes: at least one diode; at least one diode is connected in series to form a third series structure, one end of the third series structure is connected to the control end of the grounded second switch K2, and the other end of the third series structure is grounded. In one example, the third series structure can be set to be two diodes connected in series, namely a first diode and a second diode. The anode of the first diode is connected to the control end of the grounded second switch K2, the cathode of the first diode is connected to the anode of the second diode, and the cathode of the second diode is grounded. In the above example, by setting the second protection circuit, the safety and stability of the circuit are improved.

[0079] In the discharge circuit provided in this embodiment, the discharge circuit includes at least one first switch and at least one second switch, and the second switch includes a power dissipation circuit; wherein, at least one second switch constitutes a first series structure; when the power supply voltage is not less than the threshold voltage UVLO, an enable signal is generated, and the first switch is turned on in response to the enable signal, thereby controlling the first series structure to be disconnected; when the power supply voltage is less than the threshold voltage UVLO, no enable signal is generated, and the first switch is disconnected, thereby controlling the first series structure to be turned on and release the charge in the energy storage element. The scheme of the present application sets a first series structure composed of power dissipation circuits, and utilizes the conduction characteristics of the power dissipation circuits to realize that when the power supply voltage is less than the threshold voltage, a discharge path can still be formed to release the charge in the energy storage element, thereby solving the problem that the energy storage element cannot be discharged under low voltage conditions. At the same time, the circuit structure is simple and has strong flexibility.

[0080] Embodiment 2

[0081] The discharge circuit of the above example is described below by taking a specific example.

[0082] Fig.10 A schematic diagram of a discharge circuit is provided for this example. Fig.10 As shown, the description is as follows: Fig.10It includes an energy storage element 41, i.e., a capacitor; two first switches are set as NMOS tubes, namely M1 and M2; multiple second switches are set as 5V Native NMOS tubes, namely MN1...MNn+1 to form a first series structure 42; multiple voltage-dividing resistors Rs are respectively Rs1...Rsn to form a second series structure 43; a first resistor R1; a second resistor R2; a third resistor R3; and a second protection circuit 44 includes two diodes D1 and D2 connected in series.

[0083] During the discharge process of the capacitor, when the power supply voltage at the VBUSP end is not less than the threshold voltage UVLO, a high-level enable signal is generated, and M1 and M2 respond to the high-level enable signal at the same time to control M1 and M2 to be turned on; at this time, the gate of the grounded MNn+1 is grounded, the source of MNn+1 is also grounded, MNn+1 is disconnected, and thus the entire first series structure 42 is completely disconnected, and the capacitor is discharged through the discharge path formed by M1 and M2; as the capacitor discharges, the power supply voltage continues to drop, and when the power supply voltage at the VBUSP end drops to less than the threshold voltage UVLO, the enable signal is cleared, and there is no enable signal, and M1 and M2 are controlled to be disconnected. At this time, the gate voltage of MNn+1 is the power supply voltage at the VBUSP end, the source of MNn+1 is grounded, and MNn+1 is turned on, so that the entire first series structure 42 is completely turned on, and the transmission path from the power supply voltage to the ground is turned on. When the power supply voltage at the VBUSP end is less than the threshold voltage UVLO, the residual charge in the capacitor is released.

[0084] The specific discharge circuit can refer to the content of the above embodiment. In summary, the discharge circuit provided in this example is provided with a first series structure 42 composed of a dissipative circuit, and utilizes the conduction characteristics of the dissipative circuit to form a discharge path when the power supply voltage is less than the threshold voltage, thereby releasing the charge in the energy storage element 41, thereby solving the problem that the energy storage element 41 cannot discharge under low voltage conditions. At the same time, the circuit structure is simple and has strong flexibility.

[0085] The embodiment of the present application further provides a charging circuit, comprising: a charging input terminal and a charging output terminal, wherein an energy storage element 41 is connected between the charging input terminal and the ground; and a discharge circuit including any of the foregoing examples.

[0086] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the claims.

[0087] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A discharge circuit, characterized in that: include: At least one first switch, at least one second switch; the second switch includes a power dissipation device; One end of the first switch is connected to the energy storage element, the other end of the first switch is grounded, and the control end of the first switch receives an enable signal; the first switch is used to be turned on when the power supply voltage is not less than a threshold voltage under the control of the enable signal; and to be turned off when the power supply voltage is less than the threshold voltage; The at least one second switch forms a first series structure, one end of the first series structure is connected to the energy storage element, the other end of the first series structure is grounded, the control end of each second switch is connected to one end of the first switch, and the working state of the second switch is different from the working state of the first switch at the same time.

2. The circuit according to claim 1, characterized in that The number of the first switch is one, and the number of the second switch is multiple; The first switch is used to be turned on when the enable signal is in a first state to control the plurality of second switches to be turned off, and to be turned off when the enable signal is in a second state to control the plurality of second switches to be turned on; A control end of each second switch is connected to one end of the first switch.

3. The circuit according to claim 1, characterized in that The number of the first switch is one, and the number of the second switch is one; One end of the second switch is connected to the energy storage element, the other end of the second switch is grounded, and the control end of the second switch is connected to one end of the first switch.

4. The circuit according to claim 1, characterized in that The number of the first switches is multiple, and the number of the second switches is multiple; One end of each first switch is connected to the energy storage element, the other end of each first switch is grounded, and the control end of each first switch receives the enable signal; Except for the grounded second switch, the control end of each of the other second switches is connected to one end of one of the first switches, and the control end of the grounded second switch is connected to one end of another first switch.

5. The circuit according to claim 1, characterized in that The number of the first switches is multiple, and the number of the second switch is one; One end of the second switch is connected to the energy storage element, the other end of the second switch is grounded, and the control end of the second switch is connected to one end of one of the first switches.

6. The circuit according to claim 4, characterized in that The number of the first switches is two; Except for the last-stage grounded second switch among the plurality of second switches, the control end of each of the remaining second switches is connected to one end of the one of the first switches, and the control end of the last-stage grounded second switch is connected to one end of the other first switch.

7. The circuit according to claim 6, characterized in that The discharge circuit further includes: a first resistor; One end of the first resistor is connected to the energy storage element, and the other end of the first resistor is connected to one end of the other first switch.

8. The circuit according to any one of claims 1 to 7, characterized in that: The energy storage element is connected to the at least one first switch via a second series structure, wherein the second series structure is composed of at least one voltage dividing resistor connected in series to form at least one voltage dividing node; The control end of each second switch is connected to the corresponding voltage division node.

9. The circuit according to any one of claims 1 to 7, characterized in that: The discharge circuit further includes a second resistor; One end of the second resistor is connected to the energy storage element, and the other end of the second resistor is connected to one end of the first series structure.

10. The circuit according to any one of claims 1 to 7, characterized in that: The discharge circuit further includes a third resistor; One end of the third resistor is connected to the control end of the first switch, and the other end of the third resistor is grounded.

11. The circuit according to any one of claims 1 to 7, characterized in that: The discharge circuit also includes a second protection circuit; One end of the second protection circuit is connected to the control end of the grounded second switch, and the other end of the second protection circuit is grounded.

12. The circuit according to claim 11, characterized in that The second protection circuit includes: at least one diode; The at least one diode is connected in series to form a third series structure, one end of the third series structure is connected to the control end of the grounded second switch, and the other end of the third series structure is grounded.

Images