Integrated oscillator and integration method thereof

Abstract

The invention relates to an integrated oscillator and an integration method thereof. The integration method comprises the following steps: adding a main inductor and a main capacitor to generate oscillation; two cross-coupled NMOST and two cross-coupled PMOST are added to maintain oscillation; a first auxiliary inductor and a first auxiliary capacitor are added to suppress the noise of the two cross-coupled NMOST; a second auxiliary inductor and a second auxiliary capacitor are added to suppress the noise of the two cross-coupled PMOST; the main inductor is symmetrically arranged relative to the symmetry plane; arranging the first auxiliary inductor into two half parts which are coupled in parallel, wherein the two half parts of the first auxiliary inductor are positioned in the main inductor and are mutually symmetrical relative to the symmetry plane; and arranging the second auxiliary inductor into two halves coupled in parallel, the two halves of the second auxiliary inductor being located within the main inductor, adjacent to the first auxiliary inductor, and symmetrical to each other with respect to the plane of symmetry.

Description

Technical Field

[0001] The present disclosure relates to an LC oscillator, and more particularly to an integrated LC oscillator with compact layout and low phase noise and an integration method thereof. Background Art

[0002] like Figure 1 As shown, an inductor-capacitor (LC) oscillator 100 includes an LC tank 110, a first cross-coupling pair 120, a second cross-coupling pair 140, a first source degeneration network 130, and a second source degeneration network 150. The LC tank 110 includes an inductor 111 and a capacitor 112, and the inductor 111 and the capacitor 112 are used to resonate at a resonant frequency f0. The first cross-coupling pair 120 includes a first N-channel Metal-Oxide Semiconductor Transistor (NMOST) 121 and a second NMOST 122, and the first NMOST 121 and the second NMOST 122 are configured in a cross-coupling topology. The second cross-coupling pair 140 includes a first P-channel Metal-Oxide Semiconductor Transistors (PMOST) 141 and a second PMOST 142, and the first PMOST 141 and the second PMOST 142 are configured in a cross-coupling structure. The first source degeneration network 130 includes an inductor 131 and a capacitor 132, and the inductor 131 and the capacitor 132 are used to resonate at twice the resonant frequency f0 and provide high impedance, wherein the twice the resonant frequency f0 is twice the resonant frequency of the oscillator 100. The second source degeneration network 150 includes an inductor 151 and a capacitor 152, and the inductor 151 and the capacitor 152 are used to resonate at twice the resonant frequency f0 and provide high impedance.

[0003] In this disclosure document, “V DD ” represents the power supply node, and “V SS” represents a ground node. The LC resonant cavity 110 generates an oscillation having an oscillation frequency approximately equal to the resonant frequency f0. The first cross-coupling pair 120 and the second cross-coupling pair 140 are both regenerative networks, which provide a regenerative function to compensate for the Ohmic loss of the LC resonant cavity 110, thereby maintaining the oscillation. The first source degeneration network 130 is used to provide source degeneration to the first cross-coupling pair 120 by forming a high impedance at twice the resonant frequency f0, so as to suppress the phase noise of the oscillation generated by the up-conversion of the noise of the first cross-coupling pair 120. The second source degeneration network 150 is used to provide source degeneration to the second cross-coupling pair 140 by forming a high impedance at twice the resonant frequency f0, so as to suppress the phase noise of the oscillation generated by the up-conversion of the noise of the second cross-coupling pair 140. The LC oscillator 100 is well known in the prior art and is not further described.

[0004] In some cases, the LC oscillator 100 is integrated on a silicon substrate using a complementary metal oxide semiconductor (CMOS) process. The LC oscillator 100 is expected to have a compact layout and low phase noise. However, when the layout is compact, the inductors 111, 131, and 151 will inevitably have strong magnetic coupling, resulting in a decrease in the quality factor of the LC resonant cavity 110, the first source degeneration network 130, and the second source degeneration network 150, thereby causing more serious phase noise.

[0005] An integrated LC oscillator that is compact in layout but has low phase noise by maintaining the quality factor of its inductor is highly desired. Summary of the invention

[0006] The object of the present disclosure is to have a compact LC oscillator. This object is achieved by placing a first auxiliary inductor (for suppressing phase noise) and a second auxiliary inductor (for suppressing phase noise) within a main inductor (for generating oscillation).

[0007] Another object of the present disclosure is to have an LC oscillator with low phase noise even in a compact layout. This object is achieved by dividing an auxiliary inductor (for suppressing noise) into two symmetrical halves, so that the net magnetic coupling between the main inductor (for generating oscillation) and the auxiliary inductor is significantly eliminated, thereby slowing down the degradation of the quality factor of the main inductor. This object is further ensured by placing a first auxiliary inductor (for suppressing noise) and a second auxiliary inductor (for suppressing noise) in close proximity, thereby improving the quality factor of the first auxiliary inductor and the second auxiliary inductor, and thereby improving the performance of suppressing noise.

[0008] The present disclosure provides an integrated oscillator, comprising an inductor-capacitor resonant cavity, a first cross-coupling pair, a second cross-coupling pair, a first source degeneration network, and a second source degeneration network. The inductor-capacitor resonant cavity comprises a main inductor and a main capacitor coupled in parallel between a first drain node and a second drain node, and the main inductor is symmetrically arranged relative to a symmetry plane. The first cross-coupling pair comprises a first NMOST and a second NMOST, the first NMOST and the second NMOST are coupled to a first source node, and are used to cross-couple the first drain node and the second drain node. The second cross-coupling pair comprises a first PMOST and a second PMOST, the first PMOST and the second PMOST are coupled to a second source node, and are used to cross-couple the first drain node and the second drain node. The first source degeneration network comprises a first auxiliary capacitor and a first auxiliary inductor coupled in parallel between a first source node and a ground node, and the first auxiliary inductor comprises two halves that are mirror images of each other relative to the symmetry plane and are arranged within the main inductor. The second source degeneration network includes a second auxiliary capacitor and a second auxiliary inductor coupled in parallel between a second source node and a power supply node. The second auxiliary inductor includes two halves that are mirror images of each other relative to a symmetry plane and are arranged within the main inductor. The two halves of the second auxiliary inductor are adjacent to the first auxiliary inductor, thereby having strong mutual coupling.

[0009] The present disclosure provides an oscillator integration method, comprising: adding a main inductor and a main capacitor to generate oscillation; adding two cross-coupled NMOSTs and two cross-coupled PMOSTs to maintain oscillation; adding a first auxiliary inductor and a first auxiliary capacitor to suppress the noise of the two cross-coupled NMOSTs; adding a second auxiliary inductor and a second auxiliary capacitor to suppress the noise of the two cross-coupled PMOSTs; arranging the main inductor symmetrically with respect to a symmetry plane; arranging the first auxiliary inductor into two halves coupled in parallel, wherein the two halves of the first auxiliary inductor are located within the main inductor and are symmetrical to each other with respect to the symmetry plane; and arranging the second auxiliary inductor into two halves coupled in parallel, wherein the two halves of the second auxiliary inductor are located within the main inductor, adjacent to the first auxiliary inductor, and are symmetrical to each other with respect to the symmetry plane. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to make the above and other objects, features, advantages and embodiments of the present disclosure more clearly understood, the following are the descriptions of the accompanying drawings:

[0011] Figure 1 shows a schematic diagram of an inductor-capacitor (LC) oscillator;

[0012] Figure 2A A schematic diagram showing an integrated LC oscillator according to an embodiment of the present disclosure;

[0013] Figure 2B Shows Figure 2A A top view of the layout of the integrated LC oscillator in FIG. 1 ; and

[0014] Figure 3 A flow chart of an oscillator integration method according to an embodiment of the present disclosure is shown.

[0015] Explanation of symbols

[0016] 100: Inductor Capacitor (LC) Oscillator

[0017] 110: LC resonant cavity

[0018] 111: Inductor

[0019] 112: Capacitor

[0020] 120: First cross-coupled pair

[0021] 121: N-channel metal oxide semiconductor transistor (NMOST)

[0022] 122: NMOST

[0023] 130: First Source Decay Network

[0024] 131: Inductor

[0025] 132: Capacitor

[0026] 140: Second cross-coupled pair

[0027] 141: P-channel metal oxide semiconductor transistor (PMOST)

[0028] 142: PMOST

[0029] 150: Second Source Decay Network

[0030] 151: Inductor

[0031] 152: Capacitor

[0032] 200: LC Oscillator

[0033] 210: LC resonant cavity

[0034] 300: Integrated approach

[0035] 310, 320, 330, 340: Steps

[0036] 350, 360, 370: Steps

[0037] B200, B210, B220: Description column

[0038] B230, B240, B250: Description column

[0039] CA1: First auxiliary capacitor

[0040] CA2: Second auxiliary capacitor

[0041] CCP1: First cross-coupled pair

[0042] CCP2: Second cross-coupled pair

[0043] CM: Main Capacitor

[0044] k 24 , k 35 : Mutual Coupling

[0045] LA1_1, LA2_1: First half

[0046] LA1_2, LA2_2: Second half

[0047] LM: Main Inductance

[0048] LM_1: First metal trace

[0049] LM_2: Second metal trace

[0050] LM_3: The third metal trace

[0051] LM_4, LM_5: Interconnect metal vias

[0052] ND1: First drain node

[0053] ND2: Second drain node

[0054] NM1: First NMOST

[0055] NM2: Second NMOST

[0056] NS1: First source node

[0057] NS2: Second source node

[0058] PM1: First PMOST

[0059] PM2: Second PMOST

[0060] SDN1: Source-Decay Networking

[0061] SDN2: Source-Decay Second Network

[0062] V DD : Power supply node

[0063] V SS : Ground node DETAILED DESCRIPTION

[0064] The present disclosure relates to an inductor-capacitor (LC) oscillator. Although several exemplary embodiments that are considered to be advantageous modes for implementing the present invention are described in the present disclosure, it should be understood that the present invention can be implemented in a variety of ways and is not limited to the specific examples described below or the specific ways of implementing any features of such examples. In other instances, in order to avoid obscuring the implementation of the present disclosure, existing details are not shown or described.

[0065] Those skilled in the art understand the terms and basic concepts related to microelectronics used in this disclosure, such as "voltage", "current", "oscillator", "LC oscillator", "frequency", "resonance", "resonance network", "LC resonant cavity", "impedance", "power supply", "grounding", "noise", "phase noise", "complementary metal oxide semiconductor (CMOS)", "N-channel metal oxide semiconductor transistor (NMOST)", "P-channel metal oxide semiconductor transistor (PMOST)", "inductor", "capacitor", "through hole" and "cross coupling". Terms similar to the above and related concepts used in the context of microelectronics are obvious to those skilled in the art, and therefore will not be explained in detail.

[0066] A person skilled in the art can recognize the symbols for capacitors, inductors, mutual inductance coupling, and metal oxide semiconductor (MOS) transistors, and can distinguish between the "source", "gate", and "drain" terminals in PMOST and NMOST. A person skilled in the art can understand a circuit schematic composed of components such as capacitors, inductors, MOS transistors, etc., and does not need to describe in detail how one component in the schematic is connected to another component.

[0067] This disclosure document is disclosed from an engineering perspective. For example, regarding variables X and Y, when it is said that "X is equal to Y", it means "X is approximately equal to Y", that is, "the difference between X and Y is less than a specified engineering tolerance". When it is said that "X is 0", it means "X is approximately 0", that is, "X is less than a specified engineering tolerance". When it is said that "X is significantly less than Y", it means "X is negligible with respect to Y", that is, "the ratio between X and Y is less than the engineering tolerance, so X can be ignored when compared with Y".

[0068] A power supply node is a circuit node whose voltage is approximately equal to the power supply voltage, which is higher than 0 but may have small high-frequency fluctuations. A ground node is a circuit node whose voltage is approximately equal to 0 but may have small high-frequency fluctuations. In this disclosure, “V DD ” represents the power supply node, and “V SS ” represents the ground node.

[0069] As is well known, a circuit is a combination of transistors, resistors, inductors, capacitors and / or other electronic components interconnected in a specific manner to achieve specific functions.

[0070] An inductor comprises a conductive path, usually implemented by a metal line (or trace), so that current can flow and generate a magnetic field. An inductor is usually implemented by a metal line (or trace) configured in a ring structure (topology), and the metal line (or trace) has two open ends including a first end and a second end, wherein current can flow from the first end to the second end.

[0071] CMOS process technology can integrate multiple transistors, multiple capacitors, and multiple inductors that are laid out in a multi-layer structure and interconnected using metal traces and vias between metal layers. The goal of the present disclosure is to use CMOS process technology to integrate an LC oscillator in a compact layout area while achieving low phase noise. The multi-layer structure of the CMOS process technology includes a polysilicon layer, multiple metal layers, and multiple via layers for providing metal interconnections. The multiple metal layers include an ultra-thick metal (UTM) layer, a redistribution layer (RDL), and multiple lower metal layers. In a non-limiting example, a 28 nanometer (nm) 1P7M (a multi-layer structure includes a polysilicon layer, an ultra-thick metal layer, six lower metal layers, and a redistribution layer) CMOS process technology is used.

[0072] Figure 2A A schematic diagram of an LC oscillator 200 according to an embodiment of the present disclosure is shown. In a non-limiting example, the LC oscillator 200 is integrated and manufactured on a silicon substrate using a 28nm 1P7M CMOS process technology. The LC oscillator 200 includes an LC resonant cavity 210, a first cross-coupling pair CCP1, a second cross-coupling pair CCP2, a first source degeneration network SDN1, and a second source degeneration network SDN2. The LC resonant cavity 210 includes a main inductor LM and a main capacitor CM coupled in parallel between a first drain node ND1 and a second drain node ND2. The first cross-coupling pair CCP1 includes a first NMOST NM1 and a second NMOST NM2, which are coupled to a first source node NS1 and are used to cross-couple the first drain node ND1 and the second drain node ND2. The second cross-coupling pair CCP2 includes a first PMOST PM1 and a second PMOST PM2, which are coupled to the second source node NS2 and are used to cross-couple the first drain node ND1 and the second drain node ND2. The first source degeneration network SDN1 includes a first source degeneration network coupled in parallel to the first source node NS1 and the ground node V SSThe first auxiliary capacitor CA1 and the first auxiliary inductor LA1 are connected between the first auxiliary capacitor CA1 and the first auxiliary inductor LA1, and the first auxiliary inductor LA1 is divided into a first half LA1_1 and a second half LA1_2. The second source degeneration network SDN2 includes a second source node NS2 and a power supply node V DD The second auxiliary capacitor CA2 and the second auxiliary inductor LA2 are connected therebetween, and the second auxiliary inductor LA2 is divided into a first half part LA2_1 and a second half part LA2_2.

[0073] The LC resonant cavity 210 is used to form a resonant network with a resonant frequency f0 to generate an oscillation with an oscillation frequency approximately equal to the resonant frequency f0. The first cross-coupling pair CCP1 and the second cross-coupling pair CCP2 are both regenerative networks, which are used to compensate for the ohmic loss of the LC resonant cavity 210 and thus maintain oscillation. The first source decay network SDN1 is used to generate resonance and then provide a high impedance at twice the oscillation frequency (approximately equal to twice the resonant frequency f0) to suppress the up-conversion of the noise of the first cross-coupling pair CCP1. The second source decay network SDN2 is used to generate resonance and then provide a high impedance at twice the oscillation frequency (approximately equal to twice the resonant frequency f0) to suppress the up-conversion of the noise of the second cross-coupling pair CCP2. Functionally, the LC oscillator 200 and Figure 1 The LC oscillator is the same as 100, but Figure 1 The inductor 131 in the circuit is replaced by the first auxiliary inductor LA1 implemented by the first half LA1_1 and the second half LA1_2 coupled in parallel, and Figure 1 The inductor 151 in FIG. 1 is replaced by a second auxiliary inductor LA2 implemented by a first half LA2_1 and a second half LA2_2 coupled in parallel.

[0074] However, the LC oscillator 200 has the following differences in implementation: the first half portions LA1_1 and LA2_1 are arranged in close proximity to each other, so there is a strong mutual coupling k between the first half portions LA1_1 and LA2_1. 24 (See description column B210 ). The second half portions LA1_2 and LA2_2 are arranged in close proximity to each other, so there is a strong mutual coupling k between the second half portions LA1_2 and LA2_2. 35(See description column B220), so there is a strong mutual coupling between the first auxiliary inductor LA1 and the second auxiliary inductor LA2; the first auxiliary inductor LA1 (including the first half LA1_1 and the second half LA1_2) is symmetrically arranged inside the main inductor LM (see description column B230); and the second auxiliary inductor LA2 (including the first half LA2_1 and the second half LA2_2) is also symmetrically arranged inside the main inductor LM (see description column B240), wherein the main inductor LM is symmetrically arranged relative to the symmetry plane (see description column B250). By arranging the first auxiliary inductor LA1 and the second auxiliary inductor LA2 inside the main inductor LM, the layout area can be made compact. By utilizing the advantage of the strong mutual coupling between the first auxiliary inductor LA1 (including the first half LA1_1 and the second half LA1_2) and the second auxiliary inductor LA2 (including the first half LA2_1 and the second half LA2_2) due to the highly adjacent layout, which results in a significant increase in magnetic flux linkage, the quality factor of the first auxiliary inductor LA1 and the second auxiliary inductor LA2 can be improved, thereby improving the source degeneration and phase noise suppression performance of the first source degeneration network SDN1 and the second source degeneration network SDN2.

[0075] In addition, since the first half LA1_1 and the second half LA1_2 are arranged in the main inductor LM in a symmetrical manner relative to the main inductor LM, the magnetic coupling between the main inductor LM and the first half LA1_1 can be eliminated by the magnetic coupling between the main inductor LM and the second half LA1_2, thereby suppressing the total coupling between the LC resonant cavity 210 and the first source degeneration network SDN1. Similarly, the first half LA2_1 and the second half LA2_2 are arranged in the main inductor LM in a symmetrical manner relative to the main inductor LM, thereby suppressing the total coupling between the main inductor LM and the first half LA2_1 can be eliminated by the magnetic coupling between the main inductor LM and the second half LA2_2, thereby suppressing the total coupling between the LC resonant cavity 210 and the second source degeneration network SDN2. This helps to alleviate the adverse effect of the quality factor degradation of the LC resonant cavity 210 caused by the undesirable coupling between the LC resonant cavity 210 and the first source degeneration network SDN1 and the second source degeneration network SDN2. Therefore, both goals (compact layout area and low phase noise) are achieved.

[0076] Figure 2BA top view of a non-limiting example of the layout of the LC oscillator 200 is shown. The description text is shown in the description column B200. The main inductor LM includes a first metal trace LM_1, a second metal trace LM_2, a third metal trace LM_3, and interconnecting metal vias LM_4, LM_5. The first metal trace LM_1 is arranged in the ultra-thick metal (UTM) layer, the second metal trace LM_2 and the third metal trace LM_3 are arranged in the redistribution layer (RDL), and the interconnecting metal vias LM_4 and LM_5 are used to connect the first metal trace LM_1 to the second metal trace LM_2 and the third metal trace LM_3 respectively. The first metal trace LM_1 is the main part of the main inductor LM, the second metal trace LM_2 and the third metal trace LM_3 are the two tail ends of the main inductor LM and are connected to the main capacitor CM, the first cross-coupling pair CCP1 and the second cross-coupling pair CCP2. It should be noted that the second metal trace LM_2 and the third metal trace LM_3 are implemented as the first drain node ND1 and the second drain node ND2, respectively. The first auxiliary inductor LA1 (divided into a first half LA1_1 and a second half LA1_2 coupled in parallel) is laid out in the redistribution layer. The second auxiliary inductor LA2 (divided into a first half LA2_1 and a second half LA2_2 coupled in parallel) is laid out in a very thick metal layer. The main inductor LM is laid out symmetrically with respect to the symmetry plane (shown as a center line in the top view). With respect to the symmetry plane, the first half LA1_1 and the second half LA1_2 are mirror images of each other. Similarly, with respect to the symmetry plane, the first half LA2_1 and the second half LA2_2 are mirror images of each other. The first half LA1_1 and LA2_1 are laid out in close proximity at a height. Similarly, the second half LA1_2 and LA2_2 are also laid out in close proximity at a height.

[0077] The main capacitor CM is symmetrically arranged between the second metal trace LM_2 and the third metal trace LM_3 and crosses the symmetry plane. The first auxiliary capacitor CA1 is symmetrically arranged between the first half LA1_1 and the second half LA1_2 and crosses the symmetry plane. DD When the first half LA2_1 flows to the second source node NS2 in a counterclockwise direction, another current of the same magnitude flows from the power supply node V DDThe magnetic coupling between the main inductor LM and the first half LA2_1 and the magnetic coupling between the main inductor LM and the second half LA2_2 are the same in magnitude but opposite in polarity. Therefore, the net magnetic coupling between the main inductor LM and the second auxiliary inductor LA2 (including the first half LA2_1 and the second half LA2_2) is 0, indicating complete isolation. Similarly, when a current flows from the first source node NS1 through the first half LA1_1 in a counterclockwise direction to the ground node V SS , based on geometric symmetry, another current of the same magnitude will flow from the first source node NS1 through the second half LA1_2 in a clockwise direction to the ground node V SS . The magnetic coupling between the main inductor LM and the first half LA1_1 and the magnetic coupling between the main inductor LM and the second half LA1_2 are of the same magnitude but opposite polarity. Therefore, the net magnetic coupling between the main inductor LM and the first auxiliary inductor LA1 (including the first half LA1_1 and the second half LA1_2) is 0, representing complete isolation. Therefore, although the first auxiliary inductor LA1 (including the first half LA1_1 and the second half LA1_2) and the second auxiliary inductor LA2 (including the first half LA2_1 and the second half LA2_2) exist, the performance of the main inductor LM in terms of magnetic flux generation and thus the quality factor can be maintained. In addition, due to the adjacent configuration in the layout, there is a strong mutual coupling between the first half LA1_1 and LA2_1, and there is also a strong mutual coupling between the second half LA1_2 and LA2_2. From the power supply node V DD The current flows to the second source node NS2 through the first half portion LA2_1 and flows from the first source node NS1 through the first half portion LA1_1 to the ground node V SS The currents in the two circuits will increase each other’s flux linkage due to the strong mutual coupling. Similarly, the currents in the two circuits will increase each other’s flux linkage due to the strong mutual coupling. DD The current flows to the second source node NS2 through the second half LA2_2 and flows from the first source node NS1 through the second half LA1_2 to the ground node V SS The currents of the two circuits increase the magnetic flux due to the strong mutual coupling. Therefore, the quality factor of the first auxiliary inductor LA1 (including the first half LA1_1 and the second half LA1_2) and the second auxiliary inductor LA2 (including the first half LA2_1 and the second half LA2_2) will be improved, and the source attenuation effect and noise suppression effect of the first source decay network SDN1 and the second source decay network SDN2 will be more effective. Therefore, although the layout of the LC oscillator 200 is compact, its phase noise can be very low.

[0078] Although Figure 2BThe main inductor LM in the figure is shown as a single-turn structure, but this is only a non-limiting example. In an embodiment not shown in the drawings but clearly understood by a person skilled in the art, the main inductor LM is a multi-turn structure having at least one turn of metal routing arranged on an ultra-thick metal (UTM) layer. Since the ultra-thick metal layer has a low resistance, it is beneficial to the layout of the main inductor LM. In one embodiment, the first auxiliary inductor LA1 (including the first half LA1_1 and the second half LA1_2) is a multi-turn structure having at least one turn of metal routing arranged on one of the ultra-thick metal layer and the redistribution layer (RDL). In one embodiment, the second auxiliary inductor LA2 (including the first half LA2_1 and the second half LA2_2) is a multi-turn structure having at least one turn of metal routing arranged on one of the ultra-thick metal layer and the redistribution layer. The resistance value of the redistribution layer is greater than the resistance value of the ultra-thick metal layer. However, by using a combination of the redistribution layer and the ultra-thick metal layer, the overall layout area can be more compact.

[0079] Figure 3 The flow chart of an oscillator integration method 300 according to an embodiment of the present disclosure is shown. The integration method 300 includes the following steps: in step 310, a main inductor and a main capacitor are added to generate an oscillation; in step 320, two cross-coupled NMOSTs and two cross-coupled PMOSTs are added to maintain the oscillation; in step 330, a first auxiliary inductor and a first auxiliary capacitor are added to suppress the noise of the two cross-coupled NMOSTs; in step 340, a second auxiliary inductor and a second auxiliary capacitor are added to suppress the noise of the two cross-coupled PMOSTs; in step 350, the main inductor is symmetrically arranged with respect to a symmetry plane; in step 360, the first auxiliary inductor is arranged as two halves coupled in parallel, the two halves of the first auxiliary inductor are located within the main inductor and are symmetrical to each other with respect to the symmetry plane; in step 370, the second auxiliary inductor is arranged as two halves coupled in parallel, the two halves of the second auxiliary inductor are located within the main inductor, are adjacent to the first auxiliary inductor, and are symmetrical to each other with respect to the symmetry plane.

[0080] Those skilled in the art will readily appreciate that, in accordance with the teachings of this disclosure, various modifications and variations may be made to the device and method. Therefore, the above disclosure should not be interpreted as being limited only by the scope of the attached claims.

Claims

1. An integrated oscillator, comprising: An LC resonant cavity includes a main inductor and a main capacitor coupled in parallel between a first drain node and a second drain node, and the main inductor is symmetrically arranged relative to a symmetry plane; a first cross-coupled pair, comprising a first N-channel metal oxide semiconductor transistor and a second N-channel metal oxide semiconductor transistor, the first N-channel metal oxide semiconductor transistor and the second N-channel metal oxide semiconductor transistor are coupled to a first source node and are used to cross-couple the first drain node and the second drain node; a second cross-coupled pair including a first P-channel MOS transistor and a second P-channel MOS transistor, the first P-channel MOS transistor and the second P-channel MOS transistor being coupled to a second source node and cross-coupled to the first drain node and the second drain node; a first source degeneration network, comprising a first auxiliary capacitor and a first auxiliary inductor coupled in parallel between the first source node and a ground node, the first auxiliary inductor comprising two halves that are mirror images of each other with respect to the symmetry plane and are arranged within the main inductor; as well as A second source degeneration network includes a second auxiliary capacitor and a second auxiliary inductor coupled in parallel between the second source node and a power supply node, the second auxiliary inductor includes two halves that are mirror images of each other relative to the symmetry plane and are arranged within the main inductor, and the two halves of the second auxiliary inductor are adjacent to the first auxiliary inductor, thereby having a strong mutual coupling.

2. The integrated oscillator as claimed in claim 1, wherein the integrated oscillator is manufactured on a silicon substrate by using a complementary metal oxide semiconductor process, and the multi-layer structure of the complementary metal oxide semiconductor process includes a very thick metal layer, a redistribution layer and a plurality of lower metal layers. 3 . The integrated oscillator as claimed in claim 2 , wherein the main inductor comprises a metal trace coil, and the metal trace coil is arranged in the very thick metal layer. 4 . The integrated oscillator as claimed in claim 2 , wherein the first auxiliary inductor comprises a metal trace coil, and the metal trace coil is arranged in one of the very thick metal layer and the redistribution layer. 5 . The integrated oscillator as claimed in claim 2 , wherein the second auxiliary inductor comprises a metal trace coil, and the metal trace coil is arranged in one of the very thick metal layer and the redistribution layer. 6 . The integrated oscillator as claimed in claim 1 , wherein the main inductor and the main capacitor form a resonant network, and a resonant frequency of the resonant network is approximately equal to an oscillation frequency of the integrated oscillator. 7 . The integrated oscillator as claimed in claim 6 , wherein at twice the oscillation frequency, the first auxiliary inductor and the first auxiliary capacitor form a high impedance resonant network. 8 . The integrated oscillator as claimed in claim 6 , wherein at twice the oscillation frequency, the second auxiliary inductor and the second auxiliary capacitor form a high impedance resonant network.

9. A method for integrating an oscillator, comprising: Adding a main inductor and a main capacitor to generate an oscillation; adding two cross-coupled N-channel MOS transistors and two cross-coupled P-channel MOS transistors to maintain the oscillation; Adding a first auxiliary inductor and a first auxiliary capacitor to suppress a noise of the two cross-coupled N-channel metal oxide semiconductor transistors; Adding a second auxiliary inductor and a second auxiliary capacitor to suppress a noise of the two cross-coupled P-channel metal oxide semiconductor transistors; The main inductor is arranged symmetrically with respect to a symmetry plane; The first auxiliary inductor is arranged into two halves coupled in parallel, wherein the two halves of the first auxiliary inductor are located within the main inductor and are symmetrical to each other relative to the symmetry plane; as well as The second auxiliary inductor is arranged as two halves coupled in parallel, wherein the two halves of the second auxiliary inductor are located within the main inductor and adjacent to the first auxiliary inductor, and are symmetrical to each other relative to the symmetry plane. 10 . The integration method as claimed in claim 9 , wherein the main inductor and the main capacitor form a resonant network, and a resonant frequency of the resonant network is approximately equal to an oscillation frequency of the oscillator.

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