Data decryption method and device, equipment and storage medium

By setting the main chip and the slave chip set in the printing consumable chip for multi-level decryption operations, the data leakage risk problem caused by simple decryption logic in the prior art is solved, and the security of consumable printing is significantly improved.

CN119211442AActive Publication Date: 2024-12-27GUANGZHOU ZHONO ELECTRONICS TECH CO LTD

Patent Information

Application Number
CN202411247383.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-06
Publication Date
2024-12-27
Estimated Expiration
2044-09-06

AI Technical Summary

Technical Problem

The decryption logic of existing printing consumable chips is relatively simple and has a high risk of data leakage, resulting in low security of consumable printing.

Method used

By setting a multi-level decryption operation between the master chip and the first slave chipset, multiple decryption processing of encrypted data is performed using the target data identification, increasing the complexity of the decryption process, thereby increasing the cracking difficulty.

Benefits of technology

It effectively improves the security of consumable printing, reduces the risk of data leakage, and ensures the security of decrypted data.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The embodiment of the invention provides a data decryption method and device, equipment and a storage medium, and the method comprises the steps: when a main chip receives a data obtaining request sent by external equipment, obtaining a target data identifier in the data obtaining request through the main chip; querying a first storage information table arranged in the main chip to obtain first encrypted data; the master chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and the target data identifier to a first slave chip set; performing first preset decryption processing through a first slave chip set according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmitting the first target encrypted data to a master chip; and decrypting the first target encrypted data through the main chip based on a set second decryption algorithm to obtain first target decrypted data.
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Description

Technical Field

[0001] The embodiments of the present application relate to the field of computer technology, and in particular to a data decryption method, apparatus, device, and storage medium. Background Art

[0002] At present, with the continuous advancement of science and technology and the increase in office needs, the printing consumables industry has developed rapidly, and the demand for printing consumables has continued to increase. Among them, users can print electronic documents through printing devices to obtain paper materials. During the printing process of the printing device, the printing device needs to request decryption data from the consumables chip and verify the decryption data. Only when the decryption data verification is successful, the printing device can perform the printing operation.

[0003] In the related art, a data storage area and an algorithm storage area are provided inside the consumable chip, wherein the data storage area is used to store encrypted data, and the algorithm storage area is used to store a decryption algorithm. After receiving a data acquisition request from a printing device, the consumable chip can read the encrypted data in the data storage area, and call the decryption algorithm in the algorithm storage area to decrypt and obtain the decrypted data. However, since the decryption logic is relatively simple, it is easy for crackers to analyze and crack the consumable chip to obtain the original encrypted data and decryption algorithm, which has a high risk of data leakage, and the security of consumable printing is relatively low, which needs to be improved. Summary of the invention

[0004] The embodiments of the present application provide a data decryption method, apparatus, device and storage medium, which solve the problems in the related art that the decryption logic of consumable printing is relatively simple, there is a high risk of data leakage, and the security of consumable printing is low. It realizes the multi-level decryption operation through the set main chip and the first slave chipset to obtain the first target decrypted data, which can increase the complexity of the relevant process of obtaining decrypted data, thereby increasing the difficulty of cracking, reducing the risk of data leakage, and improving the security of consumable printing.

[0005] In a first aspect, an embodiment of the present application provides a data decryption method, the method comprising:

[0006] When the main chip receives a data acquisition request sent by an external device, the main chip queries a first storage information table set in the main chip based on a target data identifier in the data acquisition request to obtain first encrypted data;

[0007] Decrypting the first encrypted data to obtain first intermediate data by the master chip based on a set first decryption algorithm, and transmitting the first intermediate data and the target data identifier to the first slave chipset;

[0008] The first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmits the first target encrypted data to the master chip;

[0009] The first target encrypted data is decrypted by the main chip based on a set second decryption algorithm to obtain first target decrypted data, and the first target decrypted data is fed back to the external device.

[0010] In a second aspect, an embodiment of the present application further provides a data decryption device, including:

[0011] The master chip is configured to, upon receiving a data acquisition request sent by an external device, query a first storage information table set in the master chip based on a target data identifier in the data acquisition request to obtain first encrypted data, decrypt the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmit the first intermediate data and the target data identifier to a first slave chipset;

[0012] The first slave chipset is configured to perform a first preset decryption process according to the first intermediate data and the target data identifier to obtain first target encrypted data, and transmit the first target encrypted data to the master chip;

[0013] The main chip is further configured to decrypt the first target encrypted data based on a set second decryption algorithm to obtain first target decrypted data, and feed back the first target decrypted data to the external device.

[0014] In a third aspect, an embodiment of the present application further provides a data decryption device, the device comprising:

[0015] one or more processors;

[0016] a storage device configured to store one or more programs,

[0017] When the one or more programs are executed by the one or more processors, the one or more processors implement the data decryption method described in the embodiment of the present application.

[0018] In a fourth aspect, an embodiment of the present application further provides a non-volatile storage medium storing computer executable instructions, wherein the computer executable instructions are configured to execute the data decryption method described in the embodiment of the present application when executed by a computer processor.

[0019] In the embodiment of the present application, when the main chip receives a data acquisition request sent by an external device, the main chip queries the first storage information table set in the main chip based on the target data identifier in the data acquisition request to obtain the first encrypted data; the main chip decrypts the first encrypted data based on the set first decryption algorithm to obtain the first intermediate data, and transmits the first intermediate data and the target data identifier to the first slave chip group; the first slave chip group performs a first preset decryption process based on the first intermediate data and other encrypted data corresponding to the target data identifier to obtain the first target encrypted data, and transmits the first target encrypted data to the main chip; the main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain the first target decrypted data, and feeds back the first target decrypted data to the external device. In the above scheme, the first target decrypted data is obtained by performing multi-level decryption operations by the set main chip and the first slave chip group, which can increase the complexity of the relevant process of obtaining the decrypted data, thereby increasing the difficulty of cracking, reducing the risk of data leakage, and improving the security of consumable printing. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A flowchart of a data decryption method provided in an embodiment of the present application;

[0021] Figure 2 A flowchart of a data decryption method including a first chip performing a decryption operation provided in an embodiment of the present application;

[0022] Figure 3 A flowchart of a data decryption method including a first chip and a second chip performing a decryption operation provided in an embodiment of the present application;

[0023] Figure 4 A schematic diagram of a connection between a master chip and a first slave chipset for data transmission between two chips via a communication line provided in an embodiment of the present application;

[0024] Figure 5 A schematic diagram of a connection between a master chip and a first slave chipset for data transmission via an encrypted communication bus provided in an embodiment of the present application;

[0025] Figure 6 A schematic diagram of a process of an application data decryption method provided in an embodiment of the present application;

[0026] Figure 7 A flowchart of a data decryption method including a process of determining a security level corresponding to a target data identifier provided in an embodiment of the present application;

[0027] Figure 8 A flowchart of a data decryption method including executing corresponding decryption processes according to different security levels provided in an embodiment of the present application;

[0028] Fig. 9 A flowchart of a data decryption method including a third chip and a fourth chip performing a decryption operation provided in an embodiment of the present application;

[0029] Fig.10 A flowchart of another data decryption method including a third chip and a fourth chip performing a decryption operation provided in an embodiment of the present application;

[0030] Fig.11 A schematic diagram of another method for decrypting application data provided by an embodiment of the present application;

[0031] Fig.12 A structural block diagram of a data decryption device provided in an embodiment of the present application;

[0032] Fig.13 A schematic diagram of the structure of a data decryption device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0033] The embodiments of the present application are further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the embodiments of the present application, rather than to limit the embodiments of the present application. It should also be noted that, for ease of description, only parts related to the embodiments of the present application are shown in the accompanying drawings, rather than all structures.

[0034] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0035] The data decryption method provided in the embodiment of the present application is used in the printing process of an external device, and the decryption process is executed by setting a master chip and a slave chipset, and the decrypted data for verification is provided to the external device. Specific application scenarios may include: document printing, picture printing, etc. The several application scenarios listed above are only exemplary and explanatory. In actual applications, the data decryption method can also be used in data decryption in other scenarios, and the embodiment of the present application does not limit this. The present application aims to provide a data decryption method, device, equipment and storage medium to solve the problem that the decryption logic of consumables printing in the related technology is relatively simple, there is a high risk of data leakage, and the security of consumables printing is low.

[0036] Figure 1 This is a flow chart of a data decryption method provided in an embodiment of the present application. The data decryption method can be implemented by an independently set processor, or by a processor inside the set master chip and the first slave chipset, which is not limited in the present application. Figure 1 As shown, the data decryption method specifically includes the following steps:

[0037] Step S101: When the main chip receives a data acquisition request sent by an external device, the main chip queries a first storage information table set in the main chip based on a target data identifier in the data acquisition request to obtain first encrypted data.

[0038] Among them, the external device can be a device that can convert data stored in a computer, mobile phone or other electronic device into visual text, images or photos and other information, and print it on paper or other media, such as a printer, a copier, a fax machine, etc. The embodiment of the present application involves multiple consumable chips, including a master chip and a first slave chipset, and the master chip and the first slave chipset can be set on consumables such as ink cartridges, toner cartridges, ribbons, etc. In one embodiment, the master chip and the first slave chipset can form a communication channel through a communication line in pairs, and transmit data to each other based on the communication channel. Since the timing of each communication channel is not synchronized, it can be helpful to increase the difficulty of collecting communication data from the outside. In one embodiment, the master chip and the first slave chipset can transmit data through a communication bus, which is helpful to reduce the communication pins of the chip. Optionally, after the master chip and the slave chipset are powered on, the chips can perform communication verification in pairs, and only when all chips pass mutual verification can the subsequent decryption process be executed. Since the external device needs to obtain decrypted data from the consumable chip to perform a printing operation, and verify the decrypted data, and the external device can only perform a printing operation if the verification is successful. In an embodiment of the present application, the main chip is connected to an external device in communication, and the external device can send a data acquisition request to the main chip to obtain decrypted data for verification. The data acquisition request may include a target data identifier, which may be a unique identifier of the target decrypted data required by the external device. The main chip or the first slave chipset may query the target data identifier to obtain relevant encrypted data and perform corresponding decryption operations. The first storage information table may be encrypted data corresponding to different data identifiers pre-stored in the main chip, and the encrypted data may be relevant input information using the first decryption algorithm during the decryption process.

[0039] Step S102: The master chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and the target data identifier to the first slave chipset.

[0040] Among them, the first decryption algorithm can be a combination of addition and subtraction calculations, XOR calculations, and displacement calculations, etc., or it can be an open source AES algorithm, RSA algorithm, etc., which can be adaptively selected by developers according to the chip performance and algorithm characteristics of the actual application scenario, and this application is not limited here. It can be understood that the first intermediate data can be obtained by decrypting the first encrypted data through the main chip, and this process can be regarded as the first level decryption of the decryption process, and the first intermediate data obtained by decryption can be used as the input information of the next level of decryption. In order to improve the security of the decryption process and increase the difficulty of cracking, the embodiment of the present application is provided with a first slave chipset to continue to perform the next level of decryption, and the first intermediate data and the target data identifier can be transmitted to the first slave chipset through the main chip. Optionally, in addition to transmitting the first intermediate data and the target data identifier to the first slave chipset, the main chip can also transmit the first identity identifier of the main chip to the first slave chipset, so that the first slave chipset performs a first preset decryption process according to the first intermediate data, other encrypted data corresponding to the target data identifier, and the first identity identifier to obtain the first target encrypted data. Thus, the first slave chipset can ensure the accurate source of the relevant input data for the first preset decryption process, and only perform decryption on the relevant data sent by the master chip associated with and bound to the first slave chipset.

[0041] In one embodiment, before transmitting the first intermediate data and the target data identifier to the first slave chipset, the method further includes:

[0042] Authentication is performed through the master chip and the first slave chipset set;

[0043] Accordingly, transmitting the first intermediate data and the target data identifier to the first slave chipset includes:

[0044] When the identity authentication result between the master chip and the first slave chipset is a pass state, the first intermediate data and the target data identifier are transmitted to the first slave chipset.

[0045] Therefore, when and only when the master chip completes identity authentication with the first slave chipset, the subsequent decryption process continues to be executed, thereby ensuring the security of the decryption operation.

[0046] Step S103: The first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmits the first target encrypted data to the master chip.

[0047] Among them, the first slave chipset can be provided with multiple slave chips, and the developer can determine the number of slave chips to be enabled according to the security requirements and execution efficiency requirements of different application scenarios, which is not limited in this application. The first preset decryption process can be that one or more slave chips in the first slave chipset determine other encrypted data based on the target data identification query, and use the other encrypted data and the first intermediate data as the input information of the internal preset decryption algorithm, thereby obtaining the first target encrypted data. It should be noted that according to the different number of slave chips enabled in the first slave chipset, one or more levels of decryption can be designed, and each related slave chip performs its corresponding decryption operation in sequence according to the preset decryption order, and finally the first target encrypted data can be obtained and transmitted to the master chip, and the first target encrypted data can be used as the input information of the last level of decryption. Optionally, in addition to transmitting the first target encrypted data to the master chip, the first slave chipset can also transmit the second identity identifier of the first slave chipset to the master chip, so that the master chip decrypts the first target encrypted data and the second identity identifier based on the set second decryption algorithm to obtain the first target decrypted data. Thus, the master chip can ensure the accurate source of the relevant input data for the second decryption algorithm, and only perform decryption on the relevant data sent by the first slave chipset associated and bound with the master chip.

[0048] Step S104: decrypting the first target encrypted data based on the set second decryption algorithm by the main chip to obtain first target decrypted data, and feeding back the first target decrypted data to the external device.

[0049] The second decryption algorithm may be the same as or different from the first decryption algorithm, which is not limited in this application. The first target encrypted data may be decrypted by the main chip to obtain the first target decrypted data, which is the final output result of the multi-level decryption operation and can be used to provide relevant verification information to the external device.

[0050] In the above, when the main chip receives a data acquisition request sent by an external device, the main chip queries the first storage information table set in the main chip based on the target data identifier in the data acquisition request to obtain the first encrypted data; the main chip decrypts the first encrypted data based on the set first decryption algorithm to obtain the first intermediate data, and transmits the first intermediate data and the target data identifier to the first slave chip group; the first slave chip group performs a first preset decryption process based on the first intermediate data and other encrypted data corresponding to the target data identifier to obtain the first target encrypted data, and transmits the first target encrypted data to the main chip; the main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain the first target decrypted data, and feeds back the first target decrypted data to the external device. In the above scheme, the first target decrypted data is obtained by performing multi-level decryption operations by the set main chip and the first slave chip group, which can increase the complexity of the relevant process of obtaining the decrypted data, thereby increasing the difficulty of cracking, reducing the risk of data leakage, and improving the security of consumable printing.

[0051] Figure 2 A flowchart of a data decryption method including a first chip performing a decryption operation is provided in an embodiment of the present application, wherein: a first chip is enabled from a chipset to participate in the decryption process. Figure 2 As shown, the data decryption method specifically includes the following steps:

[0052] Step S201: When the main chip receives a data acquisition request sent by an external device, the main chip queries a first storage information table set in the main chip based on a target data identifier in the data acquisition request to obtain first encrypted data.

[0053] Step S202: The master chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and a target data identifier to a first slave chipset, wherein the first slave chipset includes a first chip.

[0054] Step S203: query the second storage information table set based on the target data identifier through the first chip to obtain the second encrypted data, decrypt the first intermediate data and the second encrypted data based on the set third decryption algorithm to obtain the first target encrypted data, and transmit the first target encrypted data to the main chip.

[0055] Among them, the first slave chipset can choose to enable only the first chip to participate in the decryption process, add one more level of decryption, so as to improve security to a certain extent while ensuring the execution efficiency of the decryption process. It should be noted that in this embodiment, encrypted data is pre-stored in the main chip and the first chip respectively, and the target data identifier can be associated with the first encrypted data in the main chip and the second encrypted data in the first chip respectively. The distributed setting of encrypted data can help increase the difficulty of cracking the encrypted data. The second storage information table can be encrypted data corresponding to different data identifiers pre-stored in the first chip, and the encrypted data can be related input information of the third decryption algorithm used in the decryption process. The third decryption algorithm can be the same or different from the decryption algorithm provided in the aforementioned embodiment, and this application is not limited here. The first intermediate data and the second encrypted data can be used together as input information of the third decryption algorithm, and the corresponding decryption obtains the first target encrypted data. It can be understood that in this embodiment, the first target encrypted data needs to be obtained by the main chip and the first chip to perform corresponding decryption operations in sequence.

[0056] Step S204: The main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain first target decrypted data, and feeds back the first target decrypted data to the external device.

[0057] As mentioned above, by using the first chip of the first slave chipset, an additional level of decryption can be provided for the decryption process. By respectively setting encrypted data in the main chip and the first chip, the encrypted data can be deployed in an additional chip, which is conducive to increasing the complexity of the decryption process, ensuring the execution efficiency of the decryption process, and increasing the difficulty of cracking to a certain extent.

[0058] Figure 3 A flowchart of a data decryption method including a first chip and a second chip performing a decryption operation is provided in an embodiment of the present application. The first chip and the second chip are enabled to participate in the decryption process from the first chipset. Figure 3 As shown, the data decryption method specifically includes the following steps:

[0059] Step S301: When the main chip receives a data acquisition request sent by an external device, the main chip queries a first storage information table set in the main chip based on a target data identifier in the data acquisition request to obtain first encrypted data.

[0060] Step S302: The master chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and a target data identifier to a first slave chipset, wherein the first slave chipset includes a first chip and a second chip.

[0061] Wherein, in one embodiment, Figure 4 A schematic diagram of a connection between a master chip and a first slave chipset for data transmission via a communication line provided in an embodiment of the present application, such as Figure 4 As shown, the first slave chipset includes a first chip 102 and a second chip 103, the master chip 101 and the first chip 102 form a first encryption channel 104 through a communication line, the first chip 102 and the second chip 103 form a second encryption channel 105 through a communication line, and the second chip 103 and the master chip 101 form a third encryption channel 106 through a communication line. In one embodiment, Figure 5 A schematic diagram of a connection between a master chip and a first slave chipset for data transmission via an encrypted communication bus provided in an embodiment of the present application is shown in FIG. Figure 5 As shown, the master chip 101, the first chip 102 and the second chip 103 transmit data through the encrypted communication bus 107. In this embodiment, the first slave chipset can select to enable the first chip and the second chip, add two more levels of decryption, and further improve the security of the decryption process. The master chip can transmit the first intermediate data and the target data identifier to the first slave chipset, and the first chip and the second chip in the first slave chipset perform the relevant decryption operations.

[0062] Step S303: query the second storage information table set based on the target data identifier through the first chip to obtain second encrypted data, decrypt the first intermediate data and the second encrypted data based on the set third decryption algorithm to obtain second intermediate data, and transmit the second intermediate data and the target data identifier to the second chip.

[0063] Among them, after the master chip transmits the first intermediate data and the target data identifier to the first slave chipset, the first chip can first decrypt the first intermediate data and the queried second encrypted data to obtain the second intermediate data. The second intermediate data and the target data identifier can be used as input information for the second chip to perform the decryption operation.

[0064] Step S304: query the third storage information table set based on the target data identifier through the second chip to obtain the third encrypted data, decrypt the second intermediate data and the third encrypted data based on the set fourth decryption algorithm to obtain the first target encrypted data, and transmit the first target encrypted data to the main chip.

[0065] Among them, in this embodiment, encrypted data is pre-stored in the main chip, the first chip and the second chip respectively, and the target data identifier can be associated with the first encrypted data in the main chip, the second encrypted data in the first chip and the third encrypted data in the second chip respectively, further increasing the number of chips for distributed encrypted data setting, and greatly increasing the difficulty of cracking and obtaining encrypted data. The third storage information table can be encrypted data corresponding to different data identifiers pre-stored in the second chip, and the encrypted data can be related input information of the fourth decryption algorithm used in the decryption process. The fourth decryption algorithm can be the same as or different from the decryption algorithm provided in the aforementioned embodiment, and this application is not limited here. The second intermediate data and the third encrypted data can be used together as input information of the fourth decryption algorithm, and the corresponding decryption obtains the first target encrypted data. It can be understood that in this embodiment, the first target encrypted data needs to be obtained by the main chip, the first chip and the second chip performing corresponding decryption operations in sequence.

[0066] Step S305: The main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain first target decrypted data, and feeds back the first target decrypted data to the external device.

[0067] In one embodiment, Figure 6 A process diagram of an application data decryption method provided in an embodiment of the present application is shown in FIG. Figure 6 As shown, in the main chip 101, the first encrypted data is decrypted by the first decryption algorithm to obtain the first intermediate data; in the first chip 102, the first intermediate data and the second encrypted data input by the main chip 101 are decrypted by the third decryption algorithm to obtain the second intermediate data; in the second chip 103, the second intermediate data and the third encrypted data input by the first chip 102 are decrypted by the fourth decryption algorithm to obtain the first target encrypted data; in the main chip 101, the first target encrypted data input by the second chip 102 is decrypted by the second decryption algorithm to obtain the first target decrypted data.

[0068] As mentioned above, by using the first chip and the second chip of the first slave chipset, two levels of decryption can be added to the decryption process. By respectively setting encrypted data in the main chip, the first chip and the second chip, the encrypted data can be deployed on multiple chips, further increasing the complexity of the decryption process, effectively improving the security of the decryption process, and greatly reducing the risk of data leakage due to cracking.

[0069] Figure 7 A flowchart of a data decryption method including a process of determining a security level corresponding to a target data identifier provided by an embodiment of the present application. Figure 7 As shown, the data decryption method specifically includes the following steps:

[0070] Step S401: When the main chip receives a data acquisition request sent by an external device, the main chip queries a security information table set in the main chip based on a target data identifier in the data acquisition request to obtain a security level corresponding to the target data identifier.

[0071] Among them, developers can divide different security levels according to the security requirements of different application scenarios, and the deployment method and decryption process of encrypted data corresponding to each security level are different. In this embodiment, a first security level and a second security level can be set. The first security level corresponds to the deployment of encrypted data on multiple chips, including a master chip and a first slave chipset, and the second security level corresponds to the deployment of encrypted data on a single chip, that is, the encrypted data is only deployed on the master chip. Since the encrypted data is deployed on multiple chips, its security is relatively higher than that of the encrypted data deployed on a single chip, so it can be regarded that the security of the first security level is higher than that of the second security level. The master chip can determine the security level corresponding to the target data identifier by querying the security information table, thereby determining the deployment method of the encrypted data and the corresponding decryption process.

[0072] Step S402: when the security level is the first security level, the main chip queries a first storage information table corresponding to the first security level set in the main chip based on the target data identifier in the data acquisition request to obtain first encrypted data.

[0073] Among them, if the security level is the first security level, the encrypted data is deployed in the master chip and the first slave chipset respectively, and the first storage information table corresponding to the first security level in the master chip stores the first encrypted data corresponding to the target data identifier. The master chip can preferentially process the first encrypted data to obtain the first intermediate data, and transmit it to the first slave chipset, so that the first slave chipset continues to perform the corresponding decryption operation in combination with other encrypted data.

[0074] Step S403: The master chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and the target data identifier to the first slave chipset.

[0075] Step S404: the first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmits the first target encrypted data to the master chip.

[0076] Step S405: The main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain first target decrypted data, and feeds back the first target decrypted data to the external device.

[0077] As mentioned above, by querying the security level corresponding to the target data identifier, it is possible to effectively combine the security requirements of the actual application scenario to determine the corresponding deployment method of the encrypted data and the decryption process. When the security level is the first security level, the master chip and the first slave chipset can perform corresponding decryption operations based on their respective stored encrypted data, which is beneficial to ensuring the security of the decryption process.

[0078] Figure 8 A flowchart of a data decryption method including executing corresponding decryption processes according to different security levels is provided in an embodiment of the present application. Figure 8 As shown, the data decryption method specifically includes the following steps:

[0079] Step S501: When the main chip receives a data acquisition request sent by an external device, the main chip queries a security information table set in the main chip based on a target data identifier in the data acquisition request to obtain a security level corresponding to the target data identifier.

[0080] Step S502: When the security level is the first security level, the main chip queries a first storage information table corresponding to the first security level set in the main chip based on the target data identifier in the data acquisition request to obtain first encrypted data.

[0081] Step S503: The master chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and the target data identifier to the first slave chipset.

[0082] Step S504: the first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmits the first target encrypted data to the master chip.

[0083] Step S505: The main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain first target decrypted data, and feeds back the first target decrypted data to the external device.

[0084] Step S506: When the security level is the second security level, the main chip searches the fourth storage information table corresponding to the second security level in the main chip based on the target data identifier to obtain fourth encrypted data and fifth encrypted data.

[0085] Among them, if the security level is the second security level, the encrypted data is only deployed in the main chip, and the fourth storage information table corresponding to the second security level in the main chip can be the encrypted data corresponding to different data identifiers corresponding to the second security level pre-stored in the main chip, wherein the fourth encrypted data and the fifth encrypted data corresponding to the target data identifier are stored, and the fourth encrypted data and the fifth encrypted data can be used as input information for the second slave chipset to perform decryption operations.

[0086] Step S507: Transmit the fourth encrypted data and the fifth encrypted data to the second slave chipset through the master chip.

[0087] Step S508: The second slave chipset performs a second preset decryption process on the fourth encrypted data and the fifth encrypted data to obtain second target encrypted data and third target encrypted data, and transmits the second target encrypted data and the third target encrypted data to the master chip.

[0088] Among them, the second slave chipset can be provided with multiple slave chips, and the developer can determine the number of slave chips that need to be enabled according to the security requirements and execution efficiency requirements of different application scenarios, which is not limited in this application. The second preset decryption processing can be that at least two slave chips in the second slave chipset use the fourth encrypted data and the fifth encrypted data as input information of the internal preset decryption algorithm, and then obtain the second target encrypted data and the third target encrypted data. It should be noted that according to the different number of slave chips enabled in the second slave chipset, different multi-level decryption can be designed, and each related slave chip performs its corresponding decryption operation in sequence according to the preset decryption order, and finally the second target encrypted data and the third target encrypted data can be obtained and transmitted to the master chip. The second target encrypted data and the third target encrypted data can be used as input information for the last level of decryption.

[0089] Step S509: The main chip decrypts the second target encrypted data and the third target encrypted data based on the set fifth decryption algorithm to obtain second target decrypted data, and feeds back the second target decrypted data to the external device.

[0090] The fifth decryption algorithm may be the same as or different from the decryption algorithm provided in the aforementioned embodiment, which is not limited in this application. The second target encrypted data and the third target encrypted data may be decrypted by the main chip to obtain the second target decrypted data, which is the final output result of the multi-level decryption operation and can be used to provide relevant verification information to the external device.

[0091] As mentioned above, when the security level is the second security level, the encrypted data can be selected to be deployed only in the relevant decryption process of the main chip, which relatively reduces the distribution complexity of the decrypted data and can balance the execution speed and security of the decryption process to a certain extent, which is conducive to adapting to application scenarios with diverse security requirements.

[0092] Fig. 9 A flowchart of a data decryption method including a third chip and a fourth chip performing a decryption operation is provided in an embodiment of the present application. Fig. 9 As shown, the data decryption method specifically includes the following steps:

[0093] Step S601: When the main chip receives a data acquisition request sent by an external device, the main chip queries the security information table set in the main chip based on the target data identifier in the data acquisition request to obtain the security level corresponding to the target data identifier.

[0094] Step S602: When the security level is the first security level, the main chip queries a first storage information table corresponding to the first security level set in the main chip based on the target data identifier in the data acquisition request to obtain first encrypted data.

[0095] Step S603: The master chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and the target data identifier to the first slave chipset.

[0096] Step S604: the first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmits the first target encrypted data to the master chip.

[0097] Step S605: The main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain first target decrypted data, and feeds back the first target decrypted data to the external device.

[0098] Step S606: When the security level is the second security level, the main chip searches the fourth storage information table corresponding to the second security level in the main chip based on the target data identifier to obtain fourth encrypted data and fifth encrypted data.

[0099] Step S607: Transmit the fourth encrypted data and the fifth encrypted data to the second slave chipset through the master chip, wherein the second slave chipset includes a third chip and a fourth chip.

[0100] Step S608: Decrypt the fourth encrypted data using the third chip based on the set sixth decryption algorithm to obtain second target encrypted data, and transmit the second target encrypted data to the main chip.

[0101] The sixth decryption algorithm may be the same as or different from the decryption algorithm provided in the above embodiment, which is not limited in this application. The fourth encrypted data is decrypted by the third chip to obtain the second target encrypted data, which can be used as part of the input information of the last level of decryption.

[0102] Step S609: Decrypt the fifth encrypted data by the fourth chip based on the set seventh decryption algorithm to obtain third target encrypted data, and transmit the third target encrypted data to the main chip.

[0103] The seventh decryption algorithm may be the same as or different from the decryption algorithm provided in the above embodiment, which is not limited in this application. The fourth chip decrypts the fifth encrypted data to obtain the third target encrypted data, which may be used as part of the input information for the last level of decryption.

[0104] Step S610: The main chip decrypts the second target encrypted data and the third target encrypted data based on the set fifth decryption algorithm to obtain second target decrypted data, and feeds back the second target decrypted data to the external device.

[0105] As described above, by using the third chip and the fourth chip of the second slave chipset, parallel hierarchical decryption can be increased, the complexity of the decryption process can be improved, and the security of the decryption process can be guaranteed.

[0106] Fig.10 A flowchart of another data decryption method including a third chip and a fourth chip performing a decryption operation provided in an embodiment of the present application. Fig.10 As shown, the data decryption method specifically includes the following steps:

[0107] Step S701: When the main chip receives a data acquisition request sent by an external device, the main chip queries the security information table set in the main chip based on the target data identifier in the data acquisition request to obtain the security level corresponding to the target data identifier.

[0108] Step S702: When the security level is the first security level, the main chip queries a first storage information table corresponding to the first security level set in the main chip based on the target data identifier in the data acquisition request to obtain first encrypted data.

[0109] Step S703: The master chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and the target data identifier to the first slave chipset.

[0110] Step S704: the first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmits the first target encrypted data to the master chip.

[0111] Step S705: The main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain first target decrypted data, and feeds back the first target decrypted data to the external device.

[0112] Step S706: When the security level is the second security level, the main chip searches the fourth storage information table corresponding to the second security level in the main chip based on the target data identifier to obtain fourth encrypted data and fifth encrypted data.

[0113] Step S707: Transmit the fourth encrypted data and the fifth encrypted data to the second slave chipset through the master chip, wherein the second slave chipset includes a third chip and a fourth chip.

[0114] Step S708: Decrypt the fourth encrypted data using the third chip based on the set sixth decryption algorithm to obtain third intermediate data, and transmit the third intermediate data to the fourth chip.

[0115] Step S709: Decrypt the third intermediate data using the fourth chip based on the set eighth decryption algorithm to obtain second target encrypted data, and transmit the second target encrypted data to the main chip.

[0116] The eighth decryption algorithm may be the same as or different from the decryption algorithm provided in the above embodiment, which is not limited in this application. The fourth encrypted data may be converted into the second target encrypted data by sequentially passing through the decryption operations of the third chip and the fourth chip.

[0117] Step S710: Decrypt the fifth encrypted data using the fourth chip based on the set seventh decryption algorithm to obtain fourth intermediate data, and transmit the fourth intermediate data to the third chip.

[0118] Step S711: Decrypt the fourth intermediate data using the third chip based on the set ninth decryption algorithm to obtain third target encrypted data, and transmit the third target encrypted data to the main chip.

[0119] The ninth decryption algorithm may be the same as or different from the decryption algorithm provided in the above embodiment, which is not limited in this application. The fifth encrypted data may be converted into the third target encrypted data by sequentially passing through the decryption operations of the fourth chip and the third chip.

[0120] Step S712: The main chip decrypts the second target encrypted data and the third target encrypted data based on the set fifth decryption algorithm to obtain second target decrypted data, and feeds back the second target decrypted data to the external device.

[0121] In one embodiment, Fig.11 A process diagram of another application data decryption method provided in an embodiment of the present application, such as Fig.11 As shown, in the third chip 201, the fourth encrypted data output by the main chip 101 is decrypted by the sixth decryption algorithm to obtain the third intermediate data, and in the fourth chip 202, the third intermediate data input by the third chip 201 is decrypted by the eighth decryption algorithm to obtain the second target encrypted data; in addition, in the fourth chip 202, the fifth encrypted data output by the main chip 101 is decrypted by the seventh decryption algorithm to obtain the fourth intermediate data, and in the third chip 201, the fourth intermediate data input by the fourth chip 202 is decrypted by the ninth decryption algorithm to obtain the third target encrypted data; in the main chip 101, the first target encrypted data and the second target encrypted data input by the fourth chip 202 and the third chip 201, respectively, are decrypted by the fifth decryption algorithm to obtain the second target decrypted data.

[0122] As described above, by synchronously setting the decryption path from the third chip to the fourth chip to decrypt the fourth encrypted data, and the decryption path from the fourth chip to the third chip to decrypt the fifth encrypted data, it is beneficial to further improve the complexity of the decryption process, meet the security requirements of the decryption process, and reduce the possibility of data leakage due to cracking.

[0123] Fig.12 This is a structural block diagram of a data decryption device provided in an embodiment of the present application. The device is configured to execute the data decryption method provided in the above embodiment and has the corresponding functional modules and beneficial effects of the execution method. Fig.12 As shown, the device specifically includes:

[0124] The master chip 301 is configured to, upon receiving a data acquisition request sent by an external device, query a first storage information table set in the master chip based on a target data identifier in the data acquisition request to obtain first encrypted data, decrypt the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmit the first intermediate data and the target data identifier to the first slave chipset;

[0125] The first slave chipset 302 is configured to perform a first preset decryption process according to the first intermediate data and the target data identifier to obtain first target encrypted data, and transmit the first target encrypted data to the master chip;

[0126] The main chip 301 is further configured to decrypt the first target encrypted data based on a set second decryption algorithm to obtain first target decrypted data, and feed back the first target decrypted data to the external device.

[0127] In the above, when the main chip receives a data acquisition request sent by an external device, the main chip queries the first storage information table set in the main chip based on the target data identifier in the data acquisition request to obtain the first encrypted data; the main chip decrypts the first encrypted data based on the set first decryption algorithm to obtain the first intermediate data, and transmits the first intermediate data and the target data identifier to the first slave chip group; the first slave chip group performs a first preset decryption process based on the first intermediate data and other encrypted data corresponding to the target data identifier to obtain the first target encrypted data, and transmits the first target encrypted data to the main chip; the main chip decrypts the first target encrypted data based on the set second decryption algorithm to obtain the first target decrypted data, and feeds back the first target decrypted data to the external device. In the above scheme, the first target decrypted data is obtained by performing multi-level decryption operations by the set main chip and the first slave chip group, which can increase the complexity of the relevant process of obtaining the decrypted data, thereby increasing the difficulty of cracking, reducing the risk of data leakage, and improving the security of consumable printing.

[0128] In a possible embodiment, the first slave chipset 302 includes a first chip, and the first slave chipset 302 is further configured as:

[0129] The first chip queries the second storage information table based on the target data identifier to obtain the second encrypted data, and decrypts the first intermediate data and the second encrypted data based on the set third decryption algorithm to obtain the first target encrypted data.

[0130] In a possible embodiment, the first slave chipset includes a first chip and a second chip, and the first slave chipset 302 is configured as follows:

[0131] The first chip queries the second storage information table based on the target data identifier to obtain the second encrypted data, decrypts the first intermediate data and the second encrypted data based on the third decryption algorithm to obtain the second intermediate data, and transmits the second intermediate data and the target data identifier to the second chip;

[0132] The third encrypted data is obtained by querying the third storage information table based on the target data identifier through the second chip, and the second intermediate data and the third encrypted data are decrypted based on the fourth decryption algorithm to obtain the first target encrypted data.

[0133] In a possible embodiment, the main chip 301 is further configured as:

[0134] Based on the target data identifier in the data acquisition request, the main chip queries the security information table set in the main chip to obtain the security level corresponding to the target data identifier;

[0135] When the security level is the first security level, the main chip searches the first storage information table corresponding to the first security level in the main chip based on the target data identifier in the data acquisition request to obtain the first encrypted data.

[0136] In a possible embodiment, the main chip 301 is further configured as:

[0137] When the security level is the second security level, the main chip queries the fourth storage information table corresponding to the second security level set in the main chip based on the target data identifier to obtain the fourth encrypted data and the fifth encrypted data;

[0138] transmitting the fourth encrypted data and the fifth encrypted data to the second slave chipset through the master chip;

[0139] The second slave chipset is configured as:

[0140] Performing a second preset decryption process according to the fourth encrypted data and the fifth encrypted data by the second slave chipset to obtain second target encrypted data and third target encrypted data, and transmitting the second target encrypted data and the third target encrypted data to the master chip;

[0141] The main chip 301 is also configured as:

[0142] The main chip decrypts the second target encrypted data and the third target encrypted data based on the set fifth decryption algorithm to obtain the second target decrypted data, and feeds back the second target decrypted data to the external device.

[0143] In a possible embodiment, the second slave chipset includes a third chip and a fourth chip, and the second slave chipset is further configured as:

[0144] Decrypting the fourth encrypted data by the third chip based on the set sixth decryption algorithm to obtain second target encrypted data, and transmitting the second target encrypted data to the main chip;

[0145] The fourth chip decrypts the fifth encrypted data based on the set seventh decryption algorithm to obtain third target encrypted data, and transmits the third target encrypted data to the main chip.

[0146] In a possible embodiment, the second slave chipset includes a third chip and a fourth chip, and the second slave chipset is further configured as:

[0147] Decrypting the fourth encrypted data by the third chip based on a set sixth decryption algorithm to obtain third intermediate data, and transmitting the third intermediate data to the fourth chip;

[0148] Decrypting the third intermediate data by the fourth chip based on the set eighth decryption algorithm to obtain second target encrypted data, and transmitting the second target encrypted data to the main chip;

[0149] Decrypting the fifth encrypted data by the fourth chip based on the set seventh decryption algorithm to obtain fourth intermediate data, and transmitting the fourth intermediate data to the third chip;

[0150] The third chip decrypts the fourth intermediate data based on the set ninth decryption algorithm to obtain third target encrypted data, and transmits the third target encrypted data to the main chip.

[0151] Fig.13 A schematic diagram of the structure of a data decryption device provided in an embodiment of the present application is shown in FIG. Fig.13 As shown, the device includes a processor 401, a memory 402, an input device 403 and an output device 404; the number of processors 401 in the device can be one or more. Fig.13 A processor 401 is taken as an example; the processor 401, memory 402, input device 403 and output device 404 in the device can be connected by a bus or other means. Fig.13 The example of connecting via a bus is taken. The memory 402, as a computer-readable storage medium, can be configured to store software programs, computer executable programs and modules, such as program instructions / modules corresponding to the data decryption method in the embodiment of the present application. The processor 401 executes various functional applications and data processing of the device by running the software programs, instructions and modules stored in the memory 402, that is, implements the above-mentioned data decryption method. The input device 403 can be configured to receive input digital or character information, and generate key signal input related to user settings and function control of the device. The output device 404 may include a display device such as a display screen.

[0152] The data decryption device provided above can be used to execute the data decryption method provided in any of the above embodiments, and has corresponding functions and beneficial effects.

[0153] An embodiment of the present application also provides a non-volatile storage medium containing computer executable instructions, which, when executed by a computer processor, is configured to execute a data decryption method described in the above embodiment, which includes: when a main chip receives a data acquisition request sent by an external device, the main chip queries a first storage information table set in the main chip based on a target data identifier in the data acquisition request to obtain first encrypted data; the main chip decrypts the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmits the first intermediate data and the target data identifier to a first slave chipset; the first slave chipset performs a first preset decryption process based on the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmits the first target encrypted data to the main chip; the main chip decrypts the first target encrypted data based on a set second decryption algorithm to obtain first target decrypted data, and feeds back the first target decrypted data to the external device.

[0154] Storage medium - any of various types of memory devices or storage devices. The term "storage medium" is intended to include: installation media, such as CD-ROM, floppy disk or tape device; computer system memory or random access memory, such as DRAM, DDR RAM, SRAM, EDO RAM, Rambus RAM, etc.; non-volatile memory, such as flash memory, magnetic media, or optical storage; registers or other similar types of memory elements, etc. Storage media may also include other types of memory or combinations thereof. In addition, the storage medium may be located in the first computer system in which the program is executed, or may be located in a different second computer system, which is connected to the first computer system via a network (such as the Internet). The second computer system can provide program instructions to the first computer for execution. The term "storage medium" may include two or more storage media residing in different locations (e.g., in different computer systems connected via a network). The storage medium may store program instructions (e.g., embodied as a computer program) that can be executed by one or more processors.

[0155] Of course, the storage medium containing computer executable instructions provided in the embodiment of the present application, whose computer executable instructions are not limited to the above data decryption method, can also execute related operations in the data decryption method provided in any embodiment of the present application.

[0156] It is worth noting that in the embodiment of the above-mentioned data decryption device, the various units and modules included are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be achieved; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not configured to limit the protection scope of the embodiments of the present application.

[0157] It should be noted that the numbering of each step in this scheme is only used to describe the overall design framework of this scheme, and does not represent the necessary order relationship between the steps. On the basis that the overall implementation process conforms to the overall design framework of this scheme, it belongs to the protection scope of this scheme, and the order of precedence in the form of text when describing is not an exclusive limitation on the specific implementation process of this scheme. It should be understood by those skilled in the art that the embodiments of the present application can be provided as methods, systems, or computer program products. In a typical configuration, a computing device includes one or more processors (CPU), an input / output interface, a network interface, and a memory. The memory may include non-permanent memory in a computer-readable medium, a random access memory (RAM) and / or a non-volatile memory in the form of a read-only memory (ROM) or a flash memory (fl ash RAM). The memory is an example of a computer-readable medium.

[0158] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0159] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A data decryption method, characterized in that: include: When the main chip receives a data acquisition request sent by an external device, the main chip queries a first storage information table set in the main chip based on a target data identifier in the data acquisition request to obtain first encrypted data; Decrypting the first encrypted data to obtain first intermediate data by the master chip based on a set first decryption algorithm, and transmitting the first intermediate data and the target data identifier to the first slave chipset; The first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, and transmits the first target encrypted data to the master chip; The first target encrypted data is decrypted by the main chip based on a set second decryption algorithm to obtain first target decrypted data, and the first target decrypted data is fed back to the external device.

2. The data decryption method according to claim 1, characterized in that: The first slave chipset includes a first chip, and the first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, including: The first chip queries the second storage information table based on the target data identifier to obtain second encrypted data, and decrypts the first intermediate data and the second encrypted data based on a set third decryption algorithm to obtain first target encrypted data.

3. The data decryption method according to claim 1, characterized in that: The first slave chipset includes a first chip and a second chip, and the first slave chipset performs a first preset decryption process according to the first intermediate data and other encrypted data corresponding to the target data identifier to obtain first target encrypted data, including: The first chip queries the second storage information table based on the target data identifier to obtain second encrypted data, decrypts the first intermediate data and the second encrypted data based on a third decryption algorithm to obtain second intermediate data, and transmits the second intermediate data and the target data identifier to the second chip; The second chip queries the third storage information table based on the target data identifier to obtain third encrypted data, and decrypts the second intermediate data and the third encrypted data based on a fourth decryption algorithm to obtain first target encrypted data.

4. The data decryption method according to claim 1, characterized in that: Before querying the first storage information table set in the main chip based on the target data identifier in the data acquisition request to obtain the first encrypted data, the method further includes: Based on the target data identifier in the data acquisition request, the main chip queries a security information table set in the main chip to obtain a security level corresponding to the target data identifier; Correspondingly, the querying of the first storage information table set in the main chip based on the target data identifier in the data acquisition request by the main chip to obtain the first encrypted data includes: When the security level is the first security level, the main chip queries a first storage information table corresponding to the first security level set in the main chip based on the target data identifier in the data acquisition request to obtain first encrypted data.

5. The data decryption method according to claim 4, characterized in that: After querying the security information table set in the main chip to obtain the security level corresponding to the target data identifier, the method further includes: When the security level is the second security level, the main chip queries a fourth storage information table corresponding to the second security level set in the main chip based on the target data identifier to obtain fourth encrypted data and fifth encrypted data; transmitting the fourth encrypted data and the fifth encrypted data to a second slave chipset through the master chip; The second slave chipset performs a second preset decryption process according to the fourth encrypted data and the fifth encrypted data to obtain second target encrypted data and third target encrypted data, and transmits the second target encrypted data and the third target encrypted data to the master chip; The second target encrypted data and the third target encrypted data are decrypted by the main chip based on a set fifth decryption algorithm to obtain second target decrypted data, and the second target decrypted data is fed back to the external device.

6. The data decryption method according to claim 5, characterized in that: The second slave chipset includes a third chip and a fourth chip, and the second slave chipset performs a second preset decryption process according to the fourth encrypted data and the fifth encrypted data to obtain second target encrypted data and third target encrypted data, and transmits the second target encrypted data and the third target encrypted data to the master chip, including: Decrypting the fourth encrypted data by the third chip based on a set sixth decryption algorithm to obtain second target encrypted data, and transmitting the second target encrypted data to the main chip; The fourth chip decrypts the fifth encrypted data based on the set seventh decryption algorithm to obtain third target encrypted data, and transmits the third target encrypted data to the main chip.

7. The data decryption method according to claim 5, characterized in that: The second slave chipset includes a third chip and a fourth chip, and the second slave chipset performs a second preset decryption process according to the fourth encrypted data and the fifth encrypted data to obtain second target encrypted data and third target encrypted data, and transmits the second target encrypted data and the third target encrypted data to the master chip, including: Decrypting the fourth encrypted data by the third chip based on a set sixth decryption algorithm to obtain third intermediate data, and transmitting the third intermediate data to the fourth chip; Decrypting the third intermediate data by the fourth chip based on the set eighth decryption algorithm to obtain second target encrypted data, and transmitting the second target encrypted data to the main chip; decrypting the fifth encrypted data by the fourth chip based on a set seventh decryption algorithm to obtain fourth intermediate data, and transmitting the fourth intermediate data to the third chip; The third chip decrypts the fourth intermediate data based on a set ninth decryption algorithm to obtain third target encrypted data, and transmits the third target encrypted data to the main chip.

8. The data decryption method according to claim 1, characterized in that: Before transmitting the first intermediate data and the target data identifier to the first slave chipset, the method further includes: Performing identity authentication via the master chip and a first slave chipset; Accordingly, the transmitting the first intermediate data and the target data identifier to the first slave chipset includes: In a case where the identity authentication result between the master chip and the first slave chipset is a pass state, the first intermediate data and the target data identifier are transmitted to the first slave chipset.

9. The data decryption method according to claim 1, characterized in that: The master chip and the first slave chipset are configured to perform data transmission in pairs through a communication line, or The master chip and the first slave chipset are configured to perform data transmission via an encrypted communication bus.

10. A data decryption device, characterized in that: include: The master chip is configured to, upon receiving a data acquisition request sent by an external device, query a first storage information table set in the master chip based on a target data identifier in the data acquisition request to obtain first encrypted data, decrypt the first encrypted data based on a set first decryption algorithm to obtain first intermediate data, and transmit the first intermediate data and the target data identifier to a first slave chipset; The first slave chipset is configured to perform a first preset decryption process according to the first intermediate data and the target data identifier to obtain first target encrypted data, and transmit the first target encrypted data to the master chip; The main chip is further configured to decrypt the first target encrypted data based on a set second decryption algorithm to obtain first target decrypted data, and feed back the first target decrypted data to the external device.

11. A data decryption device, comprising: one or more processors; A storage device configured to store one or more programs, when the one or more programs are executed by the one or more processors, enables the one or more processors to implement the data decryption method described in any one of claims 1-9.

12. A non-volatile storage medium storing computer executable instructions, wherein the computer executable instructions are configured to execute the data decryption method according to any one of claims 1 to 9 when executed by a computer processor.

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