Light-emitting substrate and display device

By optimizing the layout of signal line groups and component group arrangement, reducing the number of signal lines and resistance, the problems of many signal lines and high resistance in the light emitting substrate are solved, and narrow frames and low-cost preparation are achieved.

CN119225070AActive Publication Date: 2024-12-31HEFEI BOE RUISHENG TECH CO LTD +1
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Patent Information

Application Number
CN202310798947.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-06-29
Publication Date
2024-12-31
Estimated Expiration
2043-06-29

AI Technical Summary

Technical Problem

The existing light emitting substrate has a large number of signal lines and a high resistance, which leads to the problems of increasing the frame width and high preparation cost.

Method used

By optimizing the layout of signal line groups, reducing the number and resistance of signal line groups, and adopting the arrangement of multi-column component groups and control chips, increasing the space occupation of component groups along the first direction, reducing the number and resistance of signal line groups, and simplifying the Preparation process to reduce the amount of etching liquid used.

Benefits of technology

The number of signal lines and resistance is reduced, the frame width of the light emitting substrate is reduced, the preparation cost is reduced, and the performance and efficiency of the display device are improved.

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Abstract

The embodiment of the invention provides a light-emitting substrate and a display device, relates to the technical field of display, and is used for reducing the number of signal lines of the light-emitting substrate and reducing the resistance of the signal lines. The light-emitting substrate comprises a substrate, a plurality of signal line groups, a plurality of columns of element groups and a plurality of columns of control chips. The plurality of signal line groups are arranged on the substrate and are arranged along a first direction. Each signal line group comprises a plurality of signal lines arranged along a first direction. The plurality of columns of element groups are arranged along the first direction, each column of element group comprises a plurality of element groups, each column of element group is electrically connected with part of the signal lines of one signal line group, and each element group comprises a plurality of light-emitting elements which are arranged at intervals along the first direction. The plurality of columns of control chips are arranged along a first direction, and each column of control chips comprises a plurality of control chips which are arranged at intervals along a second direction. One column of control chips is arranged on one side of one column of element group along the first direction and is electrically connected with one column of element group and a part of signal lines of one signal line group. The light-emitting substrate is used for emitting light.
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Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a light-emitting substrate and a display device. Background Art

[0002] With the development of light-emitting diode technology, backlight sources using sub-millimeter light-emitting diodes (English: Mini Light Emitting Diode; abbreviated as: Mini-LED) and micro light-emitting diodes (English: Micro Light Emitting Diode; abbreviated as: Micro-LED) have been widely used. The size of Mini-LED is about 100μm to 300μm, and the size of Micro-LED is about less than 100μm. Mini-LED and Micro-LED are small in size and high in brightness. When applied to backlight modules, the backlight can be finely adjusted to achieve the display of high dynamic range images (English: High-Dynamic Range; abbreviated as: HDR), which has attracted more and more attention. Summary of the invention

[0003] The purpose of the embodiments of the present disclosure is to provide a light-emitting substrate and a display device, which are used to reduce the number of signal lines in the light-emitting substrate, while reducing the resistance of the signal lines, reducing the border width of the light-emitting substrate, and reducing the preparation cost of the light-emitting substrate and the display device.

[0004] To achieve the above objectives, the embodiments of the present disclosure provide the following technical solutions:

[0005] A light-emitting substrate is provided. The light-emitting substrate comprises a substrate, a plurality of signal line groups, a plurality of columns of element groups and a plurality of columns of control chips. The plurality of signal line groups are arranged on the substrate and arranged along a first direction. Each signal line group comprises a plurality of signal lines arranged along the first direction. The plurality of columns of element groups are arranged along the first direction, each column of element groups comprises a plurality of element groups arranged at intervals along a second direction, one column of element groups is electrically connected to part of the signal lines of one signal line group, and each element group comprises a plurality of light-emitting elements arranged at intervals along the first direction and electrically connected in sequence. The plurality of columns of control chips are arranged along the first direction, each column of control chips comprises a plurality of control chips arranged at intervals along the second direction. One column of control chips is arranged on one side of one column of element groups along the first direction, and is electrically connected to one column of element groups and part of the signal lines of one signal line group.

[0006] In the light-emitting substrate provided by the embodiment of the present disclosure, multiple columns of element groups are arranged along the first direction, each column of element groups includes multiple element groups arranged at intervals along the second direction, and one column of element groups is electrically connected to part of the signal lines of a signal line group, that is, multiple element groups of each column of element groups are correspondingly connected to one signal line group, so that the number of signal line groups is equal to the number of columns of the element groups. Compared with arranging multiple light-emitting elements of the element group in an array, in the embodiment of the present disclosure, multiple light-emitting elements of each element group are arranged along the first direction. Under the condition that the number and density of arrangement of the light-emitting elements remain unchanged, the space occupied by the element group along the first direction can be increased to the greatest extent, thereby reducing the number of columns of the element group, and achieving the purpose of reducing the number of signal line groups. The reduction in the number of signal line groups is conducive to reducing the number of fan-out lines, thereby reducing the width of the peripheral area, especially reducing the width of the binding area, which is conducive to reducing the border width of the light-emitting substrate, thereby enabling the display device to achieve a narrow border. Moreover, due to the reduction in the number of signal line groups, the wiring space of the signal line group can be greatly increased when the area of ​​the substrate remains unchanged and the arrangement density of the light-emitting elements remains unchanged, which is conducive to increasing the width of the multiple signal lines included in the signal line group, thereby reducing the resistance of the multiple signal lines included in the signal line group. In addition, based on the increase in the width of the signal line of the signal line group, the thickness of the signal line included in the signal line group can be reduced without significantly increasing the resistance of the signal line, thereby reducing the amount of etching solution used in the preparation process of the signal line group, thereby achieving the purpose of reducing the preparation cost of the light-emitting substrate.

[0007] In some embodiments, the plurality of light-emitting elements of the element group include a first light-emitting element and at least one second light-emitting element; the first light-emitting element is located at one end of the element group along the first direction. The signal line group includes a ground line and a first voltage signal line. The ground line is located between the first light-emitting element and the at least one second light-emitting element, and the first voltage signal line is located on a side of the at least one second light-emitting element away from the first light-emitting element. The control chip is disposed on one side of the first light-emitting element along the second direction.

[0008] In some embodiments, the light emitting substrate further includes a first bridge portion, wherein the first bridge portion is configured to connect the first light emitting element and a second light emitting element closest to the first light emitting element.

[0009] In some embodiments, the element group includes a plurality of the second light-emitting elements. The signal line group further includes a first connecting line. The first connecting line is disposed between two adjacent second light-emitting elements and is configured to connect two adjacent second light-emitting elements. The light-emitting substrate further includes a first connecting pattern. The first connecting pattern is electrically connected to the second light-emitting element closest to the first light-emitting element and is electrically connected to the first bridge portion. The size of the first connecting pattern along the second direction is greater than the size of the first connecting line along the second direction.

[0010] In some embodiments, the resistivity of the first bridging portion is less than the resistivity of the first connecting line.

[0011] In some embodiments, the signal line group further includes a second connection pattern. The second connection pattern is electrically connected to the first light-emitting element and to the first bridge portion. The size of the second connection pattern along the second direction is greater than the size of the first connection line along the second direction. The second connection pattern is located on one side of the first light-emitting element along the second direction, or between the first light-emitting element and the ground trace.

[0012] In some embodiments, the ground trace includes a first main body and a plurality of first protrusions. The first main body extends along the second direction and is located between the first light-emitting element and the at least one second light-emitting element. The plurality of first protrusions are located on a side of the first main body close to the at least one second light-emitting element and are connected to the first main body. The first protrusion extends along the first direction and is located between two adjacent element groups along the second direction.

[0013] In some embodiments, at least one of the plurality of first voltage signal lines included in the plurality of signal line groups is a first target signal line. The first target signal line includes a second main body and a plurality of second protrusions. The second main body extends along the second direction and is located on a side of the at least one second light-emitting element away from the first light-emitting element. The plurality of second protrusions are located on a side of the second main body close to the ground trace and are connected to the second main body. The second protrusion extends along the first direction and is located between two adjacent element groups along the second direction.

[0014] In some embodiments, at least one of the plurality of first voltage signal lines included in the plurality of signal line groups is a second target signal line. The second target signal line includes a plurality of second protrusions. The plurality of second protrusions are arranged at intervals along the second direction; each second protrusion is connected to a corresponding component group, and the second protrusion is located on one side of the component group along the second direction. The light-emitting substrate also includes a plurality of second bridges, and the second bridges are configured to connect two second protrusions adjacent to each other along the second direction.

[0015] In some embodiments, among the plurality of first voltage signal lines included in the plurality of signal line groups, the outermost first voltage signal line along the first direction is the second target signal line, and the second target signal line is adjacent to the border area of ​​the light-emitting substrate.

[0016] In some embodiments, a first protrusion and a second protrusion are provided between two adjacent element groups along the second direction. The first protrusion and the second protrusion are provided side by side along the first direction. In some embodiments, the first connection pattern of the light-emitting substrate is located between the second light-emitting element closest to the first light-emitting element and the ground trace.

[0017] In some embodiments, along the second direction, a first protrusion and a second protrusion are arranged between two adjacent element groups, and the first protrusion and the second protrusion are arranged side by side along the second direction.

[0018] In some embodiments, the first connection pattern of the light emitting substrate is located on a side of the second light emitting element that is closest to the first light emitting element along the second direction.

[0019] In some embodiments, along the first direction, the first connection pattern of the light emitting substrate and the second protrusion are arranged side by side along the first direction. The size of the first protrusion along the first direction is greater than the size of the second protrusion along the first direction.

[0020] In some embodiments, the dimension of the first main body portion along the first direction is 1.9 mm to 2.1 mm. The dimension of the second main body portion along the first direction is 3.4 mm to 3.7 mm.

[0021] In some embodiments, the signal line group further includes an addressing signal line, a power signal line, and a feedback signal line. Along the first direction, the addressing signal line, the power signal line, the ground line, the feedback signal line, and the first voltage signal line are arranged in sequence. Part of the addressing signal line and part of the power signal line are located between the first light-emitting element and the at least one second light-emitting element, and the feedback signal line is located on a side of the ground line away from the control chip, and is extended along a boundary of the ground line away from the control chip.

[0022] In some embodiments, the light-emitting substrate has a device area and a binding area arranged side by side along the second direction, and the multiple component groups and the multiple light-emitting elements are arranged in the device area. The light-emitting substrate also includes a first boundary, a second boundary and a binding pin. The grounding line closest to the first boundary in the signal line group is closer to the first boundary than the first voltage signal line closest to the first boundary, and the interval between the first boundary and the signal line group is 2.0mm to 2.3mm. The first boundary and the second boundary are opposite along the first direction. The first voltage signal line closest to the second boundary in the signal line group is closer to the second boundary than the grounding line closest to the second boundary, and the interval between the second boundary and the signal line group is 2.0mm to 2.3mm. Along the second direction, the minimum interval between the binding pin and the signal line group is 1.3mm to 1.6mm.

[0023] In some embodiments, the signal line group includes a ground line and a first voltage signal line. The plurality of light emitting elements of the element group are disposed between the ground line and the first voltage signal line.

[0024] In some embodiments, the light-emitting substrate further comprises a second connecting line. The second connecting line is located between two adjacent light-emitting elements of the element group and is configured to connect two adjacent light-emitting elements. The size of the second connecting line along the second direction is greater than the size of the light-emitting element along the second direction. Along the second direction, the interval between two adjacent second connecting lines is less than the size of the second connecting line along the second direction.

[0025] In some embodiments, the grounding trace includes a third main body and at least one third protrusion. The third main body extends along the second direction. The at least one third protrusion is located on the side of the third main body close to the first voltage signal line and is connected to the third main body. The third protrusion extends along the first direction and is located between two adjacent component groups. The first voltage signal line includes a fourth main body and at least one fourth protrusion. The fourth main body extends along the second direction. The at least one fourth protrusion is located on the side of the fourth main body close to the grounding trace and is connected to the fourth main body; the fourth protrusion extends along the first direction and is located between two adjacent component groups. The light-emitting substrate also includes a third bridge and a fourth bridge. One end of the third bridge is electrically connected to the end of the third protrusion away from the third main body, and the other end is electrically connected to the grounding trace of the adjacent signal line group. One end of the fourth bridge is electrically connected to the end of the fourth protrusion away from the fourth main body, and the other end is electrically connected to the first voltage signal line of the adjacent signal line group.

[0026] In some embodiments, at least one element group is disposed between the third protrusion and the fourth protrusion adjacent to each other along the second direction. Along the second direction, the size of the third protrusion is smaller than the size of the second connecting line, and the size of the fourth protrusion is smaller than the size of the second connecting line.

[0027] In some embodiments, the light-emitting substrate has a device area and a binding area arranged side by side along the second direction, and the plurality of light-emitting elements of the plurality of element groups are arranged in the device area. The light-emitting substrate further includes a first voltage signal pin and a fifth bridge portion. The first voltage signal pin is arranged in the binding area. The fifth bridge portion is configured to connect the first voltage signal line and the first voltage signal pin.

[0028] In some embodiments, the signal line group also includes an addressing signal line, a data signal line and a power signal line; along the first direction, the first voltage signal line, the power signal line, the data signal line, the addressing signal line and the ground line are arranged in sequence.

[0029] On the other hand, a display device is also provided. The display device comprises a display panel and a light-emitting substrate as described in any one of the above embodiments. The light-emitting substrate is located on the non-display side of the display panel.

[0030] The display device provided in the embodiment of the present disclosure has the light-emitting substrate provided in any of the above embodiments, and therefore has the same structure and beneficial technical effects as the above light-emitting substrate, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the present disclosure, the following briefly introduces the drawings required to be used in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the product involved in the embodiments of the present disclosure, the actual process of the method, the actual timing of the signal, etc.

[0032] Figure 1 is a planar structural diagram of a display device according to some embodiments;

[0033] Figure 2 is a cross-sectional structural diagram of a display device according to some embodiments;

[0034] Figure 3 is a schematic structural diagram of a light-emitting substrate according to some embodiments;

[0035] Figure 4 for Figure 3 A partial enlarged view of the middle A area;

[0036] Figure 5 for Figure 4 The cross-sectional structure diagram of C1-C1, C2-C2 and C3-C3;

[0037] Figure 6 for Figure 3 A partial enlarged view of the middle B area;

[0038] Figure 7 is a schematic diagram of the structure of a control chip according to some embodiments;

[0039] Figure 8 is another structural schematic diagram of a light-emitting substrate according to some embodiments;

[0040] Fig. 9 is another structural schematic diagram of a light-emitting substrate according to some embodiments;

[0041] Fig.10 for Fig. 9 A partial enlarged view of the D area in the middle;

[0042] Fig.11 is another structural schematic diagram of a light-emitting substrate according to some embodiments;

[0043] Fig.12 is another structural schematic diagram of a light-emitting substrate according to some embodiments;

[0044] Fig.13 for Fig.12 A partial enlarged view of the E area. DETAILED DESCRIPTION

[0045] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present disclosure.

[0046] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and other forms thereof, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open, inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0047] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0048] When describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0049] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0050] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0051] As used herein, the term "if" is optionally interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined that" or "if [a stated condition or event] is detected" are optionally interpreted to mean "upon determining that" or "in response to determining that" or "upon detecting [a stated condition or event]" or "in response to detecting [a stated condition or event]," depending on the context.

[0052] The use of "adapted to" or "configured to" herein is meant to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0053] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0054] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of variation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0055] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within the acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism may be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity may also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality may be, for example, the difference between the two equalities is less than or equal to 5% of either one.

[0056] It will be understood that when a layer or an element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.

[0057] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of the layers and the area of ​​the regions are exaggerated for clarity. Therefore, variations in the shapes relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shapes of the regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0058] See also Figure 1 Some embodiments of the present disclosure provide a display device 1000, which may be any device that displays anything, whether in motion (eg, video) or fixed (eg, still image), and whether text or images.

[0059] Exemplarily, the display device 1000 can be a mobile phone, a wireless device, a personal digital assistant (PDA), a wearable device, an augmented reality (AR) device, a virtual reality (VR) device, a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat-panel display, a computer monitor, a car display (e.g., an odometer display, etc.), a cockpit controller and / or display, a display of a camera view (e.g., a display of a rearview camera in a vehicle), an electronic photograph, an electronic billboard or sign, a projector, packaging and aesthetic structures (e.g., a display of an image of a piece of jewelry), etc.

[0060] In some embodiments, the display device 1000 may be rectangular, circular or any other shape, and the embodiments of the present disclosure do not specifically limit this. The following takes a rectangular display device as an example to schematically illustrate some embodiments of the present disclosure, but the embodiments of the present disclosure are not limited thereto, and any other display device may also be considered as long as the same technical concept is applied.

[0061] In some embodiments, the display device 1000 may be a liquid crystal display (LCD). Figure 2The display device 1000 may include a backlight module 100, a display panel 200 and a glass cover 300. The display panel 200 includes a display side and a non-display side. The display side refers to the side of the display panel 200 used to display the image ( Figure 2 The non-display side refers to the other side opposite to the display side. The backlight module 100 is disposed on the non-display side ( Figure 2 The backlight module 100 is used to provide a backlight source for the display panel 200. The glass cover plate 300 is disposed on the display side of the display panel 200 to shield and protect the display panel 200.

[0062] In some embodiments, see Figure 2 In the case where the display device 1000 is a liquid crystal display device, the display panel 200 may be a liquid crystal display panel, and the display panel 200 may include an array substrate 210, a cell substrate 220, and a liquid crystal layer 230 disposed between the array substrate 210 and the cell substrate 220. A thin film transistor 212 (TFT for short) located on a first substrate 211 and a pixel electrode 213 are disposed on the array substrate 210. The thin film transistor 212 includes an active layer, a source electrode, a drain electrode, a gate electrode, and a gate insulating layer. The source electrode and the drain electrode are in contact with the active layer, respectively, and the pixel electrode 213 is electrically connected to the drain electrode of the thin film transistor 212.

[0063] In some embodiments, Figure 2 As shown, the array substrate 210 further includes a common electrode 214 disposed on the first substrate 211. The pixel electrode 213 and the common electrode 214 may be disposed on different layers. In this case, Figure 2 As shown, a first insulating layer 215 is disposed between the pixel electrode 213 and the common electrode 214. In the case where the common electrode 214 is disposed between the thin film transistor 212 and the pixel electrode 213, as shown in FIG. Figure 2 As shown, a second insulating layer 216 is further disposed between the common electrode 214 and the thin film transistor 212 .

[0064] The pixel electrode 213 and the common electrode 214 may also be arranged on the same layer (not shown in the figure). In this case, both the pixel electrode 213 and the common electrode 214 are comb-tooth structures including a plurality of strip-shaped sub-electrodes. In other embodiments, the common electrode 214 may also be arranged in the cell substrate 220.

[0065] like Figure 2As shown, the cell substrate 220 may include a color filter layer 222 disposed on a second substrate 221. In this case, the cell substrate 220 may also be referred to as a color filter substrate (English: Color filter; abbreviated as: CF). Wherein, in the case where the backlight module 100 is used to emit white light, the color filter layer 222 at least includes a red light blocking unit, a green light blocking unit, and a blue light blocking unit, and the red light blocking unit, the green light blocking unit, and the blue light blocking unit are respectively opposite to the sub-pixels of the display panel 200. The cell substrate 220 also includes a black matrix pattern 223 disposed on the second substrate 221, and the black matrix pattern 223 is used to separate the red light blocking unit, the green light blocking unit, and the blue light blocking unit.

[0066] like Figure 2 As shown, the display panel 200 may further include a first polarizer 240 disposed on a side of the cell substrate 220 away from the liquid crystal layer 230, and a second polarizer 250 disposed on a side of the array substrate 210 away from the liquid crystal layer 230. In addition, the display panel 200 may further include other film layers or structures, which are not listed one by one in the embodiments of the present disclosure.

[0067] In some embodiments, the backlight module 100 includes a light-emitting substrate 110. The light-emitting substrate 110 can directly emit white light, and the white light is emitted to the display panel 200 after being homogenized. Alternatively, the light-emitting substrate 110 can also emit light of other colors, and the light of other colors is emitted to the display panel 200 after color conversion and homogenization. The backlight module 100 may also include an optical film 120, and the optical film 120 may include a diffuser plate and / or an optical brightening film, which is not specifically limited in the embodiments of the present disclosure. Among them, the diffuser plate has a scattering and diffusion effect, which can further mix the above-mentioned white light; the optical brightening film can improve the light output efficiency of the backlight module 100. In addition, the backlight module 100 may also include other film layers or structures, which are not listed one by one in the embodiments of the present disclosure.

[0068] In some embodiments, see also Figure 3 and Figure 4 The light-emitting substrate 110 includes a substrate 10, a plurality of signal line groups 30, a plurality of element groups 40 and a plurality of control chips 50. Figure 3 is a structural schematic diagram of a light-emitting substrate when a first protrusion and a second protrusion are arranged side by side along a first direction; Figure 4 The figure is a structural diagram of the connection relationship between a component group, a signal line group and a control chip.

[0069] The light-emitting substrate 110 may include a device area AA and a border area BB, wherein the device area AA is used to set a plurality of columns of component groups 40 and a plurality of columns of control chips 50, and at least part of the plurality of signal lines included in the signal line group 30 is set in the device area AA, and the device area AA is also used to emit light. The border area BB is located on at least one side of the device area AA, for example, the border area BB is set around the device area AA. The border area BB is used to set the signal line, for example, the border area BB includes a binding area BB1 located on one side of the device area AA along the second direction Y, and the binding area BB1 can be used to set the fan-out line and binding pin of the signal line group 30.

[0070] The substrate 10 may be a rigid substrate or a flexible substrate. For example, the material of the substrate 10 may include any one of glass, quartz, plastic, FR-4 grade material, resin, polyimide (English: Polyimide; abbreviated: PI) or polymethyl methacrylate (English: Polymethyl Methacrylate; abbreviated: PMMA). The embodiments of the present disclosure do not specifically limit this.

[0071] A plurality of signal line groups 30 are disposed on the substrate 10 and arranged along a first direction X. Each signal line group 30 includes a plurality of signal lines arranged along the first direction X. Each signal line group 30 is electrically connected to a column of component groups 40 and a column of control chips 50, and is configured to control a column of control chips 50 and a column of component groups 40, and control the component groups 40 to emit light through the control chips 50.

[0072] For example, Figure 3 and Figure 4 As shown, the plurality of signal lines of the signal line group 30 may include a first voltage signal line VLED, a ground signal line GND, an addressing signal line ADDR, a power signal line PWR, and a feedback signal line FB, etc. Of course, the signal line group 30 may also include other signal lines, such as a connection line for connecting the component group 40 and the control chip 50 (see below), which are not listed here one by one.

[0073] In some embodiments, see Figure 5 , Figure 5: is a cross-sectional structural diagram of the light-emitting substrate 110. The light-emitting substrate 110 can be a single metal layer structure. In other words, the light-emitting substrate 110 only includes a conductive metal layer. At this time, the multiple signal lines of the signal line group 30 are made of the same material and are arranged in the same layer. Based on this, multiple signal line groups 30 can be prepared and formed by a single patterning process. This is conducive to simplifying the preparation process of the light-emitting substrate 110, thereby reducing the production cost of the light-emitting substrate 110. Exemplarily, the light-emitting substrate 110 may also include an insulating layer 20, which is arranged on the side of the signal line group 30 away from the substrate 10. The insulating layer 20 can cover the conductive layer where the signal line group 30 is located to play a role of electrical isolation. Of course, the light-emitting substrate 110 may also include other layer structures, which are not listed one by one in the embodiments of the present disclosure.

[0074] Multiple columns of component groups 40 are arranged along the first direction X, each column of component groups 40 includes multiple component groups 40 arranged at intervals along the second direction Y, one column of component groups 40 is electrically connected to part of the signal lines of a signal line group 30, and each component group 40 includes multiple light-emitting elements 41 arranged at intervals along the first direction X and electrically connected in sequence.

[0075] The multiple component groups 40 in each column of the component groups 40 are connected to a corresponding signal line group 30, so that the number of the signal line groups 30 is equal to the number of columns of the component groups 40. The multiple light-emitting components 41 in each component group 40 are arranged along the first direction X. When the number and density of the light-emitting components 41 remain unchanged, the space occupied by the component group 40 along the first direction X can be increased to the maximum extent, thereby reducing the number of columns of the component group 40 and the number of the signal line groups 30.

[0076] For example, Figure 4 As shown, each component group 40 is electrically connected to the first voltage signal line VLED of the signal line group 30, and the component group 40 is electrically connected to the control chip 50. Each component group 40 may include, for example, two, four, six or eight light-emitting elements 41, which is not specifically limited in the embodiments of the present disclosure. In the following embodiments of the present disclosure, each component group 40 includes four light-emitting elements 41 as an example for description.

[0077] Exemplarily, if one component group 40 includes four light-emitting elements 41 arranged in two rows and two columns (2*2), 2N columns of component groups 40 can be set on the substrate 10. Assuming that the size of the substrate 10 remains unchanged and the arrangement density of the light-emitting elements 41 remains unchanged, one component group 40 includes four light-emitting elements 41 arranged along the first direction X (1*4), then N columns of component groups 40 can be set on the substrate 10, that is, through the arrangement of the component group 40 of the present application, the number of columns of the component group 40 can be reduced to half of the original number, based on which, the number of signal line groups 30 can be reduced to half of the original number. This is conducive to reducing the number of fan-out lines, thereby reducing the width of the peripheral area BB, especially reducing the width of the binding area BB1. Moreover, due to the reduction in the number of signal line groups 30, when the area of ​​the substrate 110 remains unchanged and the arrangement density of the light-emitting elements 41 remains unchanged, the wiring space of the signal line group 30 can be greatly improved, which is beneficial to increase the width of the multiple signal lines included in the signal line group 30, thereby reducing the resistance of the multiple signal lines included in the signal line group 30, and based on this, the thickness of the signal lines included in the signal line group 30 can be reduced, and the amount of etching solution used in the preparation process of the signal line group 30 can be reduced.

[0078] It should be understood that the preparation process of the signal line group 30 may include forming a continuous whole metal layer on the substrate 10 by a magnetron sputtering process. Of course, the preparation process of the above-mentioned continuous whole metal layer is not limited thereto. For example, it can also be prepared by evaporation, chemical vapor deposition or material vapor deposition, as long as a continuous whole metal layer can be prepared. Then, a mask layer is formed on the continuous whole metal layer. The process of forming the mask layer may include coating, exposure and development. Then, the above-mentioned continuous whole metal layer is etched with an etching solution to obtain the signal line group 30. Finally, the mask layer is removed by an etching process. Based on the preparation process of the above-mentioned signal line group 30, reducing the thickness of the signal line included in the signal line group 30 is conducive to reducing the thickness of the continuous whole metal layer formed, thereby reducing the amount of etching solution used in the subsequent etching process. Among them, the material of the whole metal layer may be copper, for example.

[0079] In some embodiments, the type of the light emitting element 41 may be an LED with a quantum well junction, an LED with a columnar structure, an LED with a double heterojunction, etc. The size of the light emitting element 41 may be a structure with a size miniaturized to the order of hundreds of microns. For example, the area of ​​the light emitting region of the light emitting element 41 may be 1 mm 2 Alternatively, the light emitting area of ​​the light emitting element 41 may be 10000 μm 2 Alternatively, the light emitting area of ​​the light emitting element 41 may be 3000 μm 2Below, the light emitting area of ​​the light emitting element 41 can be 700 μm 2 Below, the light emitting area of ​​the light emitting element 41 can be 200 μm 2 Of course, the embodiments of the present disclosure are not limited thereto, and the light emitting element 41 may also be a light emitting element of other structures, as long as the same technical concept as that of the present application is applied.

[0080] The light emitting element 41 may include a P pole (positive pole) and an N pole (negative pole), the P pole of the light emitting element 41 may be electrically connected to the first voltage signal line VLED, and the N pole may be electrically connected to the control chip 50. Among the two light emitting elements 41 connected to each other in one element group 40, the N pole of one light emitting element 41 (the light emitting element 41 closer to the first voltage signal line VLED) is electrically connected to the P pole of the other light emitting element 41. That is, the two light emitting elements 41 connected to each other are arranged in series.

[0081] Multiple columns of control chips 50 are arranged along the first direction X, and each column of control chips 50 includes multiple control chips 50 arranged at intervals along the second direction Y. A column of control chips 50 is disposed on one side of a column of component groups 40 and is electrically connected to a column of component groups 40 and part of the signal lines of a signal line group 30 .

[0082] Among them, one control chip 50 can control one component group 40 or multiple component groups 40, and the embodiments of the present disclosure do not specifically limit this. In the following embodiments of the present disclosure, the control chip 50 is used to control one component group 40 and four component groups 40 for exemplary description, and it can be understood that the control chip 50 can also be used to control other numbers of component groups 40, as long as the same technical ideas as those of the present application are applied.

[0083] For example, when one control chip 50 is used to control one component group 40, Figure 6 As shown, the control chip 50 may include a signal input pin Di (an input pin of an addressing signal ADDR), a signal output pin Do, a ground pin 57, and a power pin 58. A plurality of control chips 50 in a column of control chips 50 are cascaded (not shown in the figure), and in two mutually cascaded control chips 50, the signal output pin Do of the upper control chip 50 is electrically connected to the signal input pin Di of the lower control chip 50. The ground pin 57 is electrically connected to the ground trace GND, and the power pin 58 may be electrically connected to the power signal line PWR. Among them, the signal output pin Do is also electrically connected to the plurality of light-emitting elements 41 of the element group 40, for example, the signal output pin Do is electrically connected to the N pole of the light-emitting element 41. The P pole of the light-emitting element 41 is electrically connected to the first voltage signal line VLED.

[0084] For example, in the case where one control chip 50 is used to control four element groups 40, Figure 7 As shown, the control chip 50 may include a signal input pin Di, a signal output pin Do, a power signal input pin VCC-In, a power signal output pin VCC-Out, a data signal input pin Data-In, a data signal output pin Data-Out, a first ground pin 571, a second ground pin 572 and four output pins CH, and the four output pins CH are electrically connected to the four component groups 40 respectively. Among them, the first ground pin 571 and the second ground pin 572 are both electrically connected to the ground trace GND. In the two cascaded control chips 50, the signal output pin Do of the upper control chip 50 is electrically connected to the signal input pin Di of the lower control chip 50, and the power signal output pin VCC-Out of the upper control chip 50 is electrically connected to the power signal input pin VCC-In of the lower control chip through the power signal line PWR. The signal line group 30 may also include a data connection line, and the data signal output pin Data-Out of the upper control chip 50 is electrically connected to the data signal input pin Data-In of the lower control chip 50 through the data connection line.

[0085] It can be understood that the structures of the above two control chips 50 are only exemplary, and the embodiments of the present disclosure are not limited thereto, as long as the same technical concept as that of the present application is adopted.

[0086] In some embodiments, the signal line group 30 includes a ground line GND and a first voltage signal line VLED, and the first voltage signal line VLED is arranged on one side of the plurality of light-emitting elements 41 of the element group 40 along the first direction X. The ground line GND can be arranged between two adjacent light-emitting elements 41 of the plurality of light-emitting elements 41 (e.g. Figure 3 and Figure 4 Alternatively, the ground trace GND may be disposed on the other side of the plurality of light emitting elements 41 of the element group 40 along the first direction X (as shown in FIG. Fig.12 and Fig.13 shown).

[0087] In the case where the ground trace GND is disposed between two adjacent light emitting elements 41 among the plurality of light emitting elements 41, see Figure 4, the plurality of light emitting elements 41 of the element group 40 include a first light emitting element 42 and at least one second light emitting element 43. The first light emitting element 42 is located at one end of the element group 40 along the first direction X. The following embodiments of the present disclosure are described exemplarily by taking the example that the element group 40 includes four light emitting elements 41, and the first light emitting element 42 is the leftmost one of the four light emitting elements 41. In this way, the four light emitting elements 41 include a first light emitting element 42 located at the leftmost side and three second light emitting elements 43 located on the right side of the first light emitting element 42.

[0088] like Figure 4 As shown, the signal line group 30 includes a ground line GND and a first voltage signal line VLED. The first voltage signal line VLED is used to provide a power supply voltage for the light-emitting element 41, and the first voltage signal line VLED is arranged on a side of at least one second light-emitting element 43 away from the first light-emitting element 41. In other words, the first voltage signal line VLED is arranged on the right side of the multiple light-emitting elements 41 included in the element group 40. The ground line GND is located between the first light-emitting element 42 and at least one second light-emitting element 43 (all the second light-emitting elements 43). In this way, it is beneficial for the ground line GND and the first voltage signal line VLED to utilize the gap between two adjacent element groups 40 (see below), further increase the area of ​​the ground line GND and the first voltage signal line VLED, reduce the resistance of the ground line GND and the first voltage signal line VLED, and reduce the thickness of the ground line GND and the first voltage signal line VLED, so as to optimize the layout of the multiple signal lines of the signal line group 30 and improve the space utilization rate of the substrate 10.

[0089] For example, Figure 4 As shown, taking a control chip 50 controlling a component group 40 as an example, the control chip 50 can be arranged on one side of the first light-emitting component 42 along the second direction Y, so that the control chip 50 is also located on the side of the ground trace GND close to the first light-emitting component 42. For example, the control chip 50 is arranged on the lower side of the first light-emitting component 42.

[0090] like Figure 4 As shown, the ground trace GND is arranged between the first light emitting element 42 and the second light emitting element 43, and the first light emitting element 42 and the second light emitting element 43 cannot be directly electrically connected through the connection line arranged in the same layer as the signal line group 30. Therefore, the light emitting substrate 110 further includes a first bridge portion 51, and the first bridge portion 51 is configured to connect the first light emitting element 42 and the second light emitting element 43 closest to the first light emitting element 42, so as to connect the plurality of light emitting elements 41 in sequence.

[0091] Exemplarily, the first bridge portion 51 may be a chip resistor or a jumper resistor. A jumper resistor is a zero-ohm resistor, which is a special-purpose resistor with a very small resistance value. An automatic chip mounter or an automatic plug-in machine may be used to set the jumper resistor between two points in the wiring substrate that cannot be directly connected by a line to achieve electrical connection between the two points. This is also beneficial in reducing the resistance value between the first light-emitting element 42 and the second light-emitting element 43.

[0092] In some embodiments, Figure 4 As shown, the element group 40 includes a plurality of second light emitting elements 43. The signal line group 30 also includes a first connecting line 33. The first connecting line 33 is disposed between two adjacent second light emitting elements 43, and the first connecting line 33 is configured to connect two adjacent second light emitting elements 43.

[0093] Exemplarily, the resistivity of the first bridge portion 51 is smaller than the resistivity of the first connecting line 33 , which is helpful to reduce the resistance value between the first light emitting element 42 and the second light emitting element 43 .

[0094] In some embodiments, Figure 4 As shown, the first connecting wires 33 extend along the first direction X, and the multiple first connecting wires 33 electrically connected to the multiple second light-emitting elements 43 of the same element group 40 are roughly arranged along the first direction X. In this way, the space occupied by the multiple first connecting wires 33 along the second direction Y can be minimized to the greatest extent, thereby improving the utilization rate of the wiring space on the substrate 10.

[0095] Continue reading Figure 4 The light-emitting substrate 110 further includes a first connection pattern 31 and a second connection pattern 32. The first connection pattern 31 is electrically connected to the second light-emitting element 43 closest to the first light-emitting element 42, and the second connection pattern 32 is electrically connected to the first light-emitting element 42. Both ends of the first bridge portion 51 are electrically connected to the first connection pattern 31 and the second connection pattern 32, respectively, so that the second light-emitting element 43 closest to the first light-emitting element 42 is electrically connected to the first light-emitting element 42 through the first connection pattern 31, the first bridge portion 51, and the second connection pattern 32 in sequence.

[0096] like Figure 4 As shown, the size of the first connection pattern 31 along the second direction Y is greater than the size of the first connection line 33 along the second direction Y, which is beneficial to increase the area of ​​the first connection pattern 31, thereby reducing the connection difficulty between the first connection pattern 31 and the first bridge portion 51, and is beneficial to increase the heat dissipation capacity of the first connection pattern 31, thereby preventing heat from accumulating on the first connection pattern 31. Figure 4 As shown, the first connection pattern 31 may be located at one side of the second light emitting element 43 along the second direction Y; or Figure 8As shown, the first connection pattern 31 may be located between the second light emitting element 43 and the ground trace GND.

[0097] For example, Figure 4 As shown, in the case where the first connection pattern 31 is located on one side of the second light emitting element 43 along the second direction Y, the first connection pattern 31 may include a first sub-pattern 311, a second sub-pattern 312 and a third sub-pattern 313. The first sub-pattern 311, the second sub-pattern 312 and the third sub-pattern 313 are arranged side by side along the second direction Y. The first sub-pattern 311 extends along the first direction X, and one end of the first sub-pattern 311 is electrically connected to the second light emitting element 43 closest to the first light emitting element 42, and the other end is connected to the second sub-pattern 312. The size of the first sub-pattern 311 along the second direction Y may be equal to the size of the first connection line 33 along the second direction Y, so that the size of the pads electrically connected to each second light emitting element 43 on the signal line group 30 can be equal, which is conducive to improving the structural uniformity of the light emitting substrate 110. The second sub-pattern 312 extends along the second direction Y, and one end is connected to one end of the first sub-pattern 311 close to the first light emitting element 42, and the other end is electrically connected to the third sub-pattern 313. The third sub-pattern 313 may extend along the first direction X, and the size of the third sub-pattern 313 along the first direction X is greater than the size of the first sub-pattern 311 along the first direction X, and the size of the third sub-pattern 313 along the second direction Y is greater than the size of the first sub-pattern 311 along the second direction Y. Among them, the first bridge portion 51 is connected to the third sub-pattern 313 of the first connection pattern 31, and the area of ​​the third sub-pattern 313 is increased (compared with the first sub-pattern 311), which is conducive to the connection between the third sub-pattern 313 and the first bridge portion 51, and reduces the resistance of the first connection pattern 31. In addition, the first connection pattern 31 is located on one side of the second light-emitting element 43 along the second direction Y, and more signal lines (first protrusions and second protrusions) can be arranged between two adjacent element groups 40 along the second direction Y, which is conducive to improving the utilization rate of the wiring space of the substrate 10.

[0098] For example, Figure 8As shown, in the case where the first connection pattern 31 is located between the second light emitting element 43 and the ground trace GND, the first connection pattern 31 may include a first sub-pattern 311 and a fourth sub-pattern 314, and the first sub-pattern 311 and the fourth sub-pattern 314 are arranged side by side along the first direction X. The first sub-pattern 311 extends along the first direction X, and one end of the first sub-pattern 311 is electrically connected to the second light emitting element 43 closest to the first light emitting element 42, and the other end is connected to the fourth sub-pattern 314. The size of the first sub-pattern 311 along the second direction Y may be equal to the size of the first connection line 33 along the second direction Y, so that the size of the pads electrically connected to each light emitting element 41 on the signal line group 30 can be equal, which is conducive to improving the structural uniformity of the light emitting substrate 110. The fourth sub-pattern 314 may be rectangular, and the size of the third sub-pattern 313 along the second direction Y is greater than the size of the first sub-pattern 311 along the second direction Y. The first bridge portion 51 is connected to the fourth sub-pattern 314 of the first connection pattern 31, and the area of ​​the fourth sub-pattern 314 (compared to the first connection pattern 31) is increased, which is beneficial to the connection between the fourth sub-pattern 314 and the first bridge portion 51. The first connection pattern 31 is located between the second light-emitting element 43 and the ground trace GND, which is beneficial to simplify the structure of the first connection pattern 31.

[0099] It is understandable that the specific shapes of the above two first connection patterns 31 are only examples, and the embodiments of the present disclosure are not limited thereto, as long as the first connection pattern 31 can connect the second light emitting element 43 closest to the first light emitting element 42 to the first bridge portion 51 .

[0100] In some embodiments, Figure 4 and Figure 8 As shown, for similar reasons to the first connection pattern 31, the second connection pattern 32 is electrically connected to the first light-emitting element 42 and the first bridge portion 51, and the size of the second connection pattern 32 along the second direction Y is larger than the size of the first connection line 33 along the second direction Y, which is beneficial to increase the area of ​​the second connection pattern 32, thereby reducing the connection difficulty between the second connection pattern 32 and the first bridge portion 51, and reducing the resistance of the second connection pattern 32.

[0101] See also Figure 4 The second connection pattern 32 may be located at one side of the first light emitting element 42 along the second direction Y, or, see Figure 8 , the second connection pattern 32 may be located between the first light emitting element 42 and the ground trace GND.

[0102] In the case where the second connection pattern 32 is located at one side of the first light emitting element 42 along the second direction Y, as shown in FIG. Figure 4As shown, the second connection pattern 32 may include a fifth sub-pattern 321, a sixth sub-pattern 322, and a seventh sub-pattern 323. The fifth sub-pattern 321 extends along the first direction X, and one end of the fifth sub-pattern 321 is electrically connected to the first light-emitting element 42, and the other end is connected to the sixth sub-pattern 322. The size of the fifth sub-pattern 321 along the second direction Y may be equal to the size of the first connection line 33 along the second direction Y, so that the size of the pad electrically connected to the first light-emitting element 42 and the size of the pad electrically connected to the second light-emitting element 43 may be equal, which is conducive to improving the structural uniformity of the light-emitting substrate 110. The sixth sub-pattern 322 extends along the second direction Y, and the fifth sub-pattern 321 is connected to the middle of the sixth sub-pattern 322 along the second direction Y, and one end (lower end) of the sixth sub-pattern 322 along the second direction Y close to the bridge portion 51 is connected to the seventh sub-pattern 323. The seventh sub-pattern 323 is substantially rectangular, and the size of the seventh sub-pattern 323 along the first direction X is larger than the size of the fifth sub-pattern 321 along the first direction X. The size of the seventh sub-pattern 323 along the second direction Y is larger than the size of the fifth sub-pattern 321 along the second direction Y. The first bridge portion 51 is connected to the seventh sub-pattern 323 of the second connection pattern 32, and the area of ​​the seventh sub-pattern 323 (compared to the fifth sub-pattern 321) is increased, which is beneficial to the connection between the seventh sub-pattern 323 and the first bridge portion 51, and is beneficial to improving the utilization rate of the wiring space of the substrate 10.

[0103] In the case where the second connection pattern 32 may be located between the first light emitting element 42 and the ground trace GND, as shown in FIG. Figure 8 As shown, the second connection pattern 32 may include a fifth sub-pattern 321 and an eighth sub-pattern 324, and the fifth sub-pattern 321 and the eighth sub-pattern 324 are arranged side by side along the first direction X. The fifth sub-pattern 321 extends along the first direction X, and one end of the fifth sub-pattern 321 is electrically connected to the first light-emitting element 42, and the other end is connected to the eighth sub-pattern 324. The size of the fifth sub-pattern 321 along the second direction Y may be equal to the size of the first connection line 33 along the second direction Y, which is conducive to improving the structural uniformity of the light-emitting substrate 110. The eighth sub-pattern 324 may be a rectangle, and the size of the eighth sub-pattern 324 along the second direction Y is greater than the size of the fifth sub-pattern 321 along the second direction Y. Among them, the first bridge portion 51 is connected to the eighth sub-pattern 324 of the second connection pattern 32, and the area of ​​the eighth sub-pattern 324 (compared with the fifth sub-pattern 321) is increased, which is conducive to the connection of the eighth sub-pattern 324 with the first bridge portion 51. The second connection pattern 32 is located between the first light emitting element 42 and the ground trace GND, which is beneficial to simplify the structure of the second connection pattern 32 .

[0104] In the embodiment of the present disclosure, a wiring may be arranged between two adjacent element groups 40 along the second direction Y to improve the utilization of the wiring space on the substrate 10 and reduce the resistance of the corresponding signal line.

[0105] In some embodiments, the ground trace GND includes a first main body 22 and a plurality of first protrusions 23. The first main body 22 extends along the second direction Y and is located between the first light-emitting element 42 and at least one second light-emitting element 43 (all second light-emitting elements 43). The plurality of first protrusions 23 are located on one side of the first main body 22 close to at least one second light-emitting element 43 and are connected to the first main body 23. The first main body 22 is also used to connect the plurality of first protrusions 23 as a whole. The first protrusion 23 extends along the first direction and is located between two adjacent element groups 40 along the second direction Y. In the embodiment of the present disclosure, the first protrusion 23 is set by utilizing the gap between two adjacent element groups 40, so that the area of ​​the ground trace GND can be increased without increasing the area of ​​the substrate 10, thereby reducing the resistance of the ground trace GND, which is conducive to reducing the size of the first main body 22 along the first direction X and reducing the size of the signal line group 30 along the first direction X. Moreover, it is helpful to reduce the thickness of the ground trace GND, reduce the usage of etching solution in the process of preparing the ground trace GND, and reduce the preparation difficulty and preparation cost of the ground trace GND.

[0106] In some embodiments, Figure 4 As shown, the dimension D1 of the first main body 22 along the first direction X is 1.9 mm to 2.1 mm, which is conducive to increasing the area of ​​the first main body 22, thereby reducing the resistance and thickness of the ground trace GND. Exemplarily, the dimension D1 of the first main body 22 along the first direction X can be 1.9 mm, 2.0 mm or 2.1 mm. Of course, the embodiments of the present disclosure are not limited thereto. As long as the dimension D1 of the first main body 22 along the first direction X is within the range of 1.9 mm to 2.1 mm, the dimension D1 of the first main body 22 along the first direction X can be any value.

[0107] It is understandable that if the dimension D1 of the first main body 22 along the first direction X is too large (for example, greater than 2.1 mm), on the one hand, the span between the first light-emitting element 42 and the second light-emitting element 43 is large, which is not conducive to the uniform distribution of the light-emitting element 41. On the other hand, the signal line group 30 occupies a large space along the first direction X, which does not improve the wiring density of the light-emitting substrate 110 and the arrangement density of the light-emitting elements. If the dimension D1 of the first main body 22 along the first direction X is too small (for example, greater than 1.9 mm), it is not conducive to reducing the resistance of the ground trace GND.

[0108] In some embodiments, see Fig. 9, at least one of the plurality of first voltage signal lines VLED included in the plurality of signal line groups 30 is a first target signal line VLED1. The light-emitting substrate 110 includes a plurality of signal line groups 30, each signal line group 30 includes a first voltage signal line VLED, so that the light-emitting substrate 110 includes a plurality of first voltage signal lines VLED, and at least one of the plurality of first voltage signal lines VLED is a first target signal line VLED1.

[0109] See also Fig. 9 , the first target signal line VLED1 includes a second main body 24 and a plurality of second protrusions 25. The second main body 24 extends along the second direction Y and is located on a side of at least one second light-emitting element 43 (all second light-emitting elements 43 of one element group 40) away from the first light-emitting element 42. The plurality of second protrusions 25 are located on a side of the second main body 24 close to the ground trace GND and are connected to the second main body 24. The second main body 24 is also used to connect the plurality of first protrusions 23 as a whole. The second protrusion 25 extends along the first direction X and is located between two adjacent element groups 40 along the second direction Y. In the embodiment of the present disclosure, the second protrusion 25 is provided by utilizing the gap between two adjacent element groups 40, so that the area of ​​the first target signal line VLED1 can be increased without increasing the area of ​​the substrate 10, thereby reducing the resistance of the first target signal line VLED1, which is beneficial to reducing the size of the second main body 24 along the first direction X and reducing the size of the signal line group 30 along the first direction X. Moreover, it is beneficial to reduce the thickness of the first target signal line VLED1, reduce the amount of etching solution used in the process of preparing the ground trace GND, and reduce the difficulty and cost of preparing the first target signal line VLED1.

[0110] Exemplarily, a second light emitting element 43 farthest from the first light emitting element 42 may be connected to the second main body 24. In addition, along the second direction Y, there is a gap between the first connecting line 33 and the first protruding portion 23 to avoid signal interference between the first connecting line 33 and the first protruding portion 23.

[0111] In some embodiments, Figure 4 As shown, the dimension D2 of the second main body 24 along the first direction X is 3.4 mm to 3.7 mm. This is beneficial to increase the area of ​​the second main body 24, thereby reducing the resistance and thickness of the first voltage signal line VLED. Exemplarily, the dimension D1 of the first main body 22 along the first direction X can be 3.4 mm, 3.5 mm or 3.7 mm. Of course, the embodiments of the present disclosure are not limited thereto. As long as the dimension D2 of the first main body 22 along the first direction X is within the range of 3.4 mm to 3.7 mm, the dimension D2 of the second main body 24 along the first direction X can be any value.

[0112] It is understandable that if the dimension D2 of the second main body 24 along the first direction X is too large (for example, greater than 3.7 mm), the signal line group 30 occupies a large space along the first direction X, which does not improve the wiring density of the light-emitting substrate 110 and the arrangement density of the light-emitting elements. If the dimension D1 of the second main body 24 along the first direction X is too small (for example, greater than 3.4 mm), it is not conducive to reducing the resistance of the ground trace GND.

[0113] In some embodiments, see Fig. 9 , Fig.10 and Fig.11 , at least one of the multiple first voltage signal lines VLED included in the multiple signal line groups 30 is a second target signal line VLED2. The second target signal line VLED2 includes multiple second protrusions 25. The multiple second protrusions 25 are arranged at intervals along the second direction Y. Each second protrusion VLED2 is connected to a component group 40 correspondingly, and the second protrusion VLED2 is located on one side of the component group 40 (correspondingly connected to the second protrusion VLED2) along the second direction Y. The light-emitting substrate 110 also includes multiple second bridges 52, and the second bridges 52 are configured to connect two second protrusions 25 adjacent to each other along the second direction Y. In other words, the second target signal line VLED2 includes multiple second protrusions 25 arranged at intervals along the second direction Y, and the multiple second protrusions 25 are electrically connected through the second bridges 52. In this way, the space occupied by the signal line group 30 along the first direction X can be further reduced, thereby enabling the light-emitting substrate 110 to achieve a narrow frame.

[0114] In some embodiments, Fig.10 As shown, the second protrusion 25 of the second target signal line VLED2 can be arranged side by side with the first protrusion 23 along the first direction X, or as shown in FIG. Fig.11 As shown, the second protrusion 25 of the second target signal line VLED2 can be arranged side by side with the first protrusion 23 along the second direction Y.

[0115] In some embodiments, Fig. 9 As shown, among the plurality of first voltage signal lines VLED included in the plurality of signal line groups 30, the first voltage signal line VLED located at the outermost side along the first direction X is the second target signal line VLED2, and the second target signal line VLED2 is adjacent to the frame area BB of the light-emitting substrate 110. In other words, the first voltage signal line VLED close to the frame area BB in the signal line group 30 is the second voltage signal line VLED2, which is beneficial to reducing the frame width of the side of the frame area BB close to the second voltage signal line VLED2, thereby reducing the width of the frame area BB of the light-emitting substrate 110, and is beneficial to realizing a narrow frame for the display device 1000.

[0116] Exemplarily, in this way, along the first direction X, the two first voltage signal lines VLED in the two outermost signal line groups 30 are both the outermost first voltage signal lines VLED. However, referring to FIG. Fig. 9 In a signal line group 30, the first voltage signal line VLED is located on the right side of the ground line GND. In this way, the signal line of the signal line group 30 on the left side close to the border area BB is the GND line, and the signal line of the signal line group 30 on the right side close to the border area BB is the first voltage signal line. Based on this, in the light-emitting substrate 110, the first voltage signal line VLED adjacent to the border area BB only includes the first voltage signal line VLED of the rightmost signal line group 30. In other words, the first voltage signal line VLED of the rightmost signal line group 30 is the second target signal line VLED2. This is beneficial to reducing the width of the right border area of ​​the light-emitting substrate 110, and is beneficial for the display device 1000 to achieve an ultra-narrow border.

[0117] It can be understood that the embodiments of the present disclosure are not limited to this. In some other embodiments, any one of the multiple first voltage signal lines VLED can be set as the first target signal line VLED1 or the second target signal line VLED2. The embodiments of the present disclosure do not make specific limitations on this, as long as the same technical ideas are adopted.

[0118] In some embodiments, see Fig.10 , along the second direction Y, a first protrusion 23 and a second protrusion 25 are arranged between two adjacent element groups 40. The first protrusion 23 and the second protrusion 25 are arranged side by side along the second direction Y. In this way, it is beneficial to increase the size of the first protrusion 23 and the second protrusion 25 along the second direction Y, thereby increasing the length of the connection portion between the first protrusion 23 and the first main body 22, and the length of the connection portion between the second protrusion 25 and the second main body 24, which is beneficial to further reduce the resistance of the ground trace GND and the first voltage signal line VLED (the first target signal line VLED1).

[0119] Exemplarily, the size of the first protrusion 23 along the first direction X may be equal to the size of the second protrusion 25 along the first direction X. And the size of the first protrusion 23 along the second direction Y may be equal to the size of the second protrusion 25 along the second direction Y. In this way, it is helpful to increase the structural consistency of the first protrusion 23 and the second protrusion 25, increase the structural uniformity of the signal line group 30, and reduce the difficulty of preparing the signal line group 30.

[0120] In some embodiments, Fig.10As shown, the first connection pattern 31 of the light-emitting substrate 110 is located on one side of the second light-emitting element 43 closest to the first light-emitting element 42 along the second direction Y. Between two adjacent element groups 40, of the first protrusion 23 and the second protrusion 25, the second protrusion 25 is closer to the first connection pattern 31. And the first connection pattern 31 and the second protrusion 25 are arranged side by side along the first direction X, so that the space utilization between the two adjacent element groups 40 is improved, and the area of ​​the ground trace GND and the first voltage signal line VLED is increased to the maximum extent.

[0121] In some embodiments, when the first protrusion 23 and the second protrusion 25 are arranged side by side along the first direction X, see Fig.11 , the first connection pattern 31 of the light-emitting substrate 110 is located between the second light-emitting element 43 closest to the first light-emitting element 42 and the ground trace GND. In this way, the size of the first connection pattern 31 along the second direction Y can be minimized, thereby increasing the wiring space of the first protrusion 23 and increasing the size of the first protrusion 23 along the second direction Y.

[0122] In some embodiments, along the first direction X, the first connection pattern 31 of the light emitting substrate 110 and the second protrusion 25 are arranged side by side along the first direction X. The size of the first protrusion 23 along the first direction X is greater than the size of the second protrusion 25 along the first direction X. In this way, the wiring space between two adjacent component groups 40 can be utilized to the maximum extent, and the resistance of the ground trace GND and the first voltage signal line VLED can be reduced.

[0123] In some embodiments, see Fig.11 Along the second direction Y, a first protrusion 23 and a second protrusion 25 are arranged between two adjacent component groups 40. The first protrusion 23 and the second protrusion 25 are arranged side by side along the second direction Y. In this way, it is beneficial to increase the space utilization between two adjacent component groups 40.

[0124] For example, Fig.11 As shown, the size of the third sub-pattern 313 of the first connection pattern 31 along the second direction Y is substantially equal to the size of the second protrusion 25 along the second direction Y, and the size of the second protrusion 25 along the second direction Y may be greater than the size of the first protrusion 23 along the second direction Y. The size of the second protrusion 25 along the first direction X may be greater than the size of the third sub-pattern 313 along the first direction X.

[0125] It should be understood that in some other embodiments, when the first voltage signal line VLED of the signal line group 30 is the first target signal line VLED1, one of the first protrusion 23 and the second protrusion 25 may be included between two adjacent component groups 40, and the arrangement order and distribution density of the first protrusion 23 and the second protrusion 25 along the second direction Y may be arbitrarily selected, as long as the same technical idea is applied. When the second voltage signal line VLED of the signal line group 30 is the second target signal line VLED2, at least one second protrusion 25 is included between two adjacent component groups 40, and the distribution density of the first protrusion 23 may be arbitrarily selected, for example, two, three or four component groups 40 are included between each two adjacent first protrusions 23.

[0126] In some embodiments, Fig.11 As shown, the signal line group 30 also includes an addressing signal line ADDR, a power signal line and a feedback signal line. Along the first direction, the addressing signal line ADDR, the power signal line PWR, the ground line GND, the feedback signal line FB and the first voltage signal line VLED are arranged in sequence. Parts of the addressing signal line ADDR and the power signal line PWR are located between the first light-emitting element 42 and at least one second light-emitting element 43, and the feedback signal line FB is located on the side of the ground line GND away from the control chip 50, and is extended along the boundary of the side of the ground line GND away from the control chip 50.

[0127] In some embodiments, see Fig. 9 , the light-emitting substrate 110 further includes a first boundary 1101, a second boundary 1102 and a binding pin 1103. The ground trace GND closest to the first boundary 1101 in the signal line group 30 is closer to the first boundary 1101 than the first voltage signal line VLED closest to the first boundary 1101. The interval between the first boundary 1101 and the signal line group 30 is D3, and D3 is 2.0 mm to 2.3 mm. Exemplarily, the interval D3 between the first boundary 1101 and the signal line group 30 is 2.0 mm, 2.2 mm or 2.3 mm.

[0128] The first boundary 1101 and the second boundary 1102 are opposite to each other along the first direction X. The first voltage signal line VLED closest to the second boundary 1102 in the signal line group 30 is closer to the second boundary 1102 than the ground line GND closest to the second boundary 1102, and the interval between the second boundary 1102 and the signal line group 30 is D4, and D4 is 2.0 mm to 2.3 mm. Exemplarily, the interval D4 between the second boundary 1102 and the signal line group 30 is 2.0 mm, 2.1 mm or 2.3 mm, which is not specifically limited in the embodiments of the present disclosure.

[0129] The interval D3 between the first boundary 1101 and the signal line group 30 and the interval D4 between the second boundary 1102 and the signal line group 30 may be equal or unequal, and the embodiments of the present disclosure do not limit this. Exemplarily, the interval D3 between the first boundary 1101 and the signal line group 30 and the interval D4 between the second boundary 1102 and the signal line group 30 are equal, so that the widths of the border areas on the opposite sides of the light-emitting substrate 110 along the first direction X are equal, which is conducive to the symmetrical setting of the border width of the display device 1000.

[0130] Along the second direction, the minimum interval D5 between the binding pin 1103 and the signal line group 30 is 1.3 mm to 1.6 mm. For example, the minimum interval D5 between the binding pin 1103 and the signal line group 30 is 1.3 mm, 1.45 mm or 1.6 mm, etc., which is not specifically limited in the embodiments of the present disclosure.

[0131] In some other embodiments, when the plurality of light emitting elements 41 of the element group 40 are disposed between the ground trace GND and the first voltage signal line VLED, refer to Fig.12 and Fig.13 , the light-emitting substrate 110 also includes a second connecting line 34. The second connecting line 34 is located between two adjacent light-emitting elements 41 of the element group 40, and is configured to connect two adjacent light-emitting elements 41. The size of the second connecting line 34 along the second direction Y is greater than the size of the light-emitting element 41 along the second direction Y. Along the second direction Y, the interval between two adjacent second connecting lines 34 is less than the size of the second connecting line 34 along the second direction. In the embodiment of the present disclosure, the gap between two adjacent element groups 40 is used to form a second connecting line 34 with a larger area, which is beneficial to reducing the resistance of the second connecting line 34, accelerating the heat dissipation efficiency of the second connecting line 34, and is beneficial to reducing the thickness of the signal line group 30, thereby reducing the amount of etching solution used during the formation of the signal line group 30.

[0132] In some embodiments, the ground trace GND includes a third main body 35 and at least one third protruding portion 36. The third main body 35 extends along the second direction Y. The third protruding portion 36 is located on a side of the third main body 35 close to the first voltage signal line VLED and is connected to the third main body 35. The third protruding portion 36 extends along the first direction X and is located between two adjacent component groups 40.

[0133] Exemplarily, the dimension of the third protrusion 36 along the first direction X is greater than the dimension of the second connection line 34 along the first direction X, so that the dimension of the third protrusion 36 along the first direction X can be maximized to reduce the span of the third bridge portion 53. The dimension of the third protrusion 36 along the second direction Y is smaller than the dimension of the second connection line 34 along the second direction Y, which is beneficial to increase the area of ​​the second connection line 34, thereby reducing the resistance of the second connection line 34.

[0134] The first voltage signal line VLED includes a fourth main body 37 and at least one fourth protrusion 38. The fourth main body 37 extends along the second direction Y. The at least one fourth protrusion 38 is located on a side of the fourth main body 37 close to the ground trace GND and is connected to the fourth main body 37. The fourth protrusion 38 extends along the first direction X and is located between two adjacent element groups 40.

[0135] The light-emitting substrate 110 further includes a third bridge portion 53 and a fourth bridge portion 54. One end of the third bridge portion 53 is electrically connected to the end of the third protrusion 36 away from the third main body portion 35, and the other end is electrically connected to the ground trace GND of the adjacent signal line group 30. In other words, the third bridge portion 53 can electrically connect the two ground traces GND of two adjacent signal line groups 30, thereby interconnecting the multiple ground traces GND of the multiple signal line groups 30 to form a mesh structure, thereby reducing the resistance of the ground trace GND.

[0136] One end of the fourth bridge portion 54 is electrically connected to the end of the fourth protrusion 38 away from the fourth main body 37, and the other end is electrically connected to the first voltage signal line VLED of the adjacent signal line group 30. In other words, the fourth bridge portion 54 can electrically connect the two first voltage signal lines VLED of two adjacent signal line groups 30, thereby connecting the multiple first voltage signal lines VLED of the multiple signal line groups 30 to form a mesh structure, thereby reducing the resistance of the first voltage signal line VLED.

[0137] In some embodiments, at least one component group 40 is disposed between the first protrusions 36 and the second protrusions 38 adjacent to each other along the second direction Y. That is, between two adjacent component groups 40 along the second direction Y, at most one of the first protrusions 36 and the second protrusions 38 is included. In this way, more wiring space can be reserved between two adjacent component groups 40 for arranging the second connection line 34, which is beneficial to increase the size of the second connection line 34 along the second direction Y, thereby reducing the resistance of the second connection line 34.

[0138] For example, see Fig.12 Along the second direction Y, a size D6 of the third protrusion 36 is smaller than a size D7 of the second connection line 34 , and a size D8 of the second protrusion 38 is smaller than a size D7 of the second connection line 34 .

[0139] In some embodiments, continue to refer to Fig.12 The light-emitting substrate 110 has a device area AA and a binding area BB1 arranged side by side along the second direction Y, and a plurality of light-emitting elements 41 of a plurality of element groups 40 are arranged in the device area AA. The light-emitting substrate 110 also includes a binding pin 1103 and a fifth bridge portion 55. The binding pin 1103 includes a first voltage signal pin Vled and a ground pin Gnd for transmitting a first voltage signal. The fifth bridge portion 55 is configured to connect the first voltage signal line VLED and the first voltage signal pin Vled. The ground trace GEN is connected to the ground pin Gnd.

[0140] In some embodiments, see also Fig.12 and Fig.13 The signal line group 30 further includes an address signal line ADDR, a data signal line Data and a power signal line PWR. Along the first direction, the first voltage signal line VLED, the power signal line PWR, the data signal line Data, the address signal line ADDR and the ground line GND are arranged in sequence.

[0141] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be thought of by any person skilled in the art within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A light-emitting substrate, characterized in that: The light-emitting substrate comprises: substrate; A plurality of signal line groups are disposed on the substrate, the plurality of signal line groups are arranged along a first direction, and each signal line group includes a plurality of signal lines arranged along the first direction; A plurality of columns of element groups are arranged along the first direction, each column of element groups includes a plurality of element groups arranged at intervals along the second direction, one column of element groups is electrically connected to part of the signal lines of one signal line group, and each element group includes a plurality of light-emitting elements arranged at intervals along the first direction and electrically connected in sequence; the first direction intersects the second direction; Multiple columns of control chips are arranged along the first direction, and each column of control chips includes multiple control chips arranged at intervals along the second direction; a column of control chips is set on one side of a column of component groups and is electrically connected to the column of component groups and part of the signal lines of a signal line group.

2. The light-emitting substrate according to claim 1, characterized in that: The plurality of light emitting elements of the element group include a first light emitting element and at least one second light emitting element; The first light emitting element is located at one end of the element group along the first direction; The signal line group includes: a ground line and a first voltage signal line, the ground line is located between the first light-emitting element and the at least one second light-emitting element, and the first voltage signal line is located on a side of the at least one second light-emitting element away from the first light-emitting element; The control chip is disposed on one side of the first light emitting element along the second direction.

3. The light-emitting substrate according to claim 2, characterized in that: The light emitting substrate further includes a first bridge portion configured to connect the first light emitting element and a second light emitting element that is closest to the first light emitting element.

4. The light-emitting substrate according to claim 3, characterized in that: The element group includes a plurality of the second light-emitting elements; The signal line group further includes: a first connecting line, the first connecting line is disposed between two adjacent second light-emitting elements and is configured to connect two adjacent second light-emitting elements; The light-emitting substrate further includes: a first connection pattern electrically connected to a second light-emitting element closest to the first light-emitting element and electrically connected to the first bridge portion; Wherein, a size of the first connection pattern along the second direction is greater than a size of the first connection line along the second direction.

5. The light-emitting substrate according to claim 4, characterized in that: The resistivity of the first bridge portion is smaller than the resistivity of the first connection line.

6. The light emitting substrate according to claim 4, characterized in that: The signal line group further includes: a second connection pattern electrically connected to the first light emitting element and to the first bridge portion; Wherein, a size of the second connection pattern along the second direction is greater than a size of the first connection line along the second direction.

7. The light-emitting substrate according to claim 6, characterized in that: The second connection pattern is located at one side of the first light emitting element along the second direction, or between the first light emitting element and the ground trace.

8. The light emitting substrate according to claim 2, characterized in that: The grounding wiring includes: A first main body portion extending along the second direction and located between the first light emitting element and the at least one second light emitting element; A plurality of first protrusions are located on a side of the first main body close to the at least one second light-emitting element and connected to the first main body; the first protrusions extend along the first direction and are located between two adjacent element groups along the second direction.

9. The light-emitting substrate according to claim 8, characterized in that: At least one of the plurality of first voltage signal lines included in the plurality of signal line groups is a first target signal line, and the first target signal line includes: A second main body portion extending along the second direction and located on a side of the at least one second light-emitting element away from the first light-emitting element; A plurality of second protrusions are located on a side of the second main body close to the ground trace and connected to the second main body; the second protrusions extend along the first direction and are located between two adjacent component groups along the second direction.

10. The light emitting substrate according to claim 8, characterized in that: At least one of the plurality of first voltage signal lines included in the plurality of signal line groups is a second target signal line, and the second target signal line includes: A plurality of second protrusions are spaced apart along the second direction; each second protrusion is connected to a corresponding component group, and the second protrusion is located on one side of the component group along the second direction; The light emitting substrate further includes: a plurality of second bridge portions, wherein the second bridge portions are configured to electrically connect two second protruding portions adjacent to each other along the second direction.

11. The light emitting substrate according to claim 10, characterized in that: Among the plurality of first voltage signal lines included in the plurality of signal line groups, the outermost first voltage signal line along the first direction is the second target signal line, and the second target signal line is adjacent to the frame area of ​​the light emitting substrate.

12. The light emitting substrate according to any one of claims 9 to 11, characterized in that: Along the second direction, a first protruding portion and a second protruding portion are provided between two adjacent element groups; The first protrusion and the second protrusion are arranged side by side along the first direction.

13. The light emitting substrate according to claim 12, characterized in that: The first connection pattern of the light-emitting substrate is located between the second light-emitting element closest to the first light-emitting element and the ground trace.

14. The light emitting substrate according to any one of claims 9 to 11, characterized in that: Along the second direction, a first protrusion and a second protrusion are provided between two adjacent element groups; The first protrusion and the second protrusion are arranged side by side along the second direction.

15. The light emitting substrate according to claim 14, characterized in that: The first connection pattern of the light emitting substrate is located on a side of the second light emitting element that is closest to the first light emitting element along the second direction.

16. The light emitting substrate according to claim 15, characterized in that: Along the first direction, the first connection pattern of the light-emitting substrate and the second protrusion are arranged side by side along the first direction; A dimension of the first protrusion along the first direction is greater than a dimension of the second protrusion along the first direction.

17. The light emitting substrate according to any one of claims 9 to 11, characterized in that: The dimension of the first main body along the first direction is 1.9 mm to 2.1 mm; A dimension of the second main body along the first direction is 3.4 mm to 3.7 mm.

18. The light emitting substrate according to any one of claims 2 to 11, characterized in that: The signal line group also includes an addressing signal line, a power signal line and a feedback signal line; Along the first direction, the addressing signal line, the power signal line, the ground line, the feedback signal line and the first voltage signal line are arranged in sequence; Part of the addressing signal line and part of the power signal line are located between the first light-emitting element and the at least one second light-emitting element, and the feedback signal line is located on a side of the ground line away from the control chip, and extends along a boundary of a side of the ground line away from the control chip.

19. The light emitting substrate according to any one of claims 2 to 11, characterized in that: The light emitting substrate comprises a device area and a binding area arranged side by side along the second direction, and the plurality of element groups and the plurality of light emitting elements are arranged in the device area; The light-emitting substrate further comprises: A first boundary, a ground trace in the signal line group closest to the first boundary is closer to the first boundary than a first voltage signal line closest to the first boundary, and a spacing between the first boundary and the signal line group is 2.0 mm to 2.3 mm; a second boundary, the first boundary and the second boundary are opposite in the first direction; a first voltage signal line in the signal line group closest to the second boundary is closer to the second boundary than a ground line closest to the second boundary, and a spacing between the second boundary and the signal line group is 2.0 mm to 2.3 mm; The binding pins, along the second direction, have a minimum spacing between the binding pins and the signal line group of 1.3 mm to 1.6 mm.

20. The light emitting substrate according to claim 1, characterized in that: The signal line group includes: a ground line and a first voltage signal line; the plurality of light emitting elements of the element group are arranged between the ground line and the first voltage signal line.

21. The light-emitting substrate according to claim 20, characterized in that: The light-emitting substrate further comprises: a second connecting line, located between two adjacent light emitting elements of the element group, and configured to connect the two adjacent light emitting elements; A size of the second connecting line along the second direction is larger than a size of the light emitting element along the second direction; and a distance between two adjacent second connecting lines along the second direction is smaller than a size of the second connecting line along the second direction.

22. The light-emitting substrate according to claim 21, characterized in that: The grounding wiring includes: a third main body portion extending along the second direction; at least one third protrusion, located on a side of the third main body close to the first voltage signal line and connected to the third main body; the third protrusion extends along the first direction and is located between two adjacent element groups; The first voltage signal line comprises: a fourth main body portion extending along the second direction; at least one fourth protrusion, located on a side of the fourth main body close to the ground trace and connected to the fourth main body; the fourth protrusion extends along the first direction and is located between two adjacent component groups; The light-emitting substrate further comprises: A third bridging portion, one end of which is electrically connected to an end of the third protruding portion away from the third main body portion, and the other end of which is electrically connected to the ground trace of the adjacent signal line group; The fourth bridge portion has one end electrically connected to the end of the fourth protrusion away from the fourth main body portion, and the other end electrically connected to the first voltage signal line of the adjacent signal line group.

23. The light-emitting substrate according to claim 22, characterized in that: At least one element group is arranged between the third protrusion and the fourth protrusion adjacent to each other along the second direction; along the second direction, the size of the third protrusion is smaller than the size of the second connecting line, and the size of the fourth protrusion is smaller than the size of the second connecting line.

24. The light emitting substrate according to any one of claims 20 to 23, characterized in that: The light emitting substrate comprises a device area and a binding area arranged side by side along the second direction, and the plurality of light emitting elements of the plurality of element groups are arranged in the device area; The light-emitting substrate further comprises: A first voltage signal pin, wherein the first voltage signal pin is arranged in the binding area; The fifth bridge portion is configured to connect the first voltage signal line and the first voltage signal pin.

25. The light emitting substrate according to any one of claims 20 to 23, characterized in that: The signal line group further includes an addressing signal line, a data signal line and a power signal line; along the first direction, the first voltage signal line, the power signal line, the data signal line, the addressing signal line and the ground line are arranged in sequence.

26. A display device, characterized in that: The display device comprises: The light-emitting substrate according to any one of claims 1 to 25; The display panel is provided with the light emitting substrate being located on the non-display side of the display panel.

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