Memory storage system and method, computer equipment and computer readable storage medium
By setting instruction shared memory and data shared memory between the host and CXL device, and using the CXL communication interface for data interaction, the problems of high power consumption and low computing efficiency during data transmission in computer devices are solved, and data sharing and efficiency improvement are achieved .
Patent Information
- Application Number
- CN202310793007.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-30
- Publication Date
- 2024-12-31
AI Technical Summary
The prior art has problems such as high power consumption, low computing efficiency and large transmission load during data transmission, especially when data transmission demand increases in computer equipment, it is difficult to effectively solve.
By setting instruction shared memory and data shared memory between the host and CXL device, and using the CXL communication interface for data transmission, data sharing and processing can be realized, data transmission paths are reduced, power consumption and transmission load are reduced, and computing efficiency is improved.
It effectively reduces data transmission, reduces power consumption and transmission load, improves computing efficiency, and expands the scope of use of CXL devices to realize data sharing.
Smart Images
Figure CN119225989A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of storage technology, and in particular to a memory storage system, method, computer device, storage medium and computer program product. Background Art
[0002] With the rapid development of computer technology, hosts and other devices will transmit a large amount of business data according to functional needs. The transmission of a large amount of data will lead to problems such as heavy transmission load, high power consumption, and low computing efficiency. Summary of the invention
[0003] Based on this, it is necessary to provide a memory storage system, method, computer device, storage medium and computer program product that can reduce data transmission, reduce power consumption, reduce transmission load and improve computing efficiency in response to the above technical problems.
[0004] In a first aspect, the present application provides a memory storage system, comprising:
[0005] A host, the host comprising a first instruction shared memory and a first data shared memory;
[0006] A CXL device, the CXL device comprising a second instruction shared memory, a second data shared memory, a first CXL communication interface, and a second CXL communication interface;
[0007] The second instruction shared memory is connected to the first instruction shared memory via the first CXL communication interface, and the second data shared memory is connected to the first data shared memory via the second CXL communication interface; the host and the CXL device transmit operators via the first instruction shared memory and the second instruction shared memory; the host or the CXL device obtains storage data based on the operator; the host and the CXL device also interactively share the storage data via the first data shared memory and the second data shared memory.
[0008] In one embodiment, the host further includes an instruction acquisition module, which is connected to the first instruction shared memory; the instruction acquisition module is used to receive the operator or pre-store the operator, and transmit the operator to the first instruction shared memory;
[0009] The host transmits the operator to the CXL device; the CXL device further includes a command interpreter and a first processor; the command interpreter is connected to the host, the second command shared memory and the first processor, and the command interpreter is used to receive and respond to a startup command transmitted by the host, load the operator in the second command shared memory based on the startup command, generate an execution instruction of the operator, and transmit the execution instruction to the first processor; the first processor is also connected to the second data shared memory, and the first processor is used to receive the execution instruction, obtain the storage data based on the execution instruction, and synchronize the storage data to the second data shared memory for storage;
[0010] The CXL device also interactively shares the saved storage data with the first data shared memory in the host based on the second data shared memory.
[0011] In one of the embodiments, the CXL device further comprises an instruction acquisition module, the instruction acquisition module is connected to the second instruction shared memory, the instruction acquisition module is used to receive the operator or pre-store the operator, and transmit the operator to the second instruction shared memory;
[0012] The CXL device transmits the operator to the host; the host further includes an instruction interpreter and a first processor; the instruction interpreter is connected to the CXL device, the first instruction shared memory and the first processor, the instruction parser is used to receive and respond to a startup command transmitted by the CXL device, load the operator in the first instruction shared memory based on the startup command, generate an execution instruction of the operator, and transmit the execution instruction to the first processor; the first processor is also connected to the first data shared memory, the first processor is used to receive the execution instruction, obtain the storage data based on the execution instruction, and synchronize the storage data to the first data shared memory for storage;
[0013] The host also interactively shares the stored data to the second data shared memory in the CXL device based on the first data shared memory.
[0014] In one of the embodiments, the instruction acquisition module includes a persistent storage medium, and the operator is pre-stored in the instruction acquisition module.
[0015] In one of the embodiments, the instruction acquisition module includes a system daemon process module, and the instruction acquisition module is used to receive operators input by a user; the instruction interpreter is connected to the instruction acquisition module.
[0016] In a second aspect, the present application further provides a memory storage method, which is executed based on the memory storage system described in any of the above embodiments; the memory storage method includes:
[0017] The host and the CXL device transmit operators via the first instruction shared memory and the second instruction shared memory;
[0018] The host or the CXL device performs data processing based on the operator to obtain storage data;
[0019] The host and the CXL device interactively share the storage data via the first data shared memory and the second data shared memory.
[0020] In one of the embodiments, the first instruction shared memory in the host transmits the operator to the second instruction shared memory in the CXL device via the first CXL communication interface;
[0021] The CXL device receives the operator transmitted by the host, and performs data processing based on the operator to obtain the stored data;
[0022] The second data shared memory in the CXL device interactively shares the stored data with the first data shared memory in the host via the second CXL communication interface.
[0023] In one of the embodiments, the second instruction shared memory in the CXL device transmits the operator to the first instruction shared memory in the host via the first CXL communication interface;
[0024] The host receives the operator transmitted by the CXL device, and performs data processing based on the operator to obtain the stored data;
[0025] The first data shared memory in the host interactively shares the stored data with the second data shared memory in the CXL device via the second CXL communication interface.
[0026] In a third aspect, the present application further provides a computer device, wherein the computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the memory storage method described in any of the above embodiments are implemented.
[0027] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the memory storage method described in any of the above embodiments are implemented.
[0028] In a fifth aspect, the present application further provides a computer program product, which includes a computer program, and when the computer program product is executed by a processor, the steps of the memory storage method described in any of the above embodiments are implemented.
[0029] The above-mentioned memory storage system, method, computer device, storage medium and computer program product can reduce data transmission, reduce power consumption, reduce transmission load, improve computing efficiency, realize data sharing, and expand the use scope of CXL devices by setting a first instruction shared memory and a first data shared memory in the host and setting a CXL device having a second instruction shared memory, a second data shared memory, a first CXL communication interface and a second CXL communication interface. The host and the CXL device transmit operators based on the first instruction shared memory and the second instruction shared memory; the host or the CXL device obtains storage data based on the operators; the host and the CXL device interactively share storage data based on the first data shared memory and the second data shared memory. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 is a structural block diagram of a memory storage system in one embodiment;
[0031] Figure 2 is a structural block diagram of a memory storage system in another embodiment;
[0032] Figure 3 is a structural block diagram of a memory storage system in yet another embodiment;
[0033] Figure 4 is a structural block diagram of a memory storage system in yet another embodiment;
[0034] Figure 5 is a flowchart of a memory storage method in yet another embodiment;
[0035] Figure 6 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment.
[0036] Description of Reference Numerals
[0037] 10. Host; 101. First instruction shared memory; 102. First data shared memory; 20. CXL device; 201. Second instruction shared memory; 202. Second data shared memory; 103. 203. Instruction acquisition module; 104. 204. Instruction interpreter; 105. 205. First processor; 106. 206. Intrinsic memory; 107. 207. Second processor. DETAILED DESCRIPTION
[0038] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0039] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the technical field of the present application. The terms used herein in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application.
[0040] The algorithm logic in the current DPU (Data Process Unit, computing accelerator card) application scenarios is rigid, with few software-defined interfaces. Applications need to adapt to DPU interfaces, and the scalability is poor. For example, algorithms such as data deduplication and compression need to be predefined in the accelerator card, and applications cannot expand other functions. The application scenarios are single and the market product forms are diversified.
[0041] CXL (Compute Express Link) is an emerging technology that is mainly used for memory interface expansion and shared memory. It mainly accelerates business data transmission as a method to improve system performance. When CXL is applied in shared memory and other aspects, it requires large-capacity DRAM as support, which will inevitably increase the system application cost.
[0042] See also Figure 1 The present application provides a memory storage system, the memory storage system comprises: a host 10 and a CXL device 20; wherein,
[0043] The host 10 includes a first instruction shared memory 101 and a first data shared memory 102;
[0044] The CXL device 20 includes a second instruction shared memory 201, a second data shared memory 202, a first CXL communication interface (not shown), and a second CXL communication interface (not shown);
[0045] The second instruction shared memory 201 is connected to the first instruction shared memory 101 via the first CXL communication interface, and the second data shared memory 202 is connected to the first data shared memory 102 via the second CXL communication interface; the host 10 and the CXL device 20 transmit operators (i.e., instructions) via the first instruction shared memory 101 and the second instruction shared memory 201; the host 10 or the CXL device 20 obtains storage data based on the operator; the host 10 and the CXL device 20 also interact and share storage data via the first data shared memory 102 and the second data shared memory 202.
[0046] In the memory storage system of the present application, a first instruction shared memory 101 and a first data shared memory 102 are set in a host 10, and a CXL device 20 having a second instruction shared memory 201, a second data shared memory 202, a first CXL communication interface, and a second CXL communication interface is set. The host 10 and the CXL device 20 transmit operators based on the first instruction shared memory 101 and the second instruction shared memory 201, and the host 10 or the CXL device 20 obtains storage data based on the operators; the host 10 and the CXL device 20 interactively share storage data based on the first data shared memory 102 and the second data shared memory 202, which can reduce data transmission, reduce power consumption, reduce transmission load, improve computing efficiency, realize data sharing, and expand the scope of use of the CXL device.
[0047] For an example, see Figure 1 The host 10 may further include an instruction acquisition module 103, which is connected to the first instruction shared memory 101; the instruction acquisition module 103 is used to receive an operator or pre-store an operator and transmit the operator to the first instruction shared memory 101;
[0048] The host 10 transmits an operator to the CXL device 20; the CXL device 20 may further include an instruction interpreter 204 and a first processor 205; the instruction interpreter 204 is connected to the host 10, the second instruction shared memory 201 and the first processor 201, and the instruction interpreter 204 is used to receive and respond to the operator transmitted by the host 10, generate an execution instruction of the operator, and transmit the execution instruction to the first processor 205; the first processor 205 is also connected to the second data shared memory 202, and the first processor 205 is used to receive the execution instruction, obtain storage data based on the execution instruction, and synchronize the storage data to the second data shared memory 202 for storage; the CXL device 20 also interactively shares the stored storage data to the first data shared memory 102 of the host 10 based on the second data shared memory 202.
[0049] As an example, the host 10 may further include a second processor 107 , and the second processor 107 is connected to the first data shared memory 102 .
[0050] In one example, if Figure 1 As shown, the instruction acquisition module 103 may include but is not limited to a persistent storage medium, and the operator is pre-stored in the instruction acquisition module 103. In this example, the instruction interpreter 204 is connected to the second processor 107; specifically, the CXL device 20 may also include a third CXL communication interface, and the instruction interpreter 204 is connected to the second processor 107 through the third CXL communication interface; at this time, the host 10 transmits the start command to the instruction interpreter 204 based on the second processor 107 through the third CXL communication interface.
[0051] Specifically, the persistent storage medium may include SSD (Solid State Drives), HDD (Hard Disk Drive, HDD), EXE or BIN Program, etc.
[0052] As an example, the first processor 205 may also be connected to the second instruction shared memory 201 .
[0053] As an example, the host 10 may also include native memory 106 .
[0054] Please continue reading Figure 1 , the memory storage system of this example works as follows:
[0055] First, the host 10 loads the operator of the executable program from the instruction acquisition module 103 to the first instruction shared memory 101;
[0056] Secondly, the first instruction shared memory 101 in the host 10 transmits the operator to the second instruction shared memory 102 in the CXL device 20 via the first CXL communication interface;
[0057] Again, the second processor 107 in the host 10 sends a start command to the instruction interpreter 204 through the third CXL communication interface to trigger the instruction interpreter 204, and the instruction interpreter 204 loads the operator in the second instruction shared memory 201, generates an execution instruction of the operator, and transmits the execution instruction to the first processor 205 in the CXL device 20 for execution; the first processor 205 receives the execution instruction, obtains storage data based on the execution instruction, and synchronizes the storage data to the second data shared memory 202 for storage;
[0058] Finally, the second data shared memory 202 in the CXL device 20 synchronizes the stored data to the first data shared memory 102 in the host 10 via the second CXL communication interface.
[0059] In another example, see Figure 2 , the instruction acquisition module 103 may include but is not limited to the system daemon module, and the instruction acquisition module 103 is used to acquire the operator input by the user 30. Specifically, a human-computer interaction interface (not shown) may be provided on the host 10, and the human-computer interaction interface is connected to the instruction acquisition module 103; the user 30 may input the operator through the human-computer interaction interface, and the operator input through the human-computer interaction interface will be acquired by the instruction acquisition module 103, that is, the instruction acquisition module 103 receives the operator input through the human-computer interaction interface. In this example, the instruction interpreter 204 is connected to the instruction acquisition module 103.
[0060] Please continue reading Figure 2 , the memory storage system of this example works as follows:
[0061] First, the instruction acquisition module 103 in the host 10 waits for the user 30 to input an operator;
[0062] Secondly, after receiving the operator input by the user 30, the instruction acquisition module 103 writes the operator into the first instruction shared memory 101 in the host 10;
[0063] Again, the first instruction shared memory 101 synchronizes the operator to the second instruction shared memory 102 of the CXL device 20 via the first CXL communication interface;
[0064] Again, the instruction acquisition module 103 triggers the instruction interpreter 204 through the third CXL communication interface, and the instruction interpreter 204 loads the operator in the second instruction shared memory 201, generates the execution instruction of the operator, and transmits the execution instruction to the first processor 205 in the CXL device 20 for execution; the first processor 205 receives the execution instruction, obtains the storage data based on the execution instruction, and synchronizes the storage data to the second data shared memory 202 for storage;
[0065] Finally, the second data shared memory 202 in the CXL device 20 synchronizes the stored data to the first data shared memory 102 in the host 10 via the second CXL communication interface.
[0066] It should be noted that Figure 1 and Figure 2 In the example, after the storage data is synchronized to the first data shared memory 102, the first data shared memory 102 will further synchronize the storage data to the second processor 107, and the second processor 107 will perform subsequent processing on the storage data as needed.
[0067] It needs to be further explained that Figure 1 and Figure 2 In the example, the first processor 205 obtains the storage data based on the execution instruction of the operator, and after synchronizing the storage data to the second data shared memory 202 for storage, it can also send a notification to the host 10 through the third CXL communication interface to inform the host 10 that the data processing is completed.
[0068] In another example, see Figure 3 , the CXL device 20 may further include an instruction acquisition module 203, the instruction acquisition module 203 is connected to the second instruction shared memory 201; the instruction acquisition module 203 is used to receive an operator or pre-store an operator, and transmit the operator to the second instruction shared memory 201;
[0069] The CXL device 20 transmits the operator to the host 10; the host 10 may further include an instruction interpreter 104 and a first processor 105; the instruction interpreter 104 is connected to the CXL device 20, the first instruction shared memory 101 and the first processor 105, and the instruction interpreter 104 is used to receive and respond to the operator transmitted by the CXL device 20, generate an execution instruction of the operator, and transmit the execution instruction to the first processor 105; the first processor 105 is also connected to the first data shared memory 102, and the first processor 105 is used to receive the execution instruction, obtain storage data based on the execution instruction, and synchronize the storage data to the first data shared memory 102 for storage;
[0070] The host 20 also interactively shares the saved storage data to the second data shared memory 202 of the CXL device 20 based on the first data shared memory 102 .
[0071] As an example, the CXL device 20 may further include a second processor 207 , where the second processor 207 is connected to the second data shared memory 202 .
[0072] In one example, if Figure 3 As shown, the instruction acquisition module 203 may include but is not limited to a persistent storage medium, and the operator is pre-stored in the instruction acquisition module 203. In this example, the instruction interpreter 104 is connected to the second processor 207; specifically, the CXL device 20 may also include a third CXL communication interface, and the instruction interpreter 104 is connected to the second processor 207 through the third CXL communication interface; at this time, the CXL device 20 transmits the start command to the instruction interpreter 104 through the third CXL communication interface based on the second processor 207.
[0073] Specifically, the persistent storage medium may include SSD (Solid State Drives), HDD (Hard Disk Drive, HDD), EXE or BIN Program, etc.
[0074] As an example, the first processor 105 may also be connected to the first instruction shared memory 105 .
[0075] As an example, CXL device 20 may also include native memory 206 .
[0076] Please continue reading Figure 3 , the memory storage system of this example works as follows:
[0077] First, the CXL device 20 loads the operator of the executable program from the instruction acquisition module 203 to the second instruction shared memory 201;
[0078] Secondly, the second instruction shared memory 201 in the CXL device 20 transmits the operator to the first instruction shared memory 101 of the host 10 through the first CXL communication interface;
[0079] Again, the second processor 207 in the CXL device 20 sends a start command to the instruction interpreter 104 through the third CXL communication interface to trigger the instruction interpreter 104. The instruction interpreter 104 loads the operator in the first instruction shared memory 101, generates an execution instruction of the operator, and transmits the execution instruction to the first processor 105 in the host 10 for execution; the first processor 105 receives the execution instruction, obtains storage data based on the execution instruction, and synchronizes the storage data to the first data shared memory 102 for storage;
[0080] Finally, the first data shared memory 102 in the host 10 synchronizes the stored data to the second data shared memory 202 in the CXL device 20 via the second CXL communication interface.
[0081] In another example, see Figure 4 , the instruction acquisition module 203 may include but is not limited to the system daemon module, and the instruction acquisition module 203 is used to acquire the operator input by the user 30. Specifically, a human-computer interaction interface (not shown) may be provided on the CXL device 20, and the human-computer interaction interface is connected to the instruction acquisition module 203; the user 30 may input the operator through the human-computer interaction interface, and the operator input through the human-computer interaction interface will be acquired by the instruction acquisition module 203, that is, the instruction acquisition module 203 receives the operator input through the human-computer interaction interface. In this example, the instruction interpreter 104 is connected to the instruction acquisition module 203.
[0082] Please continue reading Figure 4 , the memory storage system of this example works as follows:
[0083] First, the instruction acquisition module 203 in the CXL device 20 waits for the user 30 to input an operator;
[0084] Secondly, after receiving the operator input by the user 30 , the instruction acquisition module 203 writes the operator into the second instruction shared memory 201 in the CXL device 20 ;
[0085] Again, the second instruction shared memory 201 synchronizes the operator to the first instruction shared memory 101 in the host 10 through the first CXL communication interface;
[0086] Again, the instruction acquisition module 203 triggers the instruction interpreter 104 through the third CXL communication interface, and the instruction interpreter 104 loads the operator in the first instruction shared memory 101, generates the execution instruction of the operator, and transmits the execution instruction to the first processor 105 in the host 10 for execution; the first processor 105 receives the execution instruction, obtains the storage data based on the execution instruction, and synchronizes the storage data to the first data shared memory 102 for storage;
[0087] Finally, the first data shared memory 102 in the host 10 synchronizes the stored data to the second data shared memory 202 in the CXL device 20 via the second CXL communication interface.
[0088] It should be noted that Figure 3 and Figure 4 In the example, after the storage data is synchronized to the second data shared memory 202, the second data shared memory 202 will further synchronize the storage data to the second processor 207, and the second processor 207 will perform subsequent processing on the storage data as needed.
[0089] It needs to be further explained that Figure 3 and Figure 4 In the example, the first processor 105 obtains the storage data based on the execution instruction of the operator, and after synchronizing the storage data to the first data shared memory 102 for storage, it can also send a notification to the CXL device 20 through the third CXL communication interface to inform the CXL device 20 that the data processing is completed.
[0090] As an example, the first CXL communication interface may be a CXL.mem interface, i.e., the first CXL communication interface communicates based on the CXL.mem protocol; the second CXL communication interface may be a CXL.Cache interface, i.e., the second CXL communication interface communicates based on the CXL.Cache protocol; the third CXL communication interface may be a CXL.IO interface, i.e., the third CXL communication interface communicates based on the CXL.IO protocol.
[0091] Each module in the above memory storage system can be implemented in whole or in part by software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.
[0092] Please combine Figures 1 to 4 See also Figure 5 The present application also provides a memory storage method, the memory storage method is based on Figures 1 to 4 The memory storage system in any one of the examples is executed; the memory storage method may include the following steps:
[0093] S10: The host and the CXL device transmit operators via the first instruction shared memory and the second instruction shared memory;
[0094] S20: The host or the CXL device performs data processing based on the operator to obtain storage data;
[0095] S30: The host and the CXL device interactively share storage data via the first data shared memory and the second data shared memory.
[0096] In the memory storage method of the present application, based on Figures 1 to 4 The memory storage system can be used to execute, which can reduce data transmission, reduce power consumption, reduce transmission load, improve computing efficiency, and realize data sharing, expanding the scope of use of CXL devices.
[0097] In an example, see Figure 1 and Figure 2 See also Figure 5 In step S10, the first instruction shared memory 101 in the host 10 transmits the operator to the second instruction shared memory 201 in the CXL device 20 via the first CXL communication interface. In step S20, the CXL device 20 receives the operator transmitted by the host 10, and performs data processing based on the operator to obtain storage data. In step S30, the second data shared memory 202 in the CXL device 20 interactively shares the storage data to the first data shared memory 102 of the host 10 via the second CXL communication interface.
[0098] Specifically, in step S20 , the first processor 205 in the CXL device 20 may perform data processing based on an operator to obtain storage data.
[0099] In this example, before step S10, the following step may also be included: the host 10 loads the operator of the executable program from the instruction acquisition module 103 to the first instruction shared memory 101. The operator may be Figure 1 The instruction acquisition module 103 may be pre-stored as shown. Figure 2 The shown is obtained by user input.
[0100] In this example, the following steps may also be included between step S10 and step S20: the second processor 107 in the host 10 sends a start command to the instruction interpreter 204 through the third CXL communication interface to trigger the instruction interpreter 204, and the instruction interpreter 204 loads the operator in the second instruction shared memory 201, generates the execution instruction of the operator, and transmits the execution instruction to the first processor 205 for execution.
[0101] In another example, combine Figure 3 and Figure 4See also Figure 5 In step S10, the second instruction shared memory 201 in the CXL device 20 transmits the operator to the first instruction shared memory 101 in the host 10 via the first CXL communication interface. In step S20, the host 10 receives the operator transmitted by the CXL device 20, and performs data processing based on the operator to obtain storage data. In step S30, the first data shared memory 102 in the host 10 interactively shares the storage data to the second data shared memory 202 in the CXL device 20 via the second CXL communication interface.
[0102] Specifically, in step S20, the first processor 105 in the host 10 may perform data processing based on the operator to obtain storage data.
[0103] In this example, before step S10, the following step may be further included: the CXL device 20 loads the operator of the executable program from the instruction acquisition module 203 to the second instruction shared memory 201. The operator may be Figure 3 As shown, it is pre-stored in the instruction acquisition module 203, or it can be Figure 4 The shown one is obtained by input from user 30 .
[0104] In this example, the following steps may be further included between step S10 and step S20: the second processor 207 in the CXL device 20 sends a start command to the instruction interpreter 104 through the third CXL communication interface to trigger the instruction interpreter 104, and the instruction interpreter 104 loads the operator in the first instruction shared memory 101, generates an execution instruction of the operator, and transmits the execution instruction to the first processor 105 for execution.
[0105] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.
[0106] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 6As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, a memory storage method is implemented. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.
[0107] Those skilled in the art will understand that Figure 6 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.
[0108] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented: a host and a CXL transmit an operator via a first instruction shared memory and a second instruction shared memory; the host or a CXL device processes data based on the operator to obtain storage data; the host and the CXL device interactively share storage data via a first data shared memory and a second data shared memory.
[0109] In some optional embodiments, when the computer program is executed by the processor, the following steps are specifically implemented: the first instruction shared memory in the host transmits the operator to the second instruction shared memory in the CXL device via the first CXL communication interface; the CXL device receives the operator transmitted by the host, and performs data processing based on the operator to obtain storage data; the second data shared memory in the CXL device interactively shares the storage data to the first data shared memory in the host via the second CXL communication interface.
[0110] In some optional embodiments, when the computer program is executed by the processor, the following steps are specifically implemented: the second instruction shared memory in the CXL device transmits the operator to the first instruction shared memory in the host via the first CXL communication interface; the host receives the operator transmitted by the CXL device, and performs data processing based on the operator to obtain storage data; the first data shared memory in the host interactively shares the storage data to the second data shared memory in the CXL device via the second CXL communication interface.
[0111] In one embodiment, a computer program product is provided, comprising a computer program. When the computer program product is executed by a processor, the following steps are implemented: a host and a CXL device transmit an operator via a first instruction shared memory and a second instruction shared memory; the host or the CXL device performs data processing based on the operator to obtain storage data; the host and the CXL device interactively share storage data via a first data shared memory and a second data shared memory.
[0112] In some optional embodiments, when the computer program product is executed by a processor, the following steps are specifically implemented: the first instruction shared memory in the host transmits the operator to the second instruction shared memory in the CXL device via the first CXL communication interface; the CXL device receives the operator transmitted by the host, and performs data processing based on the operator to obtain storage data; the second data shared memory in the CXL device interactively shares the storage data to the first data shared memory in the host via the second CXL communication interface.
[0113] In some optional embodiments, when the computer program product is executed by a processor, the following steps are specifically implemented: the second instruction shared memory in the CXL device transmits the operator to the first instruction shared memory in the host via the first CXL communication interface; the host receives the operator transmitted by the CXL device, and performs data processing based on the operator to obtain storage data; the first data shared memory in the host interactively shares the storage data to the second data shared memory in the CXL device via the second CXL communication interface.
[0114] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.
[0115] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0116] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. A memory storage system, characterized in that: include: A host, the host comprising a first instruction shared memory and a first data shared memory; A CXL device, the CXL device comprising a second instruction shared memory, a second data shared memory, a first CXL communication interface, and a second CXL communication interface; The second instruction shared memory is connected to the first instruction shared memory via the first CXL communication interface, and the second data shared memory is connected to the first data shared memory via the second CXL communication interface; the host and the CXL device transmit operators via the first instruction shared memory and the second instruction shared memory; the host or the CXL device obtains storage data based on the operator; the host and the CXL device also interactively share the storage data via the first data shared memory and the second data shared memory.
2. The memory storage system according to claim 1, characterized in that: The host further includes an instruction acquisition module, which is connected to the first instruction shared memory; the instruction acquisition module is used to receive the operator or pre-store the operator, and transmit the operator to the first instruction shared memory; The host transmits the operator to the CXL device; the CXL device further includes a command interpreter and a first processor; the command interpreter is connected to the host, the second command shared memory and the first processor, and the command interpreter is used to receive and respond to a startup command transmitted by the host, load the operator in the second command shared memory based on the startup command, generate an execution instruction of the operator, and transmit the execution instruction to the first processor; the first processor is also connected to the second data shared memory, and the first processor is used to receive the execution instruction, obtain the storage data based on the execution instruction, and synchronize the storage data to the second data shared memory for storage; The CXL device also interactively shares the saved storage data with the first data shared memory in the host based on the second data shared memory.
3. The memory storage system according to claim 1, characterized in that: The CXL device further comprises an instruction acquisition module, the instruction acquisition module is connected to the second instruction shared memory, the instruction acquisition module is used to receive the operator or pre-store the operator, and transmit the operator to the second instruction shared memory; The CXL device transmits the operator to the host; the host further includes an instruction interpreter and a first processor; the instruction interpreter is connected to the CXL device, the first instruction shared memory and the first processor, the instruction parser is used to receive and respond to a startup command transmitted by the CXL device, load the operator in the first instruction shared memory based on the startup command, generate an execution instruction of the operator, and transmit the execution instruction to the first processor; the first processor is also connected to the first data shared memory, the first processor is used to receive the execution instruction, obtain the storage data based on the execution instruction, and synchronize the storage data to the first data shared memory for storage; The host also interactively shares the stored data to the second data shared memory in the CXL device based on the first data shared memory.
4. The memory storage system according to claim 2 or 3, characterized in that: The instruction acquisition module includes a persistent storage medium, and the operator is pre-stored in the instruction acquisition module.
5. The memory storage system according to claim 2 or 3, characterized in that: The instruction acquisition module includes a system daemon process module, and the instruction acquisition module is used to receive operators input by a user; the instruction interpreter is connected to the instruction acquisition module.
6. A memory storage method, characterized in that: The memory storage method is performed based on the memory storage system according to any one of claims 1 to 5; The memory storage method comprises: The host and the CXL device transmit operators via the first instruction shared memory and the second instruction shared memory; The host or the CXL device performs data processing based on the operator to obtain storage data; The host and the CXL device interactively share the storage data via the first data shared memory and the second data shared memory.
7. The memory storage method according to claim 6, characterized in that: The first instruction shared memory in the host transmits the operator to the second instruction shared memory in the CXL device via the first CXL communication interface; The CXL device receives the operator transmitted by the host, and performs data processing based on the operator to obtain the stored data; The second data shared memory in the CXL device interactively shares the stored data with the first data shared memory in the host via the second CXL communication interface.
8. The memory storage method according to claim 6, characterized in that: The second instruction shared memory in the CXL device transmits the operator to the first instruction shared memory in the host via the first CXL communication interface; The host receives the operator transmitted by the CXL device, and performs data processing based on the operator to obtain the stored data; The first data shared memory in the host interactively shares the stored data with the second data shared memory in the CXL device via the second CXL communication interface.
9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the memory storage method described in any one of claims 6 to 8 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the memory storage method according to any one of claims 6 to 8 are implemented.
11. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the memory storage method described in any one of claims 6 to 8 are implemented.