Firmware processing method, retiming card, computer system and readable storage medium

Abstract

The invention discloses a firmware processing method, a retiming card, a computer system and a readable storage medium, and the method comprises the steps: obtaining the level information of two single-ended signals of a high-speed expansion slot through a wire connected with the high-speed expansion slot; determining a target bandwidth of the external device based on the level information according to a mapping relationship between the level and the bandwidth; determining a target memory to be connected with the retiming component based on the target bandwidth according to a mapping relationship between the bandwidth and firmware; wherein firmware with different bandwidths is stored in different memories; and sending a control signal for connecting the target memory to the selection switch, so that the retiming component performs signal adjustment based on the target firmware. The method and the device have the technical effects that the firmware switching work of the retiming card can be completed without starting up without depending on a substrate management controller or depending on bandwidth information stored in other equipment, and non-inductive operation is realized.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a firmware processing method, a retiming card, a computer system, and a readable storage medium. Background Art

[0002] With the rapid iteration of PCIE (Peripheral Component Interconnect Express) technology, the speed has increased rapidly from PCIE GEN1 2.5GT / s to GEN5 32GT / s, and GEN6 64GT / s will be commercialized in the near future. In some server configurations, the PCIE link will be very long. At high speeds, it faces the challenge of signal integrity. The signal regulation function of Retimer in PCIE link makes it more and more widely used in increasingly high-speed lines.

[0003] At present, the firmware switching scheme corresponding to different bandwidth allocations of Retimer is as follows: Retimer uses multiple EEPROMs (Electrically Erasable Programmable read only memory) to store different firmwares. Different firmwares correspond to different PCIE bandwidth allocations. After the system is powered on, the BMC (Baseboard Manager Controller) is used to access the PCEI device to obtain the bandwidth information of the PCIE device, and then the switching command is executed to switch the Retimer to access different EEPROMs by controlling the Switch (selection switch) to adapt to different bandwidths.

[0004] It can be seen that the bandwidth adaptation process is overly dependent on BMC operations. When BMC is stuck or just turned on, BMC has not yet worked properly, etc., there will be problems in bandwidth identification on all Retimer links on this machine and switching the corresponding firmware EEPROM. In addition, it also relies on PCIE devices to store relevant bandwidth information. If there is no such information in the PCIE device, BMC will not be able to complete PCIE bandwidth identification and switch the EEPROM corresponding to the Retimer.

[0005] In summary, how to effectively solve the problems such as bandwidth adaptation of the retiming card is a technical problem that those skilled in the art urgently need to solve. Summary of the invention

[0006] The purpose of the present application is to provide a firmware processing method, a retiming card, a computer system and a readable storage medium, wherein the retiming card can quickly and completely adapt the bandwidth without relying on the BMC and external devices to store bandwidth information.

[0007] In order to solve the above technical problems, this application provides the following technical solutions:

[0008] A firmware processing method is applied to a retiming card, wherein the retiming card comprises a retiming component, a selection switch, a memory and a logic device, wherein the logic device is connected to a control port of the selection switch, and the logic device is connected to a high-speed expansion slot through a wire; a single-side port of the selection switch is connected to the retiming component, and the selection ports of the selection switch are respectively connected to different memories; the method comprises:

[0009] Acquiring level information of two single-ended signals of the high-speed expansion slot by connecting the wire of the high-speed expansion slot;

[0010] According to the mapping relationship between the level and the bandwidth, the target bandwidth of the external device is determined based on the level information; wherein the external device is plugged into the high-speed expansion slot;

[0011] According to the mapping relationship between bandwidth and firmware, a target memory to be connected to the retiming component is determined based on the target bandwidth; wherein firmware of different bandwidths are stored in different memories;

[0012] A control signal is sent to the selection switch to communicate with the target memory so that the retiming component performs signal conditioning based on target firmware in the target memory.

[0013] Preferably, the logic device is connected to a baseboard management controller on the mainboard;

[0014] Accordingly, the method further includes:

[0015] After receiving the firmware upgrade request sent by the baseboard management controller, determining whether the retiming component is in a working state;

[0016] If yes, reject the firmware upgrade request;

[0017] If not, the firmware upgrade request is executed.

[0018] Preferably, the retiming card further comprises a multiplexer, the retiming component is connected to the single-side port of the selection switch by connecting to the first selection port of the multiplexer; the second selection port of the multiplexer is connected to the baseboard management controller on the mainboard; the single-side port of the multiplexer is connected to the single-side port of the selection switch, and the control port of the multiplexer is connected to the logic device;

[0019] Accordingly, executing the firmware upgrade request includes:

[0020] Sending a control command to the multiplexer to connect to the baseboard management controller, so that the baseboard management controller is connected to the single-side port of the multiplexer through the multiplexer;

[0021] According to the firmware upgrade sequence, determining the current memory from the memories to be upgraded connected to the selection switch;

[0022] Sending a control signal to the selection switch to connect to the current memory;

[0023] Sending a response message that the upgrade channel is connected to the baseboard management controller;

[0024] Receiving notification information of single firmware upgrade completion sent by the baseboard management controller;

[0025] According to the firmware upgrade sequence, determining the current memory from the memories to be upgraded connected to the selection switch;

[0026] Sending a control signal to the selection switch to connect to the current memory;

[0027] Sending a response message to the baseboard management controller indicating that the upgrade channel has been switched;

[0028] After receiving the full firmware upgrade completion information sent by the baseboard management controller, it is determined that the firmware upgrade is completed.

[0029] Preferably, after determining that the firmware upgrade is completed, the method further includes:

[0030] A control command for connecting the retiming component is sent to the multiplexer, so that the retiming component is connected to a single-side port of the multiplexer through the multiplexer.

[0031] Preferably, the logic device is connected to a baseboard management controller on a mainboard; the retiming card further comprises a multiplexer, and the retiming component is connected to a single-side port of the selection switch by connecting to a first selection port of the multiplexer; the second selection port of the multiplexer is connected to the baseboard management controller on the mainboard; the single-side port of the multiplexer is connected to a single-side port of the selection switch, and the control port of the multiplexer is connected to the logic device;

[0032] Accordingly, before obtaining level information of two single-ended signals of the high-speed expansion slot by connecting the wire of the high-speed expansion slot, the method further includes:

[0033] A control command for connecting the retiming component is sent to the multiplexer, so that the retiming component is connected to a single-side port of the multiplexer through the multiplexer.

[0034] A retiming card, comprising:

[0035] Retiming components, selector switches, memories, and logic;

[0036] The logic device is connected to the control port of the selection switch, and the logic device is connected to the high-speed expansion slot through a wire; the single-side port of the selection switch is connected to the retiming component, and the selection ports of the selection switch are respectively connected to different memories.

[0037] Preferably, it also includes:

[0038] A multiplexer, wherein the retiming component is connected to the single-sided port of the selection switch by connecting to the first selection port of the multiplexer; the second selection port of the multiplexer is connected to the baseboard management controller on the main board; the single-sided port of the multiplexer is connected to the single-sided port of the selection switch, and the control port of the multiplexer is connected to the logic device; the logic device is connected to the baseboard management controller on the main board.

[0039] A computer system comprising:

[0040] motherboards, high-speed expansion slots, external devices, and retiming cards like those mentioned above;

[0041] The mainboard includes a processor and a baseboard management controller;

[0042] The retiming card is connected to the processor and the high-speed expansion slot respectively through a high-speed serial computer expansion bus, and the external device is plugged into the high-speed expansion slot;

[0043] The logic of the retiming card is connected to the high-speed expansion slot through a wire.

[0044] Preferably, the baseboard management controller is connected to the connector via a two-wire serial communication bus.

[0045] A readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the above-mentioned firmware processing method are implemented.

[0046] A computer program product includes a computer program / instruction, which, when executed by a processor, implements the steps of the above firmware processing method.

[0047] The method provided in the embodiment of the present application is applied to a retiming card, which includes a retiming component, a selection switch, a memory and a logic device, wherein the logic device is connected to the control port of the selection switch, and the logic device is connected to the high-speed expansion slot through a wire; the single-side port of the selection switch is connected to the retiming component, and the selection ports of the selection switch are respectively connected to different memories; the method includes: obtaining level information of two single-ended signals of the high-speed expansion slot by connecting the wire of the high-speed expansion slot; determining the target bandwidth of the external device based on the level information according to the mapping relationship between the level and the bandwidth; wherein the external device is plugged into the high-speed expansion slot; determining the target memory to be connected to the retiming component based on the target bandwidth according to the mapping relationship between the bandwidth and the firmware; wherein firmware of different bandwidths are stored in different memories; sending a control signal to connect the target memory to the selection switch so that the retiming component performs signal adjustment based on the target firmware in the target memory.

[0048] External devices are generally plugged into high-speed expansion slots. Different high-speed expansion slots correspond to different bandwidths. External devices with different bandwidths are plugged into slots with corresponding bandwidths, and the high and low levels of two single-ended signals are used to present a fixed level. In the present application, with the help of this feature, the bandwidth identification of the plugged-in external device is achieved by obtaining the level information of the two single-ended signals on the high-speed expansion slot. Then, the selection switch is controlled by the logic in the retiming card, so that the retiming component establishes a connection path with the target memory of the bandwidth corresponding to the currently plugged-in external device, so that the retiming component performs signal adjustment based on the target firmware in the target memory. From identifying the bandwidth of the external device to firmware adaptation, there is no need for the baseboard management controller to participate.

[0049] The technical effects of the present application are as follows: it is no longer dependent on a baseboard management controller, does not occupy the bus resources of the baseboard management controller, has a higher speed and a faster response time; it is also not dependent on whether other devices other than the retiming card store bandwidth information, and the switching of the memory of the retiming card can be completed without turning on the computer, that is, seamless operation can be achieved during the bandwidth adaptation process.

[0050] Correspondingly, the embodiments of the present application also provide a firmware processing device, equipment, readable storage medium and computer program product corresponding to the above-mentioned firmware processing method, which have the above-mentioned technical effects and are not repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0052] Figure 1 This is a schematic diagram of a retiming card in an embodiment of the present application;

[0053] Figure 2 A schematic diagram of another retiming card in an embodiment of the present application;

[0054] Figure 3 This is a flowchart of an implementation method of a firmware processing method in an embodiment of the present application;

[0055] Figure 4 This is a flowchart of another firmware processing method in an embodiment of the present application;

[0056] Figure 5 A schematic diagram of a computer system in an embodiment of the present application;

[0057] Figure 6 A specific schematic diagram of a computer system in an embodiment of the present application;

[0058] Figure 7 A specific schematic diagram of another computer system in an embodiment of the present application;

[0059] Figure 8 is a schematic diagram of a computer system;

[0060] Fig. 9 It is a schematic diagram of a specific implementation of a firmware processing method in an embodiment of the present application. DETAILED DESCRIPTION

[0061] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0062] Please refer to Figure 1 In an embodiment of the present application, a retiming card is proposed, which can adjust the PCIE signal between the server and the external PCIE device. The retiming card 100 specifically includes:

[0063] Retiming component 10, selection switch 11, memory 12 and logic 13;

[0064] The logic device is connected to the control port of the selection switch, and the logic device is connected to the high-speed expansion slot through a wire; the single-side port of the selection switch is connected to the retiming component, and the selection ports of the selection switch are respectively connected to different memories.

[0065] The selection switch may be specifically a switch, the memory may be specifically an EEPROM, and the logic device may be specifically a CPLD (Complex Programmable Logic Device). The number of EEPROMs in the retiming card may be set according to actual needs. Different firmwares for bandwidth adaptation are burned into different EEPROMs.

[0066] In addition, the high-speed expansion slot may be specifically a PCIE Slot on a Riser (high-speed expansion card). The external device may be specifically a PCIE device.

[0067] The PCIE devices of the server are generally inserted into the Riser card. Different PCIE Slots of the Riser card correspond to different PCIE bandwidths: X16 / X8 / X4. PCIE cards of different bandwidths are inserted into slots of corresponding bandwidths. The high and low levels of two single-ended signals are used to express the different bandwidths of the PCEI Slot. The two signals of the Riser card are designed to be pulled up and down according to the bandwidth of the slot to represent different bandwidth allocations.

[0068] For example, the detailed truth table of the downstream bandwidth allocation for the upstream bandwidth of x16*1 is shown in Table 1:

[0069] Table 1, Level-Bandwidth Truth Table

[0070]

[0071] Among them, ID1 and ID1 are two single-ended signals of the high-speed expansion slot. These two single-ended signals transmit the level signal to the logic device through the wire between the high-speed expansion slot and the logic device. The logic device can analyze and determine the bandwidth of the currently inserted external device based on the level signal. Then, the logic device controls the selection switch to enable the retiming component to connect with different EEPROMs, so that the retiming component can perform signal processing based on different firmware.

[0072] Please refer to Figure 2 In a specific implementation of the present application, the retiming card further includes: a multiplexer 14, wherein the retiming component is connected to a single-sided port of a selection switch by connecting to a first selection port of the multiplexer; the second selection port of the multiplexer is connected to a baseboard management controller on a mainboard (MB); the single-sided port of the multiplexer is connected to a single-sided port of the selection switch, and the control port of the multiplexer is connected to a logic device; and the logic device is connected to the baseboard management controller on the mainboard.

[0073] That is, by setting a multiplexer in the retiming card, the device accessing the EEPROM can switch back and forth between the retiming component and the baseboard management controller on the motherboard. In order to facilitate the control switching, the baseboard manager is connected to the logic device, and the connector is also connected to the control port of the multiplexer. In this way, when the multiplexer chooses to connect to the baseboard management controller, the firmware upgrade of the EEPROM can be realized based on the baseboard management controller; when the multiplexer chooses to connect to the retiming component, the signal adjustment of the PCIE bus can be realized based on the retiming component.

[0074] Please refer to Figure 3 , Figure 3 Flow chart of a firmware processing method in an embodiment of the present application, the method is applied to a retiming card, when the structure of the retiming card is as follows Figure 1 As shown, the retiming card includes a retiming component, a selection switch, a memory and a logic device, wherein the logic device is connected to the control port of the selection switch, and the logic device is connected to the high-speed expansion slot through a wire; the single-side port of the selection switch is connected to the retiming component, and the selection ports of the selection switch are respectively connected to different memories;

[0075] The method includes:

[0076] S101. Acquire level information of two single-ended signals of the high-speed expansion slot by connecting a wire of the high-speed expansion slot.

[0077] In practical applications, the level signals of the two ports of the high-speed expansion slot can be transmitted to the ID[0:1] port of the logic device through two wires. In other words, the logic device can obtain the level information of the two single-ended signals of the high-speed expansion slot by identifying its ID[0:1] port.

[0078] S102 : According to the mapping relationship between the level and the bandwidth, determine the target bandwidth of the external device based on the level information.

[0079] Wherein, the external device is plugged into the high-speed expansion slot.

[0080] In practical applications, a level-bandwidth truth table similar to that shown in Table 1 above can be used to record the mapping relationship between the level and the bandwidth. Referring to the mapping relationship, the target bandwidth of the external device can be determined based on the level information. The external device can be specifically a PCIE device.

[0081] S103 . According to the mapping relationship between bandwidth and firmware, determine the target memory to be connected to the retiming component based on the target bandwidth.

[0082] Wherein, firmware with different bandwidths are stored in different memories.

[0083] In this embodiment, firmware corresponding to different bandwidths can be pre-burned in different EEPROMs according to requirements.

[0084] There is a mapping relationship between bandwidth and firmware, and there is also a mapping relationship between firmware and EEPROM. Therefore, according to these mapping relationships, the target EEPROM (target memory) that currently needs to be connected to the retiming component can be determined based on the target bandwidth.

[0085] S104: Send a control signal to the selection switch to connect to the target memory so that the retiming component performs signal conditioning based on the target firmware in the target memory.

[0086] After determining the target EEPROM that needs to be connected to the retiming component, a control signal for connecting to the target memory is sent to the selection switch through the logic.

[0087] Under the control signal, the selection switch can connect the retiming component with the target EEPROM, so that the retiming component performs signal conditioning based on the target firmware of the target EEPROM.

[0088] The method provided in the embodiment of the present application is applied to a retiming card, which includes a retiming component, a selection switch, a memory and a logic device, wherein the logic device is connected to the control port of the selection switch, and the logic device is connected to the high-speed expansion slot through a wire; the single-side port of the selection switch is connected to the retiming component, and the selection ports of the selection switch are respectively connected to different memories; the method includes: obtaining level information of two single-ended signals of the high-speed expansion slot by connecting the wire of the high-speed expansion slot; determining the target bandwidth of the external device based on the level information according to the mapping relationship between the level and the bandwidth; wherein the external device is plugged into the high-speed expansion slot; determining the target memory to be connected to the retiming component based on the target bandwidth according to the mapping relationship between the bandwidth and the firmware; wherein firmware of different bandwidths are stored in different memories; sending a control signal to connect the target memory to the selection switch so that the retiming component performs signal adjustment based on the target firmware in the target memory.

[0089] External devices are generally plugged into high-speed expansion slots. Different high-speed expansion slots correspond to different bandwidths. External devices with different bandwidths are plugged into slots with corresponding bandwidths, and the high and low levels of two single-ended signals are used to present a fixed level. In the present application, with the help of this feature, the bandwidth identification of the plugged-in external device is achieved by obtaining the level information of the two single-ended signals on the high-speed expansion slot. Then, the selection switch is controlled by the logic in the retiming card, so that the retiming component establishes a connection path with the target memory of the bandwidth corresponding to the currently plugged-in external device, so that the retiming component performs signal adjustment based on the target firmware in the target memory. From identifying the bandwidth of the external device to firmware adaptation, there is no need for the baseboard management controller to participate.

[0090] The technical effects of the present application are as follows: it is no longer dependent on a baseboard management controller, does not occupy the bus resources of the baseboard management controller, has a higher speed and a faster response time; it is also not dependent on whether other devices other than the retiming card store bandwidth information, and the switching of the memory of the retiming card can be completed without turning on the computer, that is, seamless operation can be achieved during the bandwidth adaptation process.

[0091] It should be noted that, based on the above embodiments, the embodiments of the present application also provide corresponding improved solutions. In the preferred / improved embodiments, the same steps or corresponding steps as those in the above embodiments can be referenced to each other, and the corresponding beneficial effects can also be referenced to each other, which will not be described one by one in the preferred / improved embodiments of this article.

[0092] In a specific implementation of the present application, the logic device is connected to a baseboard management controller on the mainboard;

[0093] Accordingly, the method further comprises:

[0094] After receiving the firmware upgrade request sent by the baseboard management controller, determining whether the retiming component is in a working state;

[0095] If yes, the firmware upgrade request is rejected;

[0096] If not, a firmware upgrade request is performed.

[0097] That is, in this embodiment, the BMC may be connected to the CPLD on the retiming card, and when the firmware on the retiming card needs to be upgraded, the BMC may send a firmware upgrade request to the CPLD.

[0098] After receiving the firmware upgrade request, the CPLD first determines whether the retiming component is in a working state. If so, the firmware upgrade operation cannot be performed and the firmware upgrade request of the BMC can be directly rejected; if not, the firmware upgrade request can be executed.

[0099] In a specific embodiment of the present application, Figure 2 As shown, the retiming card also includes a multiplexer, and the retiming component is connected to the single-side port of the selection switch by connecting to the first selection port of the multiplexer; the second selection port of the multiplexer is connected to the baseboard management controller on the mainboard; the single-side port of the multiplexer is connected to the single-side port of the selection switch, and the control port of the multiplexer is connected to the logic device;

[0100] Please refer to Figure 4 , execute the firmware upgrade request, including:

[0101] S201 . Send a control command for connecting to a baseboard management controller to a multiplexer, so that the baseboard management controller is connected to a single-side port of the multiplexer through the multiplexer.

[0102] After the CPLD receives the firmware upgrade request and determines that the upgrade can be performed currently, it first sends a control command for connecting to the BMC to the multiplexer controller.

[0103] Under the control command, the multiplexer will disconnect from the retiming component and connect to the BMC, so that the BMC can be connected to the single test port of the selection switch through the multiplexer.

[0104] S202: According to the firmware upgrade sequence, determine the current memory from the memories to be upgraded connected to the selection switch.

[0105] In this embodiment, the EEPROMs may be numbered, and when an upgrade is required, the firmware sequence may be determined according to the sequence of the numbers.

[0106] For example, when all firmwares need to be upgraded, if there are 4 EEPROMs in total, when the upgrade channel is connected for the first time, it can be determined that EEPROM0 connected to the enable port 1 of the selection switch is the current memory.

[0107] S203: Send a control signal for connecting to the current memory to the selection switch.

[0108] After the current EEPROM is determined, a control signal for connecting the current EEPROM may be sent to the selection switch.

[0109] After receiving the control signal, the selection switch can connect the enable port corresponding to the current EEPROM.

[0110] S204: Send a response message to the baseboard management controller indicating that the upgrade channel is connected.

[0111] The upgrade channel refers to BMC - multiplexer - selection switch - current EEPROM.

[0112] After the CPLD completes the connection of the upgrade channel, it can send a response message to the BMC indicating that the upgrade channel is connected.

[0113] After receiving this response information, BMC can update the firmware in the current EEPROM based on the upgrade channel. When the firmware update in a single EEPROM is completed, but other EEPROMs need to be updated, BMC can send a notification message of single firmware upgrade completion to CPLD. When the firmware update in a single EEPROM is completed and there is no need to continue to update other EEPROMs, BMC can send full firmware upgrade completion information to CPLD.

[0114] S205, receiving the notification information of the completion of the single firmware upgrade sent by the baseboard management controller. After receiving the notification information of the completion of the single firmware upgrade sent by the matching BMC, the current EEPROM can be reselected, that is, returning to step S202 and step S203. Then, a response information that the upgrade channel has been switched is sent to the baseboard management controller.

[0115] After the CPLD executes steps S206 and S207, the upgrade channel is switched, and at this time, a response message indicating that the upgrade channel has been switched can be sent to the BMC.

[0116] The BMC continues to update the firmware of the current EEPROM based on the switched upgrade channel.

[0117] S206: After receiving the full firmware upgrade completion information sent by the baseboard management controller, determine that the firmware upgrade is completed.

[0118] After receiving the full firmware upgrade completion information sent by the BMC, it can be determined that the firmware upgrade is completed.

[0119] In a specific implementation of the present application, after determining that the firmware upgrade is completed, the method further includes:

[0120] A control command for connecting the retiming component is sent to the multiplexer, so that the retiming component is connected to a single-side port of the multiplexer through the multiplexer.

[0121] That is, in order to facilitate identification of the device bandwidth and adjust the signal, the multiplexer needs to be connected to the retiming component.

[0122] In a specific implementation of the present application, after the BMC completes the update of the current EEPROM, it can also send an upgrade channel switching request to the CPLD. After receiving the upgrade channel switching request, the specific content of the request can be parsed to determine the current erasable programmable read-only memory to be connected. In this way, the CPLD does not need to save the firmware upgrade order in advance, and the BMC specifies the current EEPROM to be connected each time.

[0123] In a specific implementation of the present application, the logic device is connected to the baseboard management controller on the mainboard; the retiming card further includes a multiplexer, and the retiming component is connected to the single-side port of the selection switch by connecting to the first selection port of the multiplexer; the second selection port of the multiplexer is connected to the baseboard management controller on the mainboard; the single-side port of the multiplexer is connected to the single-side port of the selection switch, and the control port of the multiplexer is connected to the logic device;

[0124] That is, in Figure 2 The above is implemented in the retiming card shown Figure 3 The firmware processing method shown, before obtaining level information of two single-ended signals of the high-speed expansion slot through the wire connected to the high-speed expansion slot, further includes:

[0125] A control command for connecting the retiming component is sent to the multiplexer, so that the retiming component is connected to a single-side port of the multiplexer through the multiplexer.

[0126] That is, when the retiming card has a multiplexer, the connectivity of the multiplexer needs to be set by default to the retiming component so that the PCIE signal can be adjusted.

[0127] Corresponding to the above method embodiment, the embodiment of the present application further provides a computer system. The computer system described below and the firmware processing method and retiming card described above can refer to each other.

[0128] Please refer to Figure 5 , the computer system comprising:

[0129] Mainboard 400, high-speed expansion slot 201, external device 300 and retiming card 100 as described above;

[0130] The mainboard includes a processor 401 and a baseboard management controller 402;

[0131] The retiming card is connected to the processor and the high-speed expansion slot 200 respectively through a high-speed serial computer expansion bus, and the external device 500 is plugged into the high-speed expansion slot;

[0132] The logic of the retiming card is connected to the high-speed expansion slot through wires.

[0133] The high-speed expansion slot is located in the high-speed expansion card 200 .

[0134] The baseboard management controller is connected to the connector via a two-wire serial communication bus.

[0135] Please refer to Figure 6 , when the retiming card includes a multiplexer, the expansion device is plugged into a high-speed expansion slot;

[0136] The mainboard and the high-speed expansion slot are respectively connected to the retiming component via a high-speed serial computer expansion bus;

[0137] The high-speed expansion slot is connected to the logic device through wires;

[0138] The control port of the selection switch is connected to the logic device;

[0139] A single-side port of the selection switch is connected to the retiming component;

[0140] The select ports of the selection switch are connected to different memories respectively.

[0141] Please refer to Figure 7 , when the retiming card includes a multiplexer, the expansion device is plugged into a high-speed expansion slot;

[0142] The mainboard and the high-speed expansion slot are respectively connected to the retiming component via a high-speed serial computer expansion bus;

[0143] The high-speed expansion slot is connected to the logic device through wires;

[0144] The first input end of the multiplexer is connected to the retiming component; the second input end of the multiplexer is connected to the baseboard management controller on the mainboard, and the output end of the multiplexer is connected to the first input end of the selection switch.

[0145] The control port of the selection switch and the control port of the multiplexer are respectively connected to the logic device;

[0146] The select ports of the selection switch are connected to different memories respectively.

[0147] Corresponding to the above method embodiment, the embodiment of the present application further provides a readable storage medium. The readable storage medium described below and the firmware processing method described above can refer to each other.

[0148] A readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the firmware processing method of the above method embodiment are implemented.

[0149] The readable storage medium may specifically be a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, or other readable storage medium that can store program codes.

[0150] Corresponding to the above method embodiment, the embodiment of the present application further provides a computer program product. The computer program product described below and the firmware processing method described above can refer to each other.

[0151] A computer program product includes a computer program / instruction. When the computer program / instruction is executed by a processor, the steps of the above firmware processing method are implemented.

[0152] To facilitate those skilled in the art to better understand the technical solutions provided in the embodiments of the present application, the technical solutions provided in the embodiments of the present application are explained below by taking a specific application scenario as an example and combining it with relevant processing solutions.

[0153] Please refer to Figure 8 The corresponding technology for switching Retimer firmware EEPROMs is to store firmware with different bandwidths in different EEPROMs, rely on BMC to access the PCIE card through the I2C bus, obtain the bandwidth status of the downstream PCIE device, and then BMC switches Retimer to connect to different EEPROMs through GPIO signals, such as Figure 8 As shown, the BMC switches the selection switch A port connected to the Retimer through the SEL signal to link another port A0, A1 or A2 of the MUX (multiplexer, data selector is also called multiplexer or multiplexer), so that the Retimer loads the firmware corresponding to the PCIE bandwidth allocation and completes the operation of adapting the bandwidth allocation of the downstream PCEI device.

[0154] This technical solution has the following problems:

[0155] ① Over-reliance on BMC for operation. When BMC is stuck, there will be problems with bandwidth identification and switching of corresponding firmware EEPROM on all Retimer links on this machine.

[0156] ② There will be many I2C devices hanging under the BMC. After the BMC is powered on and starts working, the BMC will perform a large amount of data interaction through I2C. Therefore, it will take more BMC resources to poll the bandwidth information of PCEI devices on all links through I2C signals of different links, which will take a long time and the speed will be very slow.

[0157] ③. In some servers that implement the power-on direct boot strategy, the CPU has already started the PCIE link connection before the BMC is working properly. At this time, the Retimer cannot load the correct firmware normally, resulting in untimely bandwidth allocation and the inability to identify the device;

[0158] ④. Relying on PCIE devices to store relevant bandwidth information, if a certain PCIE card does not have this information, BMC will not be able to complete PCIE bandwidth identification and switch the EEPROM corresponding to the Retimer.

[0159] It can be seen that using BMC to identify the bandwidth of downstream PCIE devices and switch the firmware EEPROM corresponding to the Retimer is slow, overly dependent on BMC, and occupies a large amount of BMC resources. After the BMC hangs, all Retimer links of the entire machine will have device identification abnormalities.

[0160] In response to the above problems, the technical solution provided in the embodiment of the present application does not rely on BMC, does not occupy BMC bus resources, has a higher speed and a faster response time; it does not rely on whether the PCIE device stores bandwidth information, and can complete the switching of the Retimer's EEPROM without turning on the computer, thereby achieving seamless operation.

[0161] The specific implementation of the above technical solution is as follows:

[0162] At the software level, a CPLD based on VHDL or other programming languages ​​is developed. The CPLD can analyze bandwidth identification, switch MUX\Switch, and interact with BMC.

[0163] At the hardware level, the entire system includes a sideband signal module and an I2C signal module.

[0164] Among them, the sideband signal module: transmits the two signals on the slot of the riser card to the CPLD on the retimer card through wires. The CPLD parses the information, knows the PCIE bandwidth allocation information on the downstream PCIE slot, and switches the channel of the switch through the SEL[0:2] signal.

[0165] I2C signal module: If there is no BMC to refresh the Retimer firmware, the default channel connection inside the MUX is B to B0. At this time, the Retimer can access the corresponding EEPROM through the MUX connected to the SWITCH to load the firmware information, so that the server can be plugged in but not turned on or disassembled, and the Retimer can switch the EEPROM operation with different bandwidth allocations. If the BMC refreshes the Retimer firmware, the BMC will first notify the CPLD on the Retimer card. After the CPLD parses that the BMC needs to control the I2C line to refresh the Retimer firmware, it switches the MUX channel to B-B1 through the SEL signal. At this time, the BMC will be linked to the A channel of the SWITCH. The BMC will refresh the EEPROMs one by one. After refreshing the EEPROM corresponding to the A0 channel, it will notify the CPLD to switch the SWITCH channel and connect A to A1. Repeat the above burning action, and so on. After the BMC refreshes all EEPROMs, it will notify the CPLD through I2C. After the CPLD parses the instruction, it switches the I2C line of the MUX to the Retimer control, so that the server can complete the upgrade of the Retimer firmware without being powered on or disassembled.

[0166] Please refer to Figure 7 If the CPLD does not receive the I2C online upgrade EEPROM command sent by the BMC, it will default to connecting the B end of the MUX to B0. At the same time, the CPLD identifies the PCIE bandwidth allocation signal ID[0:1] transmitted by the downstream Riser card to the Retimer card, performs bandwidth identification and analysis, and controls the corresponding EEPROMI2C channel A0\A1\A2 of the Switch to connect to the A end by controlling SEL[0:2] according to different bandwidth allocations. At this time, the Retimer can pass through the MUX and Switch to connect to the correct EEPROM, load the corresponding firmware, and allocate the correct PCIE bandwidth.

[0167] If CPLD receives the remote EEPROM upgrade command from BMC, it will first analyze the server status at that time. If it is in the power-on state, because the Retimer is working normally, the firmware cannot be upgraded at this time, and the upgrade request of BMC will be rejected; if the server is not powered on, CPLD will switch the MUX channel to B1 connecting B, and switch different EEPROMs through Switch for upgrade.

[0168] I2C signal module, the channel for CPLD to interact with BMC. BMC transmits the EEPROM upgrade request to CPLD through the I2C channel. CPLD parses the I2C signal to determine whether it can be upgraded at this time. When it is in the upgradeable state, CPLD switches MUX and Switch channels. BMC upgrades the EEPROM through I2C. After upgrading one EEPROM, BMC will inform CPLD through I2C again, and CPLD will switch the I2C channel of the next EEPROM, and so on, until all EEPROMs are upgraded. At this time, BMC sends the upgrade completion instruction to CPLD, and CPLD switches EEPROM to Retimer control according to the parsed ID[0:1] information.

[0169] Data analysis part:

[0170] 1) The CPLD of the Retimer card identifies the ID[0:1] information and analyzes the downstream PCIE bandwidth;

[0171] 2) CPLD switches the corresponding switch channel according to the parsed bandwidth information when there is no EEPROM upgrade requirement;

[0172] 3) After receiving the EEPROM upgrade request from BMC, CPLD switches the I2C channel of EEPROM to BMC control, and upgrades the corresponding EEPROM or all EEPROMs as required;

[0173] 4) After BMC upgrades all EEPROMs, CPLD will switch the I2C channel of EEPROM to Retimer access

[0174] Please refer to Fig. 9 In actual implementation, the steps of firmware switching and firmware upgrading include:

[0175] Step 1: First, write the CPLD script as above and set the meaning of the required pins: I2C signal for interacting with BMC, SEL signal for controlling MUX and Switch, and bandwidth allocation signal ID[0:1] transmitted by the downstream riser card;

[0176] Step 2: As soon as the server is powered on, the CPLD first parses the information of ID[0:1], corresponds to the preset truth table, switches the different channels of the Switch through the SEL[0:2] signal, and connects the A end to the correct EEPROM, so that the Retimer can read the correct PCIE bandwidth allocation firmware information and load it normally;

[0177] Step 3: CPLD sets the MUX channel to connect B to B0 by default; Steps 2 and 3 can be completed in ms.

[0178] Step 4: After receiving the EEPROM upgrade command from BMC, CPLD will switch the MUX channel to B1 so that BMC can perform EEPROM upgrade operation; CPLD will switch different Switch channels according to the I2C command issued by BMC to implement the firmware upgrade operation of all or part of the specific EEPROM; after the upgrade is completed, CPLD will switch the MUX channel to B0;

[0179] In summary, the technical solution provided by the embodiment of the present application, the downstream PCIE bandwidth identification and the firmware EEPROM switching corresponding to the Retimer, does not rely on the BMC, does not occupy the BMC bus resources, is faster, has a faster response time, solves the slow action completion speed, is overly dependent on the BMC, occupies a large amount of BMC resources, and after the BMC hangs, all Retimer links of the entire machine will have device identification abnormalities, and realizes the following functions:

[0180] 1. Do not rely on BMC to implement bandwidth identification of downstream PCIE devices and firmware EEPROM switching corresponding to Retimer, so as to avoid the situation where all Retimer links fail when BMC fails.

[0181] 2. The bandwidth identification of the downstream PCIE device and the switching of the firmware EEPROM corresponding to the Retimer are completed quickly without occupying the BMC resources at startup;

[0182] 3. Each link is identified and switched separately, which improves accuracy;

[0183] 4. It does not depend on whether the PCIE device stores bandwidth information, and bandwidth identification can be completed without accessing the PCIE card.

[0184] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0185] Those skilled in the art may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented with electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0186] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0187] Finally, it should be noted that, in this article, relationships such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms include, include or any other variations are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0188] Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for those skilled in the art, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A firmware processing method, characterized in that: The invention is applied to a retiming card, the retiming card comprises a retiming component, a selection switch, a memory and a logic device, wherein the logic device is connected to a control port of the selection switch, and the logic device is connected to a high-speed expansion slot through a wire; a single-side port of the selection switch is connected to the retiming component, and the selection ports of the selection switch are respectively connected to different memories; the method comprises: Acquiring level information of two single-ended signals of the high-speed expansion slot by connecting the wire of the high-speed expansion slot; According to the mapping relationship between the level and the bandwidth, the target bandwidth of the external device is determined based on the level information; wherein the external device is plugged into the high-speed expansion slot; According to the mapping relationship between bandwidth and firmware, a target memory to be connected to the retiming component is determined based on the target bandwidth; wherein firmware of different bandwidths are stored in different memories; A control signal is sent to the selection switch to communicate with the target memory so that the retiming component performs signal conditioning based on target firmware in the target memory.

2. The method according to claim 1, characterized in that The logic device is connected to a baseboard management controller on the mainboard; Accordingly, the method further includes: After receiving the firmware upgrade request sent by the baseboard management controller, determining whether the retiming component is in a working state; If yes, reject the firmware upgrade request; If not, the firmware upgrade request is executed.

3. The method according to claim 2, characterized in that The retiming card further comprises a multiplexer, wherein the retiming component is connected to the single-side port of the selection switch by connecting to the first selection port of the multiplexer; the second selection port of the multiplexer is connected to the baseboard management controller on the mainboard; the single-side port of the multiplexer is connected to the single-side port of the selection switch, and the control port of the multiplexer is connected to the logic device; Accordingly, executing the firmware upgrade request includes: Sending a control command to the multiplexer to connect to the baseboard management controller, so that the baseboard management controller is connected to the single-side port of the multiplexer through the multiplexer; According to the firmware upgrade sequence, determining the current memory from the memories to be upgraded connected to the selection switch; Sending a control signal to the selection switch to connect to the current memory; Sending a response message that the upgrade channel is connected to the baseboard management controller; Receiving notification information of single firmware upgrade completion sent by the baseboard management controller; According to the firmware upgrade sequence, determining the current memory from the memories to be upgraded connected to the selection switch; Sending a control signal to the selection switch to connect to the current memory; Sending a response message to the baseboard management controller indicating that the upgrade channel has been switched; After receiving the full firmware upgrade completion information sent by the baseboard management controller, it is determined that the firmware upgrade is completed.

4. The method according to claim 3, characterized in that After confirming that this firmware upgrade is completed, it also includes: A control command for connecting the retiming component is sent to the multiplexer, so that the retiming component is connected to a single-side port of the multiplexer through the multiplexer.

5. The method according to claim 1, characterized in that The logic device is connected to the baseboard management controller on the mainboard; the retiming card further comprises a multiplexer, and the retiming component is connected to the single-side port of the selection switch by connecting to the first selection port of the multiplexer; the second selection port of the multiplexer is connected to the baseboard management controller on the mainboard; the single-side port of the multiplexer is connected to the single-side port of the selection switch, and the control port of the multiplexer is connected to the logic device; Accordingly, before obtaining level information of two single-ended signals of the high-speed expansion slot by connecting the wire of the high-speed expansion slot, the method further includes: A control command for connecting the retiming component is sent to the multiplexer, so that the retiming component is connected to a single-side port of the multiplexer through the multiplexer.

6. A retiming card, characterized in that: include: Retiming components, selector switches, memories, and logic; The logic device is connected to the control port of the selection switch, and the logic device is connected to the high-speed expansion slot through a wire; the single-side port of the selection switch is connected to the retiming component, and the selection ports of the selection switch are respectively connected to different memories.

7. The retiming card according to claim 6, characterized in that: Also includes: A multiplexer, wherein the retiming component is connected to the single-sided port of the selection switch by connecting to the first selection port of the multiplexer; the second selection port of the multiplexer is connected to the baseboard management controller on the main board; the single-sided port of the multiplexer is connected to the single-sided port of the selection switch, and the control port of the multiplexer is connected to the logic device; the logic device is connected to the baseboard management controller on the main board.

8. A computer system, characterized in that: include: A motherboard, a high-speed expansion slot, an external device and a retiming card as claimed in any one of claims 6 or 7; The mainboard includes a processor and a baseboard management controller; The retiming card is connected to the processor and the high-speed expansion slot respectively through a high-speed serial computer expansion bus, and the external device is plugged into the high-speed expansion slot; The logic of the retiming card is connected to the high-speed expansion slot through a wire.

9. The computer system according to claim 8, characterized in that: The baseboard management controller is connected to the connector via a two-wire serial communication bus.

10. A readable storage medium, characterized in that: The readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the firmware processing method according to any one of claims 1 to 5 are implemented.

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