Packaging method for improving product reliability by vertical routing

Abstract

The invention discloses a packaging method for improving the reliability of a product by using vertical routing, which reduces the length of a bonding wire and reduces the punching bending rate of the bonding wire by using a vertical routing technology, thereby improving the reliability of the product. The method comprises the following steps of: stacking a plurality of stacked chips on a carrier, directly connecting the upper surfaces of the other chips except the chips at the high-layer position to the corresponding welding spot positions of the carrier at the bottom layer through welding wires, covering the top-layer chip with an adapter plate, connecting the chips at the high layer to the lower-layer carrier bonding pads of the adapter plate respectively through upward-leading vertical routing, and connecting the upper-layer chip and the lower-layer carrier bonding pads of the adapter plate to the lower-layer carrier bonding pads of the adapter plate; and then a corresponding lower layer carrier bonding pad on the adapter plate is connected to a corresponding welding spot of a chip which is connected with the bottom layer carrier through a bonding wire on the lower layer through a down-leading vertical bonding wire.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a packaging method for increasing product reliability by utilizing vertical bonding. Background Art

[0002] Wire Bond products require interconnection between the chip and the carrier through wire bonding. As the requirements for product performance become higher and higher, the number of chips is increasing, and the number of chip layers is also increasing. However, traditional WB products are connected from the chip to the carrier. As the number of chip layers increases, the length of the wire bonding will also become longer and longer (see Figure 1 ), the bending rate of the welding wire in the process of plastic sealing is also greatly increased, and the wires may be crossed or the wire spacing may be too small, resulting in product failure. Therefore, it is urgent to develop a packaging method that increases product reliability. Summary of the invention

[0003] In view of the above problems, the present invention provides a packaging method for increasing product reliability by using vertical bonding technology, which reduces the length of the bonding wire and reduces the bending rate of the bonding wire, thereby enhancing product reliability.

[0004] A packaging method that uses vertical bonding to increase product reliability, characterized in that: multiple layers of stacked chips are stacked on a carrier, and the upper surfaces of the remaining chips except the chips in the upper layer are directly connected to the corresponding solder joint positions of the bottom carrier through welding wires, and then an adapter board is covered on the top layer chip, and the chips located in the upper layer are connected to the lower carrier pads of the adapter board through upper vertical bonding wires, and then the corresponding lower carrier pads on the adapter board are connected to the corresponding solder joints of the lower layer chips that have been connected to the bottom carrier through welding wires through lower vertical bonding wires.

[0005] It is further characterized by:

[0006] Each group of chips at the upper layer is connected to a chip at the lower layer through an adapter board and a group of vertical bonding wires, and is connected to a chip at the bottom layer through arc bonding wires;

[0007] The high-level chips are offset to reserve horizontal space for vertical wire bonding connections;

[0008] The upper surface of the adapter board is provided with solder balls for connecting with the upper device;

[0009] The height of the plastic package body is not higher than the height of the solder balls on the upper surface of the adapter board, but not lower than the height of the upper surface of the adapter board body, ensuring that the plastic package is stable and reliable.

[0010] After adopting the method of the present invention, the length of the bonding wire of the high-layer chip is reduced, the impact and bending resistance of the bonding wire is increased, and the reduction of the bonding wire length also reduces the product cost. The adapter board used finally can increase the interface of the product and match it with other products to form a higher performance product. At the same time, the copper layer inside the adapter board can reduce the interference of the product received by the electrical signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 A packaging molding structure according to a specific embodiment of the method of the present invention;

[0012] The names corresponding to the serial numbers in the figure are as follows:

[0013] Plastic package body 1, stacked chip 2, chip adhesive film 3, welding wire 4, upper vertical bonding wire 5, first upper vertical bonding wire 51, second upper vertical bonding wire 52, bottom carrier 6, first solder ball 7, adapter board 8, lower vertical bonding wire 9, first lower vertical bonding wire 91, second lower vertical bonding wire 92. DETAILED DESCRIPTION

[0014] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0015] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0016] In the description of the invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the invention can be understood according to specific circumstances.

[0017] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments.

[0018] A packaging method that uses vertical bonding to increase product reliability, see Figure 1: Multiple stacked chips 2 are stacked on the bottom carrier 6, and the remaining chips except the chips in the upper position are directly connected to the corresponding solder joints of the bottom carrier 6 through the welding wires 4, and then the adapter board 8 is covered on the top chip, and the chips at the upper layer are connected to the lower carrier pads of the adapter board 8 through the upper vertical bonding wires 5, and then the corresponding lower carrier pads on the adapter board 8 are connected to the corresponding solder joints of the chips in the lower layer that have been connected to the bottom carrier 6 through the welding wires 4 through the lower vertical bonding wires 9, and a first solder ball 7 is set at the bottom of the bottom carrier 6.

[0019] In a specific embodiment, the number of stacked chips 2 is 8, and a chip adhesive film 3 is disposed on the bottom surface of each group of stacked chips 2. The 8 stacked chips are DIE1, DIE2, DIE3, DIE4, DIE5, DIE6, DIE7, and DIE8 from bottom to top;

[0020] DIE1, DIE2, DIE3, DIE4, DIE5, and DIE6 are middle and lower layer chips, and DIE7 and DIE8 are high layer chips;

[0021] DIE1, DIE2, DIE3, DIE4, DIE5, and DIE6 are stacked on the upper surface of the bottom carrier 6 in a staggered manner from bottom to top, and each exposed upper surface of DIE1, DIE2, DIE3, DIE4, DIE5, and DIE6 is directly connected to the corresponding solder joint position of the bottom carrier 6 through a soldering wire 4. DIE7 and DIE8 are stacked on the upper surface of DIE6 through an offset setting, and an adapter plate 8 is covered on the upper surface of DIE8. The right upper surface of DIE8 is connected to the corresponding right pad of the lower carrier of the adapter plate 8 through a first upper vertical bonding wire 51, and the right area of ​​the corresponding right pad The offset space of DIE7 is connected to the corresponding solder joint on the upper surface of DIE6 through the first downward vertical bonding wire 91. Since DIE6 is directly connected to the corresponding solder joint position of the bottom carrier 6 through the bonding wire 4, DIE8 and the bottom carrier 6 are connected. The left upper surface of DIE7 is connected to the corresponding left solder pad of the lower carrier of the adapter board 8 through the second upward vertical bonding wire 52. The offset space of the corresponding left solder pad is connected to the corresponding solder joint on the upper surface of DIE5 through the second downward vertical bonding wire 92. Since DIE5 is directly connected to the corresponding solder joint position of the bottom carrier 6 through the bonding wire 4, DIE7 and the bottom carrier are connected.

[0022] The surface area of ​​the adapter plate 8 completely covers the surface area of ​​the 8-layer stacked chip, and the upper surface of the adapter plate 8 is arranged with a second solder ball 10 for connecting with the upper device;

[0023] The height of the plastic package body 1 is not higher than the height of the second solder ball 10 on the upper surface of the adapter plate 8, but not lower than the upper surface height of the adapter plate 8 body, ensuring that the plastic package is stable and reliable.

[0024] The beneficial effects are as follows: the length of the bonding wire of the high-layer chip is reduced, the impact and bending resistance of the bonding wire is increased, the length of the bonding wire is reduced, and the product cost is also reduced. The adapter board used at the end can increase the interface of the product and match it with other products to form a higher performance product. At the same time, the copper layer inside the adapter board can reduce the interference of the product received by the electrical signal.

[0025] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0026] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A packaging method for increasing product reliability by vertical bonding, characterized in that: The multi-layer stacked chips are stacked on a carrier, and the upper surfaces of the remaining chips except the chips in the upper position are directly connected to the corresponding solder joints of the bottom carrier through welding wires. Then, a transfer board is covered on the top chip, and the chips at the upper layer are connected to the lower carrier pads of the transfer board through upper vertical bonding wires. Then, the corresponding lower carrier pads on the transfer board are connected to the corresponding solder joints of the chips in the lower layer that have been connected to the bottom carrier through welding wires through lower vertical bonding wires.

2. A packaging method for increasing product reliability by vertical bonding according to claim 1, characterized in that: Each group of chips at the upper layer is connected to a chip at the lower layer through an adapter plate and a group of vertical bonding wires, and is connected to a chip on the bottom layer carrier through arc bonding wires.

3. A packaging method for increasing product reliability by vertical bonding according to claim 2, characterized in that: The high-level chips are offset to reserve horizontal space for vertical wire connections.

4. A packaging method for increasing product reliability by vertical bonding according to claim 1, characterized in that: The upper surface of the adapter board is arranged with solder balls for connecting with the upper device.

5. A packaging method for increasing product reliability by vertical bonding according to claim 4, characterized in that: The height of the plastic package of the plastic package body is not higher than the height of the solder balls on the upper surface of the adapter board, but not lower than the height of the upper surface of the adapter board body.

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