Electronic device and preparation method thereof
By setting a groove structure on the electronic device substrate to release stress, the stability and cost problems of chips and passive devices with large aspect ratios in high-power RF chip packages are solved, and efficient packaging and performance improvements are achieved.
Patent Information
- Application Number
- CN202310798211.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-30
- Publication Date
- 2024-12-31
AI Technical Summary
In the prior art, when packaging high-power RF chips and matching capacitors, chips and passive devices with large aspect ratios have fatigue failure problems caused by low efficiency, waste of costs and thermal expansion stress, which affect stability and working performance.
By providing a groove structure on the surface of the electronic device substrate, the grooves penetrate part of the substrate to release stress, avoid breakage, and control cracks to appear in a controllable position during patch and packaging to ensure device stability and reliability.
It effectively avoids substrate fracture and cracks, ensures the stability and reliability of electronic devices, improves packaging efficiency and performance, and reduces costs.
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Figure CN119230488A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of microelectronics technology and packaging technology, and in particular to an electronic device and a preparation method thereof. Background Art
[0002] For high-power RF chips and corresponding passive components such as matching capacitors, as the power increases, the aspect ratio also increases. In order to achieve chips with a large aspect ratio and passive components such as capacitors, the prior art usually splices multiple chips and passive components with small aspect ratios together.
[0003] However, the disadvantage of this method is that each chip needs to be mounted separately, which is inefficient. At the same time, each chip needs to be diced on the periphery, and it is impossible to place them close together with zero spacing. This results in the need to reserve space near the chips, which will in turn waste chip costs. At the same time, the chips of the same area cannot exert better characteristics. Therefore, it is an urgent problem to prevent crack failure after packaging high aspect ratio chips and passive devices.
[0004] In addition, since high-power chips and corresponding matching capacitors need to be packaged in corresponding tube shells, the tube shells and passive devices such as chips and capacitors are made of different materials and have different thermal expansion coefficients, chips and passive devices with large aspect ratios will be subject to greater stress after being packaged with the tube shells. In the later stages of manufacturing and subsequent use, products will experience fatigue failure and fractures due to temperature changes. The aspect ratio of passive devices such as chips and capacitors is then limited. Therefore, it is particularly important to ensure the stability and working performance of electronic devices with high aspect ratios. Summary of the invention
[0005] The present invention provides an electronic device and a preparation method thereof, so as to ensure that the electronic device releases stress at a groove structure position, avoid fracture of a substrate, and further ensure the stability and reliability of the electronic device.
[0006] In a first aspect, an embodiment of the present invention provides an electronic device, including a substrate, wherein the substrate includes a first edge extending along a first direction and a second edge extending along a second direction, wherein the first direction and the second direction intersect and are both parallel to a plane where the substrate is located; the length of the first edge is L1, and the length of the second edge is L2; wherein L1≥3*L2;
[0007] The electronic device further comprises a groove structure located on the surface of the substrate, wherein the groove structure comprises at least one groove, and along the thickness direction of the substrate, the groove penetrates at least a portion of the substrate; an extension direction of the groove structure intersects with the first direction.
[0008] Optionally, along the thickness direction of the substrate, the depth of the groove is h1, and the thickness of the substrate is h2;
[0009] Among them, 1%≤h1 / h2≤90%.
[0010] Optionally, the substrate includes a first surface and a second surface that are arranged opposite to each other;
[0011] The groove structure comprises a first groove structure located on the first surface and a second groove structure located on the second surface;
[0012] The first groove structure includes at least one first groove, and the second groove structure includes at least one second groove. Along the thickness direction of the substrate, the first groove and the second groove overlap.
[0013] Optionally, along the thickness direction of the substrate, the groove penetrates the substrate; along the extension direction of the groove structure, the groove does not penetrate the substrate;
[0014] Alternatively, along the thickness direction of the substrate, the groove does not penetrate the substrate; along the extending direction of the groove structure, the groove penetrates the substrate.
[0015] Optionally, the groove structure includes an integral groove, and an extension direction of the integral groove intersects with the first direction;
[0016] Alternatively, the groove structure includes a plurality of discrete grooves, and an arrangement direction of the plurality of discrete grooves intersects with the first direction.
[0017] Optionally, the electronic device further comprises at least two circuit arrangement areas located on the surface of the substrate, and the circuit arrangement areas are provided with electrode structures;
[0018] The at least two circuit arrangement areas include a first circuit arrangement area and a second circuit arrangement area arranged along the first direction, and along the first direction, a minimum distance between the first circuit arrangement area and the second circuit arrangement area is d1, wherein d1<200 μm.
[0019] In a second aspect, an embodiment of the present invention further provides an electronic device, comprising a first sub-electronic device and a second sub-electronic device arranged along a first direction;
[0020] The first electronic sub-device includes a first substrate, the first substrate includes a third edge extending along the first direction;
[0021] The second electronic sub-device includes a second substrate, the second substrate includes a fourth edge extending along the first direction;
[0022] Wherein, the third edge and the fourth edge are located on the same straight line.
[0023] Optionally, the first substrate further includes a fifth edge extending along a second direction, and the second substrate further includes a sixth edge extending along the second direction; the second direction intersects with the first direction;
[0024] Along the first direction, the extension length of the third edge is L3, and the extension length of the fourth edge is L4; along the second direction, the extension length of the fifth edge is L5, and the extension length of the sixth edge is L6;
[0025] Among them, L5=L6, and (L3+L4)≥3*L5.
[0026] Optionally, the first sub-electronic device further comprises a third circuit setting area located on the surface of the first substrate, wherein the third circuit setting area is provided with an electrode structure; the second sub-electronic device further comprises a fourth circuit setting area located on the surface of the second substrate, wherein the fourth circuit setting area is provided with an electrode structure;
[0027] Along the first direction, a minimum distance between the third circuit arrangement area and the fourth circuit arrangement area is d2, wherein d2<200 μm.
[0028] In a third aspect, an embodiment of the present invention further provides a method for preparing an electronic device, comprising:
[0029] A substrate is provided, the substrate comprising a first edge extending along a first direction and a second edge extending along a second direction, the first direction and the second direction intersect and are both parallel to a plane where the substrate is located; the length of the first edge is L1, and the length of the second edge is L2; wherein L1≥3*L2;
[0030] A groove structure is prepared on the surface of the substrate, wherein the groove structure includes at least one groove, and along the thickness direction of the substrate, the groove penetrates at least a portion of the substrate; and an extension direction of the groove structure intersects with the first direction.
[0031] According to the technical solution of the embodiment of the present invention, the electronic device includes a substrate, and the first edge length L1 of the substrate and the second edge length L2 of the substrate satisfy L1≥3*L2. That is to say, the electronic device is a high-power electronic device with a relatively large length-to-width ratio. Furthermore, by providing a groove structure on the surface of the electronic device substrate, the groove structure includes at least one groove, and the groove passes through at least a portion of the substrate along the thickness direction of the substrate, so that the electronic device can release stress at the position of the groove structure to avoid the substrate from breaking, or even if cracks appear during the patching, packaging or subsequent use of the electronic device, the cracks can be controlled to appear only at the position of the groove structure, ensuring that the crack position is controllable to avoid affecting the normal operation of the electronic device.
[0032] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0034] Figure 1 A schematic top view of an electronic device provided by an embodiment of the present invention;
[0035] Figure 2 for Figure 1 A schematic cross-sectional view of an electronic device along a cross-sectional line AA' is provided;
[0036] Figure 3 A schematic top view of another electronic device provided by an embodiment of the present invention;
[0037] Figure 4 for Figure 3 A schematic cross-sectional view of another electronic device along a cross-sectional line BB' is provided;
[0038] Figure 5 for Figure 1 A schematic cross-sectional view of another electronic device along a cross-sectional line AA' is provided;
[0039] Figure 6 A schematic top view of another electronic device provided by an embodiment of the present invention;
[0040] Figure 7 for Figure 6 A cross-sectional schematic diagram of an electronic device along a cross-sectional line CC' is provided;
[0041] Figure 8 A schematic top view of another electronic device provided by an embodiment of the present invention;
[0042] Fig. 9 for Figure 8 A schematic cross-sectional view of another electronic device along a cross-sectional line DD' is provided;
[0043] Fig.10 A schematic top view of another electronic device provided by an embodiment of the present invention;
[0044] Fig.11 A schematic top view of another electronic device provided by an embodiment of the present invention;
[0045] Fig.12 A schematic flow chart of a method for preparing an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0046] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0047] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0048] Figure 1 A schematic top view of an electronic device provided by an embodiment of the present invention, Figure 2 for Figure 1 A cross-sectional schematic diagram of an electronic device along a cross-sectional line AA' is provided, such as Figure 1 and Figure 2 As shown, the electronic device 10 includes a substrate 101, and the substrate 101 includes a first direction (such as Figure 1The first edge 1011 extending in the X direction (as shown in FIG. 1 ) and the first edge 1011 extending in the second direction (as shown in FIG. Figure 1 The first direction X and the second direction Y intersect and are both parallel to the plane where the substrate 101 is located; the length of the first edge 1011 is L1, and the length of the second edge 1012 is L2; wherein L1≥3*L2; the electronic device 10 further comprises a groove structure 102 located on the surface of the substrate 101, the groove structure 102 comprises at least one groove 1021, and the groove structure 102 is formed along the thickness direction of the substrate (such as Figure 2 The groove 1021 penetrates at least a portion of the substrate 101; the extension direction of the groove structure 102 intersects with the first direction X.
[0049] Specifically, the length L1 of the first edge 1011 of the substrate 101 and the length L2 of the second edge 1012 satisfy L1≥3*L2, that is, the length of the substrate 101 is at least 3 times the width, that is, the aspect ratio of the substrate 101 is greater than or equal to 3, indicating that the electronic device 10 is a high-power electronic device with a high aspect ratio.
[0050] Further, a groove structure 102 may be provided on the surface of the substrate 101, and the groove structure 102 includes at least one groove 1021. The groove structure 102 does not penetrate the substrate 101 in at least one direction of its extension direction and the thickness direction of the substrate 101, which can ensure that the electronic device 10 is still a whole before packaging. When the electronic device 10 is mounted, packaged or used subsequently, the stress can be released at the position of the groove structure 102 to avoid the substrate 101 from breaking or even if cracks appear when the electronic device 10 is mounted, packaged or used subsequently, the cracks can be controlled to appear only at the position of the groove structure 102, ensuring that the crack position is controllable and avoiding affecting the normal operation of the electronic device. It should be noted that the groove structure in the embodiment of the present invention is exposed, that is, no other electrode structure or other structure is set in the groove structure, and the groove structure is set to release stress, that is, the groove structure in the embodiment of the present invention can be used as a stress guiding structure, or used to limit the location where cracks occur, rather than as a setting space for other electrode structures or a via for connection between different electrode structures.
[0051] Specifically, along the thickness direction Z of the substrate, the groove 1021 penetrates at least a portion of the substrate 101, that is, the groove 1021 can penetrate the substrate 101, or only penetrate a portion of the substrate 101, so that the stress can be released at the position of the groove 1021, thereby preventing the electronic device 10 from breaking due to stress in the circuit setting area, thereby ensuring the stability and reliability of the electronic device.
[0052] It can be understood that along the first direction X, the position of the groove structure 102 can be preset on the surface of the substrate 101 to ensure that the groove structure 102 can be set in a circuit-free area in the electronic device 10, thereby avoiding opening the circuit setting area of the electronic device 10 and preventing the normal working performance of the electronic device 10 from being affected during the setting process of the groove structure 102.
[0053] Exemplarily, the material of substrate 101 can be a combination of one or more of gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, silicon or ceramics, or any other chip and passive device materials. The embodiment of the present invention does not specifically limit the material of the electronic device.
[0054] It should be noted that Figure 2 Only the technical solution in which the groove structure 102 is located on the upper surface of the substrate 101 is shown. Figure 3 A schematic top view of another electronic device provided by an embodiment of the present invention, Figure 4 for Figure 3 Another cross-sectional schematic diagram of an electronic device along the cross-sectional line BB' is provided, such as Figure 3 and Figure 4 As shown, it can be understood that the groove structure 102 can also be located on the lower surface of the substrate 101, which can ensure that the electronic device 10 releases stress at the position of the groove structure 102, avoiding the substrate 101 from breaking or even if cracks appear in the electronic device 10 during subsequent use, the cracks can be controlled to appear only at the position of the groove structure 102, ensuring that the crack position is controllable and avoiding affecting the normal operation of the electronic device.
[0055] The electronic device provided by the embodiment of the present invention includes a substrate, and the first edge length L1 of the substrate and the second edge length L2 of the substrate satisfy L1≥3*L2. That is to say, the electronic device is a high-power device with a relatively large length-to-width ratio. Furthermore, by providing a groove structure on the surface of the electronic device substrate, the groove structure includes at least one groove, and the groove passes through at least a portion of the substrate along the thickness direction of the substrate, so that the electronic device can release stress at the position of the groove structure to avoid the substrate from breaking, or even if cracks appear during the patching, packaging or subsequent use of the electronic device, the cracks can be controlled to appear only at the position of the groove structure, ensuring that the crack position is controllable to avoid affecting the normal operation of the electronic device, thereby ensuring the stability and reliability of the electronic device.
[0056] Optional, continue to refer to Figure 2 , along the thickness direction Z of the substrate, the depth of the groove 1021 is h1, and the thickness of the substrate 101 is h2; wherein 1%≤h1 / h2≤90%.
[0057] Specifically, the depth h1 of the groove 1021 and the thickness h2 of the substrate 101 satisfy 1%≤h1 / h2≤90%, that is, along the thickness direction Z of the substrate, the groove 1021 does not penetrate the substrate 101, thereby preventing the electronic device 10 from breaking in the groove preparation structure.
[0058] As a feasible implementation manner, the depth h1 of the groove 1021 and the thickness h2 of the substrate satisfy 1%≤h1 / h2<50%, that is, the depth h1 of the groove 1021 is less than half of the thickness h2 of the substrate. This can prevent the electronic device 10 from breaking due to the large depth h1 of the groove 1021 during the process of setting the groove 1021 on the surface of the substrate 101. On the other hand, it can avoid the process complexity caused by deep drilling, ensure the simplicity of the groove preparation process, and be more conducive to forming a semi-connected device that breaks again at a specific packaging stage.
[0059] Exemplarily, 15%≤h1 / h2≤45%. In this way, on the one hand, the depth h1 of the groove 1021 can be ensured to be moderate, so as to avoid the electronic device 10 from being broken due to the groove 1021 completely penetrating the substrate 101 along the thickness direction Z of the substrate, or the stress cannot be fully released due to the depth h1 of the groove 1021 being too shallow. On the other hand, it can match the etching process of the groove 1021 to improve the preparation efficiency of the electronic device. Exemplarily, when h1 / h2<15%, it is not enough to release the stress generated by the electronic device 10, which can easily cause cracks in the substrate 101.
[0060] It should be noted that, when the groove 1021 is only located on the upper surface or the lower surface of the substrate 101, along the thickness direction Z of the substrate, h1 is the depth of the groove 1021. Exemplarily, when the groove 1021 is respectively located on the upper surface and the lower surface of the substrate 101, in other words, when the grooves 1021 are respectively provided on both sides of the substrate 101, along the thickness direction Z of the substrate, h1 is the sum of the depths of the two grooves 1021 on both sides of the substrate 101.
[0061] It should also be noted that the groove 1021 can also be a scratch on the substrate 101, such as a scratch on a glass substrate used to define a stress release position or a fracture position. In other words, any structure used to guide a stress release position or to define a crack occurrence position can be understood as a groove.
[0062] Optional, Figure 5 for Figure 1 Another cross-sectional schematic diagram of an electronic device along the cross-sectional line AA' is provided, such as Figure 5As shown, the substrate 101 includes a first surface aa and a second surface bb arranged opposite to each other; the groove structure 102 includes a first groove structure 121 located on the first surface aa and a second groove structure 122 located on the second surface bb; the first groove structure 121 includes at least one first groove 1211, and the second groove structure 122 includes at least one second groove 1221, and along the thickness direction Z of the substrate, the first groove 1211 and the second groove 1221 overlap.
[0063] Specifically, the groove structure 102 includes a first groove structure 121 located on the first surface aa and a second groove structure 122 located on the second surface bb. In other words, the groove structure 102 can be located on the first surface aa and the second surface bb of the substrate 101, that is, the groove structure 102 can be set on both the upper surface and the lower surface of the substrate 101, that is, along the thickness direction Z of the substrate, only the middle part of the substrate 101 is left without the groove structure 102, so that on the one hand, the electronic device 10 can be ensured to be a semi-connected structure, and on the other hand, stress can be further released. Further, the first groove structure 121 includes at least one first groove 1211, and the second groove structure 122 includes at least one second groove 1221. Along the thickness direction Z of the substrate, the first groove 1211 and the second groove 1221 overlap, so that on the one hand, it is conducive to further releasing stress. In addition, even if cracks appear when the electronic device 10 is mounted, packaged or used subsequently, only one crack will appear. On the other hand, it can ensure that the structure of the electronic device 10 is compact, save the packaging space of the electronic device 10, and is conducive to realizing the miniaturization of the electronic device 10.
[0064] Exemplarily, along the thickness direction Z of the substrate, the first groove 1211 and the second groove 1221 are correspondingly arranged, so that stress can be further released to prevent the substrate 101 from breaking. In addition, by correspondingly arranging the first groove 1211 and the second groove 1221, the structure of the electronic device 10 can be further made compact, the packaging space of the electronic device 10 can be saved, and the production cost can be reduced.
[0065] Optional, Figure 6 A schematic top view of another electronic device provided by an embodiment of the present invention, Figure 7 for Figure 6 A cross-sectional schematic diagram of an electronic device along a cross-sectional line CC' is provided, such as Figure 6 and Figure 7 As shown, along the thickness direction Z of the substrate, the groove 1021 penetrates the substrate 101; along the extension direction of the groove structure 102, the groove 1021 does not penetrate the substrate 101. Figure 1-Figure 5 , along the thickness direction Z of the substrate, the groove 1021 does not penetrate the substrate 101 ; along the extending direction of the groove structure 102 , the groove 1021 penetrates the substrate 101 .
[0066] Specifically, as a feasible implementation method, continue to refer to Figure 6 and Figure 7 , along the second direction Y, the groove structure 102 is only located near the middle of the substrate 101. In addition, along the thickness direction Z of the substrate, the groove 1021 penetrates the substrate 101, and along the extension direction of the groove structure 102, that is, along the second direction Y, the groove 1021 does not penetrate the substrate 101, so that on the one hand, the substrate 101 can be ensured to be an integral substrate, and on the other hand, it is conducive to releasing stress in the area where the groove 1021 is set.
[0067] As another possible implementation, Figure 8 A schematic top view of another electronic device provided by an embodiment of the present invention, Fig. 9 for Figure 8 A cross-sectional schematic diagram of another electronic device along the section line DD' is provided, such as Figure 8 and Fig. 9 As shown, along the second direction Y, the groove structure 102 includes a plurality of independently arranged grooves 1021, and the shape of the plurality of independently arranged grooves 1021 may be similar to a "rectangle", and along the thickness direction Z of the substrate, the plurality of grooves 1021 penetrate the substrate 101, and along the extension direction of the groove structure 102, that is, along the second direction Y, the grooves 1021 do not penetrate the substrate 101, so that on the one hand, the substrate 101 can be ensured to be an integral substrate, and on the other hand, it is beneficial to release stress in the setting area of the grooves 1021.
[0068] As a comparative example, Fig.10 A schematic top view of another electronic device provided by an embodiment of the present invention is shown as follows: Fig.10 As shown, the shapes of the multiple independently arranged grooves 1021 can be similar to "ovals", that is, the independently arranged grooves 1021 are all grooves with rounded edges, so that on the one hand, stress concentration can be avoided at the sharp corners of the rectangular grooves, that is, designing the independently arranged grooves 1021 as grooves with rounded edges is conducive to fully releasing stress. On the other hand, the diversity of the groove structure 102 design can be increased.
[0069] As another feasible implementation method, continue to refer to Figure 1-Figure 5 , along the thickness direction Z of the substrate, the groove 1021 does not penetrate the substrate 101; along the extension direction of the groove structure 102, the groove 1021 penetrates the substrate 101. In summary, the groove 1021 penetrates the substrate 101 in one direction along the thickness direction Z of the substrate or along the extension direction of the groove structure 102, which can increase the diversity of the design of the groove structure 102 on the one hand, and can fully release stress on the other hand.
[0070] Optional, continue to refer to Figure 1, the groove structure 102 includes an integral groove 10211, and the extension direction of the integral groove 10211 intersects with the first direction X; or, continue to refer to Figure 8 The groove structure 102 includes a plurality of discrete grooves 10212 , and an arrangement direction of the plurality of discrete grooves 10212 intersects with the first direction X.
[0071] As a feasible implementation method, continue to refer to Figure 1 The groove structure 102 includes an integral groove 10211, and the extension direction of the integral groove 10211 intersects with the first direction X. That is to say, the groove structure 102 is integrated. Such a setting is simple, which can reduce the difficulty of preparing the groove structure and improve the preparation efficiency.
[0072] As another possible implementation, continue to refer to Figure 8 , the groove structure 102 includes a plurality of discrete grooves 10212, and the arrangement direction of the plurality of discrete grooves 10212 intersects with the first direction X. That is, along the second direction Y, the groove structure 102 includes a plurality of discrete grooves 10212 that are independently and discontinuously arranged, so that the groove structure 102 can be ensured to be a non-penetrating structure in the second direction Y, thereby ensuring the integrity of the substrate 101 and preventing the substrate 101 from breaking.
[0073] It is understandable that the spacing between any two adjacent discrete grooves 10212 can be equal or unequal, so that technicians can choose according to the functional requirements of the electronic device.
[0074] Exemplarily, the shape of the discrete groove 10212 can be rectangular, elliptical, etc. The embodiment of the present invention does not specifically limit the shape of the discrete groove 10212.
[0075] Optional, continue to refer to Figure 1 The electronic device 10 also includes at least two circuit setting areas 103 located on the surface of the substrate 101, and the circuit setting area 103 is provided with an electrode structure (not shown in the figure); the at least two circuit setting areas 103 include a first circuit setting area 1031 and a second circuit setting area 1032 arranged along the first direction X, and along the first direction X, the minimum distance between the first circuit setting area 1031 and the second circuit setting area 1032 is d1, wherein d1<200μm.
[0076] Specifically, the circuit setting area 103 can be located on both sides of the groove structure 102, and the corresponding functions of the electronic device 10 can be realized by setting the electrode structure in the circuit setting area 103. Exemplarily, the electrode structure can be a chip, etc., and the embodiment of the present invention does not specifically limit the type of electrode structure. Further, along the first direction X, the minimum distance d1 between the first circuit setting area 1031 and the second circuit setting area 1032 satisfies d1<200μm. In this way, it can ensure that the gap between the two adjacent circuit setting areas 103 is small, thereby ensuring the compactness of the structure of the electronic device 10, which is conducive to the miniaturization of the electronic device 10.
[0077] Exemplarily, the minimum distance d1 between the first circuit arrangement area 1031 and the second circuit arrangement area 1032 may satisfy d1=150 μm, d1=100 μm or d1=50 μm, which can reduce the area of the electronic device 10 and lower the production cost.
[0078] On the basis of the above embodiments, an embodiment of the present invention can also provide a semiconductor packaging structure, including the electronic device described in the above embodiments, and also including a packaging shell, the electronic device is arranged in the packaging shell, and the material of the packaging shell is different from the material of the substrate. In this way, when stress is generated between the substrate and the packaging shell due to different thermal expansion coefficients, the stress can be released at the position of the groove structure to avoid the substrate from breaking, or even if cracks appear, the cracks can be controlled to appear only at the position of the groove structure, ensuring that the crack position is controllable and avoiding affecting the normal operation of the packaging structure.
[0079] Exemplarily, the packaging structure can be applicable to: power amplifier packaging, microwave power packaging, microwave power amplifier packaging, RF amplifier packaging, RF power amplifier packaging, RF power transistor packaging, monolithic microwave integrated circuit (Monolithic Microwave Integrated Circuit, MMIC) packaging and RF power amplifier transistor packaging, etc., and can be used to implement L-band component packaging in the frequency range of the radio spectrum from 1 to 2 gigahertz (GHz), S-band component packaging covering frequencies from 2 to 4 GHz, X-band component packaging in the frequency range of the radio spectrum from 7.0 to 11.2 GHz, C-band component packaging in the frequency range of the radio spectrum from 500 to 1000 MHz, Ku-band component packaging in the electromagnetic spectrum in the microwave frequency range from 12 to 18 GHz, satellite communication component packaging, Doherty configuration packaging and semiconductor chips including integrated circuit packaging.
[0080] Exemplarily, the electronic device can be a wide bandgap semiconductor device, an ultra-wide band device, a GaN-based device, a GaN-on-SiC device, a GaN-on-Si device, a metal semiconductor field effect transistor, a metal oxide field effect transistor, a junction field effect transistor, a bipolar junction transistor, a laterally diffused metal oxide semiconductor, an insulated gate bipolar transistor, a high electron mobility transistor, or a wide bandgap semiconductor, etc.
[0081] In summary, the electronic device provided by the embodiment of the present invention includes a substrate. A groove structure is provided on the surface of the electronic device substrate, and the groove structure includes at least one groove. The groove runs through at least a portion of the substrate along the thickness direction of the substrate, so that stress can be released at the position of the groove structure to avoid the substrate from breaking or even if cracks appear during the patching, packaging or subsequent use of the electronic device, the cracks can be controlled to appear only at the position of the groove structure, ensuring that the crack position is controllable to avoid affecting the normal operation of the electronic device, thereby ensuring the stability and reliability of the electronic device. Furthermore, the groove structure can include an integral groove, that is, the groove structure is integrated, so that the preparation process is simple and the preparation efficiency is high. The groove structure can also include multiple discrete grooves, so that the integrity of the substrate can be guaranteed. In addition, the working performance of the electronic device can be achieved by providing an electrode structure in the circuit setting area on the surface of the substrate.
[0082] Based on the same inventive concept, an embodiment of the present invention further provides an electronic device, Fig.11 A schematic top view of another electronic device provided by an embodiment of the present invention. The electronic device 10 includes a first sub-electronic device 11 and a second sub-electronic device 12 arranged along a first direction X; the first sub-electronic device 11 includes a first substrate 111, and the first substrate 111 includes a third edge cc extending along the first direction X; the second sub-electronic device 12 includes a second substrate 112, and the second substrate 112 includes a fourth edge dd extending along the first direction X; wherein the third edge cc and the fourth edge dd are located on the same straight line.
[0083] Specifically, the first sub-electronic device 11 and the second sub-electronic device 12 can be two electronic devices formed after the groove structure of the electronic device 10 is broken. In the prior art, two or more electronic devices are mounted one after another. During packaging, the edges of the multiple electronic devices will inevitably be not in the same straight line due to process errors, which will affect the RF performance of the electronic device 10. However, the technical solution provided by the embodiment of the present invention can ensure that when the electronic device 10 is damaged by excessive stress caused by environmental factors such as temperature or pressure, the third edge cc and the fourth edge dd are still located in the same straight line, thereby ensuring the RF performance of the electronic device 10.
[0084] Optional, continue to refer to Fig.11The first substrate 111 also includes a fifth edge ee extending along the second direction Y, and the second substrate 112 also includes a sixth edge ff extending along the second direction Y; the second direction Y intersects with the first direction X; along the first direction X, the extension length of the third edge cc is L3, and the extension length of the fourth edge dd is L4; along the second direction Y, the extension length of the fifth edge ee is L5, and the extension length of the sixth edge ff is L6; wherein, L5=L6, and, (L3+L4)≥3*L5.
[0085] Specifically, the extension length L3 of the third edge cc, the extension length L4 of the fourth edge dd, and the extension length L5 of the fifth edge ee satisfy (L3+L4)≥3*L5, that is, the sum of the length of the first sub-electronic device 11 and the length of the second sub-electronic device 12 is greater than or equal to 3 times the width of the first sub-electronic device 11. In other words, the electronic device 10 composed of the first sub-electronic device 11 and the second sub-electronic device 12 is a high-power electronic device with a high aspect ratio.
[0086] Optional, continue to refer to Fig.11 The first sub-electronic device 11 also includes a third circuit setting area 1111 located on the surface of the first substrate 111, and the third circuit setting area 1111 is provided with an electrode structure (not shown in the figure); the second sub-electronic device 12 also includes a fourth circuit setting area 1121 located on the surface of the second substrate 112, and the fourth circuit setting area 1121 is provided with an electrode structure (not shown in the figure); along the first direction X, the minimum distance between the third circuit setting area 1111 and the fourth circuit setting area 1121 is d2, where d2<200μm.
[0087] Specifically, the third circuit setting area 1111 and the fourth circuit setting area 1121 can be provided with an electrode structure to achieve the working performance of the electronic device 10. Exemplarily, the electrode structure can be a chip, etc., and the embodiment of the present invention does not specifically limit the type of electrode structure. Further, along the first direction X, the minimum distance d2 between the third circuit setting area 1111 and the fourth circuit setting area 1121 satisfies d2<200μm. In this way, it can ensure that the gap between the third circuit setting area 1111 and the fourth circuit setting area 1121 is small, thereby ensuring the compactness of the electronic device structure, which is conducive to the miniaturization of the electronic device.
[0088] In summary, the electronic device provided by the embodiment of the present invention can avoid the technical problem in the prior art that the edges of multiple electronic devices cannot be ensured to be on the same horizontal line when multiple electronic devices are mounted, thereby affecting the RF performance of the electronic device, by placing the three edges and the fourth edge on the same straight line. In addition, by designing (L3+L4)≥3*L5, it can be satisfied that the electronic device composed of the first sub-electronic device and the second sub-electronic device is a high-power electronic device with a high aspect ratio. Furthermore, the minimum distance d2 between the third circuit setting area and the fourth circuit setting area satisfies d2<200μm. In this way, it can be ensured that the gap between the third circuit setting area and the fourth circuit setting area is small, thereby ensuring the compactness of the electronic device structure, which is conducive to the miniaturization of the electronic device.
[0089] Based on the same inventive concept, an embodiment of the present invention further provides a method for preparing an electronic device. Fig.12 A schematic diagram of a process for preparing an electronic device provided by an embodiment of the present invention is shown in FIG. Fig.12 As shown, the preparation method comprises:
[0090] S101. Provide a substrate, wherein the substrate comprises a first edge extending along a first direction and a second edge extending along a second direction, wherein the first direction and the second direction intersect and are both parallel to a plane where the substrate is located; the length of the first edge is L1, and the length of the second edge is L2; wherein L1≥3*L2.
[0091] For details, please refer to Figure 1 and Figure 2 , the substrate 101 includes a first edge 1011 extending along a first direction X and a second edge 1012 extending along a second direction Y. The length L1 of the first edge 1011 and the length L2 of the second edge 1012 satisfy L1≥3*L2, that is, the length of the substrate 101 is at least 3 times the width, that is, the aspect ratio of the substrate 101 is greater than or equal to 3, indicating that the substrate 101 is a substrate with a high aspect ratio.
[0092] S102, preparing a groove structure on the surface of the substrate, the groove structure comprising at least one groove, and the groove penetrates at least a portion of the substrate along the thickness direction of the substrate; an extension direction of the groove structure intersects with the first direction.
[0093] For details, please refer to Figure 1 and Figure 2, a groove structure 102 is prepared on the surface of the substrate 101, and the groove structure 102 includes at least one groove 1021. By setting the groove structure 102 on the surface of the substrate 101, it can be ensured that the electronic device 10 is still a whole before packaging. Later, when the electronic device 10 is mounted, packaged or used subsequently, the stress can be released at the position of the groove structure 102 to avoid the substrate 101 from breaking or even if cracks appear when the electronic device 10 is mounted, packaged or used subsequently, the cracks can be controlled to appear only at the position of the groove structure 102, ensuring that the crack position is controllable and avoiding affecting the normal operation of the electronic device. Specifically, along the thickness direction Z of the substrate, the groove 1021 penetrates at least part of the substrate 101, that is, the groove 1021 can penetrate the upper surface of the substrate 101 or the lower surface of the substrate 101, or only penetrate a part of the substrate 101. In this way, it can be ensured that the stress is released at the position of the groove 1021, so that the stability and reliability of the electronic device can be guaranteed.
[0094] For example, when preparing the groove structure on the surface of the substrate, various processes such as laser cutting, grinding wheel blade cutting or etching can be used. The embodiment of the present invention does not specifically limit the cutting technology for electronic devices.
[0095] The method for preparing an electronic device provided by an embodiment of the present invention can ensure that the electronic device is a large-size device with a high aspect ratio by providing a substrate with a high aspect ratio. Furthermore, by preparing a groove structure on the surface of the substrate to ensure that the electronic device releases stress at the position of the groove structure, the substrate is prevented from breaking or cracks appearing during the mounting, packaging or subsequent use of the electronic device, the cracks can be controlled to appear only at the position of the groove structure, ensuring that the crack position is controllable and avoiding affecting the normal operation of the electronic device.
[0096] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims
1. An electronic device, characterized in that: A substrate is provided, wherein the substrate comprises a first edge extending along a first direction and a second edge extending along a second direction, wherein the first direction and the second direction intersect and are parallel to a plane where the substrate is located; the length of the first edge is L1, and the length of the second edge is L2; wherein L1≥3*L2; The electronic device further comprises a groove structure located on the surface of the substrate, wherein the groove structure comprises at least one groove, and along the thickness direction of the substrate, the groove penetrates at least a portion of the substrate; an extension direction of the groove structure intersects with the first direction.
2. The electronic device according to claim 1, characterized in that Along the thickness direction of the substrate, the depth of the groove is h1, and the thickness of the substrate is h2; Among them, 1%≤h1 / h2≤90%.
3. The electronic device according to claim 2, characterized in that: The substrate comprises a first surface and a second surface which are arranged opposite to each other; The groove structure comprises a first groove structure located on the first surface and a second groove structure located on the second surface; The first groove structure includes at least one first groove, and the second groove structure includes at least one second groove. Along the thickness direction of the substrate, the first groove and the second groove overlap.
4. The electronic device according to claim 1, characterized in that: Along the thickness direction of the substrate, the groove penetrates the substrate; along the extension direction of the groove structure, the groove does not penetrate the substrate; Alternatively, along the thickness direction of the substrate, the groove does not penetrate the substrate; Along the extension direction of the groove structure, the groove penetrates the substrate.
5. The electronic device according to claim 1, characterized in that The groove structure comprises an integral groove, and the extending direction of the integral groove intersects with the first direction; Alternatively, the groove structure includes a plurality of discrete grooves, and an arrangement direction of the plurality of discrete grooves intersects with the first direction.
6. The electronic device according to claim 1, characterized in that The electronic device further comprises at least two circuit arrangement areas located on the surface of the substrate, wherein the circuit arrangement areas are provided with electrode structures; The at least two circuit arrangement areas include a first circuit arrangement area and a second circuit arrangement area arranged along the first direction, and along the first direction, a minimum distance between the first circuit arrangement area and the second circuit arrangement area is d1, wherein d1<200 μm.
7. An electronic device, characterized in that: including a first sub-electronic device and a second sub-electronic device arranged along a first direction; The first electronic sub-device includes a first substrate, the first substrate includes a third edge extending along the first direction; The second electronic sub-device includes a second substrate, the second substrate includes a fourth edge extending along the first direction; Wherein, the third edge and the fourth edge are located on the same straight line.
8. The electronic device according to claim 7, characterized in that: The first substrate further includes a fifth edge extending along a second direction, and the second substrate further includes a sixth edge extending along the second direction; the second direction intersects with the first direction; Along the first direction, the extension length of the third edge is L3, and the extension length of the fourth edge is L4; along the second direction, the extension length of the fifth edge is L5, and the extension length of the sixth edge is L6; Among them, L5=L6, and (L3+L4)≥3*L5.
9. The electronic device according to claim 7, characterized in that: The first sub-electronic device further comprises a third circuit setting area located on the surface of the first substrate, wherein the third circuit setting area is provided with an electrode structure; the second sub-electronic device further comprises a fourth circuit setting area located on the surface of the second substrate, wherein the fourth circuit setting area is provided with an electrode structure; Along the first direction, a minimum distance between the third circuit arrangement area and the fourth circuit arrangement area is d2, wherein d2<200 μm.
10. A method for preparing an electronic device, characterized in that: include: A substrate is provided, the substrate comprising a first edge extending along a first direction and a second edge extending along a second direction, the first direction and the second direction intersect and are both parallel to a plane where the substrate is located; the length of the first edge is L1, and the length of the second edge is L2; wherein L1≥3*L2; A groove structure is prepared on the surface of the substrate, wherein the groove structure includes at least one groove, and along the thickness direction of the substrate, the groove penetrates at least a portion of the substrate; and an extension direction of the groove structure intersects with the first direction.
