Formation method of semiconductor structure

Abstract

A forming method of a semiconductor structure comprises the steps that a substrate is provided, the substrate comprises a pixel area and a lead area, and a lead pad is formed on the substrate of the lead area; forming a sacrificial layer on the top of the lead pad, wherein the sacrificial layer exposes the substrate of the pixel region; forming a flat layer on the substrate, wherein the flat layer covers the side wall of the sacrificial layer; forming an optical component on the flat layer of the pixel area; after the optical assembly is formed, the sacrificial layer is removed, and the top of the lead pad is exposed. The top of the lead pad is covered with the sacrificial layer, and compared with a scheme that the top of the lead pad is only provided with the flat layer, the sacrificial layer at least replaces the flat layer with partial thickness in the normal direction of the top surface of the substrate, so that the process difficulty of removing the flat layer at the top of the lead pad is reduced, and the production efficiency is improved. Therefore, the probability that the surface of the lead pad is covered by the residual flat layer is reduced, the performance of the lead pad is improved, and the performance of the semiconductor structure is further improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a method for forming a semiconductor structure. Background Art

[0002] With the rapid development of electrical and electronic technologies, more and more modern mobile electronic products using image sensor technology, such as smart phones, digital cameras, and laptops, have been rapidly developed and popularized, and people are increasingly demanding on product quality and personal experience. Nowadays, all electronic products have camera and video functions, and image sensors, as the main imaging components of electronic products, have increasingly higher requirements on their imaging quality.

[0003] Image sensors are devices that convert light signals into electrical signals. Image sensors include charge coupled devices (CCD) and CMOS image sensors (CIS). Compared with traditional CCD sensors, CMOS image sensors have the characteristics of low power consumption, low cost, and compatibility with CMOS processes, so they are increasingly widely used. Currently, CMOS image sensors are not only used in the field of consumer electronics, such as digital cameras, mobile phone cameras, and camcorders, but also in automotive electronics, monitoring, biotechnology, and medicine.

[0004] In the process of manufacturing an image sensor chip, it is usually necessary to expose the lead pad. However, the process of exposing the lead pad easily leads to a decrease in the yield of the image sensor chip. Summary of the invention

[0005] The problem solved by the embodiments of the present invention is to provide a method for forming a semiconductor structure to improve the performance of the semiconductor structure.

[0006] To solve the above problems, an embodiment of the present invention further provides a method for forming a semiconductor structure, comprising: providing a substrate, the substrate comprising a pixel area and a lead area, a lead pad being formed on the substrate of the lead area; forming a sacrificial layer on the top of the lead pad, the sacrificial layer exposing the substrate of the pixel area; forming a flat layer on the substrate, the flat layer covering the side wall of the sacrificial layer; forming an optical component on the flat layer of the pixel area; after forming the optical component, removing the sacrificial layer to expose the top of the lead pad.

[0007] Optionally, in the step of forming the sacrificial layer, the sacrificial layer also covers the sidewalls of the lead pad.

[0008] Optionally, in the step of removing the sacrificial layer, the side wall of the lead pad is also exposed.

[0009] Optionally, the step of forming the sacrificial layer includes: forming an initial sacrificial layer covering the lead pad on the substrate; and patterning the initial sacrificial layer to retain the initial sacrificial layer on the lead pad as a sacrificial layer.

[0010] Optionally, the process of forming the initial sacrificial layer covering the lead pad includes a coating process.

[0011] Optionally, in the step of forming the sacrificial layer, along a direction perpendicular to the side wall of the lead pad, a thickness range of the sacrificial layer on the side wall of the lead pad is greater than or equal to 40 microns.

[0012] Optionally, in the step of forming the sacrificial layer, the material of the sacrificial layer includes a photoresist material.

[0013] Optionally, in the step of forming a flat layer on the substrate, the flat layer also covers the top of the sacrificial layer; after forming the optical component and before removing the sacrificial layer, it also includes: removing the flat layer on the top of the sacrificial layer to expose the top of the sacrificial layer.

[0014] Optionally, the step of removing the flat layer on the top of the sacrificial layer to expose the top of the sacrificial layer includes: forming a patterned mask layer on the optical component, a mask opening being formed in the mask layer, and the mask opening being located above the sacrificial layer; removing the flat layer at the bottom of the mask opening along the mask opening to expose the top of the sacrificial layer; the formation method also includes: removing the mask layer.

[0015] Optionally, during the process of removing the sacrificial layer, the mask layer is removed simultaneously.

[0016] Optionally, the process of removing the planar layer at the bottom of the mask opening to expose the top of the sacrificial layer includes a dry etching process.

[0017] Optionally, one or more etchings are performed to remove the flat layer at the bottom of the mask opening to expose the top of the sacrificial layer.

[0018] Optionally, in the step of forming the mask layer, the material of the mask layer is a photoresist material.

[0019] Optionally, in the step of forming the mask layer, a material of the mask layer is the same as a material of the sacrificial layer.

[0020] Optionally, in the step of forming the sacrificial layer, along the normal direction of the top surface of the substrate, the thickness of the sacrificial layer located on the top of the lead pad ranges from 7 microns to 13 microns.

[0021] Optionally, the process of removing the sacrificial layer includes a wet process.

[0022] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0023] In the method for forming a semiconductor structure provided by an embodiment of the present invention, a sacrificial layer is formed on the top of the lead pad, the sacrificial layer exposes the substrate of the pixel region, a flat layer is formed on the substrate, the flat layer covers the sidewalls of the sacrificial layer, and after an optical component is formed on the flat layer of the pixel region, the sacrificial layer is removed to expose the top of the lead pad. Since the top of the lead pad is covered with the sacrificial layer, compared with the solution in which the top of the lead pad only has a flat layer, along the normal direction of the top surface of the substrate, the sacrificial layer at least replaces a portion of the thickness of the flat layer, that is, the thickness of the flat layer that needs to be removed from the top of the lead pad is reduced, and the process difficulty of removing the flat layer on the top of the lead pad is correspondingly reduced, thereby helping to reduce the probability that the surface of the lead pad is covered by the residual flat layer, improving the performance of the lead pad, and further improving the performance of the semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a schematic flow diagram of a method for forming a semiconductor structure;

[0025] Figures 2 to 9 It is a schematic structural diagram corresponding to each step in a method for forming a semiconductor structure;

[0026] Figures 10 to 18 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention. DETAILED DESCRIPTION

[0027] At present, the process of exposing the lead pad easily leads to a decrease in the yield of the image sensor chip, so that the performance of the semiconductor structure still needs to be improved. Now, combined with a method for forming a semiconductor structure, the reasons why the performance of the semiconductor structure needs to be improved are analyzed. Figure 1 is a schematic flow diagram of a method for forming a semiconductor structure; Figures 2 to 9 The present invention is a schematic structural diagram corresponding to each step in a method for forming a semiconductor structure.

[0028] refer to Figure 1 and Figure 2 , step s1: providing a substrate 10, wherein the substrate 10 includes a pixel area i and a lead area ii, and a lead pad 11 is formed on the substrate 10 of the lead area ii.

[0029] refer to Figure 1 and Figure 3 , step s2: forming a flat layer 12 on the substrate 10 and the lead pad 11.

[0030] refer to Figure 1 and Figure 4, step s3: forming an optical component 13 on the planar layer 12 of the pixel area i.

[0031] refer to Figure 1 and Figure 5 , step s4: forming a mask layer 14 on the planar layer 12 and the optical component 13 .

[0032] refer to Figure 1 and Figure 6 , step s5: imaging the mask layer 14, forming a mask opening 15 in the mask layer 14, wherein the mask opening 15 exposes the top of the planar layer 12 of the lead area ii.

[0033] refer to Figure 1 and Figure 7 , step s6: etching the flat layer 12 at the bottom of the mask opening 15 along the mask opening 15 .

[0034] refer to Figure 1 and Figure 8 Step s7: After etching a portion of the thickness of the planar layer 12 at the bottom of the mask opening 15, remove the remaining mask layer 14.

[0035] Repeat steps s4 to s7 until the top of the lead pad 11 is exposed. Fig. 9 , Fig. 9 The schematic diagram after repeating steps s4 to s7 multiple times is shown.

[0036] It has been found through research that when the thickness of the planar layer 12 is relatively large, due to the limitation of the thickness of the mask layer 14 , in order to expose the top of the lead pad 11 , it is usually necessary to repeat steps s4 to s7 for multiple times.

[0037] However, the controllability of the multiple etching processes is low. If the etching amount of the flat layer 12 is not enough, the top of the lead pad 11 may not be completely exposed (eg, Fig. 9 As shown), it is easy to cause problems in the transmission of signals between the chip and the outside world, and correspondingly it is easy to lead to poor results of electrical testing; if the etching amount of the flat layer 12 is too large, it is easy to increase the probability of damage to the optical component 13 or the lead pad 11, thereby affecting the performance of the semiconductor structure.

[0038] In order to solve the above technical problems, an embodiment of the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate, the substrate comprising a pixel area and a lead area, a lead pad being formed on the substrate of the lead area; forming a sacrificial layer on the top of the lead pad, the sacrificial layer exposing the substrate of the pixel area; forming a flat layer on the substrate, the flat layer covering the side wall of the sacrificial layer; forming an optical component on the flat layer of the pixel area; after forming the optical component, removing the sacrificial layer to expose the top of the lead pad.

[0039] In the method for forming a semiconductor structure provided by an embodiment of the present invention, a sacrificial layer is formed on the top of the lead pad, the sacrificial layer exposes the substrate of the pixel region, a flat layer is formed on the substrate, the flat layer covers the sidewalls of the sacrificial layer, and after an optical component is formed on the flat layer of the pixel region, the sacrificial layer is removed to expose the top of the lead pad. Since the top of the lead pad is covered with the sacrificial layer, compared with the solution in which the top of the lead pad only has a flat layer, along the normal direction of the top surface of the substrate, the sacrificial layer at least replaces a portion of the thickness of the flat layer, that is, the thickness of the flat layer that needs to be removed from the top of the lead pad is reduced, and the process difficulty of removing the flat layer on the top of the lead pad is correspondingly reduced, thereby helping to reduce the probability that the surface of the lead pad is covered by the residual flat layer, improving the performance of the lead pad, and further improving the performance of the semiconductor structure.

[0040] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0041] Figures 10 to 18 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention.

[0042] refer to Fig.10 , providing a substrate 100, the substrate 100 includes a pixel area I and a lead area II, and a lead pad 110 is formed on the substrate 100 of the lead area I.

[0043] The substrate 100 is used to provide a process platform for subsequent process steps.

[0044] In this embodiment, the substrate 100 is used to form an image sensor.

[0045] In this embodiment, the base 100 includes a substrate (not shown), which is a silicon substrate. In other embodiments, the substrate may be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the substrate may also be other types of substrates such as a silicon substrate on an insulator or a germanium substrate on an insulator.

[0046] The pixel area I is used as a region for subsequently forming optical components.

[0047] In a specific embodiment, the substrate 100 is a substrate for preparing a semiconductor device.

[0048] The lead area II is used to provide a space for forming the lead pad 110 .

[0049] The lead pad 110 is used to connect to an external circuit, thereby achieving connection between the image sensor and the external circuit.

[0050] refer to Figure 11 to Figure 12 A sacrificial layer 120 is formed on the top of the lead pad 110, and the sacrificial layer 120 exposes the substrate 100 of the pixel area I.

[0051] Since the top of the lead pad 110 is covered with a sacrificial layer 120, compared with a solution in which the top of the lead pad 110 only has a flat layer 130, along the normal direction of the top surface of the substrate 100, the sacrificial layer 120 at least replaces a portion of the thickness of the flat layer, i.e., the thickness of the flat layer on the top of the lead pad 110 that needs to be removed later is reduced, and the process difficulty of removing the flat layer 130 on the top of the lead pad 110 is correspondingly reduced, thereby helping to reduce the probability of the surface of the lead pad 110 being covered by the residual flat layer, thereby improving the performance of the lead pad 110, and thereby improving the performance of the semiconductor structure.

[0052] In this embodiment, the difficulty of removing the sacrificial layer 120 is lower than that of removing the flat layer, thereby reducing the difficulty of removing the sacrificial layer 120 and the flat layer above the top of the lead pad 110 as a whole, and helping to reduce the probability of the surface of the lead pad 110 being covered by the remaining sacrificial layer 120.

[0053] Specifically, in the step of forming the sacrificial layer 120 , the material of the sacrificial layer 120 includes a photoresist material.

[0054] The photoresist material is easy to remove, and the process of removing the sacrificial layer 120 can cause less damage to other components (eg, optical components, lead pads 110).

[0055] Furthermore, the use of photoresist material to form the sacrificial layer 120 also improves the process compatibility of the sacrificial layer 120 with the optical component manufacturing process.

[0056] In other embodiments, the material of the sacrificial layer may also be other materials that are easy to remove and cause less damage to other components.

[0057] It should be noted that, in the step of forming the sacrificial layer 120, the thickness h of the sacrificial layer 120 located at the top of the lead pad 110 along the normal direction of the top surface of the substrate 100 should not be too small or too large. If the thickness h of the sacrificial layer 120 located at the top of the lead pad 110 is too small, the effect of the sacrificial layer 120 replacing a portion of the thickness of the flat layer is not good, and accordingly, the effect of reducing the process difficulty of removing the flat layer at the top of the lead pad 110 is not good, and the effect of reducing the surface of the lead pad 110 covered by the residual flat layer is not good. If the thickness h of the sacrificial layer 120 located at the top of the lead pad 110 is too large, the flatness of the flat layer formed subsequently is not good. Therefore, in this embodiment, in the step of forming the sacrificial layer 120, the thickness h of the sacrificial layer 120 located at the top of the lead pad 110 along the normal direction of the top surface of the substrate 100 is in the range of 7 microns to 13 microns.

[0058] In this embodiment, in the step of forming the sacrificial layer 120 , the sacrificial layer 120 also covers the sidewalls of the lead pad 110 .

[0059] The sacrificial layer 120 also covers the sidewall of the lead pad 110 , which is beneficial to increase the process window for forming the sacrificial layer 120 and reduce the process difficulty of forming the sacrificial layer 120 .

[0060] It should be noted that, in the step of forming the sacrificial layer 120, the thickness d of the sacrificial layer 120 located on the side wall of the lead pad 110 along the direction perpendicular to the side wall of the lead pad 110 should not be too small. If the thickness d of the sacrificial layer 120 located on the side wall of the lead pad 110 is too small, the effect of increasing the process window for forming the sacrificial layer 120 is likely to be poor. Therefore, in this embodiment, in the step of forming the sacrificial layer 120, the thickness of the sacrificial layer 120 located on the side wall of the lead pad 110 along the direction perpendicular to the side wall of the lead pad 110 is greater than or equal to 40 microns.

[0061] In this embodiment, the steps of forming the sacrificial layer 120 include: Fig.11 As shown, an initial sacrificial layer 121 covering the lead pad 110 is formed on the substrate 100; Fig.12 As shown, the initial sacrificial layer 121 is patterned, and the initial sacrificial layer 121 located on the lead pad 110 is retained as the sacrificial layer 120 .

[0062] Firstly, an initial sacrificial layer 121 covering the substrate 100 and the lead pad 110 is formed, and then the initial sacrificial layer 121 is patterned to form the sacrificial layer 120 , which is beneficial to reducing the process difficulty of forming the sacrificial layer 120 .

[0063] It should be noted that the process of forming the initial sacrificial layer 121 covering the lead pad 110 includes a coating process.

[0064] The initial sacrificial layer 121 formed by the coating process has good film coverage, simple process and convenient operation.

[0065] It is understandable that in other embodiments, other suitable processes (eg, deposition processes) may be selected according to the material of the sacrificial layer.

[0066] refer to Fig.13 , a planarization layer 130 is formed on the substrate 100 , and the planarization layer 130 covers the sidewalls of the sacrificial layer 120 .

[0067] The planar layer 130 is used to provide a process basis for the subsequent formation of optical components.

[0068] Specifically, the material of the planar layer 130 includes resin. Specifically, the resin is a light-transmitting resin, so that the light received by the optical component can be transmitted, so as to realize the normal function of the image sensor.

[0069] In this embodiment, in the step of forming the planar layer 130 on the substrate 100 , the planar layer 130 also covers the top of the sacrificial layer 120 .

[0070] Since different processes require different thicknesses of the planar layer 130 , when the process requires a greater thickness of the planar layer 130 , the planar layer 130 also covers the top of the sacrificial layer 120 so that the thickness of the planar layer 130 can reach a greater value.

[0071] Moreover, since the planar layer 130 also covers the top of the sacrificial layer 120 , when the thickness of the planar layer 130 on the substrate 100 meets the requirement, it is easy to appropriately reduce the thickness of the sacrificial layer 120 , thereby reducing the difficulty of forming the sacrificial layer 120 .

[0072] In other embodiments, the top of the planar layer may also be flush with the top of the sacrificial layer. In other words, the sacrificial layer completely replaces the planar layer on the top of the lead pad.

[0073] refer to Fig.14 , an optical component 140 is formed on the planar layer 130 of the pixel area I.

[0074] The optical component 140 is used to receive an optical signal so as to convert the optical signal into an electrical signal.

[0075] In this embodiment, the optical component 140 includes a microlens.

[0076] In this embodiment, in the step of forming the flat layer 130 on the substrate 100, the flat layer 130 also covers the top of the sacrificial layer 120. Figures 15 to 17 After forming the optical component 140 and before removing the sacrificial layer 120 , the method further includes: removing the flat layer 130 on the top of the sacrificial layer 120 to expose the top of the sacrificial layer 120 .

[0077] In this embodiment, the step of removing the planar layer 130 on the top of the sacrificial layer 120 to expose the top of the sacrificial layer 120 includes: Figure 15 to Figure 16 As shown, a patterned mask layer 150 is formed on the optical component 140, and a mask opening 155 is formed in the mask layer 150, and the mask opening 155 is located above the sacrificial layer 120; Fig.17 As shown, along the mask opening 155 , the planar layer 130 at the bottom of the mask opening 155 is removed to expose the top of the sacrificial layer 120 .

[0078] First, a mask layer 150 having a mask opening 155 is formed on the optical component 140, and the mask opening 155 is located above the sacrificial layer 120. Then, the flat layer 130 at the bottom of the mask opening 155 is removed along the mask opening 155, which helps to reduce the process difficulty of exposing the top of the sacrificial layer 120, while protecting the flat layer 130 in the remaining area and the optical component 140.

[0079] Specifically, the process of removing the planar layer 130 at the bottom of the mask opening 155 to expose the top of the sacrificial layer 120 includes a dry etching process.

[0080] The dry etching process has anisotropic etching characteristics, so the etching accuracy is high and the cross-section control is better, which is beneficial to reduce the probability of damage to other film layers (such as optical component 140) during the process of removing the flat layer 130 at the bottom of the mask opening 155.

[0081] In this embodiment, one etching is performed to remove the planar layer 130 on the top of the sacrificial layer 120 , that is, the planar layer 130 on the top of the sacrificial layer 120 is removed in the same etching step.

[0082] Due to the existence of the sacrificial layer 120, the thickness of the flat layer 130 on the top of the sacrificial layer 120 is reduced, so only one etching is required. Accordingly, there is no need to form the mask layer 150 multiple times, which is beneficial to reducing process costs. In addition, there is no need for multiple etchings, which is beneficial to improving the controllability of the etching amount.

[0083] It should be noted that, in other embodiments, according to process requirements, multiple etchings may be performed to remove the flat layer at the bottom of the mask opening, that is, the step of forming a mask layer with a mask opening and the etching step are performed alternately. For example, different process requirements have different requirements for the thickness of the flat layer. When the process requires a larger thickness of the flat layer, due to the limitation of the thickness of the mask layer, the top of the sacrificial layer is exposed, and multiple etching processes are required to remove the flat layer at the bottom of the mask opening.

[0084] It should be noted that, compared with the solution without forming a sacrificial layer, since the sacrificial layer 120 replaces at least part of the thickness of the flat layer 130, that is, the thickness of the flat layer 130 that needs to be removed on the top of the lead pad is reduced, therefore, even when multiple etchings are used, it is helpful to reduce the number of etchings.

[0085] In this embodiment, in the step of forming the mask layer 150 , the material of the mask layer 150 is a photoresist material.

[0086] The photoresist material is easy to remove, and the process of removing the mask layer 150 can cause less damage to other components (eg, optical components, lead pads 110).

[0087] It should also be noted that, in the step of forming the mask layer 150 , the material of the mask layer 150 is the same as the material of the sacrificial layer 120 .

[0088] The material of the mask layer 150 is the same as that of the sacrificial layer 120 , which facilitates the process difficulty of removing the sacrificial layer 120 and the mask layer 150 in the same step later.

[0089] refer to Fig.18 After forming the optical component 140 , the sacrificial layer 120 is removed to expose the top of the lead pad 110 .

[0090] The sacrificial layer 120 is removed to expose the top of the lead pad 110 so that the substrate 100 can be connected to an external circuit.

[0091] In this embodiment, the process of removing the sacrificial layer 120 includes a wet process. The wet process is helpful to prevent the lead pad 110 from being damaged by plasma.

[0092] Specifically, the sacrificial layer 120 is removed by soaking or spraying the chemical solution with the sacrificial layer 120 to make the chemical solution react with the sacrificial layer 120 to form a reactant, and then the reactant is removed with clean water, thereby removing the sacrificial layer 120 .

[0093] In this embodiment, in the step of removing the sacrificial layer 120 , the sidewall of the lead pad 110 is also exposed.

[0094] In the step of removing the sacrificial layer 120 , the sidewall of the lead pad 110 is also exposed, which helps to ensure that the top of the lead pad 110 is completely exposed.

[0095] In this embodiment, the forming method further includes: removing the mask layer 150 .

[0096] In this embodiment, during the process of removing the sacrificial layer 120 , the mask layer 150 is removed simultaneously.

[0097] In the process of removing the sacrificial layer 120 , the mask layer 150 is removed at the same time, which is beneficial to simplify the process flow, improve process efficiency, and reduce process cost.

[0098] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: Providing a substrate, the substrate comprising a pixel area and a lead area, a lead pad being formed on the substrate in the lead area; forming a sacrificial layer on top of the lead pad, the sacrificial layer exposing a base of the pixel area; forming a flat layer on the substrate, wherein the flat layer covers the sidewalls of the sacrificial layer; forming an optical component on the planar layer in the pixel region; After forming the optical component, the sacrificial layer is removed to expose the top of the lead pad.

2. The method for forming a semiconductor structure according to claim 1, wherein: In the step of forming the sacrificial layer, the sacrificial layer also covers the sidewalls of the lead pad.

3. The method for forming a semiconductor structure according to claim 2, wherein: In the step of removing the sacrificial layer, the sidewalls of the lead pads are also exposed.

4. The method for forming a semiconductor structure according to claim 1 or 2, wherein: The step of forming the sacrificial layer comprises: forming an initial sacrificial layer covering the lead pad on the substrate; The initial sacrificial layer is patterned, and the initial sacrificial layer located on the lead pad is retained as a sacrificial layer.

5. The method for forming a semiconductor structure according to claim 4, wherein: The process of forming the initial sacrificial layer covering the lead pad includes a coating process.

6. The method for forming a semiconductor structure according to claim 2, wherein: In the step of forming the sacrificial layer, along a direction perpendicular to the side wall of the lead pad, the thickness of the sacrificial layer on the side wall of the lead pad is greater than or equal to 40 micrometers.

7. The method for forming a semiconductor structure according to claim 1, wherein: In the step of forming the sacrificial layer, the material of the sacrificial layer includes a photoresist material.

8. The method for forming a semiconductor structure according to claim 1, wherein: In the step of forming a flat layer on the substrate, the flat layer also covers the top of the sacrificial layer; After forming the optical component and before removing the sacrificial layer, the method further includes: removing the flat layer on the top of the sacrificial layer to expose the top of the sacrificial layer.

9. The method for forming a semiconductor structure according to claim 8, wherein: The step of removing the planar layer on the top of the sacrificial layer to expose the top of the sacrificial layer comprises: forming a patterned mask layer on the optical component, wherein a mask opening is formed in the mask layer, and the mask opening is located above the sacrificial layer; removing the flat layer at the bottom of the mask opening along the mask opening to expose the top of the sacrificial layer; The forming method further includes: removing the mask layer.

10. The method for forming a semiconductor structure according to claim 9, wherein: In the process of removing the sacrificial layer, the mask layer is removed simultaneously.

11. The method for forming a semiconductor structure according to claim 9, wherein: The process of removing the planar layer at the bottom of the mask opening to expose the top of the sacrificial layer includes a dry etching process.

12. The method for forming a semiconductor structure according to claim 8 or 11, characterized in that: One or more etching steps are performed to remove the planar layer at the bottom of the mask opening and expose the top of the sacrificial layer.

13. The method for forming a semiconductor structure according to claim 9, wherein: In the step of forming the mask layer, the material of the mask layer is a photoresist material.

14. The method for forming a semiconductor structure according to claim 9, wherein: In the step of forming the mask layer, a material of the mask layer is the same as a material of the sacrificial layer.

15. The method for forming a semiconductor structure according to claim 1, wherein: In the step of forming the sacrificial layer, along the normal direction of the top surface of the substrate, the thickness of the sacrificial layer located on the top of the lead pad ranges from 7 microns to 13 microns.

16. The method for forming a semiconductor structure according to claim 1, wherein: The process of removing the sacrificial layer includes a wet process.

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