Display panel, display device and preparation method of display panel

Abstract

The invention provides a display panel, a display device and a preparation method of the display panel, the display panel comprises a driving backboard, a light-emitting element, an epitaxial layer and a light conversion block, and the light-emitting element is arranged on one side of the driving backboard and is electrically connected with the driving backboard; the epitaxial layer is arranged on the side, away from the driving backboard, of the light-emitting element and provided with a first through groove, and at least part of the light-emitting element is exposed in the first through groove. The light conversion block is at least partially accommodated in the first through groove so as to perform light conversion on the light emitted by the light-emitting element. The first through groove is formed in the epitaxial layer, and the light conversion block is arranged in the first through groove, so that the thickness of the light conversion block can be adjusted according to the thickness of the epitaxial layer, and the display panel has an excellent light conversion effect; and the first through groove and the light-emitting element can be directly connected to form an integrated embedded structure, so that the reliability of the display panel is improved.

Description

Technical Field

[0001] The present application relates to the technical field of display devices, and in particular to a display panel, a display device and a method for manufacturing a display panel. Background Art

[0002] LED (Light Emitting Diode) chip display technology has the advantages of high brightness, high response speed, low power consumption, and long life, and has become a research hotspot in the pursuit of a new generation of display technology.

[0003] At present, LED chip display technology is used in low-pixel density application scenarios such as TV and monitors, and the pixel density in LED display panels is 50PPI to 200PPI. In order to promote the application of LED chip display technology in AR / VR micro-display scenarios with higher resolution, it is necessary to increase the pixel density in the display panel to more than 4000PPI. At present, in order to ensure that the LED display panel has an excellent color gamut, a thicker quantum dot color film needs to be set; through holes for accommodating the quantum dot color film are set on the glue layer by multiple exposures and overlays, which is difficult to operate and has a low product production yield. Summary of the invention

[0004] The main technical problem solved by the present application is to provide a display panel, a display device and a method for manufacturing a display panel, which can ensure that the display panel has an excellent light conversion effect and improve the reliability of the display panel.

[0005] In order to solve the above technical problems, the first technical solution adopted by the present application is: to provide a display panel, the display panel comprising:

[0006] Driver backplane;

[0007] The light emitting element is arranged on one side of the driving backplane and is electrically connected to the driving backplane;

[0008] The epitaxial layer is arranged on a side of the light emitting element away from the driving back plate, and is provided with a first through groove, wherein at least a part of the light emitting element is exposed in the first through groove;

[0009] The light conversion block is at least partially received in the first through groove to convert the light emitted by the light emitting element.

[0010] In order to solve the above technical problem, the second technical solution adopted by the present application is: to provide a display device, including the above display panel.

[0011] In order to solve the above technical problems, the third technical solution adopted by the present application is: to provide a method for preparing a display panel, the method for preparing a display panel comprising:

[0012] forming a light emitting element on a surface of the first side of the epitaxial layer;

[0013] Electrically connecting the driving back plate located on the side of the light emitting element away from the epitaxial layer to the light emitting element;

[0014] forming a first through groove on the epitaxial layer to expose at least a portion of the light emitting element;

[0015] A light conversion block is formed in the first through groove to convert the light emitted by the light emitting element.

[0016] The beneficial effects of the present application are as follows: Different from the prior art, a display panel, a display device and a method for preparing a display panel are provided, wherein the display panel includes a driving backplane, a light-emitting element, an epitaxial layer and a light conversion block, wherein the light-emitting element is arranged on one side of the driving backplane and is electrically connected to the driving backplane; the epitaxial layer is arranged on the side of the light-emitting element away from the driving backplane and is provided with a first through groove, wherein at least part of the light-emitting element is exposed in the first through groove; the light conversion block is at least partially accommodated in the first through groove to convert the light emitted by the light-emitting element. The present application opens a first through groove on the epitaxial layer and arranges the light conversion block in the first through groove, so that the thickness of the light conversion block can be adjusted according to the thickness of the epitaxial layer, thereby ensuring that the display panel has an excellent color gamut; and the first through groove and the light-emitting element can be directly connected to form an integrated mosaic structure, thereby improving the reliability of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic structural diagram of a first embodiment of a display panel provided in the present application;

[0018] Figure 2 is a schematic structural diagram of a second embodiment of a display panel provided by the present application;

[0019] Figure 3 is a schematic structural diagram of a third embodiment of a display panel provided in the present application;

[0020] Figure 4 is a schematic structural diagram of a fourth embodiment of a display panel provided in the present application;

[0021] Figure 5 is a schematic structural diagram of a fifth embodiment of a display panel provided in the present application;

[0022] Figure 6 is a schematic structural diagram of a sixth embodiment of a display panel provided in the present application;

[0023] Figure 7 is a schematic diagram of a process in an embodiment of a method for preparing a display panel provided in the present application;

[0024] Figure 8It is a schematic flow chart of a specific embodiment of a method for preparing a display panel provided in the present application;

[0025] Fig. 9 yes Figure 8 A schematic structural diagram corresponding to step S11 in the method for preparing a display panel provided;

[0026] Fig.10 yes Figure 8 A schematic flow chart of a specific embodiment of step S12 in the method for preparing a display panel is provided;

[0027] Figure 11(a) to Figure 11(i) yes Fig.10 A schematic diagram of the structures corresponding to each step in the method for preparing a display panel is provided;

[0028] Figure 12(a) to Figure 12(h) yes Figure 8 Structural schematic diagrams corresponding to steps S13 to S17 in the provided method for manufacturing a display panel;

[0029] Fig.13 yes Figure 8 A schematic diagram of the structure after the substrate is removed before S14 in the manufacturing method of the provided display panel;

[0030] Fig.14 It is a schematic diagram of the structure of the display panel manufactured after removing the substrate. DETAILED DESCRIPTION

[0031] The scheme of the embodiment of the present application is described in detail below in conjunction with the drawings of the specification.

[0032] In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures, interfaces, and technologies are provided to facilitate a thorough understanding of the present application.

[0033] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0034] The terms "first", "second", "third" in this application are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first", "second", "third" can expressly or implicitly include at least one of the features. In the description of this application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the embodiments of this application, all directional indications (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication also changes accordingly. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the steps or units listed, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.

[0035] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0036] See also Figure 1 and Figure 2 , Figure 1 is a schematic structural diagram of a first embodiment of a display panel provided in the present application; Figure 2 is a schematic structural diagram of a second embodiment of a display panel provided by the present application;

[0037] Figure 3 is a schematic structural diagram of a third embodiment of a display panel provided in the present application; Figure 4 is a schematic structural diagram of a fourth embodiment of a display panel provided in the present application; Figure 5 is a schematic structural diagram of a fifth embodiment of a display panel provided in the present application; Figure 6 It is a schematic structural diagram of the sixth embodiment of the display panel provided in the present application.

[0038] This embodiment provides a display panel 100, taking the display panel 100 as a Micro-LED display panel as an example. In other embodiments, the display panel 100 may also be a Mini-LED display panel, an LED display panel, etc.

[0039] The display panel 100 includes a driving backplane 1, a light emitting element 2, an epitaxial layer 3 and a light conversion block 4. The light emitting element 2 is arranged on one side of the driving backplane 1, and the light emitting element 2 is electrically connected to the driving backplane 1; the epitaxial layer 3 is arranged on the side of the light emitting element 2 away from the driving backplane 1, and a first through groove 31 is provided on the epitaxial layer 3, and at least part of the light emitting element 2 is exposed in the first through groove 31; the light conversion block 4 is at least partially received in the first through groove 31 to convert the light emitted by the light emitting element 2.

[0040] Specifically, during the preparation, an epitaxial layer 3 is formed on the substrate. Since the material of the epitaxial layer 3 is an inorganic material, a first through groove 31 of any depth and small size can be opened on the epitaxial layer 3 by dry etching, so as to form a thick and small-sized light conversion block 4 in the first through groove 31, so that a high pixel density display panel 100 can be manufactured. And the first through groove 31 is directly connected to the light-emitting element 2, providing technical support for forming an integrated mosaic structure.

[0041] The display panel provided in this embodiment includes a driving backplane, a light-emitting element, an epitaxial layer and a light conversion block. The light-emitting element is arranged on one side of the driving backplane and is electrically connected to the driving backplane; the epitaxial layer is arranged on the side of the light-emitting element away from the driving backplane and is provided with a first through groove, and at least part of the light-emitting element is exposed in the first through groove; the light conversion block is at least partially accommodated in the first through groove to convert the light emitted by the light-emitting element. In this embodiment, a first through groove is opened on the epitaxial layer, and the light conversion block is arranged in the first through groove, so that the thickness of the light conversion block can be adjusted according to the thickness of the epitaxial layer, thereby ensuring that the display panel has excellent color gamut and light conversion efficiency; and the first through groove and the light-emitting element can be directly connected to form an integrated mosaic structure, thereby improving the reliability of the display panel.

[0042] The display panel 100 further includes a planarization layer 5, which is located between the driving backplane 1 and the epitaxial layer 3. The planarization layer 5 has a third through groove 51, which is connected to the first through groove 31, and the light emitting element 2 is accommodated in the third through groove 51. In one embodiment, in order to ensure the effect of light conversion, the maximum orthographic projection of the light conversion block 4 on the driving backplane 1 covers the maximum orthographic projection of the light emitting element 2 on the driving backplane 1, and accordingly, the size of the first through groove 31 matches the size of the light conversion block 4, and the size of the third through groove 51 matches the size of the light emitting element 2. Among them, the longitudinal sections of the light conversion block 4 and the light emitting element 2 are trapezoidal, and the size of the light conversion block 4 and the light emitting element 2 decreases in the direction close to the driving backplane 1.

[0043] The light emitting element 2 may be a Micro-LED (Micro Light Emitting Diode) or a Mini-LED (Miniature Light Emitting Diode). Micro-LED and Mini-LED have the advantages of small size, high luminous efficiency and low energy consumption. For example, the size of a Micro-LED is less than 100 μm, and the size of a Mini-LED is less than 100 to 500 μm, which can clearly display numbers and patterns on a smaller display panel 100.

[0044] In a specific embodiment, the light emitting element 2 includes a common semiconductor layer 21, an active layer 22, a semiconductor layer 23, and an electrode layer 24 which are sequentially stacked in a direction close to the driving backplane 1. When a forward voltage is applied to the light emitting element 2, that is, the semiconductor layer 23 is connected to the positive electrode and the common semiconductor layer 21 is connected to the negative electrode, the light emitting element 2 emits light.

[0045] The common semiconductor layer 21 covers the surface of one side of the epitaxial layer 3 close to the driving backplane 1. The common semiconductor layer 21 includes a first common semiconductor portion 211 and a second common semiconductor portion 212 connected to each other. The first common semiconductor portions 211 and the second common semiconductor portions 212 in adjacent light-emitting elements 2 are connected in sequence.

[0046] The portion of the common semiconductor layer 21 located between the light emitting element 2 and the light conversion block 4 is used as the first common semiconductor portion 211, that is, the orthographic projection of the first common semiconductor portion 211 on the driving backplane 1 does not exceed the maximum orthographic projection area of ​​the third through groove 51 on the driving backplane 1. The portion of the common semiconductor layer 21 located between the epitaxial layer 3 and the planarization layer 5 is used as the second common semiconductor portion 212, that is, the orthographic projection of the second common semiconductor portion 212 on the driving backplane 1 is staggered with the orthographic projection of the third through groove 51 on the driving backplane 1. The end of the first common semiconductor portion 211 is connected to the end of the adjacent second common semiconductor portion 212.

[0047] See also Figure 2 In order to improve the optical crosstalk phenomenon of the optical conversion block 4, the distance between the surface of the optical conversion block 4 contacting the first common semiconductor part 211 and the driving backplane 1 is smaller than the distance between the surface of the second common semiconductor part 212 away from the epitaxial layer 3 and the driving backplane 1.

[0048] In this embodiment, the end of the first common semiconductor portion 211 is electrically connected to the adjacent second common semiconductor portion 212 to form a continuous common semiconductor layer 21. In this embodiment, the common semiconductor layer 21 is an N-type semiconductor layer. The material of the common semiconductor layer 21 includes at least one of silicon-doped gallium nitride and magnesium-doped gallium nitride. For example, the common semiconductor layer 21 is a silicon-doped N-type GaN layer.

[0049] In this embodiment, the light conversion block 4 and the light emitting element 2 share a common semiconductor layer 21 , so that the first through groove 31 connects the light emitting element 2 to form an integrated structure, thereby improving the stability of the display panel 100 .

[0050] Compared with the independent common semiconductor layer 21 corresponding to each light emitting element 2, in this embodiment, a continuous structure is formed between the first common semiconductor parts 211 of each light emitting element 2 in the display area of ​​the display panel 100, and the first common semiconductor parts 211 of each light emitting element 2 are electrically connected, and there is no need to set a cathode lead for each light emitting element 2, so the cathode of the light emitting element 2 can be set in the non-display area of ​​the display panel 100 to save the wiring space in the display area of ​​the display panel 100, and the pixel density in the display area of ​​the display panel 100 can be further improved. Among them, the thickness of the first common semiconductor part 211 can be the same as the thickness of the second common semiconductor part 212, or it can be different.

[0051] In this embodiment, the semiconductor layer 23 is disposed in the third through groove 51 and on the side of the first common semiconductor portion 211 away from the optical conversion block 4, and the semiconductor layer 23 is in close contact with the planarization layer 5 exposed at the bottom of the third through groove 51. In this embodiment, the semiconductor layer 23 is a P-type semiconductor layer. The material of the semiconductor layer 23 includes at least one of silicon-doped gallium nitride and magnesium-doped gallium nitride. For example, the semiconductor layer 23 is a magnesium-doped P-type GaN layer.

[0052] The active layer 22 is disposed between the first common semiconductor portion 211 and the semiconductor layer 23, and the end surface of the active layer 22 is in close contact with the inner wall surface of the third through groove 51. The semiconductor layer 23 is electrically connected to the driving backplane 1 through the electrode layer 24. The electrode layer 24 is an anode electrode. The electrode layer 24 can be made of a conductive metal, a conductive metal alloy or a laminated structure commonly used in semiconductors such as copper, molybdenum, titanium, chromium, aluminum, titanium nitride or indium tin oxide.

[0053] See also Figure 3 In order to improve the brightness of the display panel 100, the display panel 100 further includes an optical reflective layer 8, which is at least arranged on the inner wall surface of the third through groove 51. The inner wall surface is the surface of the inner side wall of the third through groove 51. In another embodiment, both ends of the optical reflective layer 8 can also extend between the second common semiconductor portion 212 and the planarization layer 5, so that the optical reflective layer 8 forms a cup-shaped structure and is sleeved in the third through groove 51. The material of the optical reflective layer 8 includes at least one of copper, silver, aluminum, molybdenum, titanium, chromium, gold, platinum, titanium oxide, silicon oxide, and silicon nitride. The optical reflective layers 8 arranged in each third through groove 51 are insulated from each other. That is, the electrode layer 24 is directly in contact with the surface of the semiconductor layer 23 away from the active layer 22.

[0054] In another embodiment, the optical reflective layer 8 is further formed between the light emitting element 2 and the driving backplane 1, and a second via hole 81 is provided on the surface of the optical reflective layer 8 close to the driving backplane 1, the semiconductor layer 23 is exposed through the second via hole 81, the electrode layer 24 is accommodated in the second via hole 81, and the semiconductor layer 23 is electrically connected to the driving backplane 1 through the electrode layer 24.

[0055] See also Figure 3 The surface of the optical reflective layer 8 facing away from the driving backplane 1 is defined as the first surface A, the surface of the light conversion block 4 facing the driving backplane 1 is defined as the second surface B, and the surface of the second common semiconductor portion 212 facing the driving backplane 1 is defined as the third surface C, wherein the first surface A is between the second surface B and the third surface C, so as to improve the optical crosstalk phenomenon.

[0056] The thickness of the optical reflective layer 8 may be 0.1 micrometer to 1 micrometer. The optical reflective layer 8 with the above thickness may further simplify the manufacturing process of the display panel 100 and improve the display effect of the display panel 100.

[0057] In one embodiment, in order to destroy the waveguide transmission of light between sub-pixels and pixels and reduce the optical crosstalk between the light conversion blocks 4, the refractive index of the optical reflective layer 8 is smaller than the refractive index of the common semiconductor layer 21, and the refractive index of the common semiconductor layer 21 is smaller than the refractive index of the epitaxial layer 3.

[0058] See also Figure 3 and Figure 4 In order to prevent the elements in the optical reflective layer 8 from migrating to the light emitting element 2, the display panel 100 further includes a protective layer 7, which is formed between the optical reflective layer 8 and the light emitting element 2. Furthermore, the end of the protective layer 7 extends to between the second common semiconductor portion 212 and the optical reflective layer 8 or the planarization layer 5. The protective layers 7 disposed in each third through groove 51 are connected to each other, so that the common semiconductor layer 21 is insulated from the optical reflective layer 8 and the planarization layer 5.

[0059] In order to facilitate the electrical connection between the semiconductor layer 23 and the driving backplane 1, a first via hole 71 is provided on the surface of the protective layer 7 close to the driving backplane 1. The first via hole 71 is connected to the second via hole 81. The semiconductor layer 23 is exposed through the first via hole 71, and the electrode layer 24 is accommodated in the first via hole 71 and the second via hole 81, so that the semiconductor layer 23 and the driving backplane 1 are electrically connected through the electrode layer 24.

[0060] In one embodiment, the epitaxial layer 3 is an inorganic material layer. Specifically, the material of the epitaxial layer 3 includes a III-V compound. For example, the epitaxial layer 3 includes at least one of gallium nitride and aluminum nitride. The thickness of the epitaxial layer 3 can be adjusted arbitrarily. In this embodiment, the thickness of the epitaxial layer 3 is not less than 6 microns.

[0061] In a specific embodiment, the epitaxial layer 3 includes a lattice adjustment sublayer (not shown) and a lattice buffer sublayer (not shown) which are stacked. The lattice buffer sublayer is arranged between the lattice adjustment sublayer and the light-emitting element 2. Through the mutual cooperation between the lattice adjustment sublayer and the lattice buffer sublayer, the lattice defects can be improved, thereby improving the light-emitting effect of the light-emitting device. The lattice adjustment sublayer and the lattice buffer sublayer can be stacked in sequence, and the number of the lattice adjustment sublayer and the lattice buffer sublayer includes but is not limited to one group.

[0062] The epitaxial layer 3 has a plurality of first through grooves 31 arranged at intervals. The longitudinal section of the first through groove 31 can be rectangular or trapezoidal. In this embodiment, the width of the first through groove 31 gradually increases in the direction away from the driving back plate 1, that is, the longitudinal section of the first through groove 31 is an inverted trapezoid.

[0063] See also Figures 1 to 4 In order to improve the optical crosstalk phenomenon of the optical conversion block 4, a fourth through groove 32 is provided on the epitaxial layer 3, and a portion of the planarization layer 5 is exposed through the fourth through groove 32. The fourth through groove 32 is used to space adjacent first through grooves 31. The fourth through groove 32 is spaced from the first through groove 31, and the projection of the fourth through groove 32 on the driving backplane 1 does not exceed the projection of the second common semiconductor portion 212 on the driving backplane 1.

[0064] The display panel 100 further includes an optical shielding block 33 , at least a portion of which is disposed in the fourth through slot 32 , so that the optical shielding block 33 blocks optical crosstalk between two optical conversion blocks 4 received in adjacent first through slots 31 .

[0065] In another embodiment, see Figure 5 A fifth through-groove 2121 is provided on the second common semiconductor portion 212 in the common semiconductor layer 21. The fifth through-groove 2121 is connected to the fourth through-groove 32, a portion of the planarization layer 5 is exposed through the fifth through-groove 2121, and the optical shielding block 33 is received in the fifth through-groove 2121 and the fourth through-groove 32.

[0066] The optical shielding block 33 is made of metal material. The optical shielding block 33 is electrically connected to the inner wall of the fifth through groove 2121, so that the first common semiconductor part 211 and the second common semiconductor part 212 of each light emitting element 2 are electrically connected. For example, the material of the optical shielding block 33 includes but is not limited to copper and aluminum.

[0067] See also Figure 2 In order to reduce the probability of lateral crosstalk of the optical conversion block 4, the first common semiconductor portion 211 is located in the third through slot 51, and the end of the optical conversion block 4 close to the driving backplane 1 is also located in the third through slot 51. The optical conversion blocks 4 accommodated in each third through slot 51 are spaced apart from each other.

[0068] In one embodiment, the surface of the light conversion block 4 away from the light emitting element 2 is flush with the surface of the epitaxial layer 3 away from the planarization layer 5. In another embodiment, in order to improve the display effect of the display panel 100, the surface of the light conversion block 4 away from the light emitting element 2 protrudes from the surface of the epitaxial layer 3 away from the planarization layer 5. The material of the light conversion block 4 includes at least one of a quantum dot material and a fluorescent material.

[0069] In view of the advantages of quantum dots having high luminous efficiency and good light stability after multiple excitations and light emissions, the light conversion material forming the light conversion block 4 may be a quantum dot light conversion material doped with corresponding colors.

[0070] See also Figures 1 to 5 , the light conversion block 4 can be any one of the first light conversion block 41, the second light conversion block 42 and the third light conversion block 43. In one application scenario, the first light conversion block 41 is used to convert the light emitted by the light emitting element 2 into red light, the second light conversion block 42 is used to convert the light emitted by the light emitting element 2 into green light, and the third light conversion block 43 is used to convert the light emitted by the light emitting element 3 into blue light.

[0071] In one embodiment, the display panel 100 further includes a bonding definition layer 9 and a conductive block 92, wherein the bonding definition layer 9 is located between the driving backplane 1 and the light emitting element 2, and the bonding definition layer 9 is provided with a sixth through groove 91; the conductive block 92 is received in the sixth through groove 91 to electrically connect the driving backplane 1 and the light emitting element 2. Specifically, the electrode layer 24 of the light emitting element 2 is electrically connected to the driving backplane 1 through the conductive block 92. The material of the bonding definition layer 9 may be at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, and zirconium oxide.

[0072] In one embodiment, see Figure 6 The display panel 100 further includes a substrate 6, which is located on the side of the epitaxial layer 3 away from the driving backplane 1. The substrate 6 is provided with a second through groove 61, which is connected to the first through groove 31, and the light conversion block 4 is at least partially accommodated in the second through groove 61 and the first through groove 31. The material of the substrate 6 includes at least one of silicon, silicon carbide, and sapphire. In one embodiment, the surface of the light conversion block 4 away from the light emitting element 2 is flush with the surface of the substrate 6 away from the epitaxial layer 3. In another embodiment, in order to improve the display effect of the display panel 100, the surface of the light conversion block 4 away from the light emitting element 2 protrudes from the surface of the substrate 6 away from the epitaxial layer 3.

[0073] In this embodiment, the driving backplane 1 may be a silicon-based driving substrate, a low-temperature polycrystalline silicon LTPS driving substrate, etc., and an LED driving circuit, etc. may also be arranged thereon.

[0074] The embodiment of the present application also provides a display device, including the display panel 100 in any of the above embodiments. The display device provided in the embodiment of the present application includes a driving backplane 1, a light-emitting element 2, an epitaxial layer 3, and a light conversion block 4, wherein the light-emitting element 2 is arranged on one side of the driving backplane 1 and is electrically connected to the driving backplane 1; the epitaxial layer 3 is arranged on the side of the light-emitting element 2 away from the driving backplane 1, and is provided with a first through groove 31, wherein at least part of the light-emitting element 2 is exposed in the first through groove 31; and the light conversion block 4 is at least partially received in the first through groove 31 to convert the light emitted by the light-emitting element 2. The present application controls the thickness of the light conversion block 4 by controlling the thickness of the epitaxial layer 3, and sets a plurality of high-density first through grooves 31 on the epitaxial layer 3, so as to form light conversion blocks 4 of arbitrary thickness and small size in the first through grooves 31. Since the light conversion blocks 4 in the epitaxial layer 3 are small in size, the pixel density of the display panel 100 is improved; the thickness of the light conversion block 4 can be adjusted according to the thickness of the epitaxial layer 3, thereby ensuring that the display panel 100 has an excellent color gamut; and the first through grooves 31 are directly connected to the light-emitting element 2 to form an integrated mosaic structure, which further improves the stability of the display panel 100.

[0075] Therefore, the display panel 100 provided in the embodiment of the present application has the technical effect of the technical solution of the display panel 100 in any of the above embodiments, and the explanation of the structure and terminology that are the same or corresponding to the above embodiments will not be repeated here. The display panel 100 provided in the embodiment of the present application can be applied to AR / VR micro-display devices, or any electronic product with a display function, including but not limited to the following categories: mobile phones, televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc., and the embodiment of the present application does not specifically limit this.

[0076] See also Figure 7 , Figure 7 It is a schematic diagram of a process in an embodiment of a method for preparing a display panel provided in the present application.

[0077] This embodiment provides a method for preparing a display panel 100. The prepared display panel 100 is suitable for mobile phones, televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, vehicle displays, medical equipment, industrial control equipment, touch interactive terminals, and is particularly suitable for display panels 100 of AR / VR micro display devices. The method for preparing the display panel 100 includes the following steps.

[0078] S1: forming a light emitting element on the surface of the first side of the epitaxial layer.

[0079] S2: electrically connecting the driving backplane located on the side of the light emitting element away from the epitaxial layer to the light emitting element.

[0080] S3: forming a first through groove on the epitaxial layer to expose at least a portion of the light emitting element.

[0081] S4: forming a light conversion block in the first through groove to convert the light emitted by the light emitting element.

[0082] In this embodiment, the thickness of the light conversion block is controlled by controlling the thickness of the epitaxial layer, and a plurality of high-density first through grooves are provided on the epitaxial layer so as to form light conversion blocks of arbitrary thickness and small size in the first through grooves. Since the light conversion blocks on the light-emitting elements are small in size, the pixel density of the display panel is improved; the thickness of the light conversion blocks can be adjusted according to the thickness of the epitaxial layer, thereby ensuring that the display panel has an excellent color gamut; and the high-density through grooves are directly connected to the light-emitting elements to form an integrated mosaic structure, which further improves the stability of the display panel.

[0083] See also Figure 8 , Figure 8 It is a schematic flow chart of a specific embodiment of a method for preparing a display panel provided in the present application.

[0084] In a specific embodiment, the method for preparing a display panel includes the following steps.

[0085] S11: forming an epitaxial layer on one side of the substrate.

[0086] See also Fig. 9 , Fig. 9 yes Figure 8 A schematic structural diagram corresponding to step S11 in a method for preparing a display panel is provided.

[0087] Specifically, a lattice adjustment sublayer and a lattice buffer sublayer are stacked in sequence on one side of the substrate 6. The lattice adjustment sublayer is arranged between the lattice buffer sublayer and the substrate 6. The lattice adjustment sublayer and the lattice buffer sublayer serve as an epitaxial layer 3. The epitaxial layer 3 includes a first side and a second side arranged opposite to each other. The side of the epitaxial layer 3 away from the substrate 6 is the first side, and the side of the epitaxial layer 3 close to the substrate 6 is the second side.

[0088] The epitaxial layer 3 is an inorganic material layer. Specifically, the material of the epitaxial layer 3 includes a III-V compound. For example, the epitaxial layer 3 includes at least one of gallium nitride and aluminum nitride. The thickness of the epitaxial layer 3 can be adjusted arbitrarily. In this embodiment, the thickness of the epitaxial layer 3 is not less than 6 microns.

[0089] The material of the substrate 6 includes at least one of silicon, silicon carbide and sapphire.

[0090] S12: forming a light emitting element on the surface of the first side of the epitaxial layer.

[0091] See also Fig.10 and Figure 11(a) to Figure 11(i), Fig.10 yes Figure 8 A schematic flow chart of a specific embodiment of step S12 in the method for preparing a display panel is provided; Figure 11(a) to Figure 11(i) yes Fig.10 A schematic structural diagram corresponding to each step in a method for preparing a display panel is provided.

[0092] The specific steps include:

[0093] S121: forming a common semiconductor layer, an active layer, and a semiconductor layer in a stacked manner in sequence on the surface of the first side of the epitaxial layer.

[0094] Specifically, a first material layer, a second material layer, and a third material layer can be sequentially grown on the surface of the first side of the epitaxial layer 3 by vapor deposition. The materials of the first material layer and the third material layer include at least one of silicon-doped gallium nitride and magnesium-doped gallium nitride. The material of the second material layer includes at least one of indium and phosphorus-doped gallium nitride materials.

[0095] Please refer to FIG. 11(a). The first, second and third material layers can be wet or dry etched using a mask to pattern the first, second and third material layers in sequence to obtain corresponding sequentially stacked common semiconductor layers 21, active layers 22 and semiconductor layers 23, wherein the unetched portion of the first material layer is used as the first common semiconductor portion 211, and the etched first material layer is used as the second common semiconductor portion 212. The thickness of the first common semiconductor portion 211 is greater than the thickness of the second common semiconductor portion 212, and the surface of the first common semiconductor portion 211 close to the epitaxial layer 3 is flush with the surface of the second common semiconductor portion 212 close to the epitaxial layer. Dry etching includes but is not limited to enhanced plasma etching; wet etching includes but is not limited to chemical etching.

[0096] S122: forming a protection layer on a side of the semiconductor layer away from the epitaxial layer, wherein the orthographic projection of the protection layer on the epitaxial layer covers the common semiconductor layer, the active layer, and the orthographic projection of the semiconductor layer on the epitaxial layer.

[0097] Specifically, referring to FIG. 11( b ), a protective layer 7 is formed on a side of the semiconductor layer 23 away from the epitaxial layer 3 by vapor deposition. The material of the protective layer 7 may be at least one of silicon dioxide and aluminum oxide. In another embodiment, the material of the protective layer 7 is a transparent insulating material.

[0098] S123: forming an optical reflective layer on the side of the protective layer away from the epitaxial layer.

[0099] Specifically, referring to FIG. 11( c ), a fourth material layer is formed on a surface of the protective layer 7 away from the epitaxial layer 3 by electron beam evaporation or sputtering, and a portion of the fourth material layer covering the second common semiconductor portion 212 is removed by dry etching or wet etching to form an optical reflective layer 8. The material of the optical reflective layer 8 includes at least one of copper, silver, aluminum, and molybdenum.

[0100] In another embodiment, a diffusion barrier layer may be deposited on the exposed surface of the optical reflective layer 8 to prevent metal ions from diffusing, which is beneficial to improving the efficiency of the light emitting device 2. The material of the diffusion barrier layer includes at least one of titanium, titanium nitride, tantalum nitride and chromium.

[0101] S124: forming a planarization layer.

[0102] Specifically, referring to FIG. 11( d ), a planarization layer 5 is formed on a side of the epitaxial layer 3 away from the substrate 6 by coating or chemical vapor deposition, and a surface of the planarization layer 5 away from the epitaxial layer 3 is subjected to chemical mechanical polishing, so that a surface of the optical reflective layer 8 away from the semiconductor layer 23 is flush with a surface of the planarization layer 5 away from the epitaxial layer 3. In other words, the optical reflective layer 8 is exposed on the surface of the planarization layer 5 away from the epitaxial layer 3.

[0103] In another embodiment, referring to FIG. 11( e ), the surface of the planarization layer 5 away from the epitaxial layer 3 may be further subjected to chemical mechanical polishing so that the surface of the protective layer 7 away from the semiconductor layer 23 is flush with the surface of the planarization layer 5 away from the epitaxial layer 3. In other words, the protective layer 7 is exposed on the surface of the planarization layer 5 away from the epitaxial layer 3.

[0104] S125: forming a bonding limiting layer on a side of the planarization layer away from the epitaxial layer.

[0105] Specifically, referring to FIG11(f), a bonding limiting layer 9 is formed on the surface of the planarization layer 5 away from the epitaxial layer 3 by chemical vapor deposition. The bonding limiting layer 9 may be made of at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, and zirconium oxide.

[0106] S126: forming an opening to expose the semiconductor layer.

[0107] Specifically, referring to FIG. 11( g ), a plurality of sixth through grooves 91 are formed on the bonding limiting layer 9 by dry etching or wet etching. The orthographic projection of the sixth through grooves 91 on the epitaxial layer 3 is within the orthographic projection range of the first common semiconductor portion 211 on the epitaxial layer 3 .

[0108] In one embodiment, when part of the optical reflective layer 8 is exposed through the sixth through groove 91, the optical reflective layer 8 exposed through the sixth through groove 91 is removed by dry etching or wet etching to form a second via hole 81 on the optical reflective layer 8, part of the protective layer 7 is exposed through the second via hole 81, and the second via hole 81 is connected to the sixth through groove 91. The protective layer 7 exposed through the second via hole 81 is removed by dry etching or wet etching to form a first via hole 71 on the protective layer 7, and part of the semiconductor layer 23 is exposed through the first via hole 71. The first via hole 71 is connected with the second via hole 81 and the sixth through groove 91, and the longitudinal axes of the first via hole 71, the second via hole 81 and the sixth through groove 91 are in the same straight line. The longitudinal axis is perpendicular to the first side surface of the epitaxial layer 3.

[0109] In another embodiment, referring to FIG. 11(h), when part of the protective layer 7 is exposed through the sixth through groove 91, the protective layer 7 exposed through the sixth through groove 91 is further removed by dry etching or wet etching to form a first via hole 71 on the protective layer 7, and part of the semiconductor layer 23 is exposed through the first via hole 71. The first via hole 71 is connected to the sixth through groove 91, and the longitudinal axes of the first via hole 71 and the sixth through groove 91 are in the same straight line.

[0110] S127: forming an electrode layer in the opening.

[0111] Specifically, referring to FIG. 11(i), a conductive material is deposited on the side of the bonding limiting layer 9 away from the planarization layer 5 by electroplating, sputtering or electron beam evaporation, and excess conductive material is removed by chemical mechanical polishing to form an electrode layer 24 in the first via hole 71 and the second via hole 81, and a conductive block 92 is formed in the sixth through groove 91. The conductive block 92 is integrally formed with the electrode layer 24, and the surface of the conductive block 92 away from the electrode layer 24 is flush with the surface of the bonding limiting layer 9 away from the planarization layer 5. The light-emitting element 2 is composed of the common semiconductor layer 21, the active layer 22, the semiconductor layer 23 and the electrode layer 24.

[0112] Figure 12(a) to Figure 12(h) yes Figure 8 Structural schematic diagrams corresponding to steps S13 to S17 in the method for preparing a display panel are provided.

[0113] S13: Bonding a driving backplane to a side of the light emitting element away from the substrate.

[0114] Specifically, the driving backplane 1 includes a driving substrate and a plurality of driving circuits arranged at intervals in the substrate, a plurality of conducting holes for exposing the driving circuits are arranged on one side surface of the driving substrate, and a conductive column is arranged in each conducting hole, wherein the end of the conductive column away from the driving circuit is flush with the surface of the driving substrate.

[0115] The material of the conductive column includes but is not limited to metal material. The driving substrate includes but is not limited to silicon-based driving substrate and low-temperature polysilicon LTPS driving substrate, and the driving circuit includes but is not limited to LED driving circuit.

[0116] Please refer to FIG. 12(a), one side surface of the exposed conductive column of the driving backplane 1 and one side surface of the exposed conductive block 92 of the bonding limiting layer 9 are respectively activated and pickled, and one side surface of the exposed conductive column of the driving backplane 1 is arranged opposite to one side surface of the exposed conductive block 92 of the bonding limiting layer 9. One side surface of the exposed conductive column of the driving backplane 1 and one side surface of the exposed conductive block 92 of the bonding limiting layer 9 are subjected to heterogeneous bonding treatment, so that the semiconductor layer 23 is electrically connected to the driving circuit through the conductive block 92 and the conductive column.

[0117] S14: forming a window on the epitaxial layer to expose the light emitting element.

[0118] Each pixel in the display panel 100 includes three sub-pixels, and the color displayed by each pixel is a combination of light of different colors emitted by the three sub-pixels. Since the light emitted by the three sub-pixels is different, the materials of the light conversion blocks 4 corresponding to the three sub-pixels are different. It is necessary to sequentially form light conversion blocks 4 made of different materials on the epitaxial layer 3. Multiple light conversion blocks 4 of the same material are synchronously manufactured.

[0119] In one embodiment, referring to FIG. 12( b ), second through-grooves 61 spaced apart from each other are formed in the substrate 6 by dry etching, and a portion of the epitaxial layer 3 is exposed through the second through-grooves 61. Each pixel corresponds to a second through-grooves 61. The orthographic projection of the first common semiconductor portion 211 on the driving backplane 1 is within the orthographic projection range of the second through-grooves 61 on the driving backplane 1.

[0120] The epitaxial layer 3 exposed by the second through groove 61 is removed by dry etching to form a first through groove 31 on the epitaxial layer 3, a portion of the first common semiconductor portion 211 is exposed by the first through groove 31, and the first through groove 31 is connected to the second through groove 61. In order to achieve the pixel density of the display panel 100, the width of the first through groove 31 is less than 5 microns. In this embodiment, the width of the first through groove 31 gradually increases in the direction away from the driving backplane 1, so that the light conversion block formed in the first through groove 31 has a better light-collecting effect.

[0121] In one embodiment, in order to further reduce optical crosstalk, the first common semiconductor portion 211 exposed by the first through groove 31 is etched by dry etching or wet etching to form a groove 2111 on the surface of the first common semiconductor portion 211 away from the active layer 22. The thickness of the first common semiconductor portion 211 is equal to the thickness of the second common semiconductor portion 212. And the surface of the second common semiconductor portion 212 away from the epitaxial layer 3 is higher than the bottom wall of the groove 2111 of the first common semiconductor portion 211.

[0122] S15: forming a light conversion block in the window.

[0123] Specifically, referring to FIG. 12(c), the first light conversion material is coated on the surface of the substrate 6 away from the epitaxial layer 3 by coating, so that the light conversion material fills the first through groove 31 and the second through groove 61 and covers the surface of the substrate 6. The first light conversion material is solidified by photolithography and heating to form a first light conversion material layer, and the surface of the first light conversion material layer away from the substrate 6 is flattened. The first light conversion material layer covering the surface of the substrate 6 where the second through groove 61 is not provided is removed by dry etching, so that the first through groove 31, the second through groove 61 and the first light conversion material layer exposed on the surface of the substrate 6 are used as the first light conversion block 41. The first light conversion block 41 can be a red light conversion block.

[0124] Referring to FIG. 12( d ), according to the specific implementation of step S14 and step S15, a second light conversion block 42 and a third light conversion block 43 are sequentially formed in the epitaxial layer 3. The second light conversion block 42 may be a green light conversion block, and the third light conversion block 43 may be a blue light conversion block. Specifically, each pixel includes a first light conversion block 41, a second light conversion block 42, and a third light conversion block 43.

[0125] S16: forming a window to expose the second common semiconductor portion.

[0126] Please refer to FIG. 12(e). In order to avoid optical crosstalk between adjacent sub-pixels and / or light conversion blocks 4 between adjacent pixels and improve the image quality of the display panel 100, seventh through grooves 62 spaced apart from each other are opened on the substrate 6 by dry etching, and part of the epitaxial layer 3 is exposed through the seventh through grooves 62. The seventh through grooves 62 are spaced apart from the second through grooves 61. The orthographic projection of the seventh through grooves 62 on the driving backplane 1 is within the orthographic projection area of ​​the second common semiconductor portion 212 on the driving backplane 1.

[0127] The epitaxial layers 3 exposed by the seventh through-grooves 62 are removed by dry etching to form fourth through-grooves 32 on the epitaxial layer 3. Part of the second common semiconductor portion 212 is exposed by the fourth through-grooves 32, and the seventh through-grooves 62 are connected to the fourth through-grooves 32. The fourth through-grooves 32 are spaced apart from the first through-grooves 31, and the width of the fourth through-grooves 32 is greater than the width of the first through-grooves 31.

[0128] In another embodiment, in order to further reduce optical crosstalk, please refer to Figure 12(f), the second common semiconductor portion 212 exposed by the fourth through groove 32 is etched by dry etching or wet etching to form a fifth through groove 2121 in the second common semiconductor portion 212, and a portion of the protective layer 7 is exposed through the fifth through groove 2121.

[0129] S17: forming an optical shielding block in the open window.

[0130] Please refer to FIG. 12( g ), when a portion of the second common semiconductor portion 212 is exposed through the opening, metal is filled in the fourth through groove 32 and the seventh through groove 62 by electroplating or sputtering to form an optical shielding block 33 .

[0131] Please refer to FIG. 12( h ), when a portion of the protective layer 7 is exposed through the opening, metal is filled in the fifth through groove 2121 , the fourth through groove 32 and the seventh through groove 62 by electroplating or sputtering to form an optical shielding block 33 .

[0132] In another embodiment, to simplify the process, please refer to Fig.13 , the substrate 6 can be removed before step S14 in the above embodiment, and the substrate 6 does not need to be etched in subsequent steps. Fig.14 , only the epitaxial layer 3 is dry-etched to form a first through groove 31 and a fourth through groove 32 that are spaced apart from each other, and a light conversion block 4 is formed in the first through groove 31 , and an optical shielding block 33 is formed in the fourth through groove 32 .

[0133] In the preparation method of the display panel provided in this embodiment, the thickness of the light conversion block is controlled by the thickness of the epitaxial layer, and a plurality of high-density first through grooves are arranged on the epitaxial layer so as to form light conversion blocks of arbitrary thickness and small size in the first through grooves. Since the light conversion blocks in the epitaxial layer are small in size, the pixel density of the display panel is improved; the thickness of the light conversion block can be adjusted according to the thickness of the epitaxial layer, thereby ensuring that the display panel has excellent display effect (color gamut, light conversion efficiency); and the first through grooves are directly connected to the light-emitting elements to form an integrated mosaic structure, which further improves the stability of the display panel.

[0134] The above are only implementation methods of the present application, and are not intended to limit the patent protection scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises: Driver backplane; A light emitting element is disposed on one side of the driving backplane and is electrically connected to the driving backplane; The epitaxial layer is arranged on a side of the light emitting element away from the driving back plate, and is provided with a first through groove, wherein at least a portion of the light emitting element is exposed in the first through groove; The light conversion block is at least partially received in the first through groove to convert the light emitted by the light emitting element.

2. The display panel according to claim 1, characterized in that: The display panel further comprises: A substrate, located at a side of the epitaxial layer away from the driving backplane, the substrate is provided with a second through groove, the second through groove is communicated with the first through groove, and the optical conversion block is at least partially accommodated in the second through groove and the first through groove; Preferably, the material of the substrate includes at least one of silicon, silicon carbide and sapphire.

3. The display panel according to claim 1, characterized in that: The display panel further comprises: a planarization layer, located between the driving back plate and the epitaxial layer, the planarization layer being provided with a third through groove, the third through groove being communicated with the first through groove, and the light emitting element being at least partially received in the third through groove; Preferably, the display panel further comprises a protective layer, the protective layer is formed between the light emitting element and the planarization layer, and the orthographic projection of the protective layer on the driving backplane covers the orthographic projection of the light emitting element on the driving backplane, and the protective layer is provided with a first via hole, and the light emitting element is electrically connected to the driving backplane via the first via hole; Preferably, the display panel further comprises an optical reflective layer formed at least between the protective layer and the planarization layer; Preferably, the optical reflective layer is further formed between the light emitting element and the driving backplane, the optical reflective layer is provided with a second via hole, the second via hole is connected to the first via hole, and the light emitting element is electrically connected to the driving backplane via the first via hole and the second via hole in sequence; Preferably, the material of the protective layer is an insulating transparent material, and the material of the optical reflective layer includes at least one of copper, silver, aluminum, molybdenum, chromium, titanium, titanium oxide, silicon oxide, aluminum oxide, silicon oxide, silicon nitride, and zirconium oxide.

4. The display panel according to claim 3, characterized in that: The light emitting element comprises a common semiconductor layer, an active layer, a semiconductor layer and an electrode layer which are sequentially stacked in a direction close to the driving backplane, and the active layer, the semiconductor layer and the electrode layer are located in the third through groove; Preferably, the refractive index of the protective layer and / or the optical reflective layer is smaller than the refractive index of the common semiconductor layer; Preferably, the refractive index of the common semiconductor layer is smaller than the refractive index of the epitaxial layer; Preferably, the common semiconductor layer includes a first common semiconductor portion located in the third through-groove and a second common semiconductor portion located outside the third through-groove; Preferably, the surface of the first common semiconductor portion away from the driving backplane is not higher than the surface of the second common semiconductor portion close to the driving backplane; Preferably, the first common semiconductor portion and the second common semiconductor portion are made in one piece, and the material of the first common semiconductor portion includes silicon and / or magnesium-doped gallium nitride; Preferably, the distance between the surface of the optical reflective layer close to the second common semiconductor portion and the driving backplane is greater than the distance between the surface of the first common semiconductor portion close to the optical conversion block and the driving backplane; Preferably, the common semiconductor layer is an N-type semiconductor layer, the semiconductor layer is a P-type semiconductor layer, and the electrode layer is a P-type electrode layer.

5. The display panel according to claim 4, characterized in that: The number of the first through-grooves is plural, and the epitaxial layer is further provided with a fourth through-groove, and the fourth through-groove is located between two adjacent first through-grooves; Preferably, the display panel further comprises an optical shielding block, at least a portion of which is disposed in the fourth through groove; Preferably, the optical shielding block comprises a metal material; Preferably, the material of the optical shielding block includes at least one of copper, aluminum, titanium and chromium; Preferably, there is a gap between the second common semiconductor parts in two adjacent light-emitting elements, and the optical shielding block extends into the gap through the fourth through groove, or the second common semiconductor parts in two adjacent light-emitting elements are connected; Preferably, the display panel further comprises: A bonding limiting layer, located between the driving back plate and the light emitting element, and a sixth through groove is provided for bonding the limiting layer; The conductive block is received in the sixth through slot and electrically connects the driving back plate and the light emitting element.

6. The display panel according to claim 1, characterized in that: The epitaxial layer comprises a stacked lattice adjustment sublayer and a lattice buffer sublayer; the lattice buffer sublayer is arranged between the lattice adjustment sublayer and the light emitting element, and the material of the epitaxial layer comprises a III-V group compound; preferably, the epitaxial layer comprises at least one of gallium nitride and aluminum nitride; And / or, the material of the light conversion block includes at least one of a quantum dot material and a fluorescent material; And / or, in a direction away from the driving back plate, the width of the first through groove increases gradually.

7. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 1 to 6.

8. A method for preparing a display panel, characterized in that: The method comprises: forming a light emitting element on a surface of the first side of the epitaxial layer; Electrically connecting a driving backplane located on a side of the light emitting element away from the epitaxial layer to the light emitting element; forming a first through groove on the epitaxial layer to expose at least a portion of the light emitting element; A light conversion block is formed in the first through groove to convert the light emitted by the light emitting element.

9. The method for preparing a display panel according to claim 8, characterized in that: Before forming the light emitting element on the surface of the first side of the epitaxial layer, the method further comprises: forming the epitaxial layer on one side of the substrate, wherein the substrate is located on a second side of the epitaxial layer; Before forming a first through groove on the epitaxial layer to expose at least a portion of the light emitting element, the method further includes: The substrate is removed.

10. The method for preparing a display panel according to claim 8, characterized in that: The step of forming a light emitting element on the surface of the first side of the epitaxial layer comprises: Sequentially forming a common semiconductor layer, an active layer, and a semiconductor layer stacked on the surface of the first side of the epitaxial layer; forming a protective layer on a side of the semiconductor layer facing away from the epitaxial layer, wherein a projection of the protective layer on the epitaxial layer covers the common semiconductor layer, the active layer, and an orthographic projection of the semiconductor layer on the epitaxial layer; Opening the protective layer to expose the semiconductor layer; forming an electrode layer in the opening; Preferably, the step of sequentially forming a common semiconductor layer, an active layer and a semiconductor layer stacked on the surface of the first side of the epitaxial layer comprises: sequentially forming a first material layer, a second material layer and a third material layer on the surface of the first side of the epitaxial layer; Performing patterning on the third material layer to obtain the semiconductor layer; performing patterning on the second material layer to obtain the active layer; The first material layer is patterned to obtain the common semiconductor layer; the common semiconductor layer includes a first common semiconductor portion disposed between the active layer and the optical conversion block and a second common semiconductor portion not in contact with the active layer; Preferably, before the opening is formed on the protective layer to expose the semiconductor layer, the method further comprises: forming an optical reflective layer on a side of the protective layer away from the epitaxial layer; Preferably, before the step of forming a light conversion block in the first through groove to convert the light emitted by the light emitting element, the method further includes: Etching the first common semiconductor portion exposed by the first through groove to form a groove on a side of the first common semiconductor portion away from the driving back plate; Preferably, before or after the step of forming a light conversion block in the first through groove to convert the light emitted by the light emitting element, the method further includes: Etching the epitaxial layer to form a fourth through-groove; the fourth through-groove is spaced apart from the first through-groove; The fourth through groove is filled with metal to form an optical shielding block.

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