A satellite-borne clock network system and a master-backup switching method

Abstract

The invention discloses a satellite-borne clock network system and a master-slave switching method, belonging to the field of satellite technology; the system comprises a baseband processing and control unit clock generating module and a signal processing unit clock generating module; the baseband processing and control unit clock generating module and the signal processing unit clock generating module both comprise a split-and-combine network, wherein the baseband processing and control unit clock generating module further comprises two amplification modules respectively serving as a master and a backup, and the signal processing unit clock generating module further comprises two frequency synthesis modules respectively serving as a master and a backup; in view of the characteristics that the signal systems and clock requirements of boards and cards for multi-beam processing are the same, a dual-backup centralized frequency synthesis architecture is designed, which reduces the development cost of the equipment while ensuring reliability, and provides support for the comprehensive processing payload equipment of satellite-borne multi-beam communication.

Description

Technical Field

[0001] The invention relates to a satellite-borne clock network system suitable for multi-beam satellite communication, belongs to the field of satellite technology, and is particularly suitable for satellite-borne equipment with large-scale information processing, multi-beam multi-board design, multiple clock requirements, high reliability requirements, and low cost. Background Art

[0002] The functional integration of satellite-borne electronic products is becoming increasingly higher. In multi-beam satellite communication processing systems, each beam processing board requires a high-performance synchronous working clock, and high-performance high-speed ADC and DAC circuits have very stringent requirements on clock performance. Traditionally, a distributed clock network is used, and a frequency synthesis module is designed for each beam. The disadvantage is that the frequency synthesis module is configured for each beam, which is relatively large in size, weight and cost, and the reliability is relatively low due to the lack of backup. Summary of the invention

[0003] In response to the problems existing in the above-mentioned background technology, the feature of the present invention is that a dual-backup centralized frequency synthesis architecture is designed based on the characteristics of the same signal system and the same clock requirements of the multi-beam processing boards. While ensuring reliability, the development cost of the equipment is reduced, providing support for the comprehensive processing payload equipment of satellite-borne multi-beam communications.

[0004] The technical solution of the present invention is achieved in this way:

[0005] A satellite-borne clock network system suitable for multi-beam satellite communications, comprising a baseband processing and control unit clock generation module and a signal processing unit clock generation module;

[0006] The baseband processing and control unit clock generation module and the signal processing unit clock generation module both include a split-and-combine network, wherein the baseband processing and control unit clock generation module also includes two amplification modules as a main and a backup respectively, and the signal processing unit clock generation module also includes two frequency synthesis modules as a main and a backup respectively;

[0007] The amplification module includes an amplifier II and a two-way splitter, the input end of the amplifier II is connected to the output end of the two-way splitter, and the output end of the amplifier II is connected to the corresponding split port of the split-and-combine network of the baseband processing and control unit clock generation module;

[0008] The frequency synthesis module includes an amplifier I and a phase-locked loop, the input end of the amplifier I is connected to the output end of the phase-locked loop, and the output end of the amplifier I is connected to the corresponding branch port of the branching network of the signal processing unit clock generation module;

[0009] The other output port of the two-way splitter is connected to one of the input ports of the corresponding phase-locked loop. The input end of the two-way splitter receives the clock reference and forwards the clock reference to the phase-locked loop; the other input end of the phase-locked loop receives the parameter configuration information sent by the PLL configuration module.

[0010] Furthermore, the splitter-combiner network of the baseband processing and control unit clock generation module includes two N splitters and multiple two-combiners II, wherein N≥2; the input end of each two-combiner II is connected to the output ends of the two N splitters.

[0011] Furthermore, the splitter-combiner network of the signal processing unit clock generation module includes two M splitters and multiple two-combiners I, where M≥2; the input end of each two-combiner I is connected to the output ends of two N splitters.

[0012] A master-backup switching method of a satellite-borne clock network system suitable for multi-beam satellite communication is implemented by a satellite-borne clock network system suitable for multi-beam satellite communication. The specific process is as follows:

[0013] The system is powered on, and the main control unit to which a PLL configuration module belongs completes the startup initialization; the PLL configuration module configures the phase-locked loop frequency parameters of the frequency synthesis module corresponding to the clock generation module of the signal processing unit; the main control unit returns the telemetry information of the successful configuration to the satellite platform through the remote control telemetry channel, and at the same time, the main control unit notifies the signal processing unit to start working and monitor the phase-locked loop status;

[0014] When a problem occurs in the clock network of the signal processing unit or the baseband processing unit, the main control unit returns a telemetry abnormal signal through the remote control telemetry channel, and the satellite platform sends a shutdown command to the main control unit through the remote control telemetry channel, and the main control unit shuts down;

[0015] The satellite platform sends a power-on command to the standby control unit through the remote control telemetry channel, and then the standby control unit is powered on; when the standby control unit is powered on, its PLL configuration module configures the phase-locked loop frequency parameters of the frequency synthesis module corresponding to the clock generation module of the signal processing unit; the standby control unit returns the telemetry information of the successful configuration to the satellite platform through the remote control telemetry channel, and at the same time, the standby control unit notifies the signal processing unit to start working and monitor the phase-locked loop status.

[0016] Compared with the background technology, the present invention has the advantages of:

[0017] The present invention designs a passive split-and-combine network and an active dual-backup phase-locked loop, realizes the interface conversion from centralized to distributed phase-locked loop, and can receive remote control and telemetry signals through the control unit for health management;

[0018] The split-and-combine network designed by the present invention is realized by using passive devices such as multiple splitters, dual combiners and interconnection lines, and has high reliability, low power consumption and low cost;

[0019] The present invention adopts a completely independent cold backup phase-locked loop and independent reference clock input and output, thereby avoiding single point failure and ensuring the reliability of the system.

[0020] The device cost can be reduced. By using this design, the cost of the clock network of the multi-beam satellite communication system can be reduced.

[0021] The present invention can reduce volume, weight and power consumption: the frequency synthesis modules of multiple beams are centrally designed, thereby eliminating the volume, weight and power consumption of the frequency synthesis module of each beam.

[0022] The present invention can improve reliability: the clock module can avoid single point failure through redundant backup. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a block diagram of a satellite-borne clock network system suitable for multi-beam satellite communications of the present invention;

[0024] Figure 2 The invention discloses a working process of a satellite-borne clock network system suitable for multi-beam satellite communication. DETAILED DESCRIPTION

[0025] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] like Figure 1 As shown, a satellite-borne clock network system suitable for multi-beam satellite communication includes functions such as: a baseband processing and control unit clock generation module, which includes an amplification module (main), an amplification module (backup) and a splitter-combiner network; wherein the amplification module (main) includes two splitters and an amplifier (main), the amplification module (backup) includes two splitters and an amplifier (backup), and the splitter-combiner network includes N splitters (N is the same as the number of baseband units) and two combiners.

[0027] The signal processing unit clock generating module and the signal processing unit clock generating module include: a frequency synthesis module (main part), a frequency synthesis module (backup) and a separation and combination network; wherein, the frequency synthesis module (main part) includes a phase-locked loop (main part) and an amplifier (main part), the frequency synthesis module (backup) includes a phase-locked loop (backup) and an amplifier (backup), and the separation and combination network includes M splitters (M is the same as the number of signal processing units) and two combiners.

[0028] The control unit (master) includes the PLL configuration module and the master power supply module, etc.

[0029] The control unit (backup) includes a PLL configuration module and a backup power supply module, etc.

[0030] like Figure 2 As shown, the working principle is as follows: after the single machine is powered on, the system defaults to power on the control unit (master), all the master circuits are powered on, and after the control unit (master) completes the startup initialization, the control unit (master) receives the frequency parameters configured by the satellite platform through the remote control telemetry channel, and the control unit (master) PLL configuration module configures the frequency parameters of the phase-locked loop (master) of the frequency synthesis module of the signal processing unit clock generation module. After the phase-locked loop (master) is locked, the control unit (master) returns the successfully configured telemetry information to the satellite platform through the remote control telemetry channel. At the same time, the control unit (master) notifies the signal processing unit to start working and monitor the phase-locked loop status. When there is a problem with the clock network of the signal processing unit or the baseband processing unit, the control unit (master) returns a telemetry abnormal signal through the remote control telemetry channel, and the satellite platform sends a shutdown command to the control unit (master) through the remote control telemetry channel, and then the control unit (master) shuts down; the satellite platform sends a startup command to the control unit (backup) through the remote control telemetry channel, and then the control unit (backup) starts up; the working principle of the control unit (backup) after startup is the same as that of the master.

[0031] The above is only an embodiment of the invention, but the invention is not limited to the embodiment. Those skilled in the art can make various equivalent modifications or substitutions without violating the spirit and principle of the invention, and these equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A satellite-borne clock network system suitable for multi-beam satellite communication, comprising a baseband processing and control unit clock generation module and a signal processing unit clock generation module; characterized in that: Also includes two PLL configuration modules that back up each other; The baseband processing and control unit clock generation module and the signal processing unit clock generation module both include a split-and-combine network, wherein the baseband processing and control unit clock generation module also includes two amplification modules as a main and a backup respectively, and the signal processing unit clock generation module also includes two frequency synthesis modules as a main and a backup respectively; The amplification module includes an amplifier II and a two-way splitter, the input end of the amplifier II is connected to the output end of the two-way splitter, and the output end of the amplifier II is connected to the corresponding split port of the split-and-combine network of the baseband processing and control unit clock generation module; The frequency synthesis module includes an amplifier I and a phase-locked loop, the input end of the amplifier I is connected to the output end of the phase-locked loop, and the output end of the amplifier I is connected to the corresponding branch port of the branching network of the signal processing unit clock generation module; Another output port of the two-way splitter is connected to one of the input ports of the corresponding phase-locked loop, and the input end of the two-way splitter receives the clock reference and forwards the clock reference to the phase-locked loop; the other input end of the phase-locked loop receives the parameter configuration information issued by the PLL configuration module; The baseband processing and control unit clock generation module of the splitter network includes two N splitters and a plurality of two combiners II, wherein N ≥ 2; each of the two combiners II input end are connected to the output end of the two N splitters; The splitting and combining network of the signal processing unit clock generating module includes two M splitters and multiple two-combiners I, wherein M≥2; the input end of each two-combiner I is connected to the output ends of two N splitters.

2. A master-backup switching method for a satellite-borne clock network system suitable for multi-beam satellite communications, characterized in that: The onboard clock network system suitable for multi-beam satellite communication as described in claim 1 is implemented, and the specific process is as follows: The system is powered on, and the main control unit to which a PLL configuration module belongs completes the startup initialization; the PLL configuration module configures the phase-locked loop frequency parameters of the frequency synthesis module corresponding to the clock generation module of the signal processing unit; the main control unit returns the telemetry information of the successful configuration to the satellite platform through the remote control telemetry channel, and at the same time, the main control unit notifies the signal processing unit to start working and monitor the phase-locked loop status; When a problem occurs in the clock network of the signal processing unit or the baseband processing unit, the main control unit returns a telemetry abnormal signal through the remote control telemetry channel, and the satellite platform sends a shutdown command to the main control unit through the remote control telemetry channel, and the main control unit shuts down; The satellite platform sends a power-on command to the standby control unit through the remote control telemetry channel, and then the standby control unit is powered on; when the standby control unit is powered on, its PLL configuration module configures the phase-locked loop frequency parameters of the frequency synthesis module corresponding to the clock generation module of the signal processing unit; the standby control unit returns the telemetry information of the successful configuration to the satellite platform through the remote control telemetry channel, and at the same time, the standby control unit notifies the signal processing unit to start working and monitor the phase-locked loop status.

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