Second-level BOOT storage point screening method and device, electronic equipment and storage medium
By using XOR operation and DMA data length evaluation in NAND Flash memory, high-quality page is selected as the second-level BOOT storage point, the problems of insufficient BOOT position evaluation and low space utilization in the prior art are solved, and a higher stability, safety and performance.
Patent Information
- Application Number
- CN202411153237.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-21
- Publication Date
- 2025-01-03
AI Technical Summary
The secondary BOOT screening algorithm of existing NAND Flash memory cannot comprehensively evaluate the stability and reliability of the BOOT location, resulting in an increased risk of startup failure, low space utilization, lack of flexibility, and cannot meet the needs of different devices and application scenarios.
Scan the NAND flash memory controller in order of incremental physical block number, use XOR operation to verify the integrity of BOOT data, evaluate the page storage quality based on the DMA data length, select high-quality page as the second-level BOOT storage point, and determine the storage parameters to ensure that Data integrity and availability, optimize storage layout and space utilization.
It improves the stability and security of system startup, improves the utilization rate and overall performance of flash memory space, solves the problems of insufficient stability and reliability evaluation and low space utilization, and provides a flexible storage strategy.
Smart Images
Figure CN119248180A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of data storage and optimization, and in particular to a secondary BOOT storage point screening method, device, electronic equipment and storage medium. Background Art
[0002] In the application field of NAND Flash memory, especially in scenarios such as solid-state drives, mobile devices and memory cards, BOOT boot is a key step to ensure the normal startup and operation of the device. Currently, BOOT boot is usually designed as two levels, which aims to improve the flexibility and security of boot.
[0003] However, the existing second-level BOOT screening algorithm has many shortcomings: it cannot comprehensively evaluate the stability and reliability of each potential BOOT location in NAND Flash, thereby increasing the risk of device boot failure; it is too conservative and fails to fully utilize the storage space of NAND Flash, resulting in space waste; different devices and application scenarios may have different requirements for BOOT locations, but the existing algorithm may lack sufficient flexibility to meet these differentiated requirements.
[0004] In summary, the two-level BOOT mechanism of NAND Flash memory plays an important role in improving the efficiency and security of device startup, but the existing second-level BOOT screening algorithm still has shortcomings in terms of security, space utilization and flexibility.
[0005] Therefore, there is an urgent need for a more flexible and efficient secondary BOOT storage point screening method that can improve space utilization, performance and data security. Summary of the invention
[0006] The embodiments of the present invention provide a secondary BOOT storage point screening method to solve the problems that the prior art cannot fully evaluate the stability and reliability of each potential BOOT location, cannot fully utilize the storage space of NAND Flash, and lacks sufficient flexibility. The technical solution is as follows:
[0007] According to one aspect of the present invention, a secondary BOOT storage point screening method is provided, the method comprising: scanning physical blocks in a NAND flash memory in ascending order of physical block numbers through a NAND flash memory controller, and when locating a first-level BOOT, reading data in the physical block where the first-level BOOT is located to obtain BOOT data; verifying the integrity and availability of the BOOT data by using an XOR operation, and if the verification passes, recording the block number and verification result of the physical block where the first-level BOOT is located, otherwise, continuing to scan the next physical block until the verification passes; evaluating the storage quality of each page in the physical block where the first-level BOOT is located according to the DMA data length, and obtaining a page queue according to the storage quality; selecting one or more pages as storage points of a second-level BOOT according to the accuracy and length of sectors inside each page in the page queue, and determining the storage parameters of the storage points.
[0008] In one of the embodiments, a NAND flash memory controller is used to scan physical blocks in a NAND flash memory in ascending order of physical block numbers, and when a first-level BOOT is located, data in the physical block where the first-level BOOT is located is read to obtain BOOT data through the following steps: initializing the NAND flash memory, determining a starting block number according to a physical block organization structure of the NAND flash memory, and selecting physical blocks in the NAND flash memory one by one in sequence starting from the starting block number through a NAND flash memory controller; comprehensively scanning the selected physical blocks, reading data of all pages in the physical blocks, and when the first-level BOOT is read, data in the physical block where the first-level BOOT is located is read to obtain BOOT data.
[0009] In one of the embodiments, an XOR operation is used to verify the integrity and availability of the BOOT data. If the verification passes, the block number and the verification result of the physical block where the first-level BOOT is located are recorded. Otherwise, the next physical block is scanned until the verification passes through the following steps: the BOOT data is read and an XOR operation is performed on the set check value to obtain an XOR verification result. If the XOR verification result meets the set conditions, the block number and the XOR verification result of the physical block where the first-level BOOT is located are recorded; if the XOR verification result does not meet the set conditions, the next physical block is scanned in block number order until the XOR verification result meets the set conditions.
[0010] In one of the embodiments, the storage quality of each page in the physical block where the first-level BOOT is located is evaluated according to the DMA data length, and the page queue is obtained according to the storage quality through the following steps: the physical block where the first-level BOOT is located and whose XOR verification result meets the set conditions is selected as the inspection object, and an empty page queue is initialized; the page queue is used to store the numbers of the pages that meet the requirements; all pages are traversed starting from the first page of the inspection object, and the DMA data length is cyclically checked for each page to obtain the storage quality, and each page is evaluated and screened according to the storage quality to obtain the Page queue.
[0011] In one of the embodiments, a DMA data length cyclic check is performed on each page to obtain storage quality, and each page is evaluated and screened according to the storage quality to obtain a Page queue, which is implemented by the following steps: setting a check unit based on the DMA data length; the DMA data length is used to indicate the amount of data processed by the page each time; dividing the data of the page into multiple segments of DMA length, and checking the integrity, error rate and whether bad block marks are included in these segments one by one to obtain the storage quality of the page; if the storage quality of the page meets the preset requirements, the page number is added to the page queue, and the page queue is obtained when all pages are checked.
[0012] In one of the embodiments, one or more pages are selected as storage points of the second-level BOOT according to the accuracy and length of sectors within each page in the page queue, and the storage parameters of the storage points are determined by the following steps: traversing each page in the page queue, checking the sectors within each page in the page queue, and obtaining pages whose sectors are continuous and meet the storage requirements; calculating and recording the longest length of the continuous and compliant sectors; the longest length of the sectors is used to evaluate whether the page can be used as a second-level BOOT storage point; sorting the pages according to the longest length of the sectors, and determining the second-level BOOT storage point and the storage parameters of the storage point from the sorted pages according to the demand factors.
[0013] In one of the embodiments, the demand factors include the size requirement of the second-level BOOT, the requirement for redundant backup, the requirement for the maximum length of sectors, the overall capacity of the NAND flash memory, the physical location of the page, and the relative location of the page and other key data; the storage parameters include the number of the starting sector, the storage length, the data verification method, and the redundant backup strategy; the storage parameters are determined based on the specific requirements of the second-level BOOT and the physical characteristics of the NAND flash memory.
[0014] According to one aspect of the present invention, a secondary BOOT storage point screening device comprises: a first-level BOOT positioning module, which is used to scan the physical blocks in the NAND flash memory according to the ascending order of the physical block numbers through the NAND flash memory controller, and when the first-level BOOT is located, read the data in the physical block where the first-level BOOT is located to obtain the BOOT data; a first-level BOOT verification module, which is used to verify the integrity and availability of the BOOT data by using an XOR operation, if the verification is passed, record the block number and the verification result of the physical block where the first-level BOOT is located, otherwise, continue to scan the next physical block until the verification is passed; a page quality evaluation module, which is used to evaluate the storage quality of each page in the physical block where the first-level BOOT is located according to the DMA data length, and obtain a page queue according to the storage quality; a second-level BOOT screening module, which is used to select one or more pages as the storage points of the second-level BOOT according to the accuracy and length of the sectors inside each page in the page queue, and determine the storage parameters of the storage points.
[0015] According to one aspect of the present invention, an electronic device includes at least one processor and at least one memory, wherein the memory stores computer-readable instructions; the computer-readable instructions are executed by one or more of the processors, so that the electronic device implements the secondary BOOT storage point screening method as described above.
[0016] According to one aspect of the present invention, a storage medium stores computer-readable instructions thereon, wherein the computer-readable instructions are executed by one or more processors to implement the secondary BOOT storage point screening method as described above.
[0017] The beneficial effects brought by the technical solution provided by the present invention are:
[0018] In the above technical scheme, the present invention first scans the physical blocks in the NAND flash memory in the ascending order of the physical block numbers through the NAND flash memory controller, and when the first-level BOOT is located, the data in the physical block where the first-level BOOT is located is read to obtain the BOOT data, and the integrity and availability of the BOOT data are verified by using an XOR operation. If the verification is successful, the block number and the verification result of the physical block where the first-level BOOT is located are recorded. Otherwise, the next physical block is scanned until the verification is successful, and the storage quality of each page in the physical block where the first-level BOOT is located is evaluated according to the DMA data length, and a page queue is obtained according to the storage quality. One or more pages are selected as the storage point of the second-level BOOT according to the accuracy and length of the sectors inside each page in the page queue, and the storage parameters of the storage point are determined. The integrity and availability of the BOOT data are ensured through the incremental scanning of the physical blocks and the XOR verification, and the stability and security of the system startup are improved. By evaluating the page storage quality based on the DMA data length, a high-quality page is selected as the second-level BOOT storage point, and the data storage layout is further optimized, and the flash memory space utilization and overall performance are improved, thereby effectively solving the problem that the prior art cannot comprehensively evaluate the stability and reliability of each potential BOOT position and cannot fully utilize the NAND The Flash storage space lacks sufficient flexibility. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in describing the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without creative work.
[0020] Figure 1 is a flow chart of a secondary BOOT storage point screening method according to an exemplary embodiment;
[0021] Figure 2 This is a flowchart for determining whether a BOOT node is available in an application scenario;
[0022] Figure 3 yes Figure 2 Schematic diagram of the process of processing page data in the corresponding application scenario;
[0023] Figure 4 yes Figure 2 Schematic diagram of the process of optimizing the storage of page data in the corresponding application scenario;
[0024] Figure 5 is a block diagram of a secondary BOOT storage point screening device according to an exemplary embodiment;
[0025] Figure 6 is a hardware structure diagram of an electronic device according to an exemplary embodiment;
[0026] Figure 7 It is a block diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION
[0027] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be interpreted as limiting the present invention.
[0028] It will be understood by those skilled in the art that, unless expressly stated, the singular forms "one", "said", and "the" used herein may also include plural forms. It should be further understood that the term "comprising" used in the specification of the present disclosure refers to the presence of the features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It should be understood that when we refer to an element as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intermediate elements. In addition, the "connection" or "coupling" used herein may include wireless connection or wireless coupling. The term "and / or" used herein includes all or any unit and all combinations of one or more associated listed items.
[0029] The present invention provides a secondary BOOT storage point screening method, which ensures the integrity and availability of BOOT data through physical block incremental scanning and XOR verification, improves the stability and security of system startup, and solves the problems that the prior art cannot comprehensively evaluate the stability and reliability of each potential BOOT position, cannot fully utilize the storage space of NAND Flash, and lacks sufficient flexibility. The secondary BOOT storage point screening method is suitable for a secondary BOOT storage point screening device, which can be an electronic device. The secondary BOOT storage point screening method in the embodiment of the present invention can be applied to a variety of scenarios, such as secondary BOOT storage point screening, etc.
[0030] See also Figure 1 , an embodiment of the present invention provides a secondary BOOT storage point screening method, which is applicable to electronic equipment.
[0031] In the following method embodiments, for ease of description, the execution subject of each step of the method is taken as an electronic device as an example for illustration, but this does not constitute a specific limitation.
[0032] like Figure 1 As shown, the method may include the following steps:
[0033] Step 110, through the NAND flash memory controller, scan the physical blocks in the NAND flash memory in ascending order of the physical block numbers, and when the first-level BOOT is located, read the data in the physical block where the first-level BOOT is located to obtain the BOOT data.
[0034] In one possible implementation, the NAND flash memory is initialized, the starting block number is determined according to the physical block organization structure of the NAND flash memory, the physical blocks in the NAND flash memory are selected one by one in sequence starting from the starting block number through the NAND flash memory controller, the selected physical blocks are fully scanned, and the data of all pages in the physical blocks are read. When the first-level BOOT is read, the data in the physical block where the first-level BOOT is located is read to obtain the BOOT data.
[0035] Step 130, using an XOR operation to verify the integrity and availability of the BOOT data, if the verification is successful, then record the block number of the physical block where the first-level BOOT is located and the verification result, otherwise continue to scan the next physical block until the verification is successful.
[0036] In one possible implementation, the BOOT data is read and XORed with the set check value to obtain an XOR verification result. If the XOR verification result meets the set conditions, the block number of the physical block where the first-level BOOT is located and the XOR verification result are recorded. If the XOR verification result does not meet the set conditions, the next physical block is scanned in block number order until the XOR verification result meets the set conditions.
[0037] Step 150 , evaluating the storage quality of each page in the physical block where the first-level BOOT is located according to the DMA data length, and obtaining a page queue according to the storage quality.
[0038] In a possible implementation, the physical block where the first-level BOOT whose XOR verification result meets the set conditions is located is selected as the inspection object, an empty page queue is initialized, all pages are traversed starting from the first page of the inspection object, and a DMA data length loop check is performed on each page to obtain storage quality, and each page is evaluated and screened according to the storage quality to obtain a Page queue.
[0039] The page queue is used to store the page numbers that meet the requirements.
[0040] In a possible implementation, a check unit based on DMA data length is set, the page data is divided into multiple DMA length segments, and the integrity, error rate and whether the bad block mark is included in these segments are checked one by one to obtain the storage quality of the page. If the storage quality of the page meets the preset requirements, the page number is added to the page queue. When all pages are checked, the page queue is obtained.
[0041] The DMA data length is used to indicate the amount of data processed by a page each time.
[0042] Step 170 , selecting one or more pages as storage points of the second-level BOOT according to the accuracy and length of sectors within each page in the page queue and determining storage parameters of the storage points.
[0043] In one possible implementation, each page in the page queue is traversed, sectors inside each page in the page queue are checked, and pages whose sectors are continuous and meet the storage requirements are obtained, the longest length of the continuous and qualified sectors is calculated and recorded, the pages are sorted according to the longest length of the sectors, and the second-level BOOT storage point and the storage parameters of the storage point are determined from the sorted pages according to the demand factors.
[0044] Among them, the longest length of sectors is used to evaluate whether the page can be used as the second-level BOOT storage point.
[0045] In a possible implementation, the demand factors include the size requirement of the second-level BOOT, the requirement for redundancy, the requirement for the maximum length of sectors, the overall capacity of the NAND flash memory, the physical location of the page, and the relative location of the page to other key data.
[0046] In a possible implementation, the storage parameters include the number of the starting sector, the storage length, the data verification method, and the redundancy backup strategy.
[0047] The storage parameters are determined based on the specific requirements of the second-level BOOT and the physical characteristics of the NAND flash memory.
[0048] Through the above process, the present invention first scans the physical blocks in the NAND flash memory in the ascending order of the physical block numbers through the NAND flash memory controller, and when the first-level BOOT is located, the data in the physical block where the first-level BOOT is located is read to obtain the BOOT data, and the integrity and availability of the BOOT data are verified by using an XOR operation. If the verification is successful, the block number and the verification result of the physical block where the first-level BOOT is located are recorded, otherwise, the next physical block is continuously scanned until the verification is successful, and the storage quality of each page in the physical block where the first-level BOOT is located is evaluated according to the DMA data length, and a page queue is obtained according to the storage quality. One or more pages are selected as storage points of the second-level BOOT according to the accuracy and length of the sectors inside each page in the page queue, and the storage parameters of the storage points are determined. Through the incremental scanning of the physical blocks and the XOR verification, the integrity and availability of the BOOT data are ensured, and the stability and security of the system startup are improved. By evaluating the page storage quality based on the DMA data length and selecting a high-quality page as the second-level BOOT storage point, the data storage layout is further optimized, and the flash memory space utilization and overall performance are improved, thereby effectively solving the problem that the prior art cannot comprehensively evaluate the stability and reliability of each potential BOOT position and cannot fully utilize the NAND The Flash storage space lacks sufficient flexibility.
[0049] In one application scenario, Figure 2 , Figure 3 and Figure 4 A flow chart of a secondary BOOT storage point screening method is shown.
[0050] like Figure 2 As shown, determining whether the BOOT node is available may include the following steps:
[0051] Step S01, the system selects a fixed first-level BOOT point and obtains the block number corresponding to the point.
[0052] Step S02, the program scans all the data on the block and obtains difference information by comparing the written data with the read data, that is, performing an XOR operation.
[0053] Step S03, the system determines whether the BOOT point is available based on the above difference data. If the data is consistent, it indicates that the BOOT point is normal and the process ends; if it is inconsistent, there may be a problem with the BOOT point.
[0054] Furthermore, if the current BOOT point is unavailable, the system jumps to step S01 to continue running, that is, reselecting a BOOT point and repeating the scanning and judgment until an available BOOT point is found or it is confirmed that all candidate BOOT points are unavailable.
[0055] Through the above process, the embodiment of the present invention ensures the correctness and availability of the BOOT node, which is an indispensable part of the system startup or recovery process.
[0056] like Figure 3 As shown, processing page data may include the following steps:
[0057] Step S04, all the page data corresponding to the first-level BOOT point in the scanned XOR data are set to 0xFF as an initial state.
[0058] Step S05, loop according to the number of pages on the page, process each page one by one, set uBitError to 0, and end the process if the operation fails.
[0059] Step S06, in each page, first loop according to the DMA length, and reset the error counter uErrorCnt to 0 to record the error situation in the current page. If the operation fails, jump to step S13.
[0060] Step S07, loop again according to the number of DMAs on the page, and perform a detailed check on each DMA data. If the operation fails, jump to step S11.
[0061] Step S08, in the DMA data cycle, first calculate the current index position.
[0062] Step S09, then check whether the data at the index position in the XOR data is 0, if it is 0, jump to step S07.
[0063] Step S10: If the data is not 0, it indicates that there is a potential error, and uErrorCnt is increased by 1.
[0064] Step S11, determining whether uErrorCnt reaches or exceeds 3 times.
[0065] Step S12: When uErrorCnt reaches or exceeds 3 times in total, it is considered that the page has significant errors, and uBitError is increased by 1.
[0066] Step S13, determine whether uBitError is greater than or equal to 10. If uBitError reaches or exceeds 10, it means that the page is seriously damaged, and the process jumps to step S05.
[0067] Step S14: After the above error detection, if the current page is considered to be still available, that is, not directly excluded due to too many errors, it is added to the available page queue for subsequent use, and the process jumps to step S05. When all pages are processed according to this process, the whole process ends.
[0068] Through the above process, the embodiment of the present invention detects and processes potential errors in page data through sophisticated loop traversal, error detection and recording, and page availability judgment, and finally filters out available pages, thereby achieving effective processing and screening of page data and ensuring that subsequent operations can be performed based on reliable data.
[0069] like Figure 4 As shown, page data optimized storage may include the following steps:
[0070] Step S15: the system traverses all available page queues.
[0071] Step S16, for each page, the number of error bits contained in the setor length of each sector in each page is calculated by XOR.
[0072] Step S17, screening out sectors that meet the storage requirements from these sectors.
[0073] Step S18, determining the length of the continuous sectors among the sectors that meet the requirements.
[0074] Step S19, record the continuous correct sector length and starting address of each page, and the process jumps to step S15.
[0075] Step S20, after the page queue cycle is completed, the continuous correct sector lengths of all pages are sorted from large to small, so as to select the optimal page for data storage later.
[0076] Step S21, determining whether there are 32 pages, if the total number of pages does not reach 32, the process ends.
[0077] Step S22: If the total number of pages reaches or exceeds 32, the first 32 pages in the queue are selected as storage targets.
[0078] Step S23: For these 32 pages, the system further determines the minimum value of the continuous correct sector length among them to ensure that all pages can store data of the same length and maximize storage efficiency.
[0079] Step S24: These 32 pages can only store data of minimum length.
[0080] Step S25, storing the second level BOOT data into these pages in sequence.
[0081] Through the above process, the embodiment of the present invention stores the second-level BOOT data in these 32 pages in sequence until all pages are fully utilized. This process effectively improves the continuity and efficiency of data storage and ensures the integrity and reliability of data during the storage process. After the entire process is completed, the page data is optimized and stored, providing a solid foundation for subsequent data processing.
[0082] Through the above process, the embodiment of the present invention ensures the integrity and availability of BOOT data through incremental scanning and XOR verification of physical blocks, improves the stability and security of system startup, and selects high-quality pages as second-level BOOT storage points by evaluating page storage quality based on DMA data length, further optimizes the data storage layout, improves flash memory space utilization and overall performance, thereby effectively solving the problems that the prior art cannot comprehensively evaluate the stability and reliability of each potential BOOT position, cannot fully utilize the storage space of NAND Flash, and lacks sufficient flexibility.
[0083] The following is an embodiment of the device of the present invention, which can be used to execute the secondary BOOT storage point screening method involved in the present invention. For details not disclosed in the embodiment of the device of the present invention, please refer to the method embodiment of the secondary BOOT storage point screening method involved in the present invention.
[0084] See also Figure 5 , an embodiment of the present invention provides a secondary BOOT storage point screening device 800.
[0085] The secondary BOOT storage point screening device 800 includes but is not limited to: a first-level BOOT positioning module 810 , a first-level BOOT verification module 830 , a page quality assessment module 850 and a second-level BOOT screening module 870 .
[0086] The first-level BOOT positioning module 810 is used to scan the physical blocks in the NAND flash memory in ascending order of the physical block numbers through the NAND flash memory controller, and when the first-level BOOT is located, read the data in the physical block where the first-level BOOT is located to obtain the BOOT data.
[0087] The first-level BOOT verification module 830 is used to verify the integrity and availability of BOOT data using an XOR operation. If the verification passes, the block number and verification result of the physical block where the first-level BOOT is located are recorded. Otherwise, the next physical block is scanned until the verification passes.
[0088] The page quality evaluation module 850 is used to evaluate the storage quality of each page in the physical block where the first-level BOOT is located according to the DMA data length, and obtain a page queue according to the storage quality.
[0089] The second-level BOOT screening module 870 is used to select one or more pages as storage points of the second-level BOOT according to the accuracy and length of sectors within each page in the page queue, and determine storage parameters of the storage points.
[0090] It should be noted that, when the secondary BOOT storage point screening is provided in the above embodiment, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the secondary BOOT storage point screening device will be divided into different functional modules to complete all or part of the functions described above.
[0091] In addition, the secondary BOOT storage point screening device and the secondary BOOT storage point screening method provided in the above embodiments belong to the same concept, and the specific manner in which each module performs the operation has been described in detail in the method embodiment and will not be repeated here.
[0092] Figure 6 The present invention schematically illustrates the structure of an electronic device according to an exemplary embodiment.
[0093] It should be noted that the electronic device is only an example adapted to the present invention and cannot be considered to provide any limitation on the scope of use of the present invention. The electronic device cannot be interpreted as requiring dependence on or having Figure 6 One or more components of exemplary electronic device 2000 are shown.
[0094] The hardware structure of the electronic device 2000 may vary greatly due to differences in configuration or performance, such as Figure 6 As shown, the electronic device 2000 includes: a power supply 210 , an interface 230 , at least one memory 250 , and at least one central processing unit (CPU) 270 .
[0095] Specifically, the power supply 210 is used to provide operating voltage for each hardware device on the electronic device 2000 .
[0096] The interface 230 includes at least one wired or wireless network interface 231 for interacting with external devices. Of course, in other examples adapted by the present invention, the interface 230 may further include at least one serial-to-parallel conversion interface 233, at least one input-output interface 235, and at least one USB interface 237, etc. Figure 6As shown, this is not intended to be a specific limitation.
[0097] The memory 250 is a carrier for storing resources, which may be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon include an operating system 251, an application 253 and data 255, etc. The storage method may be temporary storage or permanent storage.
[0098] Among them, the operating system 251 is used to manage and control various hardware devices and application programs 253 on the electronic device 2000 to enable the central processor 270 to calculate and process the massive data 255 in the memory 250. It can be WindowsServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM, etc.
[0099] The application program 253 is a computer-readable instruction that performs at least one specific task based on the operating system 251, and may include at least one module ( Figure 6 (not shown), each module may respectively contain computer-readable instructions for the electronic device 2000. For example, the secondary BOOT storage point screening device may be regarded as an application 253 deployed on the electronic device 2000.
[0100] The data 255 may be signal information, etc., stored in the memory 250 .
[0101] The central processor 270 may include one or more processors and is configured to communicate with the memory 250 through at least one communication bus to read the computer-readable instructions stored in the memory 250, thereby realizing the operation and processing of the mass data 255 in the memory 250. For example, the secondary BOOT storage point screening method is completed by the central processor 270 reading a series of computer-readable instructions stored in the memory 250.
[0102] In addition, the present invention can also be implemented by hardware circuits or hardware circuits combined with software. Therefore, the implementation of the present invention is not limited to any specific hardware circuits, software, or a combination of the two.
[0103] See also Figure 7 In an embodiment of the present invention, an electronic device 4000 is provided. The electronic device 4000 may include: a desktop computer, a laptop computer, a server, etc. with sensor recognition capability.
[0104] exist Figure 7 In the embodiment, the electronic device 4000 includes at least one processor 4001 and at least one memory 4003.
[0105] The data interaction between the processor 4001 and the memory 4003 can be realized through at least one communication bus 4002. The communication bus 4002 may include a path for transmitting data between the processor 4001 and the memory 4003. The communication bus 4002 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The communication bus 4002 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 7 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.
[0106] Optionally, the electronic device 4000 may further include a transceiver 4004, which may be used for data interaction between the electronic device and other electronic devices, such as data transmission and / or data reception, etc. It should be noted that in actual applications, the transceiver 4004 is not limited to one, and the structure of the electronic device 4000 does not constitute a limitation on the embodiments of the present invention.
[0107] Processor 4001 may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It may implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of the present invention. Processor 4001 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.
[0108] The memory 4003 can be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory) or other optical disk storage, optical disk storage (including compressed optical disk, laser disk, optical disk, digital versatile disk, Blu-ray disk, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program instructions or codes in the form of instructions or data structures and can be accessed by the electronic device 4000, but is not limited to this.
[0109] Computer-readable instructions are stored in the memory 4003 , and the processor 4001 can read the computer-readable instructions stored in the memory 4003 through the communication bus 4002 .
[0110] The computer-readable instructions are executed by one or more processors 4001 to implement the secondary BOOT storage point screening method in the above-mentioned embodiments.
[0111] In addition, an embodiment of the present invention provides a storage medium on which computer-readable instructions are stored. The computer-readable instructions are executed by one or more processors to implement the secondary BOOT storage point screening method as described above.
[0112] A computer program product is provided in an embodiment of the present invention. The computer program product includes computer-readable instructions. The computer-readable instructions are stored in a storage medium. One or more processors of an electronic device read the computer-readable instructions from the storage medium, load and execute the computer-readable instructions, so that the electronic device implements the secondary BOOT storage point screening method as described above.
[0113] Compared with the related art, the present invention has the following beneficial effects:
[0114] 1. The present invention firstly scans the physical blocks in the NAND flash memory in the ascending order of the physical block numbers through the NAND flash memory controller, and when the first-level BOOT is located, reads the data in the physical block where the first-level BOOT is located to obtain the BOOT data, and uses an XOR operation to verify the integrity and availability of the BOOT data. If the verification is successful, the block number and the verification result of the physical block where the first-level BOOT is located are recorded. Otherwise, the next physical block is continuously scanned until the verification is successful, and the storage quality of each page in the physical block where the first-level BOOT is located is evaluated according to the DMA data length, and a page queue is obtained according to the storage quality. One or more pages are selected as the storage points of the second-level BOOT according to the accuracy and length of the sectors inside each page in the page queue, and the storage parameters of the storage points are determined. The integrity and availability of the BOOT data are ensured through the incremental scanning of the physical blocks and the XOR verification, and the stability and security of the system startup are improved. By evaluating the page storage quality based on the DMA data length, a high-quality page is selected as the second-level BOOT storage point, and the data storage layout is further optimized, and the flash memory space utilization and overall performance are improved, so as to effectively solve the problem that the prior art cannot comprehensively evaluate the stability and reliability of each potential BOOT position and cannot fully utilize the NAND The Flash storage space lacks sufficient flexibility.
[0115] 2. The present invention effectively reduces space waste by storing more second-level BOOT data in each screened page. Traditional methods may fail to fully utilize space due to conservative storage strategies or data truncation, while the present invention achieves higher-density data storage by optimizing the data storage layout, thereby significantly improving the storage space utilization of NAND Flash.
[0116] 3. The present invention stores the second-level BOOT data in the same block as the first-level BOOT data and reduces the truncation operation, making each segment of data longer. This strategy reduces the number of data reading and jumping, and reduces the complexity of I / O operations. This not only speeds up data access speed, but also reduces the CPU waiting time, thereby achieving overall performance optimization and acceleration.
[0117] 4. The present invention provides multiple backups for the second-level BOOT data by selecting multiple BOOT points to store data. This redundant storage mechanism effectively reduces the risk of data loss due to damage to a single location. At the same time, when restoring data, the best data source can be selected from multiple backup points, which improves the efficiency and success rate of data recovery.
[0118] 5. The present invention is extremely cautious in selecting the data storage location, storing the second-level BOOT data on the page with the best storage condition selected in each block, and ensuring that the data is stored in continuous sectors in the page. This strategy reduces the probability of data errors caused by physical damage or excessive erase and write times, thereby significantly improving data security. In addition, storing the second-level BOOT data in the same block as the first-level BOOT storage location is also convenient for management and maintenance, further enhancing the overall stability of the system.
[0119] 6. The storage strategy provided by the present invention has high flexibility and can be adjusted according to the needs of different devices and application scenarios. For example, the best storage page and sector can be dynamically selected according to the actual situation of NAND Flash to adapt to different storage needs. This flexibility enables the solution to be widely used in various NAND Flash memories and meet the diverse needs of different users.
[0120] It should be understood that, although the steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.
[0121] The above descriptions are only some embodiments of the present invention. It should be pointed out that, for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A secondary BOOT storage point screening method, characterized in that: The method comprises: Scanning the physical blocks in the NAND flash memory in ascending order of the physical block numbers through the NAND flash memory controller, and when the first-level BOOT is located, reading the data in the physical block where the first-level BOOT is located to obtain the BOOT data; Verify the integrity and availability of the BOOT data by using an XOR operation. If the verification is successful, record the block number and verification result of the physical block where the first-level BOOT is located. Otherwise, continue to scan the next physical block until the verification is successful. Evaluate the storage quality of each page in the physical block where the first-level BOOT is located according to the DMA data length, and obtain a page queue according to the storage quality; One or more pages are selected as storage points of the second-level BOOT according to the accuracy and length of sectors within each page in the page queue, and storage parameters of the storage points are determined.
2. The secondary BOOT storage point screening method according to claim 1, characterized in that: The method of scanning the physical blocks in the NAND flash memory in ascending order of the physical block numbers by the NAND flash memory controller and reading the data in the physical block where the first-level BOOT is located to obtain the BOOT data when the first-level BOOT is located includes: Initialize the NAND flash memory, determine the starting block number according to the physical block organization structure of the NAND flash memory, and select the physical blocks in the NAND flash memory one by one in sequence starting from the starting block number through the NAND flash memory controller; The selected physical block is fully scanned, and data of all pages in the physical block are read. When the first-level BOOT is read, the data in the physical block where the first-level BOOT is located is read to obtain BOOT data.
3. The secondary BOOT storage point screening method according to claim 1, characterized in that: The process of verifying the integrity and availability of the BOOT data by using an XOR operation, and if the verification is successful, recording the block number and verification result of the physical block where the first-level BOOT is located, and if not, continuing to scan the next physical block until the verification is successful, includes: Read the BOOT data and perform an XOR operation on the set check value to obtain an XOR verification result. If the XOR verification result meets the set conditions, record the block number of the physical block where the first-level BOOT is located and the XOR verification result; If the XOR verification result does not meet the set condition, the next physical block is scanned in the order of block numbers until the XOR verification result meets the set condition.
4. The secondary BOOT storage point screening method according to claim 1, characterized in that: The step of evaluating the storage quality of each page in the physical block where the first-level BOOT is located according to the DMA data length, and obtaining a page queue according to the storage quality, includes: The physical block where the first-level BOOT is located and the XOR verification result meets the set conditions is selected as the inspection object, and an empty page queue is initialized; the page queue is used to store the numbers of the pages that meet the requirements; All pages are traversed starting from the first page of the inspection object, a DMA data length loop check is performed on each page to obtain storage quality, and each page is evaluated and screened according to the storage quality to obtain a Page queue.
5. The secondary BOOT storage point screening method according to claim 4, characterized in that: The DMA data length loop check is performed on each page to obtain storage quality, and each page is evaluated and screened according to the storage quality to obtain a Page queue, including: A check unit based on the DMA data length is set; the DMA data length is used to indicate the amount of data processed by the page each time; Divide the data of the page into multiple segments of DMA length, and check the integrity, error rate and whether bad block marks are included in these segments one by one to obtain the storage quality of the page; If the storage quality of the page meets the preset requirement, the number of the page is added to the page queue, and the page queue is obtained when all pages are checked.
6. The secondary BOOT storage point screening method according to claim 1, characterized in that: The selecting one or more pages as storage points of the second-level BOOT according to the accuracy and length of sectors within each page in the page queue, and determining storage parameters of the storage points, includes: Traverse each page in the page queue, check the sectors inside each page in the page queue, and obtain pages whose sectors are continuous and meet the storage requirements; Calculate and record the longest length of the continuous and qualified sectors; the longest length of the sectors is used to evaluate whether the page can be used as a second-level BOOT storage point; The pages are sorted according to the longest length of the sectors, and the second-level BOOT storage point and the storage parameters of the storage point are determined from the sorted pages according to the demand factors.
7. The secondary BOOT storage point screening method according to claim 6, characterized in that: The demand factors include the size requirement of the second-level BOOT, the requirement for redundant backup, the requirement for the maximum length of sectors, the overall capacity of the NAND flash memory, the physical location of the page, and the relative location of the page and other key data; the storage parameters include the number of the starting sector, the storage length, the data verification method, and the redundant backup strategy; the storage parameters are determined based on the specific requirements of the second-level BOOT and the physical characteristics of the NAND flash memory.
8. A secondary BOOT storage point screening device, characterized in that: The device comprises: The first-level BOOT positioning module is used to scan the physical blocks in the NAND flash memory according to the ascending order of the physical block numbers through the NAND flash memory controller, and when the first-level BOOT is located, read the data in the physical block where the first-level BOOT is located to obtain the BOOT data; The first-level BOOT verification module is used to verify the integrity and availability of the BOOT data by using an XOR operation. If the verification is successful, the block number of the physical block where the first-level BOOT is located and the verification result are recorded. Otherwise, the next physical block is scanned until the verification is successful. A page quality evaluation module, used for evaluating the storage quality of each page in the physical block where the first-level BOOT is located according to the DMA data length, and obtaining a page queue according to the storage quality; The second-level BOOT screening module is used to select one or more pages as storage points of the second-level BOOT according to the accuracy and length of sectors within each page in the page queue, and determine storage parameters of the storage points.
9. An electronic device, characterized in that: include: at least one processor and at least one memory, wherein: The memory has computer-readable instructions stored thereon; The computer-readable instructions are executed by one or more of the processors so that the electronic device implements the secondary BOOT storage point screening method according to any one of claims 1 to 7.
10. A storage medium having computer-readable instructions stored thereon, characterized in that: The computer-readable instructions are executed by one or more processors to implement the secondary BOOT storage point screening method according to any one of claims 1 to 7.