Method and system for task processing based on configuration queue data

Abstract

The invention discloses a task processing method and system based on configuration queue data, and the method comprises the steps: storing register configuration parameters of a plurality of tasks in an internal storage space in advance; hardware reads back configuration queue data through an internal storage space to analyze an issued task before processing the task, and after configuration updating of an internal control register is completed and a current task is processed according to the updated configuration, a new task is executed, so that a new task can be executed under the condition that the control register is not added. According to the method, the occurrence condition of task gaps caused by untimely interrupt response of the processor can be reduced, so that the performance loss of the processor caused by null etc. is reduced, the resource utilization rate of arithmetic logic is improved, and the performance of the processor is improved; and under the condition that hardware resources are not increased, the execution unit of the data processor can reach the upper limit of hardware performance, and cost is saved while the performance utilization rate of the execution unit is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to a method and system for performing task processing based on configuration queue data. Background Art

[0002] In common consumer electronics, such as tablets, projectors, and dashcams, there are usually various image processing requirements involved, such as layer overlay, zooming, and rotation. For the main control chip, this type of image processing requirement is generally handed over to the dedicated image processor inside the SoC for execution, and the CPU schedules the image processor to meet the system's real-time image processing requirements. When the SoC chip is performing image processing tasks, it may be unable to respond to the interrupt signal of the image processor in time due to excessive CPU load, resulting in gaps between tasks, causing the performance of the image processor to decline, and ultimately failing to meet the system's real-time image processing requirements.

[0003] In order to reduce the gap between tasks, the current mainstream technical solutions in the industry include using dual control registers (ping-pong registers) to enable software to configure the next task in advance to reduce the gap between tasks, or Figure 1 A schematic diagram of the structure of a synchronous multi-threaded processor disclosed, such as Figure 1 As shown, the first pipeline control unit and the second pipeline control unit, i.e., two sets of pipeline control units, are instantiated to schedule the first dedicated execution unit, the second dedicated execution unit, i.e., two sets of dedicated execution units and an independent shared execution unit to reduce task gaps.

[0004] However, practice has found that both of these technical solutions will increase hardware resource overhead and the degree of coupling between the system and hardware, and the increased cost does not bring about an increase in the upper limit of hardware performance. Therefore, it is urgent to propose a technical solution on how to save hardware resources (such as area and cost) while reducing task gaps. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a method and system for performing task processing based on configuration queue data, which can reduce task gaps and save hardware resources at the same time.

[0006] In order to solve the above technical problems, the first aspect of the embodiment of the present invention discloses a method for processing tasks based on configuration queue data, the method is applied to a data processing system, the data processing system includes a task controller, a data processor and a storage space, the storage space is used to store the configuration queue data, the configuration queue data is used to configure the data processor, the method includes:

[0007] When receiving a data processing task sent by a processor, the task controller determines the configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space;

[0008] The task controller performs configuration operations on the control registers of the data processor according to the configuration parameters corresponding to the data processing task, and after the configuration is completed, controls the execution unit of the data processor to perform data processing operations matching the data processing task according to the configuration parameters corresponding to the data processing task.

[0009] A second aspect of an embodiment of the present invention discloses a system for performing task processing based on configuration queue data, the system comprising a task controller, a data processor and a storage space, the storage space being used to store the configuration queue data, the configuration queue data being used to configure the data processor, wherein:

[0010] The task controller is used to, when receiving a data processing task issued by the processor, determine the configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space; and perform configuration operations on the control registers of the data processor according to the configuration parameters corresponding to the data processing task, and after the configuration is completed, control the execution unit of the data processor to perform data processing operations matching the data processing task according to the configuration parameters corresponding to the data processing task.

[0011] A third aspect of the present invention discloses a system for performing task processing based on configuration queue data, the system being applied to a data processing system, and the system comprising:

[0012] A memory storing executable program code;

[0013] a processor coupled to the memory;

[0014] The processor calls the executable program code stored in the memory to execute part or all of the steps in any one of the methods for performing task processing based on configuring queue data disclosed in the first aspect of the present invention.

[0015] The fourth aspect of the present invention discloses a computer storage medium, which stores computer instructions. When the computer instructions are called, they are used to execute some or all of the steps in any method for performing task processing based on configured queue data disclosed in the first aspect of the present invention.

[0016] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0017] In an embodiment of the present invention, a method and system for performing task processing based on configuration queue data are disclosed, wherein configuration parameters required to update the control registers of a data processor are pre-stored in a storage space, and when a data processing task issued by a processor is received, the configuration parameters corresponding to the data processing task are determined according to the data processing task and the configuration queue data stored in the storage space; and according to the configuration parameters corresponding to the data processing task, a configuration operation is performed on the control registers of the data processor, and after the configuration is completed, according to the configuration parameters corresponding to the data processing task, the execution unit of the data processor is controlled to perform a data processing operation matching the data processing task. It can be seen that the embodiment of the present invention stores the register configuration parameters of multiple tasks in the internal storage space in advance. When it is detected that a task is issued, the hardware reads back the configuration queue data through the internal storage space to parse the issued task before processing the task. After completing the configuration update of the internal control register, the new task is executed after the current task is processed according to the updated configuration. In this way, without increasing the control register, the occurrence of task gaps caused by the untimely response of the processor interrupt can be reduced, thereby reducing the performance loss of the processor due to waiting, improving the resource utilization of the operation logic, and thus improving the processor performance; and by storing the register configuration parameters of multiple tasks in the internal storage space in advance, the execution unit of the data processor can reach the upper limit of the hardware performance without increasing the hardware resources (such as hardware area), thereby improving the performance utilization of the execution unit and saving costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 It is a structural diagram of a synchronous multi-threaded processor disclosed in the prior art;

[0020] Figure 2 It is a schematic diagram of a system architecture for performing task processing based on configuration queue data disclosed in an embodiment of the present invention;

[0021] Figure 3 It is a flowchart of a method for performing task processing based on configuration queue data disclosed in an embodiment of the present invention;

[0022] Figure 4 It is a schematic diagram of a structure for configuring queue data in a storage space disclosed in an embodiment of the present invention;

[0023] Figure 5 It is a structural diagram of configuration queue data of a chain structure disclosed in an embodiment of the present invention;

[0024] Figure 6 It is a structural diagram of a thread instantiation disclosed in an embodiment of the present invention;

[0025] Figure 7 It is a working sequence of a command queue parser disclosed in an embodiment of the present invention;

[0026] Figure 8 It is a schematic diagram of the architecture of a task manager and a thread control register disclosed in an embodiment of the present invention;

[0027] Fig. 9 It is a timing diagram of software and hardware interaction after adding a task queue disclosed in an embodiment of the present invention;

[0028] Fig.10 It is a flow chart of a control state machine of a task manager disclosed in an embodiment of the present invention;

[0029] Fig.11 It is a timing diagram of software and hardware interaction without adding a task queue disclosed in an embodiment of the present invention;

[0030] Fig.12 It is a processing timing diagram of sending subtasks to execution units in parallel through multiple threads disclosed in an embodiment of the present invention;

[0031] Fig.13 It is a schematic diagram of the architecture of a multi-threaded multi-tasking structure disclosed in an embodiment of the present invention;

[0032] Fig.14 It is a schematic diagram of the architecture of another multi-threaded multi-tasking structure disclosed in an embodiment of the present invention;

[0033] Fig.15 It is a structural diagram of a system for performing task processing based on configuration queue data disclosed in an embodiment of the present invention;

[0034] Fig.16 It is a structural diagram of another system for performing task processing based on configuration queue data disclosed in an embodiment of the present invention;

[0035] Fig.17 It is a structural diagram of another system for performing task processing based on configuration queue data disclosed in an embodiment of the present invention. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] The terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, device, product or equipment that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or equipment.

[0038] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0039] The present invention discloses a method and system for processing tasks based on configuration queue data. The method stores register configuration parameters of multiple tasks in an internal storage space in advance. When a task is detected to be issued, the hardware reads back the configuration queue data through the internal storage space before processing the task to parse the issued task. After completing the configuration update of the internal control register, the new task is executed after the current task is processed according to the updated configuration. In this way, the occurrence of task gaps caused by untimely processor interrupt response can be reduced without increasing the control register, thereby reducing the performance loss of the processor due to idle waiting, improving the resource utilization of the operation logic, and thus improving the processor performance. In addition, by storing the register configuration parameters of multiple tasks in the internal storage space in advance, the execution unit of the data processor can reach the upper limit of the hardware performance without increasing the hardware resources (such as the hardware area), thereby improving the performance utilization of the execution unit and saving costs.

[0040] In order to better understand the method and system for performing task processing based on configuration queue data described in the present invention, firstly, the system architecture applicable to the method for performing task processing based on configuration queue data is described. Specifically, the system architecture can be as follows Figure 2 As shown, Figure 2 Schematic diagram of a system architecture for performing task processing based on configuration queue data disclosed in an embodiment of the present invention. Figure 2 As shown, the system architecture may include a thread control register, a task manager, a command queue parser and a data processor, wherein the data processor includes a control register and an execution unit, and the storage space is used to store configuration queue data, and the configuration queue data is used to configure the data processor, specifically to configure the control register of the data processor. Furthermore, the storage space is also used to store data to be processed (such as images) and processed data. The command queue parser and the execution unit interact with the storage space through the memory bus, and the thread control register obtains tasks from the processor CPU through the register configuration bus, and sends the corresponding tasks to the task queue of the task manager in parallel through 4 threads. The task manager arbitrates all tasks in all task queues, obtains arbitration results, and selects a task from all tasks that have not performed data processing operations in all task queues as the current task according to the arbitration results; and generates a task start signal according to the current task, and sends the task start signal to the command queue parser, and the task start signal carries the current task; for any current task, for the command ranked first in the current task, the command queue parser parses the task start signal, Get the header address corresponding to the command and the header length of the next command corresponding to each command; for the command that is not ranked first in the current target task, determine the header address corresponding to the command according to the header length address corresponding to the previous command and the header length of the next command corresponding to the previous command, and search the corresponding configuration parameters from the storage space according to the header address corresponding to the command, and perform configuration operations on the control register of the data processor; after the control register of the data processor is configured, the execution unit of the data processor performs data processing operations that match the command of the current task, and after processing the data corresponding to the current task, continue to determine the next task as the current task according to the arbitration result, and repeat the above operations until the data corresponding to all tasks are processed. Among them, if there is a thread whose data of all tasks has been processed, an interrupt signal will be sent to the processor CPU to pull up the flag bit of the thread.

[0041] It should be noted that Figure 2 The system architecture shown is only intended to represent a system applicable to the method of task processing based on configuration queue data. All units involved are only schematically presented. The specific structure / size / shape / location / installation method can be adaptively adjusted according to the actual system. Figure 2 The system architecture shown is not limited in this regard.

[0042] The above describes a system to which the method for performing task processing based on configuration queue data is applicable. The following describes in detail the method and system for performing task processing based on configuration queue data.

[0043] Embodiment 1

[0044] See also Figure 3 , Figure 3 The present invention discloses a method for processing tasks based on configuration queue data. The method can be applied to a data processing system, and the data processing system includes a task controller, a data processor and a storage space, the storage space is used to store configuration queue data, and the configuration queue data is used to configure the data processor, specifically to configure the control register of the data processor. Furthermore, the data processor also includes an execution unit, wherein the data processor includes an image processor or a non-image processor. Figure 3 As shown, the method for processing tasks based on configuration queue data may include the following operations:

[0045] 101. When receiving a data processing task sent by a processor, the task controller determines configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space.

[0046] In an embodiment of the present invention, the configuration queue data is composed of the data of each header in a plurality of headers and the data of a main block uniquely corresponding to the header; for any header, the data of the header includes the starting address of the main block uniquely corresponding to the header, the length of the main block, the base address offset of the control register that needs to be updated corresponding to the main block, the header length of the next command and the update flag of the control register; the data of each main block includes the address offset of the control register that needs to be updated and the data in all main blocks are continuous; each header is used to address and parse the main block uniquely corresponding to the header, and the data of each main block is used to perform an update operation on the address offset of the control register, and the storage space occupied by all main blocks in the storage space includes continuous storage space and / or non-continuous storage space.

[0047] 102. The task controller performs configuration operations on the control registers of the data processor according to the configuration parameters corresponding to the data processing task, and after the configuration is completed, controls the execution unit of the data processor to perform data processing operations matching the data processing task according to the configuration parameters corresponding to the data processing task.

[0048] In the embodiment of the present invention, the data processing operation corresponds to the type of the data processor. When the data processor is an image processor, the data processing operation includes an image processing operation, and further, may also include a data processing operation; when the data processor is a non-image processor, the data processing operation includes a non-image processing operation.

[0049] It can be seen that the implementation Figure 3 The described method for processing tasks based on configuration queue data stores register configuration parameters of multiple tasks in an internal storage space in advance. When a task is detected to be issued, the hardware first reads back the configuration queue data through the internal storage space to parse the issued task before processing the task. After completing the configuration update of the internal control register, the new task is executed after the current task is processed according to the updated configuration. In this way, without increasing the control register, the occurrence of task gaps caused by untimely processor interrupt response can be reduced, thereby reducing the performance loss of the processor due to idle waiting, improving the resource utilization of the operation logic, and thus improving the processor performance; and by storing the register configuration parameters of multiple tasks in the internal storage space in advance, the execution unit of the data processor can reach the upper limit of the hardware performance without increasing the hardware resources (such as hardware area), thereby improving the performance utilization of the execution unit and saving costs.

[0050] In the embodiment of the present invention, optionally, the task controller determines the configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space, including:

[0051] The task controller performs parsing operations on the data processing tasks to obtain the header information corresponding to the data processing tasks;

[0052] The task controller analyzes the header information corresponding to the data processing task and the configuration queue data stored in the storage space to obtain configuration parameters matching the header information, and determines that the configuration parameters matching the header information are the configuration parameters corresponding to the data processing task.

[0053] In the embodiment of the present invention, further optionally, the header information corresponding to the above-mentioned data processing task includes a header address;

[0054] The task controller analyzes the header information corresponding to the data processing task and the configuration queue data stored in the storage space to obtain configuration parameters matching the header information, including:

[0055] The task controller performs an addressing operation on the configuration queue data stored in the storage space according to the header address corresponding to the data processing task, and obtains the header corresponding to the header address;

[0056] The task controller obtains the configuration parameters of the main block independently corresponding to the header corresponding to the header address from the configuration queue data stored in the storage space as the configuration parameters matching the header information.

[0057] It can be seen that the embodiment of the present invention can improve the analysis accuracy of the configuration parameters of the issued data processing tasks by analyzing the header information obtained by parsing the issued data processing tasks and the configuration queue data stored in the storage space. And by addressing in the storage space through the header address corresponding to the issued data processing task, the configuration parameters of the corresponding main block, that is, the address offset, are accurately found, which is conducive to improving the configuration accuracy of the control register.

[0058] In an embodiment of the present invention, optionally, the task controller includes a thread control register, a task manager and a command queue parser, the thread control register and the task manager are connected through a thread, and the thread corresponding to the thread control register has a corresponding command queue and task queue;

[0059] The task controller performs parsing operations on the data processing task and obtains the header information corresponding to the data processing task, including:

[0060] The thread control register stores the data processing task in a command queue corresponding to the data processing task, and sends the data processing task to the task manager through the thread between the thread control register and the task manager;

[0061] The task manager obtains the data processing task from the thread control register through the thread between the thread control register and the task manager, and stores the data processing task in the task queue corresponding to the thread between the thread control register and the task manager;

[0062] The task manager obtains the data processing task from the task queue corresponding to the thread between the thread control register and the task manager, generates a task start signal according to the data processing task, and sends the task start signal to the command queue parser, wherein the task start signal carries the data processing task;

[0063] The command queue parser determines the header information corresponding to the data processing task according to the task start signal.

[0064] It can be seen that this optional embodiment realizes accurate determination of header information corresponding to a data processing task through interaction among a thread control register, a task manager and a command queue parser, thereby facilitating improvement of configuration accuracy of the control register.

[0065] In the embodiment of the present invention, further optionally, the number of threads between the thread control register and the task manager is greater than or equal to 1, all threads do not interfere with each other, each thread has a unique corresponding command queue Cmd-queue and a unique corresponding task queue, and the data processing task includes multiple subtasks;

[0066] The thread control register stores the data processing task in a command queue corresponding to the data processing task, and sends the data processing task to the task manager through the thread between the thread control register and the task manager; the task manager obtains the data processing task from the thread control register through the thread between the thread control register and the task manager, and stores the data processing task in a task queue corresponding to the thread between the thread control register and the task manager; the task manager obtains the data processing task from the task queue corresponding to the thread between the thread control register and the task manager, and generates a task start signal according to the data processing task, including:

[0067] When it is determined that all subtasks included in the data processing task can be stored in one command queue, the thread control register stores all subtasks in a first command queue among all command queues, and sends all subtasks to the task manager through the thread corresponding to the first command queue;

[0068] The task manager obtains all subtasks from the thread control register through the thread corresponding to the first command queue, and stores all subtasks in the task queue matching the thread corresponding to the first command queue;

[0069] The task manager obtains a subtask from all subtasks that have not executed data processing operations in the task queue corresponding to the first command queue as the current subtask, and generates a task start signal based on the current subtask, and the task start signal carries the current subtask.

[0070] In this optional embodiment, the times at which the processors corresponding to the multiple subtasks included in the data processing task issue are equal or unequal. For those with equal issuing times, the subtasks are acquired in sequence from the task queue based on the time sequence of entering the corresponding task queue, such as first-in-first-out time sequence; for those with unequal issuing times, the subtasks can be acquired based on an acquisition method corresponding to the equal time, or the subtasks can be acquired in sequence from the task queue based on the order of issuing times (such as first-issued-first-acquired), and the embodiment of the present invention does not limit this.

[0071] In this optional embodiment, the selected first command queue may be randomly selected, or may be a command queue corresponding to a thread whose corresponding thread is in an idle state, without limitation.

[0072] It can be seen that when there are multiple subtasks issued and all the issued subtasks can be stored in the same command queue, that is, the same task queue, this optional embodiment selects one of the command queues to interact with the task manager to determine the current subtask, thereby improving the accuracy of determining the current subtask, generating a corresponding task start signal, and performing data processing corresponding to all commands of the current subtask, so that the task queue can realize orderly and efficient self-starting to execute corresponding data processing for the commands corresponding to all subtasks without relying on processor scheduling, effectively reducing task gaps, improving the performance of the execution unit, and thus avoiding the occurrence of resource waste.

[0073] In the embodiment of the present invention, further optionally, the number of threads between the thread control register and the task manager is greater than or equal to 1, all threads do not interfere with each other, each thread has a unique corresponding command queue Cmd-queue and a unique corresponding task queue, and the data processing task includes multiple subtasks;

[0074] The thread control register stores the data processing task in a command queue corresponding to the data processing task, and sends the data processing task to the task manager through the thread between the thread control register and the task manager; the task manager obtains the data processing task from the thread control register through the thread between the thread control register and the task manager, and stores the data processing task in a task queue corresponding to the thread between the thread control register and the task manager; the task manager obtains the data processing task from the task queue corresponding to the thread between the thread control register and the task manager, and generates a task start signal according to the data processing task, including:

[0075] When it is determined that all subtasks included in the data processing task cannot be stored in one command queue, the thread control register groups all subtasks to obtain subtask groups, and allocates a corresponding second command queue to each subtask group from all command queues, and sends all subtasks of the subtask group corresponding to the second command queue to the task manager through the thread corresponding to each second command queue;

[0076] The task manager obtains all subtasks of the subtask group corresponding to the second command queue from the thread control register through the thread corresponding to each second command queue, and stores all subtasks of each subtask group in the task queue matching the second command queue corresponding to the subtask group;

[0077] The task manager arbitrates the subtasks in all the task queues that match the second command queue, obtains an arbitration result, and based on the arbitration result, selects a subtask from all the subtasks that have not performed data processing operations in all the task queues that match the second command queue as the current subtask, and generates a task start signal based on the current subtask, which carries the current subtask.

[0078] In this optional embodiment, all subtasks may be grouped randomly, or may be grouped according to the number of command queues, or may be grouped according to the current state (idle or non-idle) of the threads corresponding to the command queues, without limitation.

[0079] In this optional embodiment, arbitration is performed on all subtasks in the task queues corresponding to all second command queues, which can be understood as arbitration on the subtasks in the task queues corresponding to all second command queues. For example, when subtasks from different task queues come out of the corresponding task queues at the same time, arbitration is performed on all subtasks that come out at the same time, which can also be understood as arbitration on the task queues corresponding to all second command queues. For example, after arbitration, all subtasks in task queue 1 are processed first, and when the processing is completed, all subtasks in task queue 2 are processed.

[0080] It can be seen that when this optional embodiment determines that all the issued subtasks cannot be stored in one command queue, it groups the tasks and selects the thread corresponding to the corresponding command queue to issue them in an orderly and accurate manner to the corresponding task queue, and performs task arbitration. According to the arbitration result, all the subtasks are sent serially to the execution unit for time-sharing processing, thereby realizing virtualization of the execution unit so that the images corresponding to all subtasks can be processed in an orderly and accurate manner, and reducing the occurrence of task gaps in software scheduling when multiple subtasks are issued through only one thread, that is, the processor CPU is in a busy state at a certain moment and cannot respond to interrupts, or the processor CPU is in an idle state at a certain moment, but the previous level of hardware has not yet completed processing, resulting in the next subtask having no input source data, thereby reducing the waiting time of the execution unit in a single thread, improving the processing performance of the execution unit, effectively reducing the degree of coupling between the system and the hardware processor, and reducing the software scheduling overhead of the CPU.

[0081] In the embodiment of the present invention, further optionally, each subtask includes at least one command, the header information corresponding to the data processing task includes the header information of all subtasks, and the header information corresponding to each subtask includes the header address of the command ranked first among all commands of the subtask and the header length of the next command corresponding to each command;

[0082] The command queue parser determines the header information corresponding to the data processing task based on the task start signal, including:

[0083] For any subtask, for the command ranked first in the subtask, the command queue parser parses the task start signal to obtain the header address corresponding to the command and the header length of the next command corresponding to each command; for the command not ranked first in the subtask, the header address corresponding to the command is determined according to the header length address corresponding to the previous command and the header length of the next command corresponding to the previous command;

[0084] The task controller controls the execution unit of the data processor to perform data processing operations matching the data processing tasks according to the configuration parameters corresponding to the data processing tasks, including:

[0085] For any current subtask of the data processing task package, the command queue parser sends a start signal of the current command of the current subtask to the execution unit of the data processor, and the execution unit receives the start signal of the current command, and switches the current state to the working state according to the start signal of the current command, and processes the image corresponding to the current command according to the current configuration parameters configured by the control register; when the data corresponding to the current command is processed, a processing completion signal of the current command is sent to the command queue parser;

[0086] The command queue parser receives a signal indicating that the current command has been processed, and switches the current state to a working state based on the signal indicating that the current command has been processed. After switching to the working state, it determines whether the current command is the last command in the current subtask based on the header length of the next command of the current command. When the result of the determination is no, the next command is updated to be the current command, and the above-mentioned operation of sending a start signal of the current command to the execution unit of the data processor is performed again until the data corresponding to the last command in the current subtask is processed.

[0087] In the embodiment of the present invention, Figure 4 As shown, Figure 4 is a schematic diagram of a structure of configuring queue data in a storage space disclosed in an embodiment of the present invention, such as Figure 4As shown, each header consists of the starting address Body_Block_Start_Address of the body block that the header uniquely corresponds to, the length of the body block Body_Block_Length, in bytes, the base address offset Register_Offset of the control register that needs to be updated corresponding to the body block, the header length Next_Cmd_Head_Length of the next command, and the update flag Dirty of the control register. Each header occupies 128 bits, 4 32 bits, of which the starting address is used for the header to address in the storage space, the header length of the next command, the high 24 bits of the 4th 32 bits, when this value is equal to 0, it means that there is no next command, and the command is the last one in the queue, and when this value is greater than 0, it means that there is a next command. The update flag, bit0 of the 4th 32 bits, is 1, indicating that the control register corresponding to Register_Offset needs to be updated to the value in body_block, that is, the value of the control register Register Value; if it is 0, it means that no update is required. The address offset stored in the body block body_block is 32 bits each, and the memory address and length of the body block are obtained from the corresponding header, and the control register of the corresponding offset address in the data processor is incrementally updated continuously according to the base address offset in the header, and the updated value is the data in the body block body_block, and Body_Block_Length is continuously updated, each time 32 bits. In this way, by storing the configuration data of the control register in blocks and configuring the corresponding address for addressing analysis, the control register can skip the register address segment that does not need to be updated, realize non-continuous update, ensure the accuracy of the control register update, and improve the update efficiency of the control register, which is conducive to further reducing the occurrence of task gaps.

[0088] In the embodiment of the present invention, further optionally, the header of each command includes the header length Next_Cmd_Head_Length (NCHL) of the next command. This information is used to indicate the number of Head_blocks of the next command. When the NCHL information is 0, it indicates that the current command is the last one. When the NCHL information is greater than 0, it indicates that the current command is not the last one. Thanks to the addition of the NCHL information, the Head_block of the next command can be addressed at the end of the previous command. Therefore, the Head_block can be made into a chain structure to realize the function of the command queue, such as Figure 5 As shown, Figure 5 is a schematic diagram of a chain-structured configuration queue data disclosed in an embodiment of the present invention, such as Figure 5As shown in the figure, the Head_address and Head_length of command Cmd0 come from the top-level thread control register and are initialized and configured by the processor CPU. Since the Head data is stored continuously in the memory, the Head_address corresponding to each command can be calculated, and the Head_length is recorded in the NCHL information of the previous command. Therefore, the calculation formula of the Head_address of each command is as follows:

[0089] cmd1_Head_address=cmd0_Head_address+cmd0_Head_length;

[0090] cmd2_Head_address=cmd1_Head_address+cmd1_Head_length(cmd0_NCHL);

[0091] cmd3_Head_address=cmd2_Head_address+cmd2_Head_length(cmd1_NCHL);

[0092] …

[0093] And so on.

[0094] Since the memory address of the body_block is recorded in the Head_block information, multiple body_blocks can use a continuous piece of memory or multiple scattered pieces of memory in the storage space, such as Figure 4 As shown, by storing the main block in a continuous or fragmented manner, the storage flexibility of the main block data is improved, and the utilization rate of the fragmented memory of the storage space is improved.

[0095] In the embodiment of the present invention, further, the head address Head_address and the head length Head_length of the corresponding register command queue are instantiated for each thread in the top-level thread control register, and are configured by the processor. Figure 6 As shown, Figure 6 is a schematic diagram of a thread instantiation structure disclosed in an embodiment of the present invention, such as Figure 6As shown, there are four threads Cmdline0, Cmdline1, Cmdline2, and Cmdline3. Each thread instantiates the head address Head_address and head length Head_length of the corresponding register command queue. Each thread points to a different address segment in the storage space. Each target task carries the address segment of the corresponding thread. The hardware retrieves the corresponding configuration parameter, namely Register Value, through the address segment.

[0096] It can be seen that this optional embodiment determines the header information of the next command by combining the header information of the previous command, that is, through the header information relationship between two adjacent commands, the header information of each command can be accurately and efficiently determined; and the data between two adjacent commands is processed by self-starting hardware without the need for processor CPU scheduling, so that command gaps will not be generated due to the processor CPU's untimely response to interrupts, thereby effectively improving the utilization rate of the execution unit.

[0097] In the embodiment of the present invention, Figure 7 is a working sequence of a command queue parser disclosed in an embodiment of the present invention, Figure 7Taking the command queue shown in the figure as an example, a detailed description is given. At time T0, the task manager sends a subtask to the command queue parser, and sends the task start signal Task_start and the command queue's head address Head_address and head length Head_length. At this time, the command queue parser enters the working state, retrieves the data of the head Head and the data of the body block body from the storage space to configure the control register. At T1, when the configuration of the control memory corresponding to the command Cmd0 is completed, the command queue parser sends a start signal Cmd_statr to the execution unit, and then the execution unit enters the working state, processes the image of the command Cmd0 according to the address offset of the current control register, repeatedly reads and writes the image input data from the storage space and inputs the written image output data into the memory space; at T2, after the data processing corresponding to the command Cmd0 is completed, the execution unit outputs the processing completion signal Cmd_end to start the command queue parser, and the command queue parser retrieves the data of the header Head of the command Cmd1 and the data of the body block body according to the NCHL information at the end of the command Cmd0 chain to configure the control register; at T3, after the configuration of the command Cmd1 is completed, the start signal Cmd_start is output. The execution unit starts data processing of command Cmd1; at time T4, after the processing of command Cmd1 is completed, the execution unit outputs a processing completion signal Cmd_end, and the command queue parser starts again, and according to the NCHL information at the end of the command Cmd1 chain, retrieves the data of the header Head and the body of the command Cmd2, and configures the control register; at time T5, the command queue parser sends a start signal Cmd_start, and the execution unit starts data processing of command Cmd2; at time T6, after the execution of command Cmd2 is completed, the execution unit outputs a processing completion signal Cmd_end. At this time, the NCHL information at the end of the Cmd2 chain in the command queue parser is 0, indicating that command Cmd2 is the last command in the command queue, and then outputs a task end signal Task_end to notify the task manager that the task it has issued has been completed.

[0098] It should be noted that the time taken by the command queue parser to configure the control registers is very short and negligible compared to the time taken by the execution unit to process a command. Figure 7 In order to allow technicians in this field to more clearly understand the various processes of task processing, the proportion of the working time of the command queue parser is lengthened. In actual hardware, Cmd0, Cmd1, and Cmd2 can be considered to work continuously.

[0099] In the embodiment of the present invention, Figure 8 is a schematic diagram of the architecture of a task manager and a thread control register disclosed in an embodiment of the present invention, Fig. 9is a timing diagram of software and hardware interaction after adding a task queue disclosed in an embodiment of the present invention, Fig.10 1 is a flow chart of a control state machine of a task manager disclosed in an embodiment of the present invention. Figure 7-9 To explain, at time T0, the processor CPU sends subtask task0, and the thread control register contains command queues, specifically 4 command queues. Each command queue corresponds to a thread and is connected to the task queue in the task manager through the thread. Each task queue can store multiple subtasks.

[0100] Among them, the control state machine obtains the current subtask from the task queue, and generates a task start signal Task_start, and starts the command queue parser at the same time. The command queue parser analyzes the task start signal to obtain the header information of the subtask task0, wherein the subtask task0 contains two commands cmd0 and cmd1. The command queue parser parses the task start signal to obtain the header address corresponding to the command cmd0 and the header length of the command cmd1 corresponding to the command cmd0; for the command cmd1 in the subtask task0, the header address corresponding to the command cmd1 is determined according to the header length address corresponding to the command cmd0 and the header length of the command cmd1 corresponding to the command cmd0. According to the header address of command cmd0, query the offset address of the corresponding main block to configure the parameters of the control register. After the configuration is completed, the start signal Cmd_start is generated to start the execution unit. When the execution unit processes the image corresponding to the current command, it will send the processing completion signal Cmd_end to the command queue parser to determine whether the NCHL (Next_Cmd_Head_Length) information at the end of the chain of command cmd0 is equal to 0. If the NCHL information is not equal to 0, the command queue parser is started again after calculating the header address Head_address and the header length Head_length of command cmd01 according to the value of NCHL, and repeat the above process to execute the next command. If the NCHL information is equal to 0, it means that the last command in the command queue has been processed, and the task end signal Task_end is generated. At this time, the state of the control state machine jumps back to IDLE, and the subtask output of the task queue continues to be detected. At time T1, after the execution unit completes processing of subtask task0, it raises an interrupt. Although the processor CPU receives the interrupt, it cannot respond immediately due to being busy. At time T2, the processor CPU handles the interrupt and issues subtask task1 (including 3 commands: cmd2, cmd3, and cmd4). The task of subtask task1 takes a long time. If the command of subtask task2 is ready during the execution of subtask task1, the software does not need to wait for the completion interrupt of subtask task1, and can issue subtask task2 immediately at time T3. After the task is issued, since the execution unit is still processing the command of subtask task1, subtask task2 will be stored in the task queue first and wait for execution. At time T4, if subtask task3 is also ready, it can also be issued immediately. Subtask task3 will also enter the task queue and queue up behind subtask task2. At time T5, when subtask task1 is executed, the interrupt signal will be raised. At this time, the CPU processor load is high and the interrupt cannot be processed in time.However, since subtasks task2 and task3 are already in the task queue, the hardware will immediately start subtask task2 (command cmd5) at time T5; similarly, at time T6, the hardware will immediately start subtask task3 (cmd6 and cmd7). At time T7, the CPU processor load is reduced and the interrupt signal is cleared. At this time, subtask task3 has already been executed.

[0101] Among them, the control state machine obtains the current subtask from the task queue, specifically: when the issued subtask can be stored in a task queue, if the control state machine of the task manager is in the idle IDLE state, it will detect the current subtask output in the command queue; when the issued subtask cannot be stored in a task queue, the arbitrator of the task manager arbitrates the subtasks of all task queues to determine the current subtask, if the control state machine of the task manager is in the idle IDLE state, it continues to detect the current subtask output of the arbitrator.

[0102] In order to enable those skilled in the art to more intuitively and clearly understand the method proposed by the present invention when multiple tasks are issued on the same thread Fig. 9 The beneficial effects brought by the corresponding technical solution are analyzed by analyzing the hardware and software interaction timing that is not added to the task queue, such as Fig.11 As shown, Fig.11 is a timing diagram of software and hardware interaction without adding a task queue disclosed in an embodiment of the present invention, such as Fig.11 As shown in the figure, at time T0, the processor CPU sends subtask task0 (including 2 commands cmd0 and cmd1). At time T1, the execution unit completes the processing and raises an interrupt. Although the processor CPU receives the interrupt, it cannot respond immediately due to being busy. At time T2, the processor CPU handles the interrupt and sends subtask task1 (including 3 commands cmd2, cmd3, and cmd4). The above process is repeated until all subtasks of the thread are processed. Fig. 9 and Fig.11 By comparison, we can see that after adding the task queue, the time for subtasks task2 and task3 to be completed is greatly advanced, and the time in advance is exactly Fig.11 The time it takes for the processor CPU to respond to interrupts between subtask task1 and subtask task2 and between subtask task2 and task3.

[0103] In the embodiment of the present invention, further, from Fig. 9 From T1 to T2, we can see that although the task queue is added, there will still be task gaps in the software scheduling. Therefore, subtasks can be sent down through multiple threads for data processing. At this time, the processing timing diagram of multi-threaded parallel sending of subtasks to the execution unit can be as follows: Fig.12As shown, Fig.12 is a processing timing diagram of sending subtasks to execution units in parallel through multiple threads disclosed in an embodiment of the present invention, such as Fig.12 As shown, there are 4 threads in total, namely, thread Cmdline0, thread Cmdline1, thread Cmdline2, and thread Cmdline3. Among them, thread Cmdline0 issues 3 subtasks, namely, subtask 1 (including 3 commands, Cmd0, Cmd1, and Cmd3), subtask 2 (including 2 commands, Cmd3 and Cmd4), and subtask 3 (including 2 commands, Cmd5 and Cmd6); thread Cmdline1 issues 4 subtasks, namely, subtask 4 (including 2 commands, Cmd7 and Cmd8), subtask 5 (including 1 command, Cmd9), subtask 6 (including 1 command, Cmd10), and subtask 7 (including 2 commands, Cmd11 and Cmd12); thread Cmdline2 issues 3 subtasks, namely, subtask 8 (including 1 command, Cmd13), subtask 9 (including 1 command, Cmd14 and Cmd15). 2 commands) and subtask ten (including 3 commands Cmd16, Cmd17, and Cmd18); thread Cmdline3 issues 3 subtasks, namely subtask eleven (including 2 commands Cmd19 and Cmd20), subtask twelve (including 3 commands Cmd21, Cmd22, and Cmd23) and subtask thirteen (including 2 commands Cmd24 and Cmd25). The subtasks issued by each thread will first enter the corresponding task queue for queueing. After arbitration, an arbitration queue sequence is formed: subtask one, subtask four, subtask eight, subtask eleven, subtask two, subtask five, subtask nine, subtask twelve, etc. Then it is sent to the execution unit for processing. The execution unit continuously processes tasks from different threads. From the perspective of a single processor, the time points at which each thread issues tasks are scattered, and the task gaps still exist. However, after the arbitrator interweaves the tasks of different threads, the task gaps disappear for the execution unit. It can be seen that using a multi-threaded architecture to balance the load to multiple CPUs effectively reduces the task gaps of the execution units, reduces the performance loss caused by waiting in vain, and maximizes the hardware performance of the execution units.

[0104] Furthermore, multiple threads can be connected to different systems and heterogeneous CPUs, such as Fig.13 As shown, Fig.13 is a schematic diagram of a multi-threaded multi-tasking structure disclosed in an embodiment of the present invention. Fig.13As shown in the figure, there are four threads, namely thread 0 (Android), thread 1 (Liunx), thread 2 (ARM) and thread 3 (RiskV). The tasks issued by each thread are sent to the execution unit for processing after polling and arbitration by the task manager. After the task processing is completed, the interrupt manager judges and outputs the interrupt flag of the corresponding thread, such as thread 0 interrupt, thread 1 interrupt, thread 2 interrupt and thread 3 interrupt. It can be seen that the four threads correspond to the first addresses of the four register command queues and four interrupt flags. From the system level, the subtasks of the four threads are processed "in parallel" by four independent execution units (actually processed serially by a single execution unit), which simplifies the interaction logic between the system and heterogeneous CPUs and can be applied to multi-screen heterogeneous display and multi-system SoC. Multithreading is a technology that allows one processor to execute multiple control flows. The principle is: use one processor as four, and turn one "physical" processor with multi-threading function into four "logical" processors. For the system, the logical processor is no different from the physical processor. Therefore, the system will dispatch the working threads to these four logical processors for execution, so that multiple threads of (single or multiple) applications can be executed on the same physical processor at the same time, and the four logical processors share all the execution resources of a single physical processor. Therefore, it can be considered that multithreading technology is the virtualization of the processor.

[0105] In the embodiment of the present invention, optionally, Fig.13 The multi-threaded multi-tasking architecture shown can effectively reduce the task gap and make the called execution unit close to its performance limit. However, from the perspective of the entire system, the total performance of the data processor is limited by the performance of a single execution unit. Therefore, two independent execution units can be instantiated internally to improve the total performance of the data processor, such as Fig.14 As shown, Fig.14 is a schematic diagram of another multi-threaded multi-tasking structure disclosed in an embodiment of the present invention. Fig.14 As shown, by instantiating two execution units 0 and 1, a 4-thread 2-core architecture can be implemented. From a system level, 4 logical execution units still process the tasks of 4 threads in parallel, and the software scheduling logic of the CPU will not change.

[0106] In an optional embodiment, the method may further include the following steps:

[0107] When the data corresponding to the last command in the current subtask is processed, the command queue parser sends a task end signal of the current subtask to the task manager;

[0108] The task manager receives a task end signal of the current subtask, and determines the next subtask from all subtasks that have not executed data processing operations in the task queue corresponding to the task manager;

[0109] The task manager updates the next subtask as the current subtask, and re-executes the above operation of generating a task start signal according to the current subtask, until the data corresponding to the last subtask in all subtasks of the command queue corresponding to the task manager is processed;

[0110] The task manager determines the next subtask from all subtasks that have not performed data processing operations in the task queue corresponding to the task manager, including:

[0111] When it is determined that all subtasks included in the data processing task can be stored in one command queue, the task manager selects the subtask that is currently ranked first from all subtasks that have not executed data processing operations in the task queue matched by the thread corresponding to the first command queue in a first-in-first-out manner as the next subtask;

[0112] When it is determined that all subtasks included in the data processing task cannot be stored in one command queue, the task manager, based on the arbitration result, selects the subtask currently ranked first from all subtasks that have not executed data processing operations in all task queues matched by the second command queue as the next subtask.

[0113] It can be seen that after the optional embodiment completes processing of the data corresponding to all commands of the current subtask, the self-starting task manager determines the next subtask from the existing task queue as soon as possible for processing, without waiting for the interrupt response of the processor CPU, thereby reducing the task gap and improving the execution performance of the execution unit; and selecting the next subtask based on the first-in-first-out method and / or the arbitration result of the subtask can improve the accuracy and efficiency of determining the next subtask, which is conducive to further reducing the gap between tasks and improving the execution performance of the execution unit.

[0114] Embodiment 2

[0115] See also Fig.15 , Fig.15 is a schematic diagram of a system for processing tasks based on configuration queue data disclosed in an embodiment of the present invention. Fig.15 As shown, the data processing system includes a task controller, a data processor and a storage space, the storage space is used to store configuration queue data, the configuration queue data is used to configure the data processor, specifically to configure the control register of the data processor. Further, the data processor also includes an execution unit, wherein:

[0116] The task controller is used to, when receiving a data processing task sent by the processor, determine the configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space, and perform configuration operations on the control registers of the data processor according to the configuration parameters corresponding to the data processing task, and after the configuration is completed, control the execution unit of the data processor to perform data processing operations matching the data processing task according to the configuration parameters corresponding to the data processing task.

[0117] It can be seen that the implementation Fig.15 The described system for task processing based on configuration queue data stores register configuration parameters of multiple tasks in an internal storage space in advance. When it is detected that a task is issued, the hardware reads back the configuration queue data through the internal storage space to parse the issued task before processing the task. After completing the configuration update of the internal control register, the new task is executed after the current task is processed according to the updated configuration. In this way, without increasing the control register, the occurrence of task gaps caused by untimely processor interrupt response can be reduced, thereby reducing the performance loss of the processor due to waiting, improving the resource utilization of the operation logic, and thus improving the processor performance; and by storing the register configuration parameters of multiple tasks in the internal storage space in advance, the execution unit of the data processor can reach the upper limit of the hardware performance without increasing the hardware resources (such as hardware area), thereby improving the performance utilization of the execution unit and saving costs.

[0118] In an optional embodiment, the task controller determines the configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space in a specific manner including:

[0119] Perform parsing operations on the data processing tasks to obtain header information corresponding to the data processing tasks;

[0120] The header information corresponding to the data processing task and the configuration queue data stored in the storage space are analyzed to obtain configuration parameters matching the header information, and the configuration parameters matching the header information are determined to be the configuration parameters corresponding to the data processing task.

[0121] In this optional embodiment, the header information corresponding to the above data processing task includes a header address;

[0122] The task controller analyzes the header information corresponding to the data processing task and the configuration queue data stored in the storage space to obtain the configuration parameters matching the header information, including:

[0123] According to the header address corresponding to the data processing task, an addressing operation is performed on the configuration queue data stored in the storage space to obtain a header corresponding to the header address;

[0124] The configuration parameters of the main body block independently corresponding to the header corresponding to the header address are obtained from the configuration queue data stored in the storage space as the configuration parameters matching the header information.

[0125] It can be seen that the implementation Fig.15 The described system for processing tasks based on configuration queue data can improve the analysis accuracy of the configuration parameters of the issued data processing tasks by analyzing the header information obtained by parsing the issued data processing tasks with the configuration queue data stored in the storage space. And by addressing in the storage space through the header address corresponding to the issued data processing task, the configuration parameters of the corresponding main block, i.e., the address offset, are accurately found, which is conducive to improving the configuration accuracy of the control register.

[0126] In yet another optional embodiment, Fig.16 is a schematic diagram of the structure of another system for performing task processing based on configuration queue data disclosed in an embodiment of the present invention, such as Fig.16 As shown, the task controller includes a thread control register, a task manager and a command queue parser. The thread control register and the task manager are connected through threads, and the thread corresponding to the thread control register has a corresponding command queue and task queue;

[0127] The thread control register is used to store the data processing task in the command queue corresponding to the data processing task, and send the data processing task to the task manager through the thread between the thread control register and the task manager;

[0128] The task manager is used to obtain the data processing task from the thread control register through the thread between the thread control register and the task manager, and store the data processing task in the task queue corresponding to the thread between the thread control register and the task manager;

[0129] The task manager is further used to obtain a data processing task from a task queue corresponding to a thread between a thread control register and the task manager, generate a task start signal according to the data processing task, and send the task start signal to the command queue parser, wherein the task start signal carries the data processing task;

[0130] The command queue parser is used to determine the header information corresponding to the data processing task according to the task start signal.

[0131] It can be seen that the implementation Fig.16The described system for performing task processing based on configuration queue data realizes accurate determination of header information corresponding to a data processing task through interaction between a thread control register, a task manager and a command queue parser, thereby facilitating improved configuration accuracy of the control register.

[0132] In yet another optional embodiment, Fig.16 As shown, the number of threads between the thread control register and the task manager is greater than or equal to 1, all threads do not interfere with each other, each thread has a unique corresponding command queue and a unique corresponding task queue, and the data processing task includes multiple subtasks;

[0133] The thread control register stores the data processing task in the command queue corresponding to the data processing task, and sends the data processing task to the task manager through the thread between the thread control register and the task manager. The specific method includes:

[0134] When it is determined that all the subtasks included in the data processing task can be stored in one command queue, the thread control register stores all the subtasks in a first command queue among all the command queues, and sends all the subtasks to the task manager through the thread corresponding to the first command queue;

[0135] The task manager obtains the data processing task from the thread control register through the thread between the thread control register and the task manager, and stores the data processing task in the task queue corresponding to the thread between the thread control register and the task manager, and obtains the data processing task from the task queue corresponding to the thread between the thread control register and the task manager, and generates a task start signal according to the data processing task. The specific method includes:

[0136] Obtain all subtasks from the thread control register through the thread corresponding to the first command queue, and store all subtasks in the task queue matching the thread corresponding to the first command queue;

[0137] From the task queue corresponding to the first command queue, a subtask among all subtasks in the task queue that have not executed data processing operations is obtained as the current subtask, and a task start signal is generated according to the current subtask, and the task start signal carries the current subtask.

[0138] It can be seen that the implementation Fig.16The described system for task processing based on configured queue data selects one of the command queues when there are multiple subtasks issued and all the issued subtasks can be stored in the same command queue, that is, the same task queue, to interact with the task manager, and then determine the current subtask, thereby improving the accuracy of determining the current subtask, generating a corresponding task start signal, and performing data processing corresponding to all commands of the current subtask, so that the task queue can realize orderly and efficient self-starting and executing corresponding data processing for the commands corresponding to all subtasks without relying on processor scheduling, effectively reducing task gaps, improving the performance of the execution unit, and thus preventing the occurrence of resource waste.

[0139] In yet another optional embodiment, Fig.16 As shown, the number of threads between the thread control register and the task manager is greater than or equal to 1, all threads do not interfere with each other, each thread has a unique corresponding command queue and a unique corresponding task queue, and the data processing task includes multiple subtasks;

[0140] The thread control register stores the data processing task in the command queue corresponding to the data processing task, and sends the data processing task to the task manager through the thread between the thread control register and the task manager. The specific method includes:

[0141] When it is determined that all subtasks included in the data processing task cannot be stored in one command queue, all subtasks are grouped to obtain subtask groups, and a corresponding second command queue is allocated to each subtask group from all command queues, and all subtasks of the subtask group corresponding to the second command queue are sent to the task manager through a thread corresponding to each second command queue;

[0142] The task manager obtains the data processing task from the thread control register through the thread between the thread control register and the task manager, and stores the data processing task in the task queue corresponding to the thread between the thread control register and the task manager, and obtains the data processing task from the task queue corresponding to the thread between the thread control register and the task manager, and generates a task start signal according to the data processing task. The specific method includes:

[0143] Obtain all subtasks of the subtask group corresponding to the second command queue from the thread control register through the thread corresponding to each second command queue, and store all subtasks of each subtask group in the task queue matching the second command queue corresponding to the subtask group;

[0144] The subtasks in the task queues that match all the second command queues are arbitrated to obtain an arbitration result, and based on the arbitration result, a subtask from all the subtasks that have not performed data processing operations in the task queues that match all the second command queues is selected as the current subtask, and a task start signal is generated based on the current subtask, and the task start signal carries the current subtask.

[0145] It can be seen that the implementation Fig.16 The described system for processing tasks based on configured queue data, when determining that all the issued subtasks cannot be stored in one command queue, groups tasks and selects the threads corresponding to the corresponding command queues to issue them in an orderly and accurate manner to the corresponding task queues, performs task arbitration, and sends all subtasks serially to the execution units for time-sharing processing according to the arbitration results, thereby realizing virtualization of the execution units, so that the images corresponding to all subtasks can be processed in an orderly and accurate manner, and reducing the occurrence of task gaps in software scheduling when multiple subtasks are issued through only one thread, that is, because the processor CPU is in a busy state at a certain moment and cannot respond to interrupts or the processor CPU is in an idle state at a certain moment, but the previous level of hardware has not yet completed processing, resulting in the next subtask having no input source data, thereby reducing the waiting time of the execution unit in a single thread, improving the processing performance of the execution unit, effectively reducing the degree of coupling between the system and the hardware processor, and reducing the software scheduling overhead of the CPU.

[0146] In yet another optional embodiment, Fig.16 As shown, each subtask includes at least one command, the header information corresponding to the data processing task includes the header information of all subtasks, and the header information corresponding to each subtask includes the header address of the command ranked first among all commands of the subtask and the header length of the next command corresponding to each command;

[0147] The specific method by which the command queue parser determines the header information corresponding to the data processing task according to the task start signal includes:

[0148] For any subtask, for the command ranked first in the subtask, parse the task start signal to obtain the header address corresponding to the command and the header length of the next command corresponding to each command; for the command not ranked first in the subtask, determine the header address corresponding to the command according to the header length address corresponding to the previous command and the header length of the next command corresponding to the previous command;

[0149] The command queue parser controls the execution unit of the data processor to perform a specific method of performing a data processing operation matching the data processing task according to the configuration parameters corresponding to the data processing task, including:

[0150] For any current subtask of the data processing task package, a start signal of a current command of the current subtask is sent to an execution unit of the data processor, the execution unit receives the start signal of the current command, and according to the start signal of the current command, switches the current state to the working state, and processes the image corresponding to the current command according to the current configuration parameters configured by the control register; when the data corresponding to the current command is processed, a processing completion signal of the current command is sent to the command queue parser;

[0151] Receive a signal indicating that the current command has been processed, and switch the current state to a working state based on the signal indicating that the current command has been processed. After switching to the working state, determine whether the current command is the last command in the current subtask based on the header length of the next command of the current command. When the determination result is no, update the next command to the current command, and re-send the above-mentioned operation of sending a start signal for the current command to the execution unit of the data processor until the data corresponding to the last command in the current subtask is processed.

[0152] It can be seen that the implementation Fig.16 The described system for task processing based on configuration queue data determines the header information of the next command by combining the header information of the previous command, that is, through the header information relationship between two adjacent commands, the header information of each command can be accurately and efficiently determined; and the data between two adjacent commands is processed by self-starting hardware without the need for processor CPU scheduling, so that command gaps will not be generated due to the processor CPU's untimely response to interrupts, effectively improving the utilization of the execution unit.

[0153] In yet another optional embodiment, Fig.16 As shown, the command queue parser is also used to send a task end signal of the current subtask to the task manager after the data corresponding to the last command in the current subtask is processed;

[0154] The task manager is further used to receive a task end signal of the current subtask, and determine the next subtask from all subtasks that have not performed data processing operations in the task queue corresponding to the task manager;

[0155] The task manager is further used to update the next subtask to the current subtask, and re-execute the above-mentioned operation of generating a task start signal according to the current subtask, until the data corresponding to the last subtask in all subtasks of the command queue corresponding to the task manager is processed;

[0156] The specific method in which the task manager determines the next subtask from all subtasks that have not performed data processing operations in the task queue corresponding to the task manager includes:

[0157] When it is determined that all subtasks included in the data processing task can be stored in one command queue, the subtask currently ranked first is selected as the next subtask from all subtasks that have not executed data processing operations in the task queue matched by the thread corresponding to the first command queue in a first-in-first-out manner;

[0158] When it is determined that all subtasks included in the data processing task cannot be stored in one command queue, according to the arbitration result, the subtask currently ranked first is selected as the next subtask from all subtasks that have not executed data processing operations in all task queues matched by the second command queue.

[0159] It can be seen that the implementation Fig.16 The described system for processing tasks based on configured queue data, after completing processing of the data corresponding to all commands of the current subtask, the self-starting task manager determines the next subtask from the existing task queue as quickly as possible for processing, without waiting for the interrupt response of the processor CPU, thereby reducing the task gap and improving the execution performance of the execution unit; and selecting the next subtask based on the first-in-first-out method and / or the arbitration result of the subtask can improve the accuracy and efficiency of determining the next subtask, thereby facilitating further reducing the gap between tasks and improving the execution performance of the execution unit.

[0160] Embodiment 3

[0161] See also Fig.17 , Fig.17 FIG. 1 is a schematic diagram of another system for processing tasks based on configuration queue data disclosed in an embodiment of the present invention. Fig.17 As shown, the device may include:

[0162] A memory 301 storing executable program codes;

[0163] a processor 302 coupled to the memory 301;

[0164] Furthermore, it may also include an input interface 303 and an output interface 304 coupled to the processor 302;

[0165] The processor 302 calls the executable program code stored in the memory 301 to execute the steps of the method for performing task processing based on the configuration queue data described in the first embodiment.

[0166] Embodiment 4

[0167] An embodiment of the present invention discloses a computer-readable storage medium storing a computer program for electronic data exchange, wherein the computer program enables a computer to execute the steps of the method for performing task processing based on configuration queue data described in the first embodiment.

[0168] Embodiment 5

[0169] An embodiment of the present invention discloses a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to enable a computer to execute the steps in the method for performing task processing based on configured queue data described in the first embodiment.

[0170] The device embodiments described above are only illustrative, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, i.e., they may be located in one place, or they may be distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Those of ordinary skill in the art may understand and implement it without creative work.

[0171] Through the specific description of the above embodiments, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the above technical solution can be essentially or partly contributed to the prior art in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, and the storage medium includes a read-only memory (ROM), a random access memory (RAM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), a one-time programmable read-only memory (OTPROM), an electronically erasable rewritable read-only memory (EEPROM), a compact disc (CD-ROM) or other optical disc storage, magnetic disk storage, magnetic tape storage, or any other computer-readable medium that can be used to carry or store data.

[0172] Finally, it should be noted that the method and system for performing task processing based on configuration queue data disclosed in the embodiment of the present invention disclose only the preferred embodiments of the present invention, which are only used to illustrate the technical solution of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A method for processing tasks based on configuration queue data, characterized in that: The method is applied to a data processing system, the data processing system comprises a task controller, a data processor and a storage space, the storage space is used to store configuration queue data, the configuration queue data is used to configure the data processor, the method comprises: When receiving a data processing task sent by a processor, the task controller determines the configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space; The task controller performs configuration operations on the control registers of the data processor according to the configuration parameters corresponding to the data processing task, and after the configuration is completed, controls the execution unit of the data processor to perform data processing operations matching the data processing task according to the configuration parameters corresponding to the data processing task.

2. The method for performing task processing based on configuration queue data according to claim 1, characterized in that: The task controller determines the configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space, including: The task controller performs a parsing operation on the data processing task to obtain header information corresponding to the data processing task; The task controller analyzes the header information corresponding to the data processing task and the configuration queue data stored in the storage space to obtain configuration parameters matching the header information, and determines that the configuration parameters matching the header information are the configuration parameters corresponding to the data processing task.

3. The method for performing task processing based on configuration queue data according to claim 2, characterized in that: The header information corresponding to the data processing task includes a header address; The task controller analyzes the header information corresponding to the data processing task and the configuration queue data stored in the storage space to obtain configuration parameters matching the header information, including: The task controller performs an addressing operation on the configuration queue data stored in the storage space according to the header address corresponding to the data processing task, and obtains a header corresponding to the header address; The task controller obtains the configuration parameters of the main block independently corresponding to the header corresponding to the header address from the configuration queue data stored in the storage space as the configuration parameters matching the header information.

4. The method for performing task processing based on configuration queue data according to claim 2 or 3, characterized in that: The task controller includes a thread control register, a task manager and a command queue parser, the thread control register and the task manager are connected through a thread, and the thread corresponding to the thread control register has a corresponding command queue and task queue; The task controller performs a parsing operation on the data processing task to obtain header information corresponding to the data processing task, including: The thread control register stores the data processing task in a command queue corresponding to the data processing task, and sends the data processing task to the task manager through a thread between the thread control register and the task manager; The task manager obtains the data processing task from the thread control register through the thread between the thread control register and the task manager, and stores the data processing task in a task queue corresponding to the thread between the thread control register and the task manager; The task manager obtains the data processing task from the task queue corresponding to the thread between the thread control register and the task manager, generates a task start signal according to the data processing task, and sends the task start signal to the command queue parser, wherein the task start signal carries the data processing task; The command queue parser determines the header information corresponding to the data processing task according to the task start signal.

5. The method for performing task processing based on configuration queue data according to claim 4, characterized in that: The number of threads between the thread control register and the task manager is greater than or equal to 1, all the threads do not interfere with each other, each thread has a unique corresponding command queue and a unique corresponding task queue, and the data processing task includes multiple subtasks; The thread control register stores the data processing task in a command queue corresponding to the data processing task, and sends the data processing task to the task manager through a thread between the thread control register and the task manager; the task manager obtains the data processing task from the thread control register through the thread between the thread control register and the task manager, and stores the data processing task in a task queue corresponding to the thread between the thread control register and the task manager; The task manager obtains the data processing task from the task queue corresponding to the thread between the thread control register and the task manager, and generates a task start signal according to the data processing task, including: When it is determined that all the subtasks included in the data processing task can be stored in one command queue, the thread control register stores all the subtasks in a first command queue among all the command queues, and sends all the subtasks to the task manager through the thread corresponding to the first command queue; The task manager obtains all the subtasks from the thread control register through the thread corresponding to the first command queue, and stores all the subtasks in the task queue matching the thread corresponding to the first command queue; The task manager obtains, from the task queue corresponding to the first command queue, a subtask among all subtasks in the task queue that have not performed data processing operations, as the current subtask, and generates a task start signal based on the current subtask, wherein the task start signal carries the current subtask.

6. The method for performing task processing based on configuration queue data according to claim 4, characterized in that: The number of threads between the thread control register and the task manager is greater than or equal to 1, all the threads do not interfere with each other, each thread has a unique corresponding command queue and a unique corresponding task queue, and the data processing task includes multiple subtasks; The thread control register stores the data processing task in a command queue corresponding to the data processing task, and sends the data processing task to the task manager through a thread between the thread control register and the task manager; the task manager obtains the data processing task from the thread control register through the thread between the thread control register and the task manager, and stores the data processing task in a task queue corresponding to the thread between the thread control register and the task manager; The task manager obtains the data processing task from the task queue corresponding to the thread between the thread control register and the task manager, and generates a task start signal according to the data processing task, including: When it is determined that all the subtasks included in the data processing task cannot be stored in one command queue, the thread control register groups all the subtasks to obtain subtask groups, and allocates a corresponding second command queue to each subtask group from all the command queues, and sends all the subtasks of the subtask group corresponding to the second command queue to the task manager through the thread corresponding to each second command queue; The task manager obtains all subtasks of the subtask group corresponding to the second command queue from the thread control register through the thread corresponding to each second command queue, and stores all subtasks of each subtask group in the task queue matching the second command queue corresponding to the subtask group; The task manager arbitrates the subtasks in all the task queues that match the second command queue to obtain an arbitration result, and based on the arbitration result, selects a subtask from all the subtasks that have not performed data processing operations in all the task queues that match the second command queue as the current subtask, and generates a task start signal based on the current subtask, and the task start signal carries the current subtask.

7. The method for performing task processing based on configuration queue data according to claim 5 or 6, characterized in that: Each of the subtasks includes at least one command, the header information corresponding to the data processing task includes the header information of all the subtasks, and the header information corresponding to each of the subtasks includes the header address of the command ranked first among all the commands of the subtask and the header length of the next command corresponding to each of the commands; The command queue parser determines the header information corresponding to the data processing task according to the task start signal, including: For any of the subtasks, for the command ranked first in the subtask, the command queue parser parses the task start signal to obtain the header address corresponding to the command and the header length of the next command corresponding to each of the commands; for the command not ranked first in the subtask, the header address corresponding to the command is determined according to the header length address corresponding to the previous command and the header length of the next command corresponding to the previous command; The task controller controls the execution unit of the data processor to perform a data processing operation matching the data processing task according to the configuration parameters corresponding to the data processing task, including: For any current subtask of the data processing task package, the command queue parser sends a start signal of the current command of the current subtask to the execution unit of the data processor, and the execution unit receives the start signal of the current command, and switches the current state to the working state according to the start signal of the current command, and processes the image corresponding to the current command according to the current configuration parameters configured by the control register; when the data corresponding to the current command is processed, a processing completion signal of the current command is sent to the command queue parser; The command queue parser receives a processing completion signal of the current command, and switches the current state to a working state according to the processing completion signal of the current command. After switching to the working state, it determines whether the current command is the last command in the current subtask according to the header length of the next command of the current command. When the result of the determination is no, the next command is updated to the current command, and the operation of sending the start signal of the current command to the execution unit of the data processor is repeated until the data corresponding to the last command in the current subtask is processed.

8. The method for performing task processing based on configuration queue data according to claim 7, characterized in that: The method further comprises: When the data corresponding to the last command in the current subtask is processed, the command queue parser sends a task end signal of the current subtask to the task manager; The task manager receives a task end signal of the current subtask, and determines a next subtask from all subtasks that have not executed data processing operations in the task queue corresponding to the task manager; The task manager updates the next subtask to the current subtask, and re-executes the operation of generating a task start signal according to the current subtask, until the data corresponding to the last subtask in all subtasks of the command queue corresponding to the task manager is processed; The task manager determines the next subtask from all subtasks that have not performed data processing operations in the task queue corresponding to the task manager, including: When it is determined that all the subtasks included in the data processing task can be stored in one command queue, the task manager selects the subtask that is currently ranked first from all the subtasks that have not executed the data processing operation in the task queue matched by the thread corresponding to the first command queue in a first-in-first-out manner as the next subtask; When it is determined that all the subtasks contained in the data processing task cannot be stored in one command queue, the task manager, based on the arbitration result, selects the subtask currently ranked first from all the subtasks that have not performed data processing operations in all task queues matched by the second command queue as the next subtask.

9. The method for processing tasks based on configuration queue data according to any one of claims 1 to 8, characterized in that: The configuration queue data is composed of data of each of the multiple headers and data of a main block uniquely corresponding to the header; For any of the headers, the data of the header includes the starting address of the main block uniquely corresponding to the header, the length of the main block, the base address offset of the control register that needs to be updated corresponding to the main block, the header length of the next command and the update flag of the control register; The data of each of the main blocks includes the address offset of the control register that needs to be updated; Each of the headers is used to address and parse a main body block uniquely corresponding to the header, and the data of each main body block is used to perform an update operation on the address offset of the control register; The storage space occupied by all the main blocks in the storage space includes continuous storage space and / or non-continuous storage space.

10. A system for processing tasks based on configuration queue data, characterized in that: The system comprises a task controller, a data processor and a storage space, wherein the storage space is used to store configuration queue data, and the configuration queue data is used to configure the data processor, wherein: The task controller is used to, when receiving a data processing task issued by the processor, determine the configuration parameters corresponding to the data processing task according to the data processing task and the configuration queue data stored in the storage space; and perform configuration operations on the control registers of the data processor according to the configuration parameters corresponding to the data processing task, and after the configuration is completed, control the execution unit of the data processor to perform data processing operations matching the data processing task according to the configuration parameters corresponding to the data processing task.

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