Cross-platform test scene reproduction method

Abstract

The invention relates to the technical field of chip verification, in particular to a cross-platform test scene reproduction method, which comprises the following steps of: S1, executing simulation of chip design on a first verification platform, and capturing and recording all related signal waveform data in a simulation process through a simulation tool; s2, converting the waveform data captured in the S1 into a text format by using a waveform conversion tool, wherein the text format comprises an input signal required by a second platform; s3, the second verification platform reads the text content converted in the step S2, state data of each signal at different time points are extracted from the text content, and an excitation signal sequence suitable for the second verification platform is generated according to the extracted information; s4, loading the excitation signal generated in the step S3 to an RTL model of a second verification platform; and S5, operating simulation on the second verification platform by using the excitation signal set in the step S4. According to the method, the flexibility, efficiency and reliability of chip verification are remarkably improved.

Description

Technical Field

[0001] The present invention relates to the field of chip verification technology, and in particular to a method for reproducing a cross-platform test scenario. Background Art

[0002] The rapid advancement of integrated circuit technology has led to more complex chip design, which has put forward more stringent requirements for chip testing and verification. In the chip development process, verification is a key step to ensure that the design meets the specifications. In order to fully verify the functions and performance of the chip, verification engineers need to develop multiple levels of verification platforms for the internal modules of the chip, including module level, subsystem level and system level. Since different verification platforms may have different interface signals, verification strategies and test methods, this may reveal a series of problems. In addition, the lack of interoperability between verification platforms makes it difficult to reproduce test scenarios found on one platform on another platform, which limits the flexibility and efficiency of testing. Therefore, it becomes crucial to develop methods that can migrate and reproduce test scenarios between different verification platforms.

[0003] In summary, a method for reproducing cross-platform test scenarios is provided. The method is based on the waveform generated by simulation on the first verification platform and reproduced on the second verification platform to narrow the scope of code debugging, or to study the effect of module functions running on the overall chip, thereby improving the efficiency of chip function or performance debugging. Summary of the invention

[0004] The purpose of the present invention is to provide a method for reproducing cross-platform test scenarios to solve the problem proposed in the above background technology that the test scenarios are difficult to reproduce on different platforms due to differences in interface signals, verification strategies and test methods between different verification platforms, thereby limiting the flexibility and efficiency of the test.

[0005] To achieve the above object, the present invention provides a method for reproducing a cross-platform test scenario, comprising the following steps: S1. Execute chip design simulation on the first verification platform, and capture and record all relevant signal waveform data in the simulation process through the simulation tool; S2, using a waveform conversion tool, converting the waveform data captured in S1 into a text format, wherein the text format contains the input signal required by the second platform; S3, the second verification platform reads the text content converted in S2, extracts the state data of each signal at different time points, and generates an excitation signal sequence suitable for the second verification platform according to the extracted information; S4, loading the stimulus signal generated in S3 onto the RTL model of the second verification platform; S5. Use the stimulus signal set in S4 to run the simulation on the second verification platform.

[0006] As a further improvement of the technical solution, the specific steps of performing simulation and saving signal waveform in S1 are as follows: S1.1, configure the simulation software, set the compiler and linker options, load the necessary library files, write the test scripts and test programs, and define the test scenarios to be executed; S1.2. Determine the simulation time range, accuracy, step size, and the list of signals to be recorded, and set the waveform recording options in the simulation tool; S1.3. Start the simulation software, and the simulation tool automatically records the waveform data of all marked signals changing with time.

[0007] As a further improvement of the technical solution, the specific steps of converting the waveform data into text format in S2 are: S2.1. Configure the waveform conversion tool, set the parameters of the conversion tool, specify the output format, and ensure that both timestamps and signal values ​​are correctly converted and aligned; S2.2, run the waveform conversion tool to convert the original waveform data into text format; S2.3. Check the output text file to verify whether it contains all required signals and their corresponding timestamp information.

[0008] As a further improvement of the technical solution, the specific steps of generating the excitation signal in S3 are: S3.1. Use the scripting language and tools supported by the second verification platform to import the converted text file, parse each line in the file, and identify the signal name, timestamp, and corresponding signal value; S3.2, identify which signals the second verification platform needs to pay attention to, and create a time series data structure for each signal to store the state of the signal at different time points; S3.3, sort the signal data in chronological order and remove invalid and duplicate data points; S3.4, generating a snapshot containing all the states of the signals of interest for each time point, and encapsulating the snapshot at each time point into an excitation signal package; S3.5. Check the completeness and accuracy of the sequence.

[0009] As a further improvement of the technical solution, the specific steps of loading the stimulus signal in S4 onto the RTL model of the second verification platform are as follows: S4.1. Confirm that the format of the excitation signal sequence is compatible with the interface of the second verification platform, and use the interface and script commands provided by the second verification platform to import the excitation signal sequence; S4.2, loading the RTL model, and associating the signals in the stimulus signal sequence with the corresponding input ports of the RTL model; S4.3, at each time point, updating the input port of the model according to the content of the stimulus signal packet; S4.4. Add assertions and monitoring points to the model to verify that input signals change as expected.

[0010] As a further improvement of the technical solution, the specific steps of using the excitation signal set in S4 in S5 to run the simulation on the second verification platform are: S5.1. Set the parameters of the second platform simulation tool, configure the simulation clock frequency, simulation accuracy and simulation step size to match the settings of the first verification platform; S5.2, start the simulation and let the RTL model run according to the loaded stimulus signal sequence; S5.3. During the simulation process, use the monitoring tools and assertions of the second verification platform to observe the output signals and internal states of the model; S5.4. Compare the simulation results of the second verification platform with the results of the first verification platform to check whether the output signals are consistent.

[0011] As a further improvement of the technical solution, the simulation tools of the first platform and the second platform both adopt VCS simulators.

[0012] As a further improvement of the technical solution, the waveform conversion tool adopts the fsdbreport tool.

[0013] Compared with the prior art, the present invention has the following beneficial effects: 1. In the method for reproducing a cross-platform test scenario, by performing a simulation of a chip design on a first verification platform, capturing and recording all relevant signal waveform data, and then converting these data into a text format for use by a second verification platform, seamless migration and reproduction between different verification platforms are achieved, so that verification personnel can flexibly switch and reuse test scenarios between different platforms without being limited to a single platform. The method of the present invention avoids the work of repeatedly developing and debugging test scenarios on different verification platforms, saving a lot of time and resources.

[0014] 2. In this method of reproducing cross-platform test scenarios, the waveform data captured during the simulation process is converted into a text format by using a waveform conversion tool, which simplifies the storage and transmission process of the waveform data. This conversion not only reduces the demand for data storage space, but also improves the readability and processing speed of the data, making cross-platform data exchange more efficient; the use of a standardized text format for data conversion ensures the compatibility and consistency of data exchange and processing between different verification platforms. This standardized method allows different platforms to be seamlessly connected without the need for additional development of adaptation tools, further improving the efficiency of verification work; by accurately parsing the waveform data and generating an excitation signal sequence suitable for the second verification platform based on this data, the accurate reproduction of the test scenario on different platforms is ensured, which not only improves the reliability of verification, but also ensures the consistency and credibility of the verification results. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The figure is a flow chart of the overall method of the present invention. DETAILED DESCRIPTION

[0016] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0017] Embodiment 1: See also Figure 1 As shown, this embodiment provides a method for reproducing a cross-platform test scenario, including the following steps: A method for reproducing a cross-platform test scenario includes the following steps: S1. Execute chip design simulation on the first verification platform, and capture and record all relevant signal waveform data in the simulation process through the simulation tool; The specific steps for executing simulation and saving signal waveform in S1 are as follows: S1.1. Configure the simulation software, set the compiler and linker options, and load the necessary library files. Write test scripts and test programs, and define the test scenarios to be executed, including initialization conditions, input signal sequences, and expected output behaviors. S1.2. Determine the simulation time range, accuracy, step size, and the list of signals to be recorded, set the waveform recording option in the simulation tool, and ensure that all relevant input, output, and internal signals are recorded; S1.3. Start the simulation software, load the test case and start the simulation. Observe the simulation progress to ensure that there are no errors or abnormalities. During the simulation, the simulation tool will automatically record the waveform data of all marked signals changing over time.

[0018] S2, using a waveform conversion tool, converting the waveform data captured in S1 into a text format, which contains the input signal required by the second platform; The specific steps for converting waveform data into text format in S2 are: S2.1. Configure the waveform conversion tool. Set the parameters of the conversion tool to ensure that it can process the entire waveform file and extract all necessary signal information. Specify the output format, which is usually a human-readable text format such as CSV or VCD. Ensure that both timestamps and signal values ​​are correctly converted and aligned. S2.2, run the waveform conversion tool to convert the original waveform data into text format, monitor the conversion process to ensure that no errors occur and the conversion process proceeds smoothly; S2.3. After the conversion is completed, check the output text file to verify whether it contains all the required signals and their corresponding timestamp information, and confirm the integrity of the data, that is, there are no missing or erroneous data points.

[0019] If the text file contains too many signals and the second verification platform does not need all of them, you may need to use scripts or tools to further filter out the necessary signals. Depending on the requirements of the second verification platform, you may also need to adjust the format or arrangement order of the signals.

[0020] S3, the second verification platform reads the text content converted in S2, extracts the state data of each signal at different time points, and generates an excitation signal sequence suitable for the second verification platform according to the extracted information; The specific steps of generating the excitation signal in S3 are: S3.1. Use the scripting language and tools supported by the second verification platform to import the converted text file, parse each line in the file, identify the signal name, timestamp and corresponding signal value, and read and understand the text format file generated by fsdbreport or other waveform conversion tools; S3.2, identify which signals the second verification platform needs to pay attention to, create a time series data structure for each signal, store the state of the signal at different time points, and separate the time series of each signal from the parsed data; S3.3, sort the signal data in chronological order, remove invalid and duplicate data points, and if necessary, convert the signal value into a format supported by the second verification platform to ensure that the signal data meets the input requirements of the second verification platform; S3.4. Generate a snapshot containing all the states of the signals of interest for each time point, encapsulate the snapshots of each time point into a stimulus signal package, optimize the sequence if necessary (e.g., remove redundant stimulus signals) to reduce the simulation time, and construct a stimulus signal sequence suitable for the second verification platform based on the extracted and formatted signal data; S3.5. Check the completeness and accuracy of the sequence to ensure that there are no missing or erroneous signal states. If possible, perform a small-scale pre-simulation to verify whether the stimulus signal will lead to the expected behavior and ensure that the generated stimulus signal sequence is correct and meets expectations.

[0021] S4, loading the stimulus signal generated in S3 onto the RTL model of the second verification platform; The specific steps of loading the stimulus signal in S4 onto the RTL model of the second verification platform are as follows: S4.1. Confirm that the format of the stimulus signal sequence is compatible with the interface of the second verification platform, use the interface and script commands provided by the second verification platform to import the stimulus signal sequence, and load the stimulus signal sequence generated in S3 into the environment of the second verification platform; S4.2, loading the RTL model, associating the signals in the stimulus signal sequence with the corresponding input ports of the RTL model, and ensuring that the RTL model is ready to receive the external stimulus signal; S4.3. At each time point, the input port of the model is updated according to the content of the stimulus signal packet to ensure that the signal is applied at the correct time point, which usually requires precise clock synchronization and delay management; S4.4. Add assertions and monitoring points to the model to verify that input signals change as expected and that stimulus signals are loaded and applied correctly.

[0022] S5. Use the stimulus signal set in S4 to run the simulation on the second verification platform.

[0023] In S5, the specific steps of running the simulation on the second verification platform using the stimulus signal set in S4 are as follows: S5.1. Set the parameters of the second platform simulation tool, configure the simulation clock frequency, simulation accuracy and simulation step size to match the settings of the first verification platform; S5.2. Start the simulation and let the RTL model run according to the loaded stimulus signal sequence. The simulation should cover the time range and accuracy set previously; S5.3. During the simulation process, use the monitoring tools and assertions of the second verification platform to observe the output signals and internal states of the model to verify the correctness of the function, and record the key output signals and states during the simulation process for subsequent analysis and comparison; S5.4. Compare the simulation results of the second verification platform with those of the first verification platform to check whether the output signals are consistent. If there are differences, analyze the reasons for any differences, which may be due to simulation settings, model differences, or errors in the data conversion process. Find the reasons and adjust the model or simulation settings.

[0024] The simulation tools of the first platform and the second platform both use VCS simulators. In addition, NCSim, ModelSim, Riviera-PRO and Xcelium simulators can also be used, and specific ones can be selected according to needs.

[0025] The waveform conversion tool uses the fsdbreport tool. In addition, you can also use tools such as vcd2vcd, GTKWave, and verilator_vcd_cvt. You can choose according to your needs.

[0026] The first verification platform is a module-level verification platform, which focuses on verifying a single design module (DUT) within the chip. On this platform, simulation tools such as VCS or NCSIM are used for module-level simulation. After the simulation is completed, the signal data is extracted from the waveform file generated by the tool and converted into a text file. The second verification platform is a system-level verification platform, which focuses on the integrated verification of the entire chip or its multiple modules. Before the simulation starts, the system-level verification platform reads the previously generated text file. During the simulation, the system-level platform reproduces the module signal of the first verification platform based on the time points and signal values ​​recorded in the text file. This method can verify whether the module-level simulation scenario can run normally in the system-level environment and evaluate the performance of the module in the overall chip environment.

[0027] Embodiment 2: The difference between this embodiment and embodiment 1 is that the first verification platform is a system-level verification platform, and the second verification platform is a module-level verification platform; The specific method is as follows: The first verification platform is a system-level verification platform, which is responsible for verifying the overall behavior of the entire chip or its multiple modules. It uses the same simulation tool to perform system-level simulation, generate waveform files, extract signal data of specific modules from the waveform files, and convert them into text files. The second verification platform is a module-level verification platform, which is dedicated to in-depth verification of a specific module of the chip. In the simulation preparation stage, the text file generated by the system-level platform is read in. During simulation, the module signal in the system-level simulation is reproduced according to the time series and signal status recorded in the text file. This method can decompose complex system-level problems, narrow the scope of code debugging, and focus on the debugging of module-level code, so as to locate and solve problems more effectively.

[0028] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. The above embodiments and descriptions are only preferred examples of the present invention and are not intended to limit the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A method for reproducing a cross-platform test scenario, characterized in that: The following steps are involved: S1. Execute chip design simulation on the first verification platform, and capture and record all relevant signal waveform data in the simulation process through the simulation tool; S2, using a waveform conversion tool, converting the waveform data captured in S1 into a text format, wherein the text format contains the input signal required by the second platform; S3, the second verification platform reads the text content converted in S2, extracts the state data of each signal at different time points, and generates an excitation signal sequence suitable for the second verification platform according to the extracted information; S4, loading the stimulus signal generated in S3 onto the RTL model of the second verification platform; S5. Using the stimulus signal set in S4, run a simulation on a second verification platform.

2. A cross-platform test scenario reproduction method according to claim 1, characterized in that: The specific steps of performing simulation and saving signal waveform in S1 are as follows: S1.1, configure the simulation software, set the compiler and linker options, load the necessary library files, write the test scripts and test programs, and define the test scenarios to be executed; S1.

2. Determine the simulation time range, accuracy, step size, and the list of signals to be recorded, and set the waveform recording options in the simulation tool; S1.

3. Start the simulation software, and the simulation tool automatically records the waveform data of all marked signals changing with time.

3. The method for reproducing a cross-platform test scenario according to claim 1, characterized in that: The specific steps of converting the waveform data into text format in S2 are: S2.

1. Configure the waveform conversion tool, set the parameters of the conversion tool, specify the output format, and ensure that both timestamps and signal values ​​are correctly converted and aligned; S2.2, run the waveform conversion tool to convert the original waveform data into text format; S2.

3. Check the output text file to verify whether it contains all required signals and their corresponding timestamp information.

4. The method for reproducing a cross-platform test scenario according to claim 1, characterized in that: The specific steps of generating the excitation signal in S3 are: S3.

1. Use the scripting language and tools supported by the second verification platform to import the converted text file, parse each line in the file, and identify the signal name, timestamp, and corresponding signal value; S3.2, identify which signals the second verification platform needs to pay attention to, and create a time series data structure for each signal to store the state of the signal at different time points; S3.3, sort the signal data in chronological order and remove invalid and duplicate data points; S3.4, generating a snapshot containing all the states of the signals of interest for each time point, and encapsulating the snapshot at each time point into an excitation signal package; S3.

5. Check the completeness and accuracy of the sequence.

5. The method for reproducing a cross-platform test scenario according to claim 1, characterized in that: The specific steps of loading the stimulus signal in S4 onto the RTL model of the second verification platform are as follows: S4.

1. Confirm that the format of the excitation signal sequence is compatible with the interface of the second verification platform, and use the interface and script commands provided by the second verification platform to import the excitation signal sequence; S4.2, loading the RTL model, and associating the signals in the stimulus signal sequence with the corresponding input ports of the RTL model; S4.3, at each time point, updating the input port of the model according to the content of the stimulus signal packet; S4.

4. Add assertions and monitoring points to the model to verify that input signals change as expected.

6. The method for reproducing a cross-platform test scenario according to claim 1, characterized in that: In S5, the specific steps of running the simulation on the second verification platform using the excitation signal set in S4 are as follows: S5.

1. Set the parameters of the second platform simulation tool, configure the simulation clock frequency, simulation accuracy and simulation step size to match the settings of the first verification platform; S5.2, start the simulation and let the RTL model run according to the loaded stimulus signal sequence; S5.

3. During the simulation process, use the monitoring tools and assertions of the second verification platform to observe the output signals and internal states of the model; S5.

4. Compare the simulation results of the second verification platform with the results of the first verification platform to check whether the output signals are consistent.

7. The method for reproducing a cross-platform test scenario according to claim 1, characterized in that: The simulation tools of the first platform and the second platform both adopt VCS simulator.

8. The method for reproducing a cross-platform test scenario according to claim 1, characterized in that: The waveform conversion tool uses the fsdbreport tool.

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