Rapid AGC radio frequency circuit
By designing power-division amplifier circuits, detection modules, CNC circuits and control circuits in AGC radio frequency circuits, the response speed and noise problems in the existing technology are solved, fast gain control and low noise are achieved, and signal-to-noise ratio and circuit efficiency are improved. .
Patent Information
- Application Number
- CN202411305723.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2025-01-03
AI Technical Summary
Existing AGC RF circuits have shortcomings in fast response and low noise, especially when the input signal changes, it is difficult to quickly adjust the gain, and nonlinear distortion may be introduced when large signals are input, affecting the signal-to-noise ratio and circuit efficiency.
A fast AGC radio frequency circuit including power-division amplifier circuit, detection module, CNC circuit and control circuit was designed. Through low noise amplification and fast power acquisition, high-speed comparator and absorption switching chip are used to achieve rapid gain control, reducing intermediate devices. Delay and reduce noise figure.
It realizes fast response, low noise, low fuzzy zone and high signal-to-noise ratio, ensuring that the gain can be adjusted quickly when the input signal changes, avoiding nonlinear distortion, and improving the overall performance of the AGC RF circuit.
Smart Images
Figure CN119254166A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of microwave technology, in particular to a fast AGC radio frequency circuit. Background Art
[0002] AGC circuits have been widely used in various receivers, recorders and signal acquisition systems. They are also widely used in optical fiber communication, microwave communication, satellite communication and other communication systems as well as radar and radio and television systems. The AGC circuit is a variable gain controller set in the receiver link. Its purpose is to automatically adjust the receiver gain according to the power of the received signal so that the receiver output remains within the appropriate power range, while also improving the receiver's input dynamic range. The key to the AGC circuit is to "quickly establish the control voltage", which requires that the attenuator and detection comparison control circuit in the RF circuit have a faster time response.
[0003] AGC principle: When the input signal is very weak, the receiver gain is large and the automatic gain control circuit does not work; when the input signal is very strong, the automatic gain control circuit controls to reduce the receiver gain. In this way, when the received signal strength changes, the output power of the receiver will remain basically unchanged or constant. Therefore, the requirements for the AGC circuit are: when the input signal is small, the AGC circuit does not work, and only when the input signal increases to a certain extent, the AGC circuit will play a control role.
[0004] In order to achieve fast automatic gain control: the entire feedback circuit is required to be simple, the number of devices selected should be as small as possible, and the link should be as short as possible; 2. Devices with faster response speed are required; 3. In the actual circuit, the power consumption of the module, the realization of the structure and the economy must also be considered. The selection of the CNC position: 1. Ensure that the receiving amplifier is not overloaded; 2. Do not deteriorate the signal-to-noise ratio of the receiver; 3. Do not introduce excessive nonlinear distortion in large signals.
[0005] In order to prevent the receiver from being overloaded, the digital control position should be as far forward as possible; in order to ensure a large signal-to-noise ratio, the digital control position should be as far back as possible. Therefore, when selecting the first-stage amplifier of the receiver, the amplifier should have low noise and high output power. The present invention mainly describes the application of AGC in the receiver. The receiver frequency is 2 to 18 GHz. The receiver realizes closed-loop gain regulation and realizes automatic gain adjustment in real time. Summary of the invention
[0006] The object of the present invention is to provide a fast AGC radio frequency circuit.
[0007] The technical solution to achieve the purpose of the present invention is: a fast AGC radio frequency circuit, including a power divider amplifier circuit, a detection module, a digital control circuit and a control circuit. The power divider amplifier circuit is used to divide the input radio frequency signal into two paths after low-noise amplification, one of which enters the detection module for power collection, and the other enters the digital control circuit for digital controlled attenuation. The control circuit analyzes the collected power information, outputs a control level to the digital control circuit, and controls the internal switch of the digital control circuit to select a pass-through or attenuation state.
[0008] Preferably, the power division amplifier circuit comprises a first amplifier ZA1 and a one-to-two power divider A1. After the input signal is amplified by the first amplifier ZA1, the amplified signal is power-divided into two paths by the one-to-two power divider A1.
[0009] Preferably, the detection module comprises a second amplifier ZA2, a third amplifier ZA3 and a detection circuit which are connected in sequence.
[0010] Preferably, the detection circuit adopts a negative polarity detector CDF7620-000.
[0011] Preferably, the control circuit comprises a high-speed comparator MAX9010EXT.
[0012] Preferably, the digital control circuit includes a first switch, an attenuation module and a second switch, the moving end of the first switch is connected to one of the outputs of the power divider amplifier circuit, the two fixed ends are respectively connected to a fixed end of the second switch and one end of the attenuation module, and the other fixed end of the second switch is connected to the other end of the attenuation module.
[0013] Compared with the prior art, the present invention has the following significant advantages:
[0014] 1. Fast response: The entire circuit is simple, uses fewer devices, has a fast response speed, and a short link, which enables the AGC RF circuit to respond quickly.
[0015] 2. Internally integrated input signal acquisition circuit: Real-time quantitative acquisition of input signal power information is achieved through power divider A1, detection circuit and control circuit.
[0016] 3. Small fuzzy zone: When the input comparator signal has a slight interference near the threshold value, the output voltage will produce corresponding jitter. Introducing a hysteresis comparator can solve the jitter problem and reduce the fuzzy zone.
[0017] 4. Low noise factor: The input signal is amplified by the low-noise, large-dynamic first amplifier ZA1 to reduce the noise factor of the AGC RF circuit and will not introduce excessive nonlinear distortion when a large signal is input. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 The invention discloses a principle block diagram of a fast AGC radio frequency circuit.
[0019] Figure 2 It is a principle block diagram of the comparison control circuit in the present invention.
[0020] Figure 3 It is a radio frequency layout diagram of a fast AGC radio frequency circuit in the present invention.
[0021] Figure 4 It is the AGC response speed when a large signal is input.
[0022] Figure 5 It is the AGC response speed when a small signal is input.
[0023] Figure 6 This is a schematic diagram of the change in response time caused by the input signal size. DETAILED DESCRIPTION
[0024] A fast AGC (automatic gain control) radio frequency circuit comprises a power divider amplifier circuit, a detection module, a digital control circuit and a control circuit. The power divider amplifier circuit is used to divide the input radio frequency signal into two paths after low-noise amplification, one of which enters the detection module for power collection, and the other enters the digital control circuit for digital controlled attenuation. The control circuit analyzes the collected power information, outputs a control level to the digital control circuit, and controls the internal switch of the digital control circuit to select a pass-through or attenuation state.
[0025] Furthermore, the power division amplifier circuit includes a first amplifier ZA1 and a one-to-two power divider A1. The input signal is amplified by the first amplifier ZA1 to reduce the noise coefficient of the AGC radio frequency circuit, and then the amplified signal is split into two paths by the one-to-two power divider A1. One path is sent to the detection circuit to collect input signal power information, and the other path is sent to the digital control circuit for digital control attenuation.
[0026] Furthermore, the detection module includes a second amplifier ZA2, a third amplifier ZA3 and a detection circuit connected in sequence. The detection circuit selects a negative polarity detector CDF7620-000. In order to achieve fast gain control and reduce the delay caused by the intermediate device, the detection circuit uses direct detection to quantitatively collect the input signal power information. Considering the power consumption of the module and the setting of the comparison reference, the detection load is selected as 100 ohms, and the rising edge of the detection does not exceed 10ns.
[0027] Furthermore, the control circuit selects a high-speed comparator MAX9010EXT produced by MAXIM. MAX9010EXT is a low-power, single-power, precision TTL comparator with a response time of less than 5 to 10ns. When the output level of the detection circuit is higher than the threshold value, the control circuit outputs a control level to control the switching of the digital control circuit.
[0028] Furthermore, the digital control circuit includes a first switch, an attenuation module and a second switch, wherein the moving end of the first switch is connected to one of the outputs of the power divider amplifier circuit, the two fixed ends are respectively connected to a fixed end of the second switch and one end of the attenuation module, and the other fixed end of the second switch is connected to the other end of the attenuation module. The digital control circuit controls the fast switch to select a pass-through or attenuation state. The switch is a chip BW113. BW113 is an absorption-type gallium arsenide single-pole double-throw switch chip with an operating frequency covering DC to 20GHz. The switch chip can provide an isolation greater than 45dB and an insertion loss less than 2dB in the entire operating frequency band, and its switching time is about 5ns.
[0029] At the same time, when the AGC circuit is starting to judge, there is a fuzzy area of 1 to 2 dB near the threshold level. By introducing a hysteresis control circuit, the problem of AGC jittering in the fuzzy area during the startup judgment process is solved.
[0030] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0031] Example
[0032] The present embodiment provides a fast AGC radio frequency circuit, including a power divider amplifier circuit, a detection module, a digital control circuit and a control circuit. The power divider amplifier circuit is used to divide the input radio frequency signal into two paths after low-noise amplification, one of which enters the detection module for power collection, and the other enters the digital control circuit for digital controlled attenuation. The control circuit analyzes the collected power information, outputs a control level to the digital control circuit, and controls the internal switch of the digital control circuit to select a pass-through or attenuation state.
[0033] The frequency range of the present invention is 2-18 GHz, and the receiving circuit realizes closed-loop regulation of gain, and automatic adjustment of gain can be realized through this circuit.
[0034] Furthermore, the detection circuit selects the negative polarity detector CDF7620-000. In order to achieve fast gain control and reduce the delay caused by the intermediate components, the detection circuit uses direct detection to quantitatively collect the input signal power information. Figure 3 As shown, the detection load resistor R1 is selected to be 100 ohms, and the rising edge of the detection output video signal does not exceed 10ns.
[0035] The frequency range of the present invention is 2 to 18 GHz. The power flatness from the receiver input link to the detection should be around 4 dB in the range of 2 to 18 GHz. The input power when the detector output is 100 mV made of the detector tube CDF7620-000 is as shown in Table 1.
[0036] Table 1 Input power table when the detector output is 100mV
[0037] Frequency (GHz) 2 3 4 5 6 7 8 9 10 Input power(dBm) 4.1 4 4 3.9 3.8 3.7 3.8 3.5 3.5 Frequency (GHz) 11 12 13 14 15 16 17 18 Input power(dBm) 3.2 3.1 2.7 2.5 2.4 2.1 2.2 2.4
[0038] According to Table 1, the detector input power flatness should be around 2dB in the range of 2 to 18GHz, and it should have a power compensation effect. Combined with the power flatness before detection, as well as the errors caused by fuzzy zone discrimination, temperature drift and other reasons, the final detection circuit discrimination threshold range should not exceed 4dB.
[0039] Furthermore, the control circuit part selects the comparator to be a high-speed comparator MAX9010EXT, such as Figure 2 The output level of the detection circuit is input to U1 and U2, and is compared with the threshold level (voltage divider level of R6 and R7) to output two control levels, namely output control 1 and output control 2. The truth table is shown in Table 2 below, which can be used for switching control of SA1 and SA2.
[0040] Table 2 Output Control 1 and Output Control 2 Truth Table
[0041] Comparison result between detection level and threshold level Output Control 1 Output Control 2 high 0 -5 Low -5 0
[0042] Furthermore, the digital control circuit controls the fast switch to select the through or attenuation state. The switch is the chip BW113. BW113 is an absorption-type gallium arsenide single-pole double-throw switch chip with an operating frequency covering DC to 20GHz. The switch chip can provide an isolation greater than 45dB and an insertion loss less than 2dB in the entire operating frequency band, and its switching time is about 5ns. The two-stage single-pole double-throw switches SA1 and SA2 are cascaded with the attenuator SJ1 to realize the through and attenuation states of the digital control circuit and change the circuit gain. The attenuator SJ1 uses an attenuation chip with high attenuation accuracy.
[0043] Furthermore, when the AGC circuit is starting to judge, there is a fuzzy area of 1 to 2 dB near the threshold level. By introducing a hysteresis control circuit, the problem of AGC jittering in the fuzzy area during the start-up judgment process is solved.
[0044] A test detector is cascaded to the RF output port, and the response speed of the AGC circuit is tested by changing the video signal at the output of the test detector. When a large signal is input, the output level of the test detector gradually increases until the AGC circuit responds, the digital control circuit starts to work, and the output level of the test detector gradually decreases. In this process, the time from the increase of the output level of the test detector to the decrease to half is defined as the response time of the AGC circuit. When a large signal is input, the response speed of the AGC circuit is about 15ns, see Figure 4 The AGC response speed under large signal is shown below.
[0045] When a small signal is input (when the input signal just passes the reference threshold), the AGC circuit response speed is about 25ns. Figure 5 The AGC response speed under small signal is shown in Figure 1. Compared with the microsecond response time of conventional AGC circuits, the response speed is greatly improved.
[0046] The reasons for the length of AGC response time under large and small signals are as follows: Figure 6 As shown in the schematic diagram of the response time change caused by the input large and small signals, the rising edges of large signals and small signals are basically the same. After the reference threshold level is set, the delay when the small signal just passes the threshold is obviously longer than the delay when the large signal just passes the threshold.
[0047] In summary, the circuit of the present invention realizes a fast AGC radio frequency circuit through the design of amplifying power division circuit, detection circuit, control circuit, digital control circuit, etc., which has the advantages of fast response, internal integrated input signal acquisition circuit, small fuzzy area, low noise coefficient, etc. The above is only a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A fast AGC radio frequency circuit, characterized in that: It includes a power divider amplifier circuit, a detection module, a digital control circuit and a control circuit. The power divider amplifier circuit is used to divide the input radio frequency signal into two paths after low-noise amplification, one of which enters the detection module for power collection, and the other enters the digital control circuit for digital controlled attenuation. The control circuit analyzes the collected power information, outputs the control level to the digital control circuit, and controls the internal switch of the digital control circuit to select the through state or the attenuation state.
2. The fast AGC radio frequency circuit according to claim 1, characterized in that: The power division amplifier circuit comprises a first amplifier ZA1 and a one-to-two power divider A1. After the input signal is amplified by the first amplifier ZA1, the amplified signal is power-divided into two paths by the one-to-two power divider A1.
3. The fast AGC radio frequency circuit according to claim 1, characterized in that: The detection module includes a second amplifier ZA2, a third amplifier ZA3 and a detection circuit which are connected in sequence.
4. The fast AGC radio frequency circuit according to claim 1, characterized in that: The detection circuit adopts a negative polarity detector CDF7620-000.
5. The fast AGC radio frequency circuit according to claim 1, characterized in that: The control circuit includes a high-speed comparator MAX9010EXT.
6. The fast AGC radio frequency circuit according to claim 1, characterized in that: The digital control circuit includes a first switch, an attenuation module and a second switch. The moving end of the first switch is connected to one of the outputs of the power divider amplifier circuit, the two fixed ends are respectively connected to a fixed end of the second switch and one end of the attenuation module, and the other fixed end of the second switch is connected to the other end of the attenuation module.