Negative voltage bias circuit and method and corresponding radio frequency switch

Abstract

The invention discloses a negative voltage bias circuit, a negative voltage bias method and a corresponding radio frequency switch. The negative voltage bias circuit can provide a stable negative voltage source by generating negative voltage on the SOI process part. When a radio frequency large signal passes through, through an accurate negative pressure bias and feedback control mechanism, it is ensured that the negative pressure amplitude can be kept at the maximum value allowed by the process reliability even if the radio frequency large signal passes through. According to the radio frequency switch, the harmonic performance of the radio frequency switch during processing of radio frequency large signals is remarkably improved, and the stability and reliability of the radio frequency switch are effectively enhanced by optimizing the circuit design.

Description

Technical Field

[0001] The invention relates to a negative voltage bias circuit, and also relates to a corresponding negative voltage bias method and a radio frequency switch using the negative voltage bias circuit, belonging to the technical field of radio frequency integrated circuits. Background Art

[0002] With the rapid development of radio frequency integrated circuits, the performance requirements for radio frequency switches (RF switches) are also constantly increasing. In power amplifier (PA) systems, the design of RF switches must not only meet the requirements of high power transmission and low insertion loss, but also be cost-effective in cost control. In the existing design of RF switches, the positive bias voltage is usually set to the power supply voltage VDD (i.e., the maximum reliable value Vmax), so that in the absence of a large RF signal (i.e., an RF signal with high power or amplitude), the negative voltage generated by the charge pump can reach a level close to -VDD.

[0003] However, when a large RF signal appears, the negative voltage amplitude will decrease, and its fluctuation amplitude Vsb (abbreviation of Vswingback) will change according to the size of the RF signal. Figure 1 , the voltage of the RF signal will be distributed to multiple NMOS transistors in series. The greater the negative voltage amplitude on the substrate (Body) region of each NMOS transistor, the higher the voltage required for the parasitic diode between the substrate and the source and drain to turn on. Therefore, when the nonlinear characteristics are mainly controlled by voltage, the greater the negative voltage amplitude, the better. In addition, in order to reduce the insertion loss of the switch or reduce the chip area, it is sometimes necessary to reduce the number of transistors stacked, which requires maintaining the negative voltage amplitude as high as possible. In many RF switch products, voltage control is the main contradiction, so it is very meaningful to maintain the maximum negative voltage amplitude within the reliability range.

[0004] In the Chinese patent application with application number 202011374512.6, a radio frequency switch negative voltage bias circuit and a radio frequency switch system are disclosed, including an oscillator, a negative voltage generating circuit and a control circuit. Among them, the oscillator is used to generate a clock signal when working; the negative voltage generating circuit is used to provide a negative voltage bias voltage for the radio frequency switch under the excitation of the clock signal; the control circuit is used to control the oscillator to stop working when the negative voltage bias voltage drops below the preset negative reference voltage; when the negative voltage bias voltage rises to exceed the preset negative reference voltage, the control oscillator starts working. This circuit introduces a feedback control loop on the basis of the original radio frequency switch negative voltage bias circuit, so that the oscillator and the negative voltage generating circuit consume current intermittently, thereby reducing the overall power consumption of the circuit, reducing the interference of the clock signal generated by the oscillator to the external circuit, and improving the stability of the external circuit. Summary of the invention

[0005] The primary technical problem to be solved by the present invention is to provide a negative voltage bias circuit.

[0006] Another technical problem to be solved by the present invention is to provide a negative voltage bias method.

[0007] Another technical problem to be solved by the present invention is to provide a radio frequency switch using the negative voltage bias circuit.

[0008] In order to achieve the above object, the present invention adopts the following technical solutions:

[0009] According to a first aspect of an embodiment of the present invention, a negative voltage bias circuit for a radio frequency switch is provided, comprising a radio frequency switch module and a non-radio frequency switch module; wherein:

[0010] The RF switch module includes a digital logic circuit, a decoding circuit and a driver circuit, wherein the digital logic circuit is connected to the decoding circuit, the decoding circuit is connected to the driver circuit, and the driver circuit is connected to the RF core circuit;

[0011] The non-RF switch module includes a charge pump, a clock circuit, a logic judgment circuit and a transistor; the clock circuit is connected to the charge pump, the charge pump is connected to the drive circuit, and the output signal of the logic judgment circuit is also connected to the drive circuit; the source of the transistor is connected between the charge pump and the drive circuit, the gate is directly connected to the drive circuit, and the drain is connected to the resistor and then grounded;

[0012] The negative voltage generated by the charge pump is directly connected to the driver circuit to provide a bias voltage for the radio frequency switch.

[0013] Preferably, the RF switch module is implemented using SOI technology.

[0014] Preferably, the non-RF switch module is implemented using a CMOS process.

[0015] Preferably, the non-RF switch module further includes a low voltage dropout linear regulator, which generates two sets of different voltages to respectively power the RF switch module and the non-RF switch module.

[0016] Preferably, the logic judgment circuit monitors whether the negative pressure reaches a preset threshold value, thereby controlling the drive circuit to output a corresponding voltage signal.

[0017] Preferably, when the logic judgment circuit outputs a high level, the transistor is turned on, allowing the negative voltage generated by the charge pump to discharge from -VDD-Vsb to -VDD; when the logic judgment circuit outputs a low level, the transistor is turned off, stopping the discharge process and maintaining a stable negative voltage level.

[0018] Preferably, when a large RF signal is input, the negative voltage starts to rise from -VDD-Vsb; if the rise does not exceed -VDD, the transistor continues to work and maintains the negative voltage at the -VDD level; if the rise exceeds -VDD, the negative voltage eventually stabilizes at a level close to -VDD, thereby maximizing the negative voltage amplitude under a large RF signal.

[0019] According to a second aspect of an embodiment of the present invention, a negative voltage bias method is provided, which is implemented based on the above-mentioned negative voltage bias circuit and includes the following steps:

[0020] (1) The charge pump generates negative pressure, and the logic judgment circuit continuously monitors whether the negative pressure reaches a preset threshold;

[0021] (2) The transistor is turned on or off according to the output of the logic judgment circuit; when the logic judgment circuit outputs a high level, the transistor is turned on, allowing the negative voltage generated by the charge pump to discharge to -VDD; when a large RF signal is input, the negative voltage begins to rise;

[0022] (3) The logic judgment circuit monitors the amplitude of the negative voltage rise. If the rise does not exceed -VDD, the transistor continues to conduct to maintain the negative voltage at the -VDD level; if the rise exceeds -VDD, the transistor is turned off to stop the discharge process and maintain a stable negative voltage level.

[0023] According to a third aspect of an embodiment of the present invention, a radio frequency switch is provided, comprising the above-mentioned negative voltage bias circuit.

[0024] Compared with the prior art, the negative voltage bias circuit provided in the embodiment of the present invention can provide a stable negative voltage source by generating negative voltage on the SOI process part. When a large RF signal passes through, the precise negative voltage bias and feedback control mechanism ensures that the negative voltage amplitude can be maintained at the maximum value allowed by the process reliability even when a large RF signal passes through. This design not only significantly improves the harmonic performance of the RF switch when processing large RF signals, but also reduces costs without sacrificing performance by optimizing the circuit design. In addition, the present invention effectively suppresses the nonlinear distortion of the RF circuit, ensures better signal processing performance on the basis of low insertion loss, and effectively enhances the stability and reliability of the RF switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic diagram of the change of negative pressure amplitude of the radio frequency switch under different working conditions in the prior art;

[0026] Figure 2 A circuit schematic diagram of a negative voltage bias circuit provided by an embodiment of the present invention;

[0027] Figure 3 A schematic diagram of the change in negative voltage amplitude of the RF switch using the negative voltage bias circuit under different working conditions;

[0028] Figure 4 A schematic diagram of a flow chart of a negative pressure bias method provided by an embodiment of the present invention;

[0029] Figure 5 This is an example diagram of an RF switch using the negative voltage bias circuit. DETAILED DESCRIPTION

[0030] The technical content of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0031] In the design of RF switches, it is necessary to maximize the negative voltage amplitude when a large RF signal is present, which is crucial to improving the performance of RF switches. This not only helps to improve the linearity of RF signals and reduce nonlinear distortion, but also helps to optimize cost-effectiveness while maintaining low insertion loss.

[0032] To this end, an embodiment of the present invention first provides a negative voltage bias circuit for a radio frequency switch. Figure 2 As shown, the negative voltage bias circuit is divided into two modules: an RF switch module and a non-RF switch module. Among them, the RF switch module can be implemented by, for example, SOI (Silicon-On-Insulator) process, and the operating voltage it withstands is the power supply voltage VDD. This part of the circuit is the core of RF signal processing, including a digital logic circuit (Digital), a decoding circuit (Decoder) and a driver circuit (Driver), wherein the digital logic circuit is connected to the decoding circuit, the decoding circuit is connected to the driver circuit, and the driver circuit is connected to the RF core (RF core) circuit. They jointly control the working state of the RF switch module.

[0033] The non-RF switch module is implemented using CMOS technology, and the operating voltage it withstands can exceed the power supply voltage VDD, specifically expressed as VDD+Vsh. In one embodiment of the present invention, the non-RF switch module includes a low-voltage difference linear regulator (LDO), a charge pump, a clock circuit (Clock), a drive circuit, a logic judgment circuit and a transistor M1. Among them, their operating voltage VDD+Vsh is derived from the low-voltage difference linear regulator and input into the charge pump, the clock circuit, the drive circuit and the logic judgment circuit respectively. The output signal of the clock circuit is connected to the charge pump, the output signal of the charge pump is connected to the drive circuit, and the output signal of the logic judgment circuit is also connected to the drive circuit. The clock circuit is responsible for providing a synchronization signal to ensure the timing control of the digital logic circuit. In addition, the source of transistor M1 is connected between the charge pump and the drive circuit, the gate is directly connected to the drive circuit, and the drain is connected to the resistor and then grounded. The negative bias voltage (referred to as negative voltage, the same below) Vneg of the RF core circuit is generated by the charge pump and is equal to -VDD, which ensures the stability and performance of the RF switch under large RF signals.

[0034] exist Figure 2 In the illustrated embodiment, the power supply voltage VDD supplies power to the digital logic circuit, the decoding circuit, the driving circuit and the low voltage difference linear regulator respectively. The negative bias voltage Vneg generated by the charge pump is directly connected to the driver circuit in the RF switch module to provide the required bias voltage for the RF switch. The logic judgment circuit monitors whether the negative bias voltage Vneg reaches a preset threshold, such as -VDD, and controls the driving circuit to output a corresponding voltage signal to control the on and off of the transistor M1, thereby controlling the magnitude of the negative voltage. The relationship between VDD and Vneg shows that VDD is the operating voltage of the RF switch module, and Vneg is the negative voltage. The difference Vsh between the two represents the rebound amplitude of the negative voltage under a large RF signal. Figure 2 The circuit architecture shown can optimize cost-effectiveness and process reliability while ensuring RF switch performance.

[0035] Transistor M1 is Figure 2It plays a key role in the circuit shown. According to the output of the logic judgment circuit, M1 can be turned on or off. Under normal working conditions, the logic judgment circuit outputs a high level (1), and transistor M1 is turned on, allowing the negative voltage generated by the charge pump to discharge from -VDD-Vsb to -VDD. When the logic judgment circuit outputs a low level (0), transistor M1 is turned off, stopping the discharge process and maintaining a stable negative voltage level. In the case of a large RF signal input, the negative voltage will start to rise from -VDD-Vsb. If the rise does not exceed -VDD, transistor M1 will continue to work and maintain the negative voltage at the -VDD level. If the rise exceeds -VDD, since the starting point of the negative voltage is -VDD-Vsb, the negative voltage will eventually stabilize at a level close to -VDD, thereby maximizing the negative voltage amplitude under large RF signals. The above process uses the logic judgment circuit to monitor whether the negative voltage reaches -VDD, and uses the drive circuit to output VDD and -VDD respectively when the output of the logic judgment circuit is low (0) and high (1), ensuring that transistor M1 can be turned on and off properly.

[0036] Furthermore, the negative voltage bias circuit provided in the embodiment of the present invention achieves an optimized design by adopting different manufacturing processes for different circuit modules. Specifically, the RF switch module preferably adopts the SOI process, while the non-RF switch module preferably adopts the CMOS process. It should be noted that the SOI process can provide higher reliability voltage and integration due to its insulation characteristics, but the cost is relatively high. Relatively speaking, the CMOS process is widely used because of its low cost and high maturity. In other embodiments of the present invention, the SOI process can be replaced by a high-resistance silicon substrate (High-Resistivity Substrates) process, a bulk silicon CMOS (Bulk CMOS) process, etc., which will not be described one by one here.

[0037] In addition, the conventional design in the prior art is to place modules such as the driver circuit in the non-RF switch module, which requires the use of a large number of control lines to connect the RF switch module and the non-RF switch module. This not only increases the complexity of the design, but may also affect the performance of the circuit. The present invention cleverly avoids this design and only integrates the clock circuit, logic judgment circuit, low voltage difference linear regulator and charge pump into the non-RF switch module using CMOS technology. This not only improves the efficiency of the circuit, but also reduces the wiring complexity between the RF switch module and the non-RF switch module by simplifying the connection. By adding a Vneg line between the RF switch module and the non-RF switch module, the non-RF switch module can provide a precisely controlled negative pressure signal to the RF switch module, thereby achieving precise control of the negative pressure.

[0038] In one embodiment of the present invention, the power supply voltage of the non-RF switch module is set to VDD+Vsb, where Vsb represents the additional voltage portion exceeding the power supply voltage VDD. This design provides additional voltage margin for the circuit, enabling it to adapt to different working conditions, and enhancing the adaptability and reliability of the circuit. These two different sets of voltages, namely, VDD of the RF switch module and VDD+Vsb of the non-RF switch module, are provided by the same low-dropout linear regulator (LDO) in the CMOS module, ensuring the power supply stability and reliability of the entire circuit system.

[0039] In addition, the present invention strictly limits the maximum amplitude of the negative voltage Vneg to VDD, regardless of whether there is a large RF signal input, the safety of the circuit is ensured. This design avoids the damage that may be caused to the RF switch and the drive circuit when the signal power is small, and also simplifies the connection between the RF switch module and the non-RF switch module, and only realizes the communication between the two through the Vneg connection without complicated wiring. Therefore, the present invention not only improves the stability and reliability of the circuit under high-power signals, but also improves the performance and safety of the overall circuit by optimizing power management and simplifying circuit design.

[0040] Figure 3 The simulation waveform comparison of the negative voltage Vneg between the negative voltage bias circuit provided by the embodiment of the present invention and the existing circuit when processing large RF signals is shown. In the existing circuit, when a large RF signal of 40 microseconds (us) passes through, the negative voltage Vneg will be significantly raised, up to -2V. This significant increase may affect the performance of the RF switch, especially in terms of harmonic performance. In contrast, after adopting the negative voltage bias circuit provided by the embodiment of the present invention, even if a large RF signal passes under the same conditions, the raising amplitude of the negative voltage Vneg only changes slightly, effectively maintaining the negative voltage amplitude of the RF switch under large RF signal working conditions. Through this comparison, it can be seen that the present invention can more effectively manage negative voltage changes, thereby achieving better performance in the RF switch.

[0041] Based on the negative voltage bias circuit provided in the embodiment of the present invention, the embodiment of the present invention further provides a negative voltage bias method, which is used to effectively lock the negative voltage Vneg at the maximum amplitude allowed by the RF switch when a large RF signal passes through. Figure 4As shown, the negative voltage bias method includes at least the following steps: (1) the charge pump generates a negative voltage Vneg, and the logic judgment circuit continuously monitors whether the negative voltage Vneg reaches a preset threshold (e.g., -VDD); (2) the transistor M1 is turned on or off according to the output of the logic judgment circuit; wherein, the logic judgment circuit outputs a high level, the transistor M1 is turned on, and the negative voltage generated by the charge pump is allowed to discharge to -VDD; when a large RF signal is input, the negative voltage Vneg begins to rise; (3) the logic judgment circuit monitors the amplitude of the negative voltage rise, if the rise amplitude does not exceed -VDD, the transistor M1 continues to be turned on, maintaining the negative voltage at the -VDD level; if the rise amplitude exceeds -VDD, the transistor M1 is turned off to stop the discharge process and maintain a stable negative voltage level. Since the starting point of the negative voltage Vneg is -VDD-Vsb, the negative voltage Vneg will eventually stabilize at a level close to -VDD. Through the above feedback control mechanism, even when a large RF signal passes, the negative voltage amplitude can be maintained at the maximum value allowed by process reliability.

[0042] Figure 5 Figure 1 is an example diagram of an RF switch using the negative voltage bias circuit. Figure 5 In the RF switch shown in the figure, the external control voltage signal V CTRL The control signal BS is converted into a control signal BS compatible with the internal circuit through a level converter. The control signal BS enters the driver stage circuit that drives the RF switch. On the other hand, the power supply voltage VDD is respectively input into the level converter and the negative voltage bias circuit. The negative voltage bias circuit generates a negative voltage Vneg. The driver stage circuit that drives the RF switch is powered by the control signal BS and the negative voltage Vneg. They work together to convert the control signal BS into the actual operating bias voltages Vg1, Vg2, Vb1 and Vb2 of the RF switch stage. These bias voltages directly control the on and off states of the RF switch, thereby achieving precise switching of the RF signal path.

[0043] Compared with the prior art, the negative voltage bias circuit provided in the embodiment of the present invention can provide a stable negative voltage source by generating negative voltage on the SOI process part. When a large RF signal passes through, the precise negative voltage bias and feedback control mechanism ensures that the negative voltage amplitude can be maintained at the maximum value allowed by the process reliability even when a large RF signal passes through. This design not only significantly improves the harmonic performance of the RF switch when processing large RF signals, but also reduces costs without sacrificing performance by optimizing the circuit design. In addition, the present invention effectively suppresses the nonlinear distortion of the RF circuit, ensures better signal processing performance on the basis of low insertion loss, and effectively enhances the stability and reliability of the RF switch.

[0044] It should be noted that the above embodiments are only examples, and the technical solutions of the various embodiments can be combined, all within the protection scope of the present invention.

[0045] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0046] The negative voltage bias circuit, method and corresponding radio frequency switch provided by the present invention are described in detail above. For those skilled in the art, any obvious changes made to it without departing from the essence of the present invention will constitute an infringement of the patent right of the present invention and will bear corresponding legal responsibilities.

Claims

1. A negative voltage bias circuit for a radio frequency switch, characterized in that It includes a radio frequency switch module and a non-radio frequency switch module; wherein, The RF switch module includes a digital logic circuit, a decoding circuit and a driver circuit, wherein the digital logic circuit is connected to the decoding circuit, the decoding circuit is connected to the driver circuit, and the driver circuit is connected to the RF core circuit; The non-RF switch module includes a charge pump, a clock circuit, a logic judgment circuit and a transistor; the clock circuit is connected to the charge pump, the charge pump is connected to the drive circuit, and the output signal of the logic judgment circuit is also connected to the drive circuit; the source of the transistor is connected between the charge pump and the drive circuit, the gate is directly connected to the drive circuit, and the drain is connected to the resistor and then grounded; The negative voltage generated by the charge pump is directly connected to the driver circuit to provide a bias voltage for the radio frequency switch.

2. The negative voltage bias circuit according to claim 1, wherein: The radio frequency switch module is implemented by using any one of a SOI process, a high-resistance silicon substrate process or a bulk silicon CMOS process.

3. The negative voltage bias circuit according to claim 2, wherein: The radio frequency switch module is implemented by using SOI technology.

4. The negative voltage bias circuit according to claim 1, wherein: The non-RF switch module is implemented using CMOS technology.

5. The negative voltage bias circuit according to claim 1, wherein: The non-RF switch module further includes a low voltage dropout linear regulator, which generates two sets of different voltages to supply power to the RF switch module and the non-RF switch module respectively.

6. The negative voltage bias circuit according to claim 1, wherein: The logic judgment circuit monitors whether the negative pressure reaches a preset threshold value, thereby controlling the drive circuit to output a corresponding voltage signal.

7. The negative voltage bias circuit according to claim 6, wherein: When the logic judgment circuit outputs a high level, the transistor is turned on, allowing the negative voltage generated by the charge pump to discharge from -VDD-Vsb to -VDD; when the logic judgment circuit outputs a low level, the transistor is turned off, stopping the discharge process and maintaining a stable negative voltage level.

8. The negative voltage bias circuit according to claim 7, wherein: When a large RF signal is input, the negative voltage starts to rise from -VDD-Vsb; if the rise does not exceed -VDD, the transistor continues to work and maintains the negative voltage at the -VDD level; if the rise exceeds -VDD, the negative voltage eventually stabilizes at a level close to -VDD, thereby maximizing the negative voltage amplitude under large RF signals.

9. A negative voltage bias method, implemented based on the negative voltage bias circuit according to any one of claims 1 to 8, characterized in that The steps include: (1) The charge pump generates negative pressure, and the logic judgment circuit continuously monitors whether the negative pressure reaches a preset threshold; (2) The transistor is turned on or off according to the output of the logic judgment circuit; when the logic judgment circuit outputs a high level, the transistor is turned on, allowing the negative voltage generated by the charge pump to discharge to -VDD; when a large RF signal is input, the negative voltage begins to rise; (3) The logic judgment circuit monitors the amplitude of the negative voltage rise. If the rise does not exceed -VDD, the transistor continues to conduct to maintain the negative voltage at the -VDD level; if the rise exceeds -VDD, the transistor is turned off to stop the discharge process and maintain a stable negative voltage level.

10. A radio frequency switch, characterized in that It includes the negative voltage bias circuit as described in any one of claims 1 to 8.

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