Memory data processing method and device, medium and electronic equipment

Abstract

The invention provides a memory data processing method and device, a medium and electronic equipment, the method is applied to the Ethernet, the Ethernet comprises a driving layer and a protocol layer, and the driving layer and the protocol layer share a target memory space; the method comprises the steps of obtaining at least one memory block from a target memory queue based on a driving layer; the target memory queue comprises a plurality of preset memory blocks, and the plurality of preset memory blocks are obtained by segmenting the target memory space; under the condition that the driving layer receives the message data, storing the message data into a first target memory block in the at least one memory block; and reading the message data from the first target memory block based on the protocol layer, processing the read message data to obtain first processed data, and sending the first processed data to a vehicle actuator. By sharing the target memory space, the protocol layer can directly process the message data in the memory block, replication is not needed, and the data transmission efficiency of the Ethernet system is improved.

Description

Technical Field

[0001] The present application relates to the technical field of in-vehicle Ethernet, and in particular to a memory data processing method, device, medium and electronic device. Background Art

[0002] The Ethernet driver is divided into two main parts: receiving and sending. The process of receiving Ethernet messages from the hardware through PHY / MAC and then to the protocol stack is called receiving; the process of handing over the protocol stack message to the Ethernet hardware is called sending.

[0003] However, in the prior art, the underlying drivers and protocol stacks of the system in traditional devices may not be provided by the same supplier, so the portability of the system and the minimum module coupling factors will be considered. The memory between each layer is independent of each other, and each layer independently completes the allocation and release of memory, which can effectively reduce module coupling and avoid memory leaks.

[0004] Specifically, in the receiving process, the driver layer needs to copy the received message to the protocol stack, and the protocol stack does not use the driver layer's memory; in the sending process, contrary to the receiving part, the protocol stack copies the message to the driver layer, and the driver layer calls the hardware interface to send the message. Therefore, each layer manages its own memory independently, which is not prone to problems such as memory leaks and double releases. It is also relatively simple to handle each layer, and the module coupling is small.

[0005] However, because each layer of modules uses memory independently, memory copying is required when receiving and sending data, which causes many problems such as low data transmission efficiency. Summary of the invention

[0006] In view of the above problems in the prior art, the present invention discloses a memory data processing method, which can effectively improve the efficiency of Ethernet data transmission through the technical means of memory zero copy and optimized memory allocation.

[0007] In order to achieve the above object, the present invention provides a memory data processing method, which is applied to Ethernet, wherein the Ethernet includes a driver layer and a protocol layer, and the driver layer and the protocol layer share a target memory space; the method includes:

[0008] Acquire at least one memory block from a target memory queue based on the driver layer; the target memory queue includes a plurality of preset memory blocks, and the plurality of preset memory blocks are obtained based on segmenting the target memory space;

[0009] When the driver layer receives the message data, the message data is stored in a first target memory block in the at least one memory block;

[0010] The message data is read from the first target memory block based on the protocol layer, the read message data is processed to obtain first processed data, and the first processed data is sent to the vehicle actuator.

[0011] Preferably, the acquiring at least one memory block from the target memory queue based on the driver layer includes:

[0012] Based on the driver layer, at least one first memory block is obtained from the first memory queue; the target memory queue includes a first memory queue and a second memory queue, the memory capacity of each first memory block in the first memory queue is smaller than the memory capacity of each second memory block in the second memory queue, the memory capacity of each first memory block in the first memory queue is the same, and the memory capacity of each second memory block in the second memory queue is the same.

[0013] Preferably, after storing the message data into a first target memory block in the at least one memory block, the method further comprises:

[0014] In the case where the first number of the first target memory blocks is multiple, obtaining a second number of second memory blocks from the second memory queue; the second number is determined based on the first number, the memory capacity of the first target memory block, and the memory capacity of each second memory block in the second memory queue;

[0015] Merging the message data in the first number of first target memory blocks into the second memory block;

[0016] The message data is read from the second memory block based on the protocol layer, the read message data is processed to obtain second processed data, and the second processed data is sent to the vehicle actuator.

[0017] Preferably, the step of obtaining a second number of second memory blocks from the second memory queue includes:

[0018] The storage address of the second memory block is obtained based on an acquisition function; the acquisition function can obtain the storage address of the second memory block by shifting backward by a preset offset based on the memory capacity of the second memory block input and the starting address of the second memory block, and the second memory block uses the space corresponding to the storage address to store the message data, and the preset offset is determined based on the structural information of the second memory block.

[0019] Preferably, after sending the second processed data to the vehicle actuator, the method further includes:

[0020] Clear the second processed data in the storage space of the second memory block starting from the storage address of the second memory block, and obtain the starting address of the second memory block based on the return function; the return function can be used as a reference to shift the storage address of the second memory block forward by a preset offset to obtain the starting address of the second memory block, and the preset offset is determined based on the structure information of the second memory block;

[0021] Based on the starting address of the second memory block, return the second memory block to the second memory queue.

[0022] Preferably, the method further comprises:

[0023] In a case where the protocol layer receives the target data sent by the vehicle actuator, acquiring a second target memory block matching the data size of the target data based on the protocol layer;

[0024] Upon receiving the target data, storing the target data in the second target memory block;

[0025] The target data is read from the second target memory block based on the protocol layer, the read target data is processed to obtain third processed data, and the third processed data is sent to the Ethernet card.

[0026] Preferably, storing the message data into a first target memory block in the at least one memory block comprises:

[0027] Based on the starting address of the first target memory block, a preset offset is performed backward to obtain the storage address of the first target memory block; the preset offset is determined based on the structure information of the first target memory block;

[0028] The message data is stored in a storage space starting from the storage address of the first target memory block.

[0029] The present invention further provides a memory data processing device applied to Ethernet, wherein the Ethernet includes a driver layer and a protocol layer, wherein the driver layer and the protocol layer share a target memory space, and the device includes:

[0030] A first acquisition module, configured to acquire at least one memory block from a target memory queue based on the driver layer; the target memory queue includes a plurality of preset memory blocks, and the plurality of preset memory blocks are obtained based on segmenting the target memory space;

[0031] A first storage module, configured to store the message data into a first target memory block in the at least one memory block when the driver layer receives the message data;

[0032] The first service module is used to read the message data from the first target memory block based on the protocol layer, process the read message data to obtain first processed data, and send the first processed data to the vehicle actuator.

[0033] The present invention also provides an electronic device, comprising a processor and a memory, wherein the memory stores at least one instruction or at least one program, and the at least one instruction or the at least one program is loaded and executed by the processor to implement the above-mentioned composite microgrid control method.

[0034] The present invention also provides a computer-readable storage medium, in which at least one instruction, at least one program, code set or instruction set is stored, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor to implement the above-mentioned composite microgrid control method.

[0035] Due to the above technical solution, the one described in this application has the following beneficial effects:

[0036] The memory data processing method disclosed in the present invention shares the target memory space through the driver layer and the protocol layer, and pre-allocates the target memory space into multiple memory blocks to form a target memory queue, so that the driver layer directly stores the message data in the memory block when receiving the message data from the Ethernet card, and the protocol layer can directly read and process the message data in the memory block, so that the processing of the message data only occurs inside the memory block, and there is no need to copy the message data again. This setting avoids multiple copies of the memory during the data processing process, which not only improves the efficiency of message data processing, but also reduces the burden of the CPU, and correspondingly reduces the load of the CPU, thereby improving the overall performance of the system. In addition, by presetting the memory block to form the target memory queue, the centralized management and allocation of the memory block is also realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solution of the present application, the following is a brief introduction to the drawings required for use in the embodiments or prior art descriptions. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1 It is a schematic diagram of the process of receiving message data in Ethernet provided in an embodiment of the present application.

[0039] Figure 2 It is a flowchart of storing message data into multiple memory blocks in the Ethernet receiving process provided by an embodiment of the present application.

[0040] Figure 3 It is a flow chart of the Ethernet provided in an embodiment of the present application after sending the third processed data to the vehicle actuator in the receiving process.

[0041] Figure 4 It is a schematic diagram of the process of sending target data through Ethernet provided in an embodiment of the present application.

[0042] Figure 5 It is a schematic diagram of the case where the target memory queue of Ethernet in the receiving process provided by the embodiment of the present application has only one memory queue.

[0043] Figure 6 It is a schematic diagram of a case where a target memory queue in an Ethernet receiving process includes two memory queues provided by an embodiment of the present application.

[0044] Figure 7 It is a schematic diagram of the case where the target memory queue has only one memory queue in the Ethernet sending process provided by an embodiment of the present application.

[0045] Figure 8 It is a schematic diagram of a case where a target memory queue in a sending process of Ethernet provided by an embodiment of the present application includes two memory queues.

[0046] Fig. 9 It is a simplified diagram of the structural information of the memory block provided in the embodiment of the present application.

[0047] Fig.10 It is a simplified structural diagram of the target memory queue provided in an embodiment of the present application.

[0048] Fig.11 It is a structural diagram of the memory data processing device provided in an embodiment of the present application.

[0049] Fig.12 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0050] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0051] The term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure or characteristic that may be included in at least one implementation of the present application. In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", "top", "bottom", etc. is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first" and "second" are used only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may include one or more of the features explicitly or implicitly. Moreover, the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described here can be implemented in an order other than those illustrated or described here.

[0052] In addition, the terms "including" and "having" and any variations thereof are intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or devices.

[0053] Please refer to Figure 1 , which shows a flow chart of a memory data processing method provided by an embodiment of the present invention. The executor of the memory data processing method in this embodiment is a driving controller. This specification provides method operation steps as described in the embodiments or flow charts, but may include more or fewer operation steps based on conventional or non-creative labor. The order of steps listed in the embodiments is only one way of executing the steps among many orders, and does not represent the only order of execution. When the actual system or server product is executed, it can be executed in the order of the methods shown in the embodiments or drawings. Specifically, Figure 1 As shown, the memory data processing method is applied to Ethernet. Ethernet includes a driver layer and a protocol layer. The driver layer and the protocol layer share a target memory space. In the embodiment of this specification, the design of sharing the target memory space between the driver layer and the protocol layer realizes the sharing of the driver layer and the protocol layer memory space, avoids memory copying between the driver layer and the protocol layer, and improves the efficiency of message data transmission.

[0054] The memory data processing method comprises:

[0055] S101, acquiring at least one memory block from a target memory queue based on a driver layer; the target memory queue includes a plurality of preset memory blocks, and the plurality of preset memory blocks are obtained based on segmenting a target memory space;

[0056] In the embodiments of the present specification, Ethernet-related devices, such as Ethernet cards, will pre-divide the target memory space into a number of memory blocks before receiving message data. Preferably, the memory capacity of each memory block is the same, that is, the target memory space is pre-divided into a number of memory blocks with the same memory capacity. The several memory blocks form the target memory queue, and each memory block is used to wait for receiving message data from the Ethernet card.

[0057] In the embodiments of this specification, memory can be pre-allocated by presetting memory blocks, avoiding the need to allocate target memory space when sending and receiving message data, thereby improving the transmission efficiency of message data. At the same time, segmenting the memory space also helps to better manage multiple memory blocks in a chain.

[0058] In the embodiments of this specification, the target memory queue can be a circular queue or a linear queue. The target memory queue in this application is a circular queue, so that each memory block can be uniformly managed through the circular target memory queue, and the rapid allocation and recovery of memory blocks can be realized, thereby improving the efficiency of memory management. In this embodiment, the target memory queue is a circular queue to facilitate the subsequent extraction and return of memory blocks; in other embodiments, the structural form of the target memory queue can be selected as needed.

[0059] In the embodiments of this specification, Fig.10 As shown, the architecture of the memory block specifically includes: a pointer, a usage identifier and a physical address, wherein the pointer is used to indicate the physical address of the next node memory block of the current memory block to obtain the target memory queue; the usage identifier is used to display the usage status of the current memory block, indicating whether it stores message data.

[0060] In an embodiment of the present specification, the target memory queue may also be a bidirectional linked list, that is, the memory block of each node contains two links, one pointing to its next node and the other pointing to its previous node, so as to enable the extraction and return of memory blocks at any position in the target memory queue.

[0061] In the embodiment of the present specification, obtaining at least one memory block from the target memory queue based on the driver layer includes:

[0062] Based on the driver layer, at least one first memory block is obtained from the first memory queue; the target memory queue includes the first memory queue and the second memory queue, the memory capacity of each first memory block in the first memory queue is smaller than the memory capacity of each second memory block in the second memory queue, the memory capacity of each first memory block in the first memory queue is the same, and the memory capacity of each second memory block in the second memory queue is the same.

[0063] In an embodiment of this specification, the method for dividing the target memory queue includes:

[0064] Splitting the target memory queue to obtain a plurality of memory blocks with different memory capacities;

[0065] Based on the structural information of the memory blocks, memory blocks with the same memory capacity are divided into the same memory queue; the structural information of the memory blocks includes a memory block size identification unit.

[0066] In the embodiments of this specification, since the memory capacity of the memory block is generally set to MTU+64 bytes, there is usually a lot of memory waste in actual use, because in the message data, that is, the small packets in the Ethernet message will occupy a very large proportion, so it will not reach MTU (Maximum Transmission Unit), therefore, it is necessary to use the above-mentioned division method to divide the target memory queue to reduce the use of total memory. This method is more suitable for systems with tight memory. Therefore, by distinguishing different memory queues and giving priority to the memory queue with the smallest memory capacity, that is, the first memory block in the first memory queue, for storing message data, the use of memory is optimized and the waste of memory is effectively avoided; and such a design can also select the most suitable memory block for storage according to the size of the message data, thereby improving the flexibility of the use of the target memory queue.

[0067] In an embodiment of the present specification, the memory capacity of each first memory block in the first memory queue can be set to N bytes, and the memory capacity of each second memory block in the second memory queue can be set to 2N bytes or 4N bytes. In other embodiments, the memory capacity of the first memory block and the second memory block may not be limited to a multiple relationship, and may be determined according to the specific situation. For example: In this embodiment, since the maximum capacity of the memory block in the driver layer is generally MTU+64 bytes, the memory capacity of each second memory block in the second memory queue of the embodiment of the present specification is set to MTU+64 bytes, and the memory capacity of the first memory block is set to (MTU+64) / 2 bytes, that is, the memory capacity of the first memory block is half of the memory capacity of the second memory block; or, the memory capacity of each second memory block in the second memory queue is set to MTU+64 bytes, and the memory capacity of the first memory block is set to (MTU+64) / 4 bytes, that is, the memory capacity of the first memory block is one quarter of the memory capacity of the second memory block.

[0068] S103, when the driver layer receives the message data, storing the message data into a first target memory block in at least one memory block;

[0069] In the embodiments of this specification, Figure 5-Figure 8 As shown, each memory block on the target memory queue is respectively associated with a memory description unit (Receiver Buffer Di scriptor) for displaying the message data reception status of each memory block.

[0070] In the embodiment of the present specification, before obtaining at least one memory block from the target memory queue based on the driver layer, the method further includes:

[0071] Initialize each of the memory description units.

[0072] S105 . Read message data from the first target memory block based on the protocol layer, process the read message data to obtain first processed data, and send the first processed data to the vehicle actuator.

[0073] In the embodiment of the present specification, the message data is an Ethernet frame, and the protocol layer can convert the read message data into a protocol layer message, and the protocol layer message is the first processed data.

[0074] In the embodiments of the present specification, the protocol layer can directly read the message data in the first target memory block, and directly process the message data in the first target memory block without the need for additional copying of the message data. This not only quickly completes the message data processing task, reduces the message data processing time, improves the real-time performance of the system, but also improves the efficiency of message data transmission.

[0075] Therefore, in the embodiments of the present specification, the target memory space is shared by the driver layer and the protocol layer, and the target memory space is pre-allocated into multiple memory blocks to form a target memory queue, so that when the driver layer receives the message data from the Ethernet card, the message data is directly stored in the memory block, and the protocol layer can directly read and process the message data in the memory block, so that the processing of the message data only occurs inside the memory block, and there is no need to copy the message data again. This setting avoids multiple copies of the memory during the data processing process, which not only improves the efficiency of message data processing, but also reduces the burden on the CPU, and accordingly reduces the CPU load, thereby improving the overall performance of the system. In addition, by presetting the memory block to form the target memory queue, the centralized management and allocation of the memory block is also realized.

[0076] In summary, the embodiments of this specification can effectively improve the efficiency of Ethernet data transmission through the technical means of zero memory copy and optimized memory allocation.

[0077] like Figure 2 As shown, a flow chart showing that when the received message data is too large, the Ethernet card can adaptively divide the larger message data into multiple parts and fill them into multiple first target memory blocks, whereby, after storing the message data into the first target memory block in at least one memory block, the method further includes:

[0078] S1041. When there are multiple first target memory blocks, obtain a second number of second memory blocks from the second memory queue; the second number is determined based on the memory capacity of the first number of first target memory blocks and the memory capacity of each second memory block in the second memory queue;

[0079] In the embodiment of the present specification, the target memory queue only includes the first queue and the second queue, so when the first number of the first target memory blocks is multiple, any one of the second memory blocks is obtained from the second memory queue.

[0080] S1042, merging the message data in the first target memory blocks of the first quantity into the second memory block;

[0081] In the embodiment of the present specification, the driver layer can repacketize the message data in the plurality of first target memory blocks.

[0082] S1043. Read message data from the second memory block based on the protocol layer, process the read message data to obtain second processed data, and send the second processed data to the vehicle actuator.

[0083] In the embodiment of the present specification, the second number is less than the first number, so by extracting and determining the number of second memory blocks, it is possible to ensure that sufficient memory space is obtained to store and merge all message data from multiple first target memory blocks, so the waste of memory in the memory block is reduced by this precise calculation method, ensuring the efficient use of the memory block. In addition, by using a smaller number of second memory blocks to store message data, it is convenient for the protocol layer to uniformly process the message data in the second memory block, reduce the number of times the protocol layer accesses the memory block, simplify the message data processing flow, and improve the efficiency of message data processing.

[0084] In this manual, see the examples. Fig. 9 The memory block structure information shown, obtaining a second number of second memory blocks from the second memory queue includes:

[0085] The storage address of the second memory block is obtained based on the acquisition function; the acquisition function can obtain the storage address of the second memory block by shifting backward by a preset offset based on the memory capacity of the input second memory block and the starting address of the second memory block. The second memory block uses the space corresponding to the storage address to store message data, and the preset offset is determined based on the structural information of the second memory block.

[0086] In this manual, see the examples. Fig. 9 The memory block structure information shown in the figure, by using the acquisition function and offsetting the preset offset, uses the structure information of the memory block to calculate the storage address of the memory block, which can simplify the calculation process of the memory block storage address, reduce the possibility of calculation errors, and improve the reliability of memory block allocation. In addition, the offset is determined based on the structure information of the memory block, so that the calculation process of the memory block storage address is simple and feasible, so that the driver layer does not need to pay attention to which memory queue the required memory block comes from, and can be extracted on the corresponding memory queue only through the memory capacity of the required memory block and the storage address of the obtained memory block, which simplifies the process of memory block acquisition and improves the efficiency of memory block acquisition on the target memory queue, thereby improving the efficiency of message data transmission in the receiving process. In addition, the memory block storage address calculated by the acquisition function is a valid address, and the message data can be directly stored and processed.

[0087] In this manual, see the examples. Fig. 9The memory block structure information shown, the memory block structure information includes: memory block header information, memory block size identification unit and memory block data packet, wherein the memory block header information and the memory block size identification unit are located in the memory block header structure, which cannot be perceived by the user, and only the space of the following memory block data packet can be accessed by the user, that is, the user cannot perceive the memory block header structure, and will not actively modify the memory block header information; therefore, the memory block header information is used to fill in the "magic header", which is pre-defined, for example: 12345, which is mainly used to protect the integrity of the memory block structure. Before using the memory block each time, the program will check whether the magic number preset in the memory block header information is correct. If the devil number is rewritten, it means that the memory block is destroyed, so the memory block can no longer be used, and the program will stop using the memory block, thereby avoiding potential errors; the starting address of the memory block is located at the starting end of the memory block header structure to be formed on the corresponding memory queue, that is, the memory queue on which the memory block is located can be determined by the obtained memory block starting address; the storage address of the memory block is located at the starting end of the memory block data packet, and the memory block is used to store message data from the space corresponding to the storage address, that is, in the memory block data packet.

[0088] In the embodiment of the present specification, the structural information of the first memory block of the first memory queue is the same as the structural information of the second memory block of the second memory queue.

[0089] like Figure 3 As shown, after sending the second processed data to the vehicle actuator, the method further includes:

[0090] S1044, clearing the second processed data in the storage space of the second memory block starting from the storage address of the second memory block, and obtaining the starting address of the second memory block based on the return function; the return function can be used to obtain the starting address of the second memory block by shifting forward by a preset offset based on the storage address of the second memory block, and the preset offset is determined based on the structure information of the second memory block;

[0091] In the embodiment of the present specification, the protocol layer directly reads the second processed data from the second memory block, avoiding additional copying of message data and improving the efficiency of message data transmission. Afterwards, the data in the second memory block is cleared. This setting can not only prevent the leakage of relevant information, but also enable the second memory block to be reused to store other data, thereby improving the reuse rate of the second memory block.

[0092] In the embodiment of the present specification, the preset offset can be set as needed according to the structural form of the memory block.

[0093] S1045. Based on the starting address of the second memory block, return the second memory block to the second memory queue.

[0094] In this manual, see the examples. Fig. 9 The memory block structure information shown in the figure, by using the return function and offsetting the preset offset, uses the structure information of the memory block to calculate the starting address of the memory block, which can simplify the calculation process of the starting address of the memory block, reduce the possibility of calculation errors, standardize the recovery of the memory block, and ensure the consistency and accuracy of memory management. In addition, the offset is determined based on the structure information of the memory block, so that the calculation process of the starting address of the memory block is simple and feasible, so that the protocol layer does not need to pay attention to the final destination of the memory block to be returned, and only needs to return it to the corresponding memory queue according to the starting address of the memory block obtained, which simplifies the process of returning the memory block, and also improves the efficiency of returning the memory block to the target memory queue, thereby improving the efficiency of the target data transmission in the receiving process. In addition, returning the used second memory block to the target memory queue can also make the memory block recycled.

[0095] like Fig. 9 As shown, based on the structural information of the memory block, storing the message data into the first target memory block in at least one memory block includes:

[0096] Based on the starting address of the first target memory block, a preset offset is performed backward to obtain the storage address of the first target memory block; the preset offset is determined based on the structure information of the first target memory block;

[0097] The message data is stored in a storage space starting from the storage address of the first target memory block.

[0098] In the embodiments of the present specification, by calculating the storage address by a preset offset, it is possible to ensure that the location where the message data is stored meets the structural requirements of the first target memory block, and by determining the offset based on the structural information of the first target memory block (such as size, alignment requirements, etc.), it is possible to ensure the correct layout of the message data in the first target memory block, which helps to improve the speed and efficiency of accessing the first target memory block.

[0099] like Figure 4 As shown, the sending process in the embodiment of this specification is shown, and the method also includes:

[0100] S201, when the protocol layer receives target data sent by the vehicle actuator, acquiring a second target memory block matching the data size of the target data based on the protocol layer;

[0101] In the embodiment of the present specification, obtaining a second target memory block matching the data size of the target data based on the protocol layer includes:

[0102] The storage address of the second target memory block is obtained based on the acquisition function; the acquisition function can obtain the storage address of the second target memory block by shifting backward by a preset offset based on the memory capacity of the input second target memory block and the starting address of the second target memory block. The second target memory block uses the space corresponding to the storage address to store message data, and the preset offset is determined based on the structural information of the second target memory block.

[0103] S203, when receiving the target data, storing the target data in the second target memory block;

[0104] S205: Read target data from the second target memory block based on the protocol layer, process the read target data to obtain third processed data, and send the third processed data to the Ethernet card.

[0105] In the embodiment of the present specification, the target data is a protocol layer message, and the protocol layer can convert the received target data into an Ethernet frame, and the Ethernet frame is the third processed data.

[0106] In the embodiment of this specification, in the sending process, because the size of the target data is known, the second target memory block capable of storing the target data can be directly obtained from the target queue, which can ensure the full utilization of the second target memory block and avoid the waste of the second target memory block. In addition, the structural information of the second target memory block is identical with the structural information of the above-mentioned first target memory block, which will not be described in detail here. By directly storing the target data in the second target memory block, the duplication of the third processed data in the second target memory block is reduced, the efficiency of target data transmission is improved, and the burden of the CPU is also reduced.

[0107] It can be seen from the above-mentioned embodiments of the memory data processing method provided by the present invention that the Ethernet based driver layer of the embodiment of the present invention obtains at least one memory block from the target memory queue; the target memory queue includes multiple preset memory blocks, and the multiple preset memory blocks are obtained based on the division of the target memory space; when the driver layer receives message data, the message data is stored in the first target memory block in the at least one memory block; based on the protocol layer, the message data is read from the first target memory block, the read message data is processed to obtain first processed data, and the first processed data is sent to the vehicle actuator. The technical solution provided by the embodiment of this specification can share the target memory space through the driver layer and the protocol layer, and pre-allocate the target memory space into multiple memory blocks to form a target memory queue, so that when the driver layer receives the message data from the Ethernet card, it directly stores the message data in the memory block, and the protocol layer can directly read and process the message data in the memory block, so that the processing of the message data only occurs inside the memory block, and there is no need to copy the message data again. This setting avoids multiple copies of the memory during the data processing process, which not only improves the efficiency of message data processing, but also reduces the burden on the CPU, and correspondingly reduces the CPU load, thereby improving the overall performance of the system. In addition, by presetting the memory block to form the target memory queue, the centralized management and allocation of the memory block is also realized.

[0108] The following is a specific example to illustrate the implementation process of this application. Figure 5-Figure 8 As shown:

[0109] exist Figure 5 In the figure, it is shown that there is only one memory queue in the receiving process. Figure 5 The target memory queue on the right, the driver layer on the upper left, and the protocol layer on the lower left are shown in the figure. Before receiving the message data, the driver layer will pre-divide the target memory space into several memory blocks, which form the target memory queue shown on the right. In this application, the memory capacity of each memory block is the same, all set to MTU+64 bytes, and the target memory queue of this application is a ring queue. For details, see Figure 5 As shown in . While the target memory space is pre-divided, the memory description units associated with each memory block need to be initialized.

[0110] When receiving message data, if the received message data is not larger than MTU+64 bytes, the driver layer can store the received message data in any memory block of the target memory queue, and the remaining memory blocks of the target memory queue are used to wait for receiving subsequent message data; the protocol layer can read the message data in the memory block, and after reading, it can process the message data accordingly, convert the message data processing into the first processed data, and finally send the processed first processed data to the vehicle actuator for subsequent operations. After the first processed data is sent, the protocol layer will clear the memory block and return the memory block directly to the target memory queue.

[0111] exist Figure 6 In the figure, it is shown that the target memory queue includes two memory queues in the receiving process. Figure 6 The target memory queue on the right is shown in the figure. From left to right, they are the first memory queue and the second memory queue, as well as the driver layer on the upper left and the protocol layer on the lower left. Before receiving the message data, the driver layer will pre-divide the target memory space to obtain multiple memory blocks with different memory capacities. Based on the structural information of the memory block, that is, based on the memory block size identification unit, multiple memory blocks with different memory capacities can be divided, and memory blocks with the same memory capacity can be divided into the same memory queue, forming Figure 6 The first memory queue and the second memory queue are shown on the right side of the figure, so that the memory capacity of each first memory block in the first memory queue is smaller than the memory capacity of each second memory block in the second memory queue, the memory capacity of each first memory block in the first memory queue is the same, and the memory capacity of each second memory block in the second memory queue is the same. In this embodiment, the memory capacity of each second memory block in the second memory queue is set to MTU+64 bytes, the memory capacity of the first memory block is set to (MTU+64) / 2 bytes, and the first memory queue and the second memory queue are both ring queues. For details, see Figure 6 When the target memory space is pre-divided, the memory description units associated with each first memory block also need to be initialized.

[0112] When receiving message data, if the received message data cannot be completely stored in a first memory block, specifically, when the size of the received message data is greater than the memory capacity of a first memory block and less than the memory capacity of a second memory block, that is, when the received message data is greater than (MTU+64) / 2 bytes and less than MTU+64 bytes, the Ethernet card can first divide the message data, and store multiple copies of the message data in two first memory blocks of the first memory queue, and the remaining first memory blocks of the first memory queue are all used to wait for receiving subsequent message data; when the driver layer recognizes that there are multiple first memory blocks, it can merge the message data in the two first memory blocks into the second memory block. At this time, the two first memory blocks are in a clear state, so the two first memory blocks can continue to be associated with their respective corresponding memory description units for receiving subsequent message data; the protocol stack can read, process and send the merged message data in the second memory block, and finally send the second processed data obtained by the processing conversion to the vehicle actuator. The specific business process of the protocol stack is the same as above and will not be repeated here. After the second processed data is sent, the protocol layer clears the second memory block and returns the second memory block to the second memory queue based on the return function.

[0113] exist Figure 7 In the figure, it is shown that there is only one memory queue in the target memory queue during the sending process. Figure 7 The target memory queue on the right, the driver layer on the upper left, and the protocol layer on the lower left are shown in the figure. Before receiving the target data, the driver layer will also pre-divide the target memory space into several memory blocks, which form the target memory queue shown on the right. In this application, the memory capacity of each memory block is the same, all set to MTU+64 bytes, and the target memory queue of this application is a ring queue. For details, see Figure 7 As shown on the right side of the figure. While pre-dividing the target memory space, the memory description units associated with each memory block need to be initialized.

[0114] When receiving target data, the protocol layer can directly store the received target data in any memory block of the target memory queue, and can read the target data in the memory block, and can process the target data accordingly after reading, and convert the target data into the third processed data; the driver layer can send the obtained third processed data to the Ethernet card for subsequent operations. After the third processed data is sent, the driver layer will clear the memory block and return the memory block directly to the target memory queue.

[0115] exist Figure 8 In the figure, it is shown that the target memory queue includes two memory queues in the sending process. Figure 8The target memory queue on the right is shown in the figure, which includes the first memory queue and the second memory queue from left to right, as well as the driver layer on the upper left and the protocol layer on the lower left. Before receiving the target data, the driver layer will pre-divide the target memory space to obtain multiple memory blocks with different memory capacities. Based on the structural information of the memory blocks, that is, based on the memory block size identification unit, multiple memory blocks with different memory capacities can be divided, and memory blocks with the same memory capacity can be divided into the same memory queue, that is, the first memory queue and the second memory queue shown in the figure are formed, so that the memory capacity of each first memory block in the first memory is less than the memory capacity of each second memory block in the second memory queue, the memory capacity of each first memory block in the first memory queue is the same, and the memory capacity of each second memory block in the second memory queue is the same. In this embodiment, the memory capacity of each second memory block in the second memory queue is set to MTU+64 bytes, and the memory capacity of the first memory block is set to (MTU+64) / 2 bytes, that is, the memory capacity of the first memory block is half of the memory capacity of the second memory block, and the first memory queue and the second memory queue are both circular queues. For details, see Figure 8 When the target memory space is pre-divided, the memory description units associated with each first memory block also need to be initialized.

[0116] When receiving the target data, since the protocol layer already knows how large the target data is to be received, the protocol layer can directly input the memory capacity of the required memory block based on the acquisition function, obtain the required memory block, and store the received target data in the acquired memory block, and then read, process and send the target data in the memory block; the driver layer can send the obtained third processed data to the Ethernet card for subsequent operations. After the third processed data is sent, the driver layer will clear the memory block and return the memory block to the corresponding memory queue based on the return function.

[0117] The embodiment of the present invention also provides a memory data processing device, such as Fig.11 As shown, it is a structural schematic diagram of a memory data processing device applied to Ethernet provided by an embodiment of the present invention; specifically, the Ethernet includes a driver layer and a protocol layer, the driver layer and the protocol layer share a target memory space, and the device includes:

[0118] A first acquisition module 110 is used to acquire at least one memory block from a target memory queue based on a driver layer; the target memory queue includes a plurality of preset memory blocks, and the plurality of preset memory blocks are obtained based on segmenting the target memory space;

[0119] A first storage module 120, configured to store the message data into a first target memory block in at least one memory block when the driver layer receives the message data;

[0120] The first service module 130 is used to read the message data from the first target memory block based on the protocol layer, process the read message data to obtain first processed data, and send the first processed data to the vehicle actuator.

[0121] In the embodiment of this specification, the first acquisition module 110 includes:

[0122] A first acquisition unit is used to acquire at least one first memory block from a first memory queue based on a driver layer; the target memory queue includes a first memory queue and a second memory queue, the memory capacity of each first memory block in the first memory queue is smaller than the memory capacity of each second memory block in the second memory queue, the memory capacity of each first memory block in the first memory queue is the same, and the memory capacity of each second memory block in the second memory queue is the same.

[0123] In the embodiment of this specification, the device also includes:

[0124] A second acquisition module, configured to acquire a second number of second memory blocks from a second memory queue when there are multiple first number of first target memory blocks; the second number is determined based on the first number, the memory capacity of the first target memory block, and the memory capacity of each second memory block in the second memory queue;

[0125] A merging module, used for merging the message data in the first target memory blocks of the first quantity into the second memory block;

[0126] The second service module is used to read the message data from the second memory block based on the protocol layer, process the read message data to obtain second processed data, and send the second processed data to the vehicle actuator.

[0127] In this embodiment of the specification, the second acquisition module includes:

[0128] The second acquisition unit is used to obtain the storage address of the second memory block based on the acquisition function; the acquisition function can obtain the storage address of the second memory block by shifting backward by a preset offset based on the memory capacity of the input second memory block and the starting address of the second memory block. The second memory block uses the space corresponding to the storage address to store message data, and the preset offset is determined based on the structural information of the second memory block.

[0129] In the embodiment of this specification, the device also includes:

[0130] A clearing module, used for clearing the second processed data in the storage space of the second memory block starting from the storage address of the second memory block, and obtaining the starting address of the second memory block based on the return function; the return function can be used as a reference to shift the storage address of the second memory block forward by a preset offset to obtain the starting address of the second memory block, and the preset offset is determined based on the structural information of the second memory block;

[0131] The return module is used to return the second memory block to the second memory queue based on the start address of the second memory block.

[0132] In the embodiment of this specification, the first storage module 120 includes:

[0133] An offset unit, configured to perform a backward offset based on the starting address of the first target memory block by a preset offset to obtain a storage address of the first target memory block; the preset offset is determined based on structural information of the first target memory block;

[0134] The storage unit is used to store the message data in a storage space starting from the storage address of the first target memory block.

[0135] In the embodiment of this specification, the device also includes:

[0136] A third acquisition module is used to acquire a second target memory block matching the data size of the target data based on the protocol layer when the protocol layer receives the target data sent by the vehicle actuator;

[0137] A second storage module is used for storing the target data into a second target memory block when the storage module receives the target data;

[0138] The third service module is used to read the target data from the second target memory block based on the protocol layer, process the read target data to obtain third processed data, and send the third processed data to the Ethernet card.

[0139] An embodiment of the present application also provides an electronic device, which includes a processor and a memory, wherein the memory stores at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by the processor to implement the composite microgrid control method as described above.

[0140] The memory can be used to store software programs and modules. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, application programs required for functions, etc.; the data storage area can store data created according to the use of the device, etc. In addition, the memory can include a high-speed random access memory and can also include a non-volatile memory, such as at least one hard disk storage device, a flash memory device or other volatile solid-state storage device. Accordingly, the memory can also include a memory controller to provide the processor with access to the memory.

[0141] The method embodiments provided in the embodiments of the present application can be executed in electronic devices such as mobile terminals, computer terminals, servers or similar computing devices. Fig.12 is an electronic device provided in an embodiment of the present application. Fig.12 As shown, the electronic device 900 may have relatively large differences due to different configurations or performances, and may include one or more central processing units (CPU) 910 (the processor 910 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA), a memory 930 for storing data, and one or more storage media 920 (such as one or more mass storage devices) for storing application programs 923 or data 922. Among them, the memory 930 and the storage medium 920 can be short-term storage or permanent storage. The program stored in the storage medium 920 may include one or more modules, each of which may include a series of instruction operations in the electronic device. Furthermore, the central processing unit 910 can be configured to communicate with the storage medium 920 to execute a series of instruction operations in the storage medium 920 on the electronic device 900. The electronic device 900 may also include one or more power supplies 960, one or more wired or wireless network interfaces 950, one or more input and output interfaces 940, and / or one or more operating systems 921, such as Windows ServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM, etc.

[0142] The input / output interface 940 may be used to receive or send data via a network. The specific example of the network may include a wireless network provided by a communication provider of the electronic device 900. In one example, the input / output interface 940 includes a network adapter (Network Interface Controller, NIC), which may be connected to other network devices via a base station so as to communicate with the Internet. In one example, the input / output interface 940 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0143] It can be understood by those skilled in the art that Fig.12 The structure shown is only for illustration and does not limit the structure of the above electronic device. Fig.12 More or fewer components as shown, or with Fig.12 Different configurations shown.

[0144] An embodiment of the present application also provides a storage medium, in which at least one instruction or at least one program is stored, and the at least one instruction or at least one program is loaded and executed by a processor to implement the composite microgrid control method as described above.

[0145] The above description has fully disclosed the specific implementation methods of the present application. It should be pointed out that any changes made by technicians familiar with the field to the specific implementation methods of the present application do not deviate from the scope of the claims of the present application. Accordingly, the scope of the claims of the present application is not limited to the above specific implementation methods.

Claims

1. A memory data processing method, characterized in that: Applied to Ethernet, the Ethernet includes a driver layer and a protocol layer, the driver layer and the protocol layer share a target memory space; the method includes: Acquire at least one memory block from a target memory queue based on the driver layer; the target memory queue includes a plurality of preset memory blocks, and the plurality of preset memory blocks are obtained based on segmenting the target memory space; When the driver layer receives the message data, the message data is stored in a first target memory block in the at least one memory block; The message data is read from the first target memory block based on the protocol layer, the read message data is processed to obtain first processed data, and the first processed data is sent to the vehicle actuator.

2. The memory data processing method according to claim 1, characterized in that: The acquiring at least one memory block from the target memory queue based on the driver layer includes: Based on the driver layer, at least one first memory block is obtained from the first memory queue; the target memory queue includes a first memory queue and a second memory queue, the memory capacity of each first memory block in the first memory queue is smaller than the memory capacity of each second memory block in the second memory queue, the memory capacity of each first memory block in the first memory queue is the same, and the memory capacity of each second memory block in the second memory queue is the same.

3. The memory data processing method according to claim 2, characterized in that: After storing the message data into a first target memory block in the at least one memory block, the method further comprises: In the case where the first number of the first target memory blocks is multiple, obtaining a second number of second memory blocks from the second memory queue; the second number is determined based on the first number, the memory capacity of the first target memory block, and the memory capacity of each second memory block in the second memory queue; Merging the message data in the first number of first target memory blocks into the second memory block; The message data is read from the second memory block based on the protocol layer, the read message data is processed to obtain second processed data, and the second processed data is sent to the vehicle actuator.

4. The memory data processing method according to claim 3, characterized in that: The acquiring a second number of second memory blocks from the second memory queue comprises: The storage address of the second memory block is obtained based on an acquisition function; the acquisition function can obtain the storage address of the second memory block by shifting backward by a preset offset based on the memory capacity of the second memory block input and the starting address of the second memory block, and the second memory block uses the space corresponding to the storage address to store the message data, and the preset offset is determined based on the structural information of the second memory block.

5. The memory data processing method according to claim 3, characterized in that: After sending the second processed data to the vehicle actuator, the method further includes: Clear the second processed data in the storage space of the second memory block starting from the storage address of the second memory block, and obtain the starting address of the second memory block based on the return function; the return function can be used as a reference to shift the storage address of the second memory block forward by a preset offset to obtain the starting address of the second memory block, and the preset offset is determined based on the structure information of the second memory block; Based on the starting address of the second memory block, return the second memory block to the second memory queue.

6. The memory data processing method according to claim 1, characterized in that: The method further comprises: In a case where the protocol layer receives the target data sent by the vehicle actuator, acquiring a second target memory block matching the data size of the target data based on the protocol layer; Upon receiving the target data, storing the target data in the second target memory block; The target data is read from the second target memory block based on the protocol layer, the read target data is processed to obtain third processed data, and the third processed data is sent to the Ethernet card.

7. The memory data processing method according to claim 1, characterized in that: The storing the message data into a first target memory block in the at least one memory block comprises: Based on the starting address of the first target memory block, a preset offset is performed backward to obtain the storage address of the first target memory block; the preset offset is determined based on the structure information of the first target memory block; The message data is stored in a storage space starting from the storage address of the first target memory block.

8. A memory data processing device, characterized in that: Applied to Ethernet, the Ethernet includes a driver layer and a protocol layer, the driver layer and the protocol layer share a target memory space, and the device includes: A first acquisition module, configured to acquire at least one memory block from a target memory queue based on the driver layer; the target memory queue includes a plurality of preset memory blocks, and the plurality of preset memory blocks are obtained based on segmenting the target memory space; A first storage module, configured to store the message data into a first target memory block in the at least one memory block when the driver layer receives the message data; The first service module is used to read the message data from the first target memory block based on the protocol layer, process the read message data to obtain first processed data, and send the first processed data to the vehicle actuator.

9. A computer-readable storage medium, characterized in that: The storage medium stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by the processor to implement the memory data processing method as described in any one of claims 1-7.

10. An electronic device, characterized in that: The device includes a processor and a memory, wherein the memory stores at least one instruction or at least one program, and the at least one instruction or the at least one program is loaded and executed by the processor to implement the memory data processing method according to any one of claims 1-7.

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