Display panel, preparation method thereof and display device

Abstract

The invention provides a display panel and a preparation method thereof and a display device.The display panel comprises a substrate, a driving circuit layer, a pixel defining layer, a light-emitting function layer, a packaging layer, a first barrier layer and a touch layer, and the driving circuit layer, the pixel defining layer, the light-emitting function layer, the packaging layer, the first barrier layer and the touch layer are sequentially arranged on the substrate in a stacked mode. An isolation column is arranged between at least two adjacent pixel openings, the packaging layer comprises a first inorganic packaging layer, an organic packaging layer and a second inorganic packaging layer which are sequentially stacked, and the orthographic projection of the first barrier layer on the substrate at least covers the orthographic projection of the isolation column on the substrate; the etching rate of the first barrier layer is smaller than that of the second inorganic packaging layer.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and more specifically, to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] With the rapid development of OLED (Organic Light Emitting Diode) display technology, its advantages in high definition, high color saturation and low power consumption have made it widely used in consumer electronics such as smart phones, tablets, TVs and wearable devices. However, in the production process of OLED, the reliability issue has always been one of the key factors restricting its product quality and output.

[0003] Among many reliability issues, the Growing Dark Spot (GDS) problem in the display area caused by in-plane particles (PT) is particularly prominent, especially the vertical PT in the thickness direction of the panel film layer, which will seriously affect the film quality and integrity of the packaging layer in the subsequent packaging process, and then cause the GDS problem of the panel. Summary of the invention

[0004] The purpose of the present disclosure is to provide a display panel and a method for manufacturing the same, and a display device, so as to solve the problem of black spots caused by particles in the surface in the related art.

[0005] In order to achieve the above objectives, the present invention adopts the following technical solutions:

[0006] According to a first aspect of the present disclosure, there is provided a display panel, comprising: a base substrate, a driving circuit layer, a pixel defining layer, a light-emitting function layer, an encapsulation layer, a first barrier layer and a touch layer sequentially stacked on the base substrate, wherein the pixel defining layer defines a plurality of pixel openings spaced apart, and an isolation column is arranged between at least two adjacent pixel openings; the encapsulation layer comprises a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer sequentially stacked, an orthographic projection of the first barrier layer on the base substrate at least covers an orthographic projection of the isolation column on the base substrate, and an etching rate of the first barrier layer is less than an etching rate of the second inorganic encapsulation layer.

[0007] Optionally, the orthographic projection of the first barrier layer on the base substrate covers the orthographic projection of the second inorganic encapsulation layer on the base substrate.

[0008] Optionally, the orthographic projection of the first barrier layer on the base substrate covers the orthographic projection of the isolation column on the base substrate, and does not overlap with the orthographic projection of the pixel opening on the base substrate.

[0009] Optionally, an orthographic projection of the first barrier layer on the base substrate overlaps with an orthographic projection of the isolation column on the base substrate.

[0010] Optionally, the material of the first inorganic encapsulation layer is silicon nitride, silicon oxide or silicon oxynitride, the material of the second inorganic encapsulation layer is silicon nitride or silicon oxide, and the material of the first barrier layer is silicon oxynitride.

[0011] Optionally, the touch layer includes a second barrier layer, a first conductive layer, an insulating layer, a second conductive layer and a protective layer stacked in sequence; or the touch layer includes a first conductive layer, an insulating layer, a second conductive layer and a protective layer stacked in sequence.

[0012] Optionally, the orthographic projection of the first barrier layer on the base substrate overlaps with the orthographic projection of the isolation column on the base substrate, the touch layer includes a second barrier layer, a first conductive layer, an insulating layer, a second conductive layer and a protective layer stacked in sequence, the insulating layer includes a first insulating layer located in a first area and a second insulating layer located in a second area outside the first area, the thickness of the first insulating layer is greater than the thickness of the second insulating layer, wherein the orthographic projection of the first area on the base substrate covers the orthographic projection of the isolation column on the base substrate and does not overlap with the orthographic projection of the pixel opening on the base substrate.

[0013] A second aspect of the present disclosure provides a method for preparing a display panel, comprising the following steps:

[0014] providing a substrate base plate;

[0015] A driving circuit layer, a pixel defining layer, a light-emitting functional layer, an encapsulation layer, a first barrier layer and a touch layer are sequentially prepared on the base substrate, the pixel defining layer defines a plurality of pixel openings arranged at intervals, and an isolation column is arranged between at least two adjacent pixel openings, the encapsulation layer comprises a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer which are sequentially stacked, the orthographic projection of the first barrier layer on the base substrate at least covers the orthographic projection of the isolation column on the base substrate, and the etching rate of the first barrier layer is less than the etching rate of the second inorganic encapsulation layer.

[0016] Optionally, the orthographic projection of the first barrier layer on the base substrate overlaps with the orthographic projection of the isolation column on the base substrate, the touch layer includes a second barrier layer, a first conductive layer, an insulating layer, a second conductive layer and a protective layer stacked in sequence, the insulating layer includes a first insulating layer located in a first area and a second insulating layer located in a second area outside the first area, and the thickness of the first insulating layer is greater than the thickness of the second insulating layer;

[0017] The preparation process of the insulating layer includes:

[0018] depositing an inorganic thin film layer on the first conductive layer;

[0019] Coating a photoresist layer on the surface of the inorganic thin film layer;

[0020] The photoresist layer is exposed and developed using a mask, wherein the mask includes a first area and a second area outside the first area, the transmittance of the first area is less than the transmittance of the second area, and the orthographic projection of the first area on the base substrate covers the orthographic projection of the isolation column on the base substrate and does not overlap with the orthographic projection of the pixel opening on the base substrate;

[0021] The inorganic thin film layer after exposure and development is etched and debonded to obtain the insulating layer. A third aspect of the present disclosure provides a display device, comprising the display panel as described above.

[0022] The beneficial effects of the present disclosure are as follows:

[0023] The display panel of the disclosed embodiment arranges a first barrier layer between the second inorganic encapsulation layer and the touch layer, wherein the orthographic projection of the first barrier layer on the base substrate covers the orthographic projection of the isolation column on the base substrate, and the etching rate of the first barrier layer is arranged to be lower than the etching rate of the second inorganic encapsulation layer. In the subsequent etching process of preparing the touch layer, the first barrier layer can provide protection for the encapsulation layer at the HZ PT position to prevent the encapsulation layer at the HZ PT position from being over-etched and causing failure of the entire encapsulation layer, thereby effectively improving the GDS defect problem. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The specific implementation methods of the present disclosure are further described in detail below with reference to the accompanying drawings.

[0025] Figure 1 It is a schematic diagram of the structure of the encapsulation layer prepared after HZ PT is generated during the EV evaporation process in the related art;

[0026] Figure 2 It is a schematic diagram of the structure of the encapsulation layer prepared when the etching rates of the first inorganic encapsulation layer and the second inorganic encapsulation layer in the related art are the same;

[0027] Figure 3 A schematic diagram of a film layer structure of a display panel provided in an embodiment of the present disclosure;

[0028] Figure 4 for Figure 3 A schematic plan view of the display panel is shown;

[0029] Figure 5A schematic diagram of another film layer structure of a display panel provided in an embodiment of the present disclosure;

[0030] Figure 6 for Figure 5 A schematic plan view of the display panel is shown;

[0031] Figure 7 A schematic diagram of the film structure of the touch layer provided in an embodiment of the present disclosure;

[0032] Figure 8 A schematic diagram of a film layer structure in a display panel manufacturing process provided by an embodiment of the present disclosure;

[0033] Fig. 9 A flow chart of a method for preparing a display panel provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0035] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0036] In flexible OLED products, due to the use of flexible packaging, GDS defects have become one of the important problems in the product's back-end process. The applicant has found through research that the direct cause of GDS is packaging leakage, which causes the electroluminescent device to contact external water vapor, thereby causing the EL material to fail. The indirect causes of GDS, that is, the causes of packaging leakage, include but are not limited to the following two aspects:

[0037] (1) Particle contamination: During the semiconductor manufacturing process, dust in the air, particles generated by equipment wear, chemical residues, etc. may become sources of particle contamination. These particles are prone to form local defects in the packaging layer. These defects not only destroy the integrity of the packaging layer, but also provide channels for the invasion of harmful substances such as water vapor and ions, ultimately leading to corrosion of the luminescent material and GDS in the reliability process.

[0038] (2) In the EV evaporation process, there is relative movement between the substrate and the mask. Since the mask and the substrate are in a bonded state, when relative movement occurs, the physical high points on the front of the substrate (such as the isolation column PS) are rubbed and scratched, and the PS is scratched. The film layer that is scratched but not completely dropped is lifted up to form a vertical PT, which is recorded as HZ PT. HZ PT will affect the film quality and integrity of the packaging layer in the subsequent packaging process. In the process of preparing the touch sensor panel (TSP) on the packaging layer, the packaging layer will be damaged by the etching process in the TSP preparation process. When the packaging layer is damaged, harmful substances such as water vapor, oxygen, and ions can invade the light-emitting functional layer through the packaging layer, eventually causing the light-emitting material to be corroded and GDS to appear in the reliability process. Among them, the EV evaporation process is used to form the light-emitting layer of the display panel.

[0039] For the GDS caused by the above reason (1), it can be improved by improving the cleanliness of the factory production line, reducing the introduction of PT, optimizing the process, and reducing the generation of vertical PT.

[0040] For the GDS caused by the above-mentioned reason (2), in order to obtain a solution, the applicant conducted a more in-depth analysis of the cause of GDS, and took the case where the encapsulation layer of the display panel includes a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP and a second inorganic encapsulation layer CVD2 stacked in sequence, and the TSP structure includes a barrier layer Barrier, a first conductive layer TMA, an inorganic layer TLD, a second conductive layer TMB and a protective layer OC as an example, and specifically analyzed the process of HZ PT causing the GDS problem.

[0041] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of the encapsulation layer prepared after HZ PT is generated during EV evaporation. Figure 1As shown in the figure, after HZ PT is generated during the EV evaporation process, when the first inorganic encapsulation layer CVD1 is formed, due to morphological reasons, the first inorganic encapsulation layer CVD1 is unevenly formed above the HZ PT, with a thin thickness and a protrusion, and there are some small gaps in the transition area between the protrusion and the flat film layer at this position. When preparing the TSP structure in the subsequent process, especially in the process of preparing the first conductive layer TMA, the insulating layer TLD, and the second conductive layer TMB, a layer of photoresist needs to be coated and etched after the photoresist is exposed and developed. During the coating process, the photoresist will flow from the raised position to the flat position, resulting in less photoresist retained on the top of the raised position and a thinner photoresist layer. When etching is performed later, the thinner photoresist layer at the raised position will be quickly etched away in a short period of time. At this time, the standard etching process has not been completed, that is, the etching process will begin to etch the packaging layer under the photoresist layer that should be protected by the photoresist layer, eventually resulting in over-etching of the packaging layer. The packaging layer is opened, and after the packaging layer fails, water vapor can easily invade and cause GDS problems.

[0042] The applicant further analyzed the film morphology of the display panel using the focused ion beam (FIB) technology and found that although the insulating layer TLD, the barrier layer Barrier and the second inorganic encapsulation layer CVD2 were over-etched, the top (such as Figure 1 The first inorganic encapsulation layer CVD1 that wraps the HZ PT (as shown in the middle area Q1) remains basically intact, while the top area (as shown in the middle area Q1) remains intact. Figure 1 The second inorganic encapsulation layer CVD2 (shown in the middle area Q2) is almost completely etched away. The applicant has found through research that this phenomenon is mainly caused by the different etching selectivity ratios of the etching gas to the first inorganic encapsulation layer CVD1 and the second inorganic encapsulation layer CVD2 during the etching process, that is, the different etching rates of the first inorganic encapsulation layer CVD1 and the second inorganic encapsulation layer CVD2. In the display panel, the main film layer composition of the first inorganic encapsulation layer CVD1 is silicon oxynitride SiON, while the main film layer composition of the second inorganic encapsulation layer CVD2 is basically the same as the composition of the barrier layer Barrier and the insulating layer TLD, mainly pure silicon nitride SiN or silicon oxide SiO. The difference in film layer materials leads to different etching rates for the same etching gas. Conversely, if the etching rates of the first inorganic encapsulation layer CVD1 and the second inorganic encapsulation layer CVD2 are the same, the resulting encapsulation layer structure schematic diagram is as shown in the figure. Figure 2 As shown, at this time, the first inorganic encapsulation layer CVD1 on the top of the HZ PT is flattened by the etching gas, and is in the same plane as the second inorganic encapsulation layer CVD2 around the top of the HZ PT, wherein the top of the HZ PT and the top periphery can be represented as area Q3.

[0043] Based on the above findings, the applicant has proposed the display panel and the method for preparing the same, and the display device disclosed herein. The display panel and the method for preparing the same, and the display device disclosed herein are described in detail below in conjunction with various specific embodiments.

[0044] Please refer to Figure 3 , Figure 3 A schematic diagram of a film layer structure of a display panel provided in an embodiment of the present disclosure. Figure 3 As shown, the display panel includes: a base substrate 10, a driving circuit layer 20, a pixel defining layer 30, a light-emitting function layer 40, an encapsulation layer 50, a first barrier layer 60 and a touch layer 70 stacked in sequence on the base substrate 10, the pixel defining layer 30 defines a plurality of pixel openings 301 spaced apart, the display panel also includes isolation columns (PS) 80, and an isolation column 80 is arranged between at least two adjacent pixel openings 301, the encapsulation layer 50 includes a first inorganic encapsulation layer 501, an organic encapsulation layer 502 and a second inorganic encapsulation layer 503 stacked in sequence, the orthographic projection of the first barrier layer 60 on the base substrate 10 at least covers the orthographic projection of the isolation column 80 on the base substrate 10, and the etching rate of the first barrier layer 60 is less than the etching rate of the second inorganic encapsulation layer 503.

[0045] The light-emitting functional layer 40 is at least partially disposed in the pixel opening 301, and the light-emitting functional layer 40 includes an anode layer, a light-emitting material layer, and a cathode layer stacked in sequence in a direction away from the base substrate 10, and the anode layer, the light-emitting material layer, and the cathode layer form a plurality of sub-pixels, for example Figure 3In the sub-pixels P1, P2, and P3, the sub-pixels P1, P2, and P3 represent one of the sub-pixels R, G, and B, respectively, and one sub-pixel is formed in any pixel opening 301. Among them, the light-emitting material layer is usually prepared by a high-vacuum evaporation process to ensure the purity and uniformity of the material. In addition, the cathode layer may also be prepared by an evaporation process. During the evaporation process, a mask is required. The mask has multiple hollow areas corresponding to the pixel openings 301, so that the light-emitting material can be accurately deposited in the pixel openings 301 to form the desired light-emitting pattern. However, since the mask and the base substrate 10 are in a bonded state, when relative movement occurs, the isolation column 80 on the front of the base substrate 10 is easily scratched by friction, and the film layer of the isolation column 80 that is scratched but not completely dropped is lifted up to form a vertical state. The vertical here can also be understood as a convex state in the thickness direction of the film layer. The part of the film layer in a vertical state can be recorded as H-ZPT. In the subsequent preparation process of the encapsulation layer 50, the first inorganic encapsulation layer 501 wraps the HZ PT, and the film formation above the HZ PT is uneven, the thickness is thin, and a convexity is formed, which affects the encapsulation effect in the subsequent etching process. In order to solve this problem, in the embodiment of the present disclosure, a first barrier layer 60 is added between the encapsulation layer 50 and the touch layer 70. During the etching process, the first barrier layer 60 can provide protection for the encapsulation layer 50 below. Therefore, the orthographic projection of the first barrier layer 60 on the base substrate 10 needs to at least cover the orthographic projection of the HZ PT on the base substrate 10, that is, cover the orthographic projection of the isolation column 80 on the base substrate 10.

[0046] Among them, the isolation column 80 can improve the display effect, prevent current crosstalk, optimize the pixel structure, and serve as a support for the pixel structure to protect the pixel from external impact and damage. In a specific display panel, the arrangement of the isolation column will be flexibly set according to the production cost, process difficulty, type of display panel, performance parameters of the display panel, etc., such as only setting the isolation column between certain pixel openings. In the embodiment of the present disclosure, an isolation column 80 is set between at least two adjacent pixel openings 301, for example Figure 3 As shown, an isolation column 80 is disposed between sub-pixels P2 and P3, but no isolation column 80 is disposed between P1 and P2; Figure 4 As shown, Figure 4 is a partial plan view of the display panel. Figure 4 The middle region Q10 includes a plurality of pixel openings 301, while the region Q10 is provided with only one isolation column 80. It is understandable that which pixel openings are provided with the isolation column 80 can be determined according to actual needs, and the present disclosure does not limit this.

[0047] Among them, the etching rate of the first barrier layer 60 is lower than the etching rate of the second inorganic encapsulation layer 503, which means that during the etching process, there is a difference in the speed at which the first barrier layer 60 and the second inorganic encapsulation layer 503 are removed, and the first barrier layer 60 is removed relatively slowly, while the second inorganic encapsulation layer 503 is removed relatively quickly.

[0048] Generally, the difference in etching rate of different film layers may be caused by a variety of factors, including but not limited to the following: (1) Material properties: Different materials have different chemical and physical properties, and respond differently to etchants. Therefore, under the same etching conditions, the etching rates of different materials may be significantly different. (2) Etchant selection: The choice of etchant has a direct impact on the etching rate, and different etchants have different etching effects on specific materials. (3) Process conditions: The temperature, pressure, etchant concentration, gas flow rate and other process conditions during the etching process will affect the etching rate. By adjusting these process conditions, the difference in etching rate of different material layers can be controlled to a certain extent. (4) Etching mechanism: Different etching mechanisms (such as chemical etching, physical etching, plasma etching, etc.) also have different effects on the etching rate and etching effect of the material. Therefore, when selecting an etching process, it is necessary to select a suitable etching mechanism based on the material properties and processing requirements.

[0049] As can be seen from the above description, etching conditions (including but not limited to the etching conditions such as the type of etchant, etching mechanism, temperature, pressure, etchant concentration, gas flow rate, etc. shown above) and film layer materials will affect the etching rate of the film layer. In the embodiment of the present disclosure, the etching conditions in the preparation process of the touch layer 70 are not changed, but the etching rates of different film layers are adjusted by selecting film layer materials.

[0050] For example, assuming that the etching condition in the process of preparing the touch layer 70 is recorded as etching condition A, the etching rate of the first barrier layer 60 or the second inorganic encapsulation layer 503 in the embodiment of the present disclosure refers to the speed at which the first barrier layer 60 or the second inorganic encapsulation layer 503 is removed under etching condition A. It can be understood that the embodiment of the present disclosure does not limit the specific etching condition in the process of preparing the touch layer 70, as long as the etching rate of the first barrier layer 60 is less than the etching rate of the second inorganic encapsulation layer 503 under the etching condition.

[0051] Compared with the related art, the display panel of the embodiment of the present disclosure arranges a first barrier layer between the second inorganic encapsulation layer and the touch layer, the first barrier layer covers the orthographic projection of the isolation column on the base substrate, and the etching rate of the first barrier layer is set to be lower than the etching rate of the second inorganic encapsulation layer. In the subsequent etching process of preparing the touch layer, the first barrier layer can provide protection for the encapsulation layer at the HZ PT position to prevent the encapsulation layer at the HZ PT position from being over-etched and causing failure of the entire encapsulation layer, thereby effectively improving the GDS defect problem.

[0052] Optionally, the material of the first inorganic encapsulation layer 501 is silicon oxynitride SiON, and is prepared by a chemical vapor deposition (CVD) process; the organic encapsulation layer 502 is formed of organic materials such as polyimide (PI) and epoxy resin; the material of the second inorganic encapsulation layer 503 is silicon nitride SiN or silicon oxide SiO, and is prepared by a chemical vapor deposition (CVD) process; the material of the first barrier layer 60 is silicon oxynitride SiON. It is understandable that in the embodiment of the present disclosure, the first barrier layer 60 and the second inorganic encapsulation layer 503 can also be made of other inorganic materials, as long as the etching rate of the first barrier layer 60 is less than the etching rate of the second inorganic encapsulation layer 503.

[0053] In a possible implementation, the orthographic projection of the first barrier layer 60 on the base substrate 10 covers the orthographic projection of the second inorganic encapsulation layer 502 on the base substrate 10. In this case, it can also be understood that the first barrier layer 60 is a whole film layer. Please refer to Figure 3 and Figure 4 , Figure 3 is a structural schematic diagram showing that the orthographic projection of the first barrier layer on the base substrate covers the orthographic projection of the second inorganic encapsulation layer on the base substrate, Figure 4 for Figure 3 A partial plan view of a display panel is shown. Figure 4 The area Q10 marked by the dotted box represents the orthographic projection of the first barrier layer on the base substrate. It can be seen that in this embodiment, the first barrier layer is a film layer that covers the entire surface of the second inorganic encapsulation layer.

[0054] Optionally, the first barrier layer 60 is prepared by a deposition (Deposition, Dep for short) process, that is, a barrier material film is deposited on the second encapsulation layer 503 to form the first barrier layer 60 .

[0055] With such a design, on the one hand, it is possible to ensure that the first barrier layer 60 provides protection for the encapsulation layer 50 at the location of the HZ PT while achieving uniform thickness and coverage in all areas, thereby effectively preventing external environmental factors such as moisture and oxygen from corroding the internal components of the display panel; on the other hand, the design of the entire film layer can simplify the preparation process of the first barrier layer 60, reduce production costs and process difficulty, and is beneficial to quality control and inspection during the manufacturing process, thereby improving production efficiency and yield rate.

[0056] In a possible implementation, the orthographic projection of the first barrier layer 60 on the base substrate 10 covers the orthographic projection of the isolation column 80 on the base substrate 10, and the orthographic projection of the first barrier layer 60 on the base substrate 10 does not overlap with the orthographic projection of the pixel opening 301 on the base substrate 10. In this case, the first barrier layer 60 is a patterned film layer. Specifically, the first barrier layer 60 has a thin film structure at the location of the isolation column 80, but does not have a thin film structure at the location of the pixel opening 301. Please refer to Figure 5 and Figure 6 , Figure 5 is a schematic diagram of the structure in which the orthographic projection of the first barrier layer on the substrate is a patterned film layer, Figure 6 for Figure 5 A partial plan view of a display panel is shown. Figure 6 The area Q20 marked by the dotted box represents the orthographic projection of the first barrier layer 60 on the base substrate 10 . It can be seen that in this embodiment, the first barrier layer 60 only covers the encapsulation layer 50 above the isolation column 80 , while the first barrier layer 60 is not provided in other areas.

[0057] There are two situations in which the orthographic projection of the first barrier layer 60 on the base substrate 10 covers the orthographic projection of the isolation column 80 on the base substrate 10: (1) the projections completely overlap, that is, the orthographic projections of the first barrier layer 60 and the isolation column 80 on the base substrate 10 completely overlap; (2) the orthographic projection of the first barrier layer 60 on the base substrate 10 covers and the projection area exceeds the orthographic projection of the isolation column 80 on the base substrate 10. Figure 6 The example shown is the second case.

[0058] Optionally, the orthographic projection of the first barrier layer 60 on the base substrate 10 overlaps with the orthographic projection of the isolation column 80 on the base substrate 10, that is, the first barrier layer 60 only covers the encapsulation layer 50 in the area where the isolation column 80 is located, and does not cover the encapsulation layer 50 outside the area where the isolation column 80 is located. Such a configuration can reduce unnecessary material usage, thereby reducing manufacturing costs.

[0059] Optionally, the first barrier layer 60 is prepared by a mask process, that is, a mask is used to realize pattern design during the deposition process of the first barrier layer 60. Exemplarily, the preparation process of the first barrier layer 60 includes: placing the mask on the substrate to be deposited, that is, the base substrate on which the second inorganic encapsulation layer 503 is formed; then, depositing a barrier material film on the base substrate by chemical vapor deposition technology, and due to the presence of the mask, the barrier material film will only be deposited in the area not blocked by the mask (that is, the HZ PT position).

[0060] Such a design, on the one hand, can ensure that the first barrier layer 60 provides protection for the encapsulation layer 50 at the location of the HZ PT; on the other hand, by precisely controlling the distribution of the first barrier layer 60 and retaining it only at the required location instead of depositing it on the entire encapsulation layer 50, it is possible to avoid large-scale changes to the entire film structure, maintain the stability and reliability of the original design, and reduce potential impacts on device performance. For example, in some cases, excessive film deposition may increase the resistance and capacitance of the device or cause signal delays, etc., and precisely controlling the film distribution can avoid these problems.

[0061] In one possible implementation, Figure 7 As shown, the touch layer 70 includes a second barrier layer 701 , a first conductive layer 702 , an insulating layer 703 , a second conductive layer 704 and an overcoat layer (OC) 705 which are sequentially stacked in a direction away from the base substrate 10 .

[0062] In the embodiment of the present disclosure, the structure of the touch layer 70 is not improved. At this time, the touch layer 70 adopts a five-layer structure in the related art, namely, a second barrier layer 701, a first conductive layer 702, an insulating layer 703, a second conductive layer 704 and a protective layer 705. Among them, the material of the second barrier layer 701 is silicon oxide SiO. A plurality of first electrodes are formed on the first conductive layer 702, and a plurality of second electrodes corresponding to the positions of the first electrodes are formed on the second conductive layer 703. The first electrode, the second electrode and the insulating layer between the first electrode and the second electrode form a capacitive sensing structure, wherein one of the first electrode and the second electrode is a sensing electrode and the other is a driving electrode. The protective layer 705 is an organic protective layer, which is used to protect the touch function layer formed by the first conductive layer 702, the insulating layer 703 and the second conductive layer 704, and protect the touch function layer from scratches, fingerprints, oil stains and other pollution, while improving the sensitivity and accuracy of touch.

[0063] In a possible implementation, since the touch layer 70 also includes a barrier layer, in order to further simplify the process and the film structure of the display panel, the barrier layer of the touch layer 70 in the related art can also be directly improved, and the silicon oxide SiO or silicon nitride SiN of the second barrier layer 701 is changed to a silicon oxynitride SiON structure, that is, the material of the second barrier layer 701 is changed from silicon oxide SiO or silicon nitride SiN to silicon oxynitride SiON. At this time, the second barrier layer 701 is reused as the first barrier layer 60, which can also be understood as the touch layer 70 at this time including a first conductive layer 702, an insulating layer 703, a second conductive layer 704 and a protective layer 705 stacked in sequence in a direction away from the base substrate 10.

[0064] In a possible implementation, the orthographic projection of the first barrier layer 60 on the base substrate 10 overlaps with the orthographic projection of the isolation column 80 on the base substrate 10, and the touch layer 70 includes a second barrier layer 701, a first conductive layer 702, an insulating layer 703, a second conductive layer 704 and a protective layer 705 which are stacked in sequence, wherein the insulating layer 703 includes a first insulating layer located in a first area and a second insulating layer located in a second area outside the first area, the thickness of the first insulating layer is greater than the thickness of the second insulating layer, wherein the orthographic projection of the first area on the base substrate 10 covers the orthographic projection of the isolation column 80 on the base substrate 10, and does not overlap with the orthographic projection of the pixel opening 301 on the base substrate 10.

[0065] The first insulating layer and the second insulating layer have different thicknesses, which is achieved by using a specific mask in the preparation process. Exemplarily, the mask includes a first region and a second region outside the first region. The transmittance of the first region is less than the transmittance of the second region. Optionally, the transmittance of the first region can be set to 0. It can be understood that in the embodiment of the present disclosure, the insulating layer 703 is represented as the first insulating layer and the second insulating layer only to express that the insulating layer 703 has different thicknesses in different regions. In the actual product, the first insulating layer and the second insulating layer are a film layer structure integrally formed in the same process.

[0066] In this embodiment, the insulating layer 703 is formed by an inorganic material, and the inorganic material is generally silicon oxide SiO or silicon nitride SiN. The preparation process of the insulating layer 703 includes the following steps:

[0067] (1) depositing an inorganic thin film layer on the first conductive layer; illustratively, the inorganic thin film layer may be deposited on the first conductive layer by chemical vapor deposition technology.

[0068] (2) coating a photoresist (PR glue) layer on the surface of the inorganic thin film layer;

[0069] (3) exposing and developing the photoresist layer using a mask, wherein the mask includes a first area and a second area outside the first area, the transmittance of the first area is 0, the transmittance of the second area is A, and the orthographic projection of the first area on the base substrate 10 covers the orthographic projection of the isolation column 80 on the base substrate 10 and does not overlap with the orthographic projection of the pixel opening 301 on the base substrate 10;

[0070] (4) The inorganic thin film layer after exposure and development is etched and debonded to obtain the insulating layer 703.

[0071] The disclosed embodiment improves the design of the mask used in the related art. Specifically, the mask in the disclosed embodiment adopts a half-tone mask, and the transmittance of the mask at the position of the isolation column 80 (represented as the first area) is designed to be 0%, that is, the full shielding effect can be achieved at this position, and the transmittance of other conventional positions (such as the second area) is set to A%, and A is not 0. Then, when the surface is coated with the same thickness of photoresist, after the Half Tone Mask process, the photoresist above the isolation column 80 is retained intact, while the photoresist thickness in other areas is thinner than the photoresist thickness above the isolation column 80. The thickness difference at different positions is the basis for the difference in protection effect in the subsequent etching process. During the etching process, since the photoresist above the isolation column 80 is thicker, the thickness of the insulating layer 703 at the first region after etching is greater than the thickness of the insulating layer 703 at other positions. At this time, the overall inorganic layer thickness composed of the first barrier layer 60, the second barrier layer 701 and the insulating layer 703 in the first region is thicker. This design ensures that the area to be protected above the isolation column 80 has sufficient inorganic layer thickness. Even if over-etching occurs during the preparation of the insulating layer, the second inorganic encapsulation layer 503 at the PZ PT position can be prevented from being over-etched or damaged. For example, please refer to Figure 8 , Figure 8 Schematic diagram of the film structure in the process of preparing the display panel according to the embodiment of the present disclosure. Figure 8 701 & 703 are used to represent the second barrier layer 701 and the insulating layer 703, wherein the first conductive layer 702 is not shown in the figure. Figure 8 As shown, after etching in the TLD process is completed, the thickness of the inorganic layer in the first area is recorded as a1, and the thickness of the inorganic layer corresponding to the second area is recorded as a2, and a1 is greater than a2.

[0072] Based on the same inventive concept, the second aspect of the present disclosure provides a method for preparing a display panel, which is used to prepare the display panel as shown above. Fig. 9 As shown, it includes the following steps:

[0073] Step S10, providing a substrate;

[0074] Step S20, preparing a driving circuit layer, a pixel defining layer, a light-emitting function layer, an encapsulation layer, a first barrier layer and a touch layer on the base substrate in sequence, the pixel defining layer defines a plurality of pixel openings spaced apart, and an isolation column is arranged between at least two adjacent pixel openings, the encapsulation layer comprises a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer stacked in sequence, the orthographic projection of the first barrier layer on the base substrate at least covers the orthographic projection of the isolation column on the base substrate, and the etching rate of the first barrier layer is less than the etching rate of the second inorganic encapsulation layer.

[0075] Optionally, the orthographic projection of the first barrier layer on the base substrate overlaps with the orthographic projection of the isolation column on the base substrate, the touch layer includes a second barrier layer, a first conductive layer, an insulating layer, a second conductive layer and a protective layer stacked in sequence, the insulating layer includes a first insulating layer located in a first area and a second insulating layer located in a second area outside the first area, and the thickness of the first insulating layer is greater than the thickness of the second insulating layer;

[0076] The preparation process of the insulating layer includes:

[0077] depositing an inorganic thin film layer on the first conductive layer;

[0078] Coating a photoresist layer on the surface of the inorganic thin film layer;

[0079] The photoresist layer is exposed and developed using a mask, wherein the mask includes a first area and a second area outside the first area, the transmittance of the first area is less than the transmittance of the second area, and the orthographic projection of the first area on the base substrate covers and overlaps the orthographic projection of the isolation column on the base substrate, and does not overlap with the orthographic projection of the pixel opening on the base substrate;

[0080] The inorganic thin film layer after exposure and development is etched and de-gum treated to obtain the insulating layer.

[0081] Compared with the related art, the method for preparing the display panel of the embodiment of the present disclosure sets a first barrier layer between the second inorganic encapsulation layer and the touch layer, the orthographic projection of the first barrier layer on the base substrate covers the orthographic projection of the isolation column on the base substrate, and the etching rate of the first barrier layer is set to be lower than the etching rate of the second inorganic encapsulation layer. In the subsequent etching process of preparing the touch layer, the first barrier layer can provide protection for the encapsulation layer at the H-ZPT position to prevent the encapsulation layer at the HZ PT position from being over-etched and causing failure of the entire encapsulation layer, thereby effectively improving the GDS defect problem.

[0082] Based on the same inventive concept, the third aspect of the present disclosure provides a display device, including the display panel as described above. Exemplarily, the display device can be any product or component with display and touch functions, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc., which is not limited in this embodiment.

[0083] The display panel may be an organic light-emitting diode (OLED) display panel. It is understandable that the display panel may be set to other types according to actual needs, for example, the display panel may be a quantum dot light-emitting diode (QLED) display panel or a micro light-emitting diode (Micro LED) display panel.

[0084] Obviously, the above embodiments of the present disclosure are merely examples for clearly illustrating the present disclosure, and are not limitations on the implementation methods of the present disclosure. For ordinary technicians in this field, other different forms of changes or modifications can be made on the basis of the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present disclosure are still within the protection scope of the present disclosure.

Claims

1. A display panel, characterized in that: include: A base substrate, a driving circuit layer, a pixel defining layer, a light-emitting function layer, a packaging layer, a first barrier layer and a touch layer stacked in sequence on the base substrate, the pixel defining layer defines a plurality of pixel openings spaced apart, an isolation column is arranged between at least two adjacent pixel openings, the packaging layer comprises a first inorganic packaging layer, an organic packaging layer and a second inorganic packaging layer stacked in sequence, the orthographic projection of the first barrier layer on the base substrate at least covers the orthographic projection of the isolation column on the base substrate, and the etching rate of the first barrier layer is less than the etching rate of the second inorganic packaging layer.

2. The display panel according to claim 1, characterized in that: The orthographic projection of the first barrier layer on the base substrate covers the orthographic projection of the second inorganic encapsulation layer on the base substrate.

3. The display panel according to claim 1, characterized in that: The orthographic projection of the first barrier layer on the base substrate covers the orthographic projection of the isolation column on the base substrate, and does not overlap with the orthographic projection of the pixel opening on the base substrate.

4. The display panel according to claim 3, characterized in that: An orthographic projection of the first barrier layer on the base substrate overlaps with an orthographic projection of the isolation column on the base substrate.

5. The display panel according to any one of claims 1 to 4, characterized in that: The material of the first inorganic encapsulation layer is silicon nitride, silicon oxide or silicon oxynitride, the material of the second inorganic encapsulation layer is silicon nitride or silicon oxide, and the material of the first barrier layer is silicon oxynitride.

6. The display panel according to any one of claims 1 to 4, characterized in that: The touch layer includes a second barrier layer, a first conductive layer, an insulating layer, a second conductive layer and a protective layer stacked in sequence; or the touch layer includes a first conductive layer, an insulating layer, a second conductive layer and a protective layer stacked in sequence.

7. The display panel according to claim 1, characterized in that: The orthographic projection of the first barrier layer on the base substrate overlaps with the orthographic projection of the isolation column on the base substrate, the touch layer includes a second barrier layer, a first conductive layer, an insulating layer, a second conductive layer and a protective layer which are stacked in sequence, the insulating layer includes a first insulating layer located in a first area and a second insulating layer located in a second area outside the first area, the thickness of the first insulating layer is greater than the thickness of the second insulating layer, wherein the orthographic projection of the first area on the base substrate covers the orthographic projection of the isolation column on the base substrate and does not overlap with the orthographic projection of the pixel opening on the base substrate.

8. A method for preparing a display panel, characterized in that: The following steps are involved: providing a substrate base plate; A driving circuit layer, a pixel defining layer, a light-emitting functional layer, an encapsulation layer, a first barrier layer and a touch layer are sequentially prepared on the base substrate, the pixel defining layer defines a plurality of pixel openings arranged at intervals, and an isolation column is arranged between at least two adjacent pixel openings, the encapsulation layer comprises a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer which are sequentially stacked, the orthographic projection of the first barrier layer on the base substrate at least covers the orthographic projection of the isolation column on the base substrate, and the etching rate of the first barrier layer is less than the etching rate of the second inorganic encapsulation layer.

9. The method for preparing a display panel according to claim 8, characterized in that: The orthographic projection of the first barrier layer on the base substrate overlaps with the orthographic projection of the isolation column on the base substrate, the touch layer comprises a second barrier layer, a first conductive layer, an insulating layer, a second conductive layer and a protective layer which are stacked in sequence, the insulating layer comprises a first insulating layer located in a first area and a second insulating layer located in a second area outside the first area, and the thickness of the first insulating layer is greater than the thickness of the second insulating layer; The preparation process of the insulating layer includes: depositing an inorganic thin film layer on the first conductive layer; Coating a photoresist layer on the surface of the inorganic thin film layer; The photoresist layer is exposed and developed using a mask, wherein the mask includes a first area and a second area outside the first area, the transmittance of the first area is less than the transmittance of the second area, and the orthographic projection of the first area on the base substrate covers the orthographic projection of the isolation column on the base substrate and does not overlap with the orthographic projection of the pixel opening on the base substrate; The inorganic thin film layer after exposure and development is etched and de-gum treated to obtain the insulating layer.

10. A display device, characterized in that: The invention comprises the display panel as claimed in any one of claims 1 to 7.

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