Multi-controller system, coding method, electronic equipment and storage medium
Patent Information
- Application Number
- CN202280096553.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-08
- Publication Date
- 2025-01-03
AI Technical Summary
In a multi-controller system, there are many hard wires for slave controller configuration, which results in high wiring harness costs and high consumption of IO detection resources. The manual coding method is error-prone and requires a large amount of manual work.
A multi-controller system is adopted, in which pairs of slave controllers are connected through a hard wire, and the master controller communicates with the slave controller through the bus to implement an automatic encoding method, reduce the number of hard wires and IO detection resources, and use wake-up lines and encoding lines Transmits signals, automatically identifies and encodes them from the controller.
It reduces wiring harness costs and IO detection resource consumption, improves coding accuracy and system reliability, reduces manual workload, and avoids coding errors.
Smart Images
Figure CN119256301A_ABST
Abstract
Description
Multi-controller system, encoding method, electronic device and storage medium Technical Field
[0001] The present application relates to the technical field of controller systems, and in particular to a multi-controller system, an encoding method, an electronic device, and a storage medium. Background Art
[0002] Multi-controller systems are widely used in technologies such as battery management and energy storage management. These systems typically consist of a master controller and multiple levels of slave controllers, with each level comprising at least one slave controller. Each slave controller is configured with two hardwires, which increases wiring harness costs and requires a large number of I / O detection resources.
[0003] Summary of the Invention
[0004] The embodiments of the present application provide a multi-controller system, a coding method for a multi-controller system, an electronic device, and a computer-readable storage medium, which can solve the problems in related technologies of a large number of hard wires configured from the controller, high wiring harness costs, and a large number of IO detection resources required.
[0005] In a first aspect, a multi-controller system is provided, comprising a master controller and at least one branch connected to the master controller; the branch comprises at least one slave controller pair connected in sequence;
[0006] The pair of slave controllers includes a first slave controller and a second slave controller connected by a hard line;
[0007] The master controller is connected to each slave controller through a bus.
[0008] In the multi-controller system provided by the embodiment of the present application, the first slave controller and the second slave controller of the slave controller pair are connected by a hard wire, which reduces the number of hard wires required in the multi-controller system, reduces the wiring harness cost, and reduces the required IO detection resources, thereby solving the problems in the related art of having a large number of hard wires configured in the slave controller, high wiring harness cost, and a large number of IO detection resources required.
[0009] In one implementation, the hard line connecting the first slave controller and the second slave controller in the same slave controller pair is a wake-up line for transmitting a wake-up signal;
[0010] The master controller is connected to the first slave controller of the first slave controller pair via a hard-wired coding line;
[0011] Each pair of slave controllers in the at least one branch is connected via a hard-wired coding line;
[0012] The hard-wired encoding line is used to transmit the encoding signal.
[0013] The wake-up line is used to transmit a wake-up signal, so that the first slave controller can wake up the second slave controller through the wake-up line and complete the hard-line identification of the second slave controller, so that the master controller can encode the second slave controller after the hard-line identification.
[0014] In a second aspect, a multi-controller system encoding method is provided, which is applied to the multi-controller system described above; the method comprises:
[0015] The at least one branch includes a first branch, and the master controller or the coded slave controller in the first branch performs hard-wire identification on the uncoded slave controller connected by hard-wire;
[0016] The master controller encodes the unencoded slave controllers recognized by hard wire via the bus.
[0017] The encoding method provided in the embodiment of the present application can realize automatic encoding, effectively avoid coding errors, improve the reliability of the multi-controller system, reduce manual workload, and overcome the defects of high coding error rate and large manual workload caused by the manual setting encoding method in the related technology.
[0018] In one implementation, the method further includes:
[0019] The encoded slave controller enters a silent state after completing hard-wire identification of the slave controller connected to the hard-wire;
[0020] The step of returning to the master controller to encode the unencoded slave controllers identified by the hard line through the bus is executed in a loop until the master controller determines that all the slave controllers that need to be encoded in the first branch have been encoded, thereby realizing automatic encoding of the current branch, effectively avoiding encoding errors, improving the reliability of the multi-controller system, and reducing manual workload.
[0021] In one implementation, the master controller determines that all slave controllers that need to be encoded in the first branch have completed encoding, including:
[0022] determining whether the number of generated encoding addresses is equal to a preset number of slave controllers that need to be encoded in the first branch;
[0023] If they are equal, it is determined that all slave controllers that need to be encoded in the first branch have completed encoding; otherwise, it is determined that they are not completed, so as to accurately judge whether the current branch has completed encoding and avoid missing encoding operations on some slave controllers.
[0024] In one implementation, the master controller performs hardline identification on the slave controller to which it is connected via a hardline, including:
[0025] The master controller sends an encoding start instruction via the bus, and all the first slave controllers enter the encoding mode;
[0026] The master controller sends a coding signal to the connected first slave controller via a hard-wired coding line, so that the connected first slave controller is hard-wired identified after receiving the coding signal. The master controller performs hard-wired identification on the first slave controller, thereby facilitating the master controller to encode the first slave controller after hard-wired identification.
[0027] In one implementation, the master controller encodes an unencoded slave controller identified by hard-wire via the bus, comprising:
[0028] The master controller generates a coded address and sends the coded address to the slave controller identified by the hardwire via the bus;
[0029] The slave controller identified by the hard line writes the coded address into its own storage space. The master controller encodes the slave controller identified by the hard line through the bus, thereby ensuring a one-to-one correspondence between the slave controller and the coded address.
[0030] In one implementation, the master controller encodes the unencoded slave controller identified by hard line through the bus, further comprising:
[0031] The slave controller identified by the hard line sends the coded address written into itself to the master controller;
[0032] The main controller determines whether the received coded address is consistent with the coded address generated by itself;
[0033] If the received encoding address is consistent with the encoding address generated by itself, the encoding is determined to be successful. The main controller determines whether the encoding is successful, thereby ensuring a high encoding accuracy rate.
[0034] In one implementation, the method further includes:
[0035] If the received coded address is inconsistent with the self-generated coded address, re-performing the step of sending the coded address to the slave controller identified by the hardwire;
[0036] If the master controller does not receive a coding address that is consistent with the coding address generated by itself when the preset time length or the preset number of retransmissions is reached, the coding operation is terminated. Re-executing the step of sending the coding address when the coding is unsuccessful can improve the coding success rate.
[0037] In one implementation, the first slave controller and the second slave controller in the same slave controller pair are connected via a wake-up line;
[0038] The encoded slave controller performs hard-line identification on the next slave controller to which it is connected via a hard line, including:
[0039] If the encoded slave controller is the first slave controller, the encoded first slave controller wakes up the second slave controller connected to it through the wake-up line when the encoding is completed and the preset delay time is reached, and the awakened second slave controller becomes the slave controller recognized by the hard line;
[0040] If the encoded slave controller is the second slave controller, the encoded second slave controller then sends an encoding signal to the next first slave controller connected to it via the hard-wired encoding line after a preset time, making the next first slave controller the slave controller recognized by the hard-wire. Hard-wired slave controller identification facilitates encoding operations performed by the master controller on the hard-wired slave controller, improving encoding accuracy.
[0041] In one implementation, before the encoded slave controller performs hard-line identification on the next slave controller to which it is connected via a hard line, the method further includes:
[0042] The main controller sends a successful encoding confirmation instruction;
[0043] After receiving the encoding success confirmation instruction, the encoded slave controller sends an encoding success feedback signal to the master controller;
[0044] The main controller receives the feedback signal and updates the current encoding address.
[0045] After receiving the feedback signal, the main controller updates the current encoding address, further improving the encoding accuracy and effectively avoiding miscoding.
[0046] In a third aspect, an electronic device is provided, characterized in that it includes a memory, a processor, and a computer program stored in the memory and runnable on the processor, and the processor executes the program to implement any one of the above encoding methods.
[0047] The electronic device of the embodiment of the present application can implement any of the above-mentioned encoding methods, can realize automatic encoding, effectively avoid coding errors, improve the reliability of the multi-controller system, reduce manual workload, and overcome the defects of high coding error rate and large manual workload caused by the manual setting encoding method in the related technology.
[0048] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored, and the program is executed by a processor to implement any of the above encoding methods.
[0049] The computer-readable storage medium of the embodiment of the present application can implement any of the above-mentioned encoding methods, can realize automatic encoding, effectively avoid encoding errors, improve the reliability of the multi-controller system, reduce manual workload, and overcome the defects of high encoding error rate and large manual workload caused by the manual setting encoding method in the related technology. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the drawings without creative work.
[0051] FIG1 is a structural block diagram of a multi-controller system according to an example embodiment of the present application.
[0052] FIG2 is a structural block diagram of a multi-controller system according to another example of an embodiment of the present application.
[0053] FIG3 is a flow chart of an encoding method for a multi-controller system according to some embodiments of the present application.
[0054] FIG4 is a flow chart of an encoding method for a multi-controller system according to some other embodiments of the present application.
[0055] FIG5 is a flow chart of an encoding method for a multi-controller system according to a specific example of the present application.
[0056] FIG6 is a structural block diagram of an electronic device according to an embodiment of the present application.
[0057] FIG7 is a schematic diagram of a computer-readable storage medium according to an embodiment of the present application. DETAILED DESCRIPTION
[0058] The following detailed description of the embodiments of the present application is provided in conjunction with the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of the present application, but are not intended to limit the scope of the present application, that is, the present application is not limited to the described embodiments.
[0059] In the description of this application, it should be noted that, unless otherwise specified, "multiple" means more than two; the terms "upper", "lower", "left", "right", "inside", "outside", etc., indicating directions or positional relationships, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on this application. In addition, the terms "first", "second", "third", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. "Vertical" is not strictly perpendicular, but is within the allowable error range. "Parallel" is not strictly parallel, but is within the allowable error range.
[0060] The directional words appearing in the following description are all directions shown in the figures, and do not limit the specific structure of this application. In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.
[0061] Multi-controller systems are widely used in fields such as battery management and energy storage management. These systems typically consist of a master controller and multiple levels of slave controllers. Each level of slave controllers includes at least one slave controller, and the master and slave controllers communicate via a bus. Furthermore, each slave controller requires two hardwires, which increases wiring costs and requires a large number of I / O detection resources.
[0062] The multi-controller system can be applied to, for example, a battery management system (BMS) or an energy storage management system. Among them, the BMS is used to intelligently manage and maintain each battery cell, monitor the status of the battery, prevent the battery from overcharging and over-discharging, and extend the service life of the battery. In a battery management system, it usually includes a master controller and multiple slave controllers, each slave controller is used to monitor one or more battery cells. There are usually multiple levels of slave controllers in the battery management system, and each slave controller is configured with two hard wires. The wiring harness cost is high and more IO detection resources are required. The energy storage management system can be used for power system energy storage management, which can realize the energy storage and release function of the power system, ensure the large-scale development of clean energy and the safe and economical operation of the power grid. The multiple slave controllers in the energy storage management system may, for example, include slave controller A BMS and slave controller B DCDC.
[0063] Multiple slave controllers in a multi-controller system are usually set to multiple levels, and each slave controller is configured with two hard wires. The wiring harness cost is high and more IO detection resources are required. In addition, due to the large number of hard wires, the data transmission through the hard wires is more complicated, which is prone to data transmission errors and reduces the reliability of the multi-controller system.
[0064] In response to the defects in the related art, an embodiment of the present application provides a multi-controller system, which includes a master controller and at least one branch connected to the master controller; each branch includes at least one slave controller pair connected in sequence; the slave controller pair includes a first slave controller and a second slave controller connected by a hard line; the master controller is communicated with each slave controller through a bus.
[0065] The hard wire may be a conductive wire, for example, a conductive wire made of copper or aluminum, or a conductive wire made of silver, etc.
[0066] In the multi-controller system provided by the embodiment of the present application, the first slave controller and the second slave controller of the slave controller pair are connected by a hard wire, which reduces the number of hard wires required in the multi-controller system, reduces the wiring harness cost, and reduces the required IO detection resources, thereby solving the problems in the related art of having a large number of hard wires configured in the slave controller, high wiring harness cost, and a large number of IO detection resources required.
[0067] In some embodiments, a hardwired line connecting the first and second slave controllers in the same slave controller pair serves as a wake-up line for transmitting a wake-up signal. The master controller is connected to the first slave controller of the first slave controller pair via a hardwired coding line. Each slave controller pair in each branch is connected to each other via a hardwired coding line. Specifically, within two hardwired slave controller pairs, the second slave controller in the preceding slave controller pair is connected to the first slave controller in the succeeding slave controller pair via a hardwired coding line. The hardwired coding line is used to transmit a coding signal.
[0068] The wake-up line is used to transmit a wake-up signal, so that the first slave controller can wake up the second slave controller through the wake-up line and complete the hard-line identification of the second slave controller, so that the master controller can encode the second slave controller after the hard-line identification.
[0069] Specifically, as shown in FIG1 , the multi-controller system may include a master controller and a branch connected to the master controller. As shown in FIG2 , the multi-controller system may include a master controller and two or more branches respectively connected to the master controller. The master controller may be connected to each slave controller via a CAN bus. CAN is the abbreviation of Controller Area Network, and CAN bus is a field bus. The first slave controller is represented by Am , the second slave controller is represented by B m , 1≤m≤n. The first and second slave controllers in the same slave controller pair have the same subscript. The encoding signal is a high-level signal.
[0070] In the example shown in FIG1 , there is only one branch in the multi-controller system, which includes multiple slave controllers A (respectively marked as A1, A2, A3, ..., A n ) and multiple slave controllers B (respectively marked as B1, B2, B3, ..., B n ), the slave controller A and the corresponding slave controller B are connected through a wake-up line (referred to as the wake-up line), the slave controller A and the slave controller B correspond one to one and there is a wake-up relationship, and the master controller and the first slave controller A are connected through a hard-wired encoding line (referred to as the encoding line).
[0071] The master controller is connected to the first slave controller A1 through a coding line. m With slave controller B m Connect via wake-up line, A m Can hardwire wake up B m , from controller B m With slave controller A (m+1) The master controller and the slave controller are connected via encoding lines in the same CAN network, and encoding is achieved via CAN bus communication.
[0072] In the example shown in FIG2 , the multi-controller system includes multiple branches, each of which is connected to a master controller. Each branch may include one or more slave controller pairs connected in sequence. Slave controllers A1, A2, A3, ..., A n They are connected to the main controller through encoding lines respectively.
[0073] In the related art, two slave controllers in the same slave controller pair are connected by two hard wires: a wake-up line and an encoding line. This requires a large number of hard wires, resulting in high wiring harness costs and a large consumption of I / O detection resources. In the multi-controller system of the present embodiment, the two slave controllers in the same slave controller pair are connected by only one wake-up line, reducing the number of hard wires required, lowering wiring harness costs, and reducing the required I / O detection resources.
[0074] As the amount of data transmitted between multiple controllers in a multi-controller system continues to grow, reliable and high-speed data transmission is required between the controllers that manage the battery cells, and accurate encoding of each slave controller is particularly important. In the related art, a manual encoding method is usually used to encode the slave controller, resulting in a high encoding error rate and a large amount of manual workload. In response to the problems existing in the related art, the encoding method provided in the embodiment of the present application, for the current branch, the master controller or the encoded slave controller in the current branch performs hard-wire identification on the slave controller to which it is connected through a hard wire, and the master controller encodes the unencoded slave controller identified by the hard wire through the bus, thereby achieving automatic encoding, effectively avoiding encoding errors, improving the reliability of the multi-controller system, reducing manual workload, and overcoming the defects of the high encoding error rate and large manual workload caused by the manual encoding method used in the related art.
[0075] Another embodiment of the present application provides a multi-controller system encoding method, which is applied to the multi-controller system of any of the above embodiments. As shown in FIG3 , in some embodiments, the encoding method includes steps S10 and S20:
[0076] S10. The branches in the multi-controller system include a first branch. The master controller or the coded slave controller in the first branch performs hard-wire identification on the uncoded slave controller connected by hard-wire.
[0077] Specifically, the first branch is the current branch. For the current branch, the master controller or the encoded slave controller in the current branch performs hard-wire identification on the slave controller to which it is connected via a hard wire.
[0078] In some embodiments, the master controller performs hard-wire identification on the slave controller to which it is connected via a hard wire, including: the master controller sends an encoding start instruction via a bus, and all first slave controllers in the multi-controller system enter an encoding mode; the master controller sends an encoding signal to the connected first slave controller via a hard-wire encoding line, so that the connected first slave controller is hard-wired identified after receiving the encoding signal.
[0079] Specifically, each branch in the multi-controller system includes at least one slave controller pair connected in sequence, each slave controller pair comprising a first slave controller and a second slave controller connected via a hardwire. The master controller sends an encoding start command via a bus, and upon receiving the encoding start command, all first slave controllers in the multi-controller system enter encoding mode.
[0080] Hardwire identification means that when the encoding line or wake-up line connected to the current controller receives a signal input, it can identify the controller that needs to be encoded. Other controllers without signal input do not need to be encoded. The master controller performs hardwire identification on the first slave controller, making it easier for the master controller to encode the first slave controller after hardwire identification.
[0081] In some examples, the encoding line is connected to the encoding pin of the controller, and the wake-up line is connected to the wake-up pin of the controller. The encoding pin and the wake-up pin are different pins. In the encoding state of the multi-controller system, the first slave controller in the same slave controller pair sends a wake-up signal to the second slave controller via the wake-up line. The second slave controller is awakened, and the master controller can encode the awakened second slave controller. When the multi-controller system is in the non-encoding state, the first master controller sends a wake-up signal via the wake-up line to wake up the second slave controller, and no subsequent encoding operation is performed.
[0082] S20. The master controller encodes the unencoded slave controller identified by the hard line through the bus.
[0083] In some embodiments, encoding an unencoded slave controller identified by a hardwire via a bus by the master controller may include: the master controller generating an encoded address and transmitting the encoded address to the slave controller identified by the hardwire via the bus; and the slave controller identified by the hardwire writing the encoded address into its own memory space. The master controller encodes the slave controller identified by the hardwire via the bus, thereby ensuring a one-to-one correspondence between the slave controller and the encoded address.
[0084] For example, the master controller generates a coded address of 001 for slave controller A1 and sends it to slave controller A1, which is hardwired, via the bus. Slave controller A1, which is hardwired, writes coded address 001 into its own memory. The coded address of a slave controller is unique, allowing accurate identification of the slave controller.
[0085] In some embodiments, as shown in FIG4 , the encoding method may further include:
[0086] S30: The encoded slave controller enters a silent state after completing hard-wire identification of the slave controller connected to the hard wire.
[0087] Specifically, the encoded slave controller enters a silent state after completing hard-wire identification with the next slave controller to which it is connected via a hard wire. The first slave controller and the second slave controller in the same slave controller pair are connected via a wake-up line. The encoded first slave controller sends a wake-up signal to the connected second slave controller via the wake-up line to wake up the second slave controller, thereby completing the hard-wire identification of the second slave controller, and then the first slave controller enters a silent state. The encoded second slave controller sends a high-level signal to the first slave controller in the next slave controller pair to which it is connected via the encoding line. After receiving the high-level signal, the first slave controller is hard-wired identified, and then the second slave controller enters a silent state. After the encoded slave controller enters the silent state, it no longer participates in the encoding process of the entire multi-controller system in the current encoding cycle.
[0088] S40, return to step S20 and execute in a loop until the master controller determines that all slave controllers that need to be encoded in the first branch have completed encoding, thereby realizing automatic encoding of the current branch, effectively avoiding encoding errors, improving the reliability of the multi-controller system, and reducing manual workload.
[0089] After the master controller completes the hard-wire identification and encoding operations on the slave controller to which it is connected, the encoded slave controller in the current branch performs hard-wire identification on the slave controller to which it is connected via the hard wire, that is, subsequent hard-wire identification operations are all performed by the slave controller on the next slave controller to which it is connected. Therefore, steps S20 and S30 are executed in a loop until all the slave controllers that need to be encoded in the current branch have completed encoding, that is, the encoding of the current branch is completed.
[0090] In the multi-controller system shown in Figure 2, when there are multiple branches in the multi-controller system, the above-mentioned branch encoding steps are used for each branch in turn to complete the encoding of the slave controllers in that branch that need to be encoded. For example, the branch where A1 is located is first encoded using the above-mentioned branch encoding steps. After the encoding of this branch is completed, the branch where A2 is located is encoded, and so on, until the encoding of all branches is completed.
[0091] In some embodiments, the main controller determines whether all slave controllers that need to be encoded in the first branch have completed encoding, including: determining whether the number of generated encoding addresses is equal to the preset number of slave controllers that need to be encoded in the first branch; if equal, determining that all slave controllers that need to be encoded in the first branch have completed encoding; otherwise, determining that they are not completed, thereby enabling accurate judgment of whether the current branch has completed encoding, avoiding missing encoding operations on certain slave controllers.
[0092] For example, the master controller accumulates and counts the encoding addresses it generates. If the preset number of slave controllers that need to be encoded in the current branch is m, the master controller determines that encoding has been completed for all slave controllers that need to be encoded in the current branch when the number of generated encoding addresses reaches m. If the number of generated encoding addresses is less than m, the master controller determines that encoding has not yet been completed for the current branch.
[0093] In some embodiments, encoding an unencoded slave controller identified by hardwire via a bus by the master controller may further include: the slave controller identified by hardwire sending a coded address written in itself to the master controller; the master controller determining whether the received coded address is consistent with a coded address generated by itself; and determining that the encoding is successful if the received coded address is consistent with the coded address generated by itself. The master controller determining whether the encoding is successful can ensure a high encoding accuracy.
[0094] For example, the slave controller A1 identified by the hard line will send the coding address 001 written into its own storage space to the master controller. The master controller will compare the received coding address with the coding address generated for the slave controller A1. When the two are consistent, it is determined that the coding is successful, otherwise it means that A1 coding is unsuccessful.
[0095] In some embodiments, the encoding method may further include:
[0096] If the received encoding address is inconsistent with the encoding address generated by the master controller, the master controller will re-send the encoding address to the slave controller identified by the hardwire. If the master controller does not receive an encoding address that matches the encoding address generated by the master controller within a preset time period or a preset number of retransmissions, the encoding operation will be terminated. Re-sending the encoding address when encoding is unsuccessful can improve the encoding success rate.
[0097] If the encoding address received by the master controller is inconsistent with the encoding address it generated, encoding is unsuccessful. For example, if the encoding address sent by A1 received by the master controller is 002, and the encoding address generated by the master controller for A1 is 001, the two are inconsistent, indicating that encoding is unsuccessful. After determining that encoding is unsuccessful, the master controller resends the encoding address to the slave controller that has been hardwired.
[0098] If encoding success is not confirmed within a preset time duration, such as 2s, 3s, or 4s, or the number of retransmissions reaches a preset number of retransmissions, such as 5, 6, or 8, it indicates that a fault may have occurred within the multi-controller system. In this case, the encoding operation needs to be terminated to avoid wasting resources by repeatedly retransmitting the encoding address. The preset time duration and the preset number of retransmissions can be set according to actual application needs.
[0099] In some embodiments, the first and second slave controllers in the same slave controller pair are connected via a wake-up line; the encoded slave controller performs hard-wire identification on the next slave controller to which it is hard-wired, including: if the encoded slave controller is the first slave controller, the encoded first slave controller wakes up the second slave controller to which it is connected via the wake-up line after encoding is completed for a preset delay time, and the awakened second slave controller becomes the slave controller identified by the hard-wire; if the encoded slave controller is the second slave controller, the encoded second slave controller sends an encoding signal to the next first slave controller to which it is connected via a hard-wire encoding line after the preset delay time, causing the next first slave controller to become the slave controller identified by the hard-wire. Identifying the slave controller by hard-wire facilitates the master controller's encoding operation on the hard-wired identified slave controller, thereby improving encoding accuracy.
[0100] For example, a slave controller pair includes a slave controller A connected via a wake-up line. m and slave controller B m The encoded Am wakes up the connected B through the wake-up line when the encoding is completed and the preset delay time is reached (the preset delay time can be, for example, 1s, 1.5s or 2s, which can be set according to actual needs). m , awakened B m Becomes a slave controller recognized by hard wire; the coded slave controller B m Through the hard wire coding line to the next first slave controller A connected to itself (m+1) Send a coded signal to make A (m+1) Become a slave controller recognized by hardwire. Setting the preset delay time can reserve enough time to ensure that the master controller updates the encoding address, thereby avoiding miscoding of the awakened second slave controller.
[0101] In some embodiments, before the encoded slave controller performs hard-wire identification on the next slave controller to which it is connected via a hard wire, the encoding method further includes:
[0102] The master controller sends a successful encoding confirmation command. After receiving the successful encoding confirmation command, the slave controller sends a successful encoding feedback signal to the master controller. The master controller receives the feedback signal and updates the current encoding address. This further improves encoding accuracy and effectively avoids miscoding.
[0103] The current encoding address is usually updated by adding 1 to the current encoding address. For example, if the current encoding address is 001, the main controller will add 1 to the current encoding address 001 to get 002 after receiving the encoding success feedback signal, and use the new encoding address 002 to update 001.
[0104] The encoding of the slave controller in the related art is achieved through manual setting, which is prone to encoding errors and requires a lot of manual labor. The encoding method of the embodiment of the present application can achieve automatic encoding, improve encoding accuracy and reliability, and reduce manual labor.
[0105] A specific example of a multi-controller system encoding method includes the following steps:
[0106] Step 1: The master controller sends a coding start command via the CAN bus, and all slave controllers A enter coding mode;
[0107] Step 2: The master controller pulls up the encoding line and sends the encoding address. The slave controller A that is not pulled up remains silent.
[0108] Step 3: The slave controller that is pulled high writes the received encoding address. After the master controller confirms that the written encoding address is consistent with the expected address, it sends an encoding success signal;
[0109] Step 4: After receiving the encoding success signal, slave controller A feedbacks that encoding is complete, and wakes up slave controller B after a delay of 1 second (the delayed wake-up is to ensure that the encoding address of the master controller has been +1, thereby preventing slave controller B from being mis-encoded). Then, slave controller A ends the encoding operation and enters the silent state;
[0110] Step 5: If the main controller confirms that the encoding address is inconsistent with the expected address, it will resend the encoding instruction and encoding address and perform a timeout judgment. If the correct encoding address is not received within the set time, it will be determined that the encoding has failed and the encoding process will be exited;
[0111] Step 6: After receiving the encoding completion instruction from slave controller A, the master controller automatically encodes the address +1 and sends it to the slave controller;
[0112] Step 7: After being awakened, the slave controller B writes the encoding address. The master controller confirms that the encoding address is consistent with the expected address, and then determines that the encoding is sent successfully.
[0113] Step 8: After receiving the encoding success from controller B, it will feedback that the encoding is complete and pull up the encoding line of the next slave controller A;
[0114] Repeat steps 3 to 8 until the master controller determines that the number of generated encoding addresses is equal to the number of slave controllers that need to be encoded, then end the encoding operation and exit the encoding process.
[0115] In the encoding method of this example, the master controller pulls up the encoding line of the first slave controller A1 (pulling up the encoding line means inputting a high-level signal to A1 through the encoding line), and sends the ID (ID is the encoding address) to A1 through the CAN bus. After A1 encoding is completed, the slave controller B1 is awakened. The master controller sends the ID to B1 through CAN. After B1 encoding is completed, the slave controller A2 encoding line is pulled high, and the master controller sends the ID to A2 through CAN, and so on.
[0116] Referring to FIG5 , in a specific example encoding method, the main controller starts the encoding process, sends an encoding instruction, and enters the encoding mode after receiving the encoding instruction from the slave controller A; the main controller pulls up the encoding line of the slave controller A, and then sends the encoding address; the pulled-up slave controller A receives the encoding address, writes the encoding address into its own storage space, and then sends the written encoding address to the main controller; the main controller compares the encoding address with the expected address (the expected address is the encoding address generated by the main controller) to determine whether the two are consistent; if the two are inconsistent, the encoding address is resent, and if the two are consistent, a confirmation encoding success instruction is sent to the slave controller A; after receiving the confirmation encoding success instruction, the slave controller A confirms whether the encoding is successful; if the encoding is unsuccessful, the slave controller Controller A receives the encoding address resent by the master controller and rewrites it into its own storage space; if the encoding is successful, the slave controller A will feedback the encoding completion instruction to the master controller, wake up the slave controller B after a delay of 1 second, then exit the encoding and enter the silent state; after receiving the encoding completion instruction, the master controller updates the current encoding address and sends it to the awakened slave controller B, thereby starting to encode the slave controller B; the process of encoding the slave controller B can refer to the process of encoding the slave controller A, which will not be repeated here; when the slave controller B is encoded, it pulls up the next slave controller A, then exits the encoding and enters the silent state; the encoding ends when the master controller detects that the number of generated encoding addresses is equal to the number of slave controllers that need to be encoded.
[0117] The hardware of multiple slave controllers A or multiple slave controllers B is the same and easy to be confused. After completing the hard-line identification of the slave controller, the hard-line identified slave controller is encoded through CAN and the ID (ID is the encoding address) is written to ensure a one-to-one correspondence between the ID and the controller.
[0118] This coding method can realize automatic coding, effectively avoid coding errors, improve coding accuracy, improve the reliability of multi-controller systems, reduce manual workload, and overcome the defects of high coding error rate and large manual workload caused by manual coding setting in related technologies.
[0119] Another embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the encoding method of the multi-controller system of any of the above embodiments.
[0120] As shown in Figure 6, the electronic device 10 may include: a processor 100, a memory 101, a bus 102 and a communication interface 103, and the processor 100, the communication interface 103 and the memory 101 are connected through the bus 102; the memory 101 stores a computer program that can be run on the processor 100, and when the processor 100 runs the computer program, it executes the method provided in any of the aforementioned embodiments of the present application.
[0121] The memory 101 may include high-speed random access memory (RAM) and may also include non-volatile memory, such as at least one disk storage. The system network element communicates with at least one other network element via at least one communication interface 103 (which may be wired or wireless), and may utilize the Internet, a wide area network, a local area network, a metropolitan area network, or the like.
[0122] Bus 102 may be an ISA bus, a PCI bus, or an EISA bus. Buses may be classified as address buses, data buses, and control buses. Memory 101 is used to store programs, and processor 100 executes the programs upon receiving execution instructions. The methods disclosed in any of the aforementioned embodiments of the present application may be applied to or implemented by processor 100.
[0123] The processor 100 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by hardware integrated logic circuits in the processor 100 or by software instructions. The above processor 100 may be a general-purpose processor, which may include a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), an off-the-shelf field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The various methods, steps, and logic block diagrams disclosed in the embodiments of this application can be implemented or executed. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in the memory 101 , and the processor 100 reads the information in the memory 101 and completes the steps of the above method in combination with its hardware.
[0124] The electronic device provided in the embodiments of the present application and the method provided in the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, operated or implemented by them.
[0125] Another embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, which is executed by a processor to implement the encoding method of the multi-controller system of any of the above embodiments.
[0126] Referring to FIG. 7 , the computer-readable storage medium shown therein is an optical disc 20 on which a computer program (ie, a program product) is stored. When the computer program is executed by a processor, the method provided in any of the aforementioned embodiments is executed.
[0127] It should be noted that examples of computer-readable storage media may also include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other optical or magnetic storage media, which are not listed here one by one.
[0128] The computer-readable storage medium provided in the above-mentioned embodiments of the present application and the method provided in the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the method adopted, run or implemented by the application program stored therein.
[0129] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0130] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0131] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.
[0132] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.
[0133] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
[0134] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.
[0135] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.
Claims
1. A multi-controller system, characterized in that: It includes a main controller and at least one branch connected to the main controller; the at least one branch includes at least one pair of slave controllers connected in sequence; The pair of slave controllers includes a first slave controller and a second slave controller connected by a hard line; The master controller is connected to each slave controller through a bus.
2. The multi-controller system according to claim 1, wherein: The hard line connecting the first slave controller and the second slave controller in the same slave controller pair is a wake-up line for transmitting a wake-up signal; The master controller is connected to the first slave controller of the first slave controller pair via a hard-wired coding line; Each pair of slave controllers in the at least one branch is connected via a hard-wired coding line; The hard-wired encoding line is used to transmit the encoding signal.
3. A coding method for a multi-controller system, characterized in that: Applicable to the multi-controller system according to claim 1 or 2; the method comprises: The at least one branch includes a first branch, and the master controller or the coded slave controller in the first branch performs hard-wire identification on the uncoded slave controller connected by hard-wire; The master controller encodes the unencoded slave controllers recognized by hard wire via the bus.
4. The method according to claim 3, characterized in that The method further comprises: The encoded slave controller enters a silent state after completing hard-wire identification of the slave controller connected to the hard-wire; The step of returning to the master controller to encode the unencoded slave controllers identified by the hard line through the bus is executed in a loop until the master controller determines that the encoding of all the slave controllers that need to be encoded in the first branch has been completed.
6. The method according to claim 4, characterized in that The master controller determines that all slave controllers that need to be encoded in the first branch have completed encoding, including: determining whether the number of generated encoding addresses is equal to a preset number of slave controllers that need to be encoded in the first branch; If they are equal, it is determined that the encoding of the slave controllers that need to be encoded in the first branch has been completed; otherwise, it is determined that it is not completed.
7. The method according to claim 3, characterized in that The master controller performs hard-wire identification on a slave controller that is hard-wired and not coded, including: The master controller sends an encoding start instruction via the bus, and all the first slave controllers enter the encoding mode; The master controller sends a coding signal to the connected first slave controller via a hard-wire coding line, so that the connected first slave controller is recognized by the hard-wire after receiving the coding signal.
8. The method according to claim 3, characterized in that The master controller encodes the unencoded slave controller identified by hard line through the bus, comprising: The master controller generates a coded address and sends the coded address to the slave controller identified by the hardwire via the bus; The slave controller identified by the hard line writes the encoded address into its own storage space.
9. The method according to claim 8, characterized in that The master controller encodes the unencoded slave controller identified by hard line through the bus, and further comprises: The slave controller identified by the hard line sends the coded address written into itself to the master controller; The main controller determines whether the received coded address is consistent with the coded address generated by itself; If the received encoding address is consistent with the encoding address generated by itself, it is determined that the encoding is successful.
10. The method according to claim 9, characterized in that The method further comprises: If the received coded address is inconsistent with the self-generated coded address, re-performing the step of sending the coded address to the slave controller identified by the hardwire; If the main controller does not receive a coding address consistent with the coding address generated by itself when the preset time length or the preset number of retransmissions is reached, the coding operation is terminated.
11. The method according to claim 4, characterized in that The hard line connecting the first slave controller and the second slave controller in the same slave controller pair is a wake-up line for transmitting a wake-up signal; The encoded slave controller performs hard-line identification on the next slave controller to which it is connected via a hard line, including: If the encoded slave controller is the first slave controller, the encoded first slave controller wakes up the second slave controller connected to it through the wake-up line when the encoding is completed and the preset delay time is reached, and the awakened second slave controller becomes the slave controller recognized by the hard line; If the encoded slave controller is the second slave controller, the encoded second slave controller sends a coding signal to the next first slave controller connected to it through the hard-wired coding line after a preset time, making the next first slave controller a slave controller recognized by the hard-wired line.
12. The method according to claim 4, characterized in that Before the encoded slave controller performs hard-line identification on the next slave controller to which it is connected via a hard line, the method further includes: The main controller sends a successful encoding confirmation instruction; After receiving the encoding success confirmation instruction, the encoded slave controller sends an encoding success feedback signal to the master controller; The main controller receives the feedback signal and updates the current encoding address.
13. An electronic device, characterized in that: The system comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method according to any one of claims 3 to 12.
14. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the method according to any one of claims 3 to 12.