Capacitor array

The capacitor array design addresses asymmetrical structure issues by using orthogonal through grooves and insulating seals to prevent short circuits, improving manufacturing efficiency and reliability.

CN119256383APending Publication Date: 2025-01-03MURATA MFG CO LTD
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Patent Information

Application Number
CN202380042657.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-06-01
Filing Date
2023-05-25
Publication Date
2025-01-03

AI Technical Summary

Technical Problem

The existing method for manufacturing capacitor arrays results in an asymmetrical structure, leading to warping and potential short circuits between capacitor elements due to stress concentration at groove intersections.

Method used

A capacitor array design with symmetrical front and back sides, using through grooves that intersect orthogonally to divide capacitor elements, with grooves positioned to avoid direct intersections and sealed by insulating layers to prevent short circuits.

Benefits of technology

Reduces short-circuit failures between adjacent capacitor elements by ensuring a symmetrical structure and proper sealing, enhancing manufacturing efficiency and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

A capacitor array (1) includes a capacitor layer (10) including a plurality of capacitor elements (30) arranged in a plane direction orthogonal to a thickness direction (Z) by being partitioned by a plurality of through-grooves (15). Each capacitor element (30) includes a first electrode layer (for example, an anode plate (31)), a second electrode layer (for example, a cathode layer (36)), and a dielectric layer (35). The first electrode layer and the second electrode layer face each other in the thickness direction (Z) with the dielectric layer (35) therebetween. The through groove (15) includes a first through groove (15A) along a first direction (X) and a second through groove (15B) along a second direction (Y) intersecting the first direction (X). When the intersection region (I) of the first through groove (15A) and the second through groove (15B) is observed from the thickness direction (Z), the intersection point of a first imaginary groove (115A) obtained by extending the first through groove (15A) to the intersection region (I) and a second imaginary groove (115B) obtained by extending the second through groove (15B) to the intersection region (I) is located inside the intersection region (I).
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Description

Technical Field

[0001] The present invention relates to capacitor arrays. Background Art

[0002] In recent years, a capacitor array in which a plurality of capacitor elements are arranged in a plane has been studied as a substrate for mounting electronic components.

[0003] As a method for manufacturing a capacitor array, Patent Document 1 discloses a method for manufacturing a component-embedded substrate as follows: before forming a solid electrolytic capacitor on an anodized aluminum foil sheet, a separation groove is formed on one side of the anodized aluminum foil by dry machining using a laser device, a mold, or the like, and a protective insulating material is formed on the same side that also serves as a reinforcement for the sheet. After that, a solid electrolytic capacitor is formed, and then the anodized aluminum foil is cut from the back surface until the bottom of the groove is exposed, so that the solid electrolytic capacitor and the wiring pattern are electrically separated and independently formed on the anodized aluminum foil sheet.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Publication No. 2010-171304 Summary of the invention

[0007] Problem that the invention aims to solve

[0008] In the method described in Patent Document 1, a separation groove and a protective insulating material are formed on one side of an aluminum foil. As a result, the structure of the front and back of the component-embedded substrate obtained becomes asymmetrical, so warping is easily generated. In addition, when the separation grooves are formed in a mutually intersecting manner, stress is easily concentrated on the intersection of the grooves due to the above-mentioned warping, so that peeling (delamination) between materials is easily caused.

[0009] Therefore, the present inventors conceived of manufacturing a capacitor array having a symmetrical structure on the front and back sides.

[0010] However, for example, in the case where the first through groove and the second through groove are formed in a mutually intersecting manner in order to divide a capacitor sheet into a plurality of capacitor elements, if metal chips (for example, aluminum chips) generated by the disconnection of the capacitor sheet are attached in a manner spanning the intersection area of ​​the first through groove and the second through groove, a short circuit may occur between adjacent capacitor elements.

[0011] An object of the present invention is to provide a capacitor array in which a plurality of capacitor elements are divided by through grooves intersecting each other, and in which short-circuit failures occurring between adjacent capacitor elements can be reduced.

[0012] Solutions for solving problems

[0013] The capacitor array of the present invention includes a capacitor layer, which includes a plurality of capacitor elements, and the plurality of capacitor elements are arranged in a plane in a plane direction orthogonal to the thickness direction by being divided by a plurality of through grooves. The capacitor elements respectively include a first electrode layer, a second electrode layer and a dielectric layer, and the first electrode layer and the second electrode layer are opposed to each other in the thickness direction via the dielectric layer. The through grooves include a first through groove along the first direction and a second through groove along the second direction intersecting the first direction. When observing the intersection area of ​​the first through groove and the second through groove from the thickness direction, the intersection of the first imaginary groove obtained by extending the first through groove to the intersection area and the second imaginary groove obtained by extending the second through groove to the intersection area is located on the inner side of the intersection area.

[0014] Effects of the Invention

[0015] According to the present invention, it is possible to provide a capacitor array in which a plurality of capacitor elements are divided by through grooves intersecting each other, and in which short-circuit failures occurring between adjacent capacitor elements can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic perspective view showing an example of a capacitor array of the present invention.

[0017] Figure 2 It means including Figure 1 Schematic cross-sectional view of an example of a cross section of a capacitor array taken along line segment a1 - a2 in FIG.

[0018] Figure 3 It means including Figure 1 Schematic cross-sectional view of an example of a cross section of a capacitor array taken along line segment b1 - b2 in FIG.

[0019] Figure 4 It is a schematic cross-sectional view showing an example of a process of preparing the anode plate 31 .

[0020] Figure 5 It is a schematic cross-sectional view showing an example of a process of forming a dielectric layer.

[0021] Figure 6 It is a schematic cross-sectional view showing an example of a process of forming an insulating layer.

[0022] Figure 7 It is a schematic cross-sectional view showing an example of a process of forming a solid electrolyte layer.

[0023] Figure 8It is a schematic cross-sectional view showing an example of a process of forming a conductive layer.

[0024] Fig. 9 FIG. 1 is a schematic plan view showing an example of a capacitor sheet.

[0025] Fig.10 It means along Fig. 9 2 is a schematic cross-sectional view showing an example of a process of forming the first through-groove in a cross section taken along line segment a1 - a2 in FIG.

[0026] Fig.11 Yes Fig.10 The cross section shown is a schematic cross-sectional view of an example of a state in which a step of forming the first sealing layer is performed.

[0027] Fig.12 It means along Fig. 9 2 is a schematic cross-sectional view showing an example of a process of forming the second through-groove in a cross section taken along line segment b1 - b2 in FIG.

[0028] Fig.13 Yes Fig.12 The cross section shown is a schematic cross-sectional view of an example of a state in which a step of forming the second sealing layer is performed.

[0029] Fig.14 A. Fig.14 B and Fig.14 C is a schematic plan view showing an example of a capacitor sheet cutting process of a comparative example outside the scope of the present invention.

[0030] Fig.15 1 is a schematic plan view showing an example of a capacitor array according to a comparative example.

[0031] Fig.16 A. Fig.16 B and Fig.16 C is a schematic plan view showing an example of a capacitor sheet cutting process according to Example 1 within the scope of the present invention.

[0032] Fig.17 FIG. 1 is a schematic plan view showing an example of a capacitor array according to Example 1. FIG.

[0033] Fig.18 A. Fig.18 B. Fig.18 C and Fig.18 D is a schematic plan view showing an example of a capacitor sheet cutting process according to Example 2 within the scope of the present invention.

[0034] Fig.19 FIG. 1 is a schematic plan view showing an example of a capacitor array according to Example 2. FIG.

[0035] Fig. 20 FIG. 1 is a schematic plan view showing an example of an intersection region of the capacitor array according to Example 1. FIG.

[0036] Fig.21 It means self Fig. 20 The capacitor array shown is a schematic top view obtained by removing the first sealing layer and the second sealing layer.

[0037] Fig. 22 FIG. 1 is a schematic plan view showing a first modified example of the intersection region of the capacitor array of the first embodiment.

[0038] Fig.23 It means self Fig. 22 The capacitor array shown is a schematic top view obtained by removing the first sealing layer and the second sealing layer.

[0039] Fig.24 FIG. 1 is a schematic plan view showing a second modified example of the intersection region of the capacitor array of the first embodiment.

[0040] Fig.25 FIG. 1 is a schematic plan view showing a third modified example of the intersection region of the capacitor array of the first embodiment.

[0041] Fig.26 FIG. 1 is a schematic plan view showing an example of an intersection region of the capacitor array according to the second embodiment.

[0042] Fig. 27 FIG. 1 is a schematic plan view showing a first modified example of the intersection region of the capacitor array of the second embodiment.

[0043] Fig.28 FIG. 1 is a schematic plan view showing a second variation of the intersection region of the capacitor array of the second embodiment.

[0044] Fig.29 FIG. 1 is a schematic plan view showing a third modified example of the intersection region of the capacitor array of the second embodiment.

[0045] Fig.30 FIG. 1 is a schematic plan view showing a fourth variation of the intersection region of the capacitor array of the second embodiment.

[0046] Fig.31 It means including Figure 1 Schematic cross-sectional view of an example of a cross section of a capacitor array taken along line segment A1 - A2 in FIG.

[0047] Fig.32 It means including Figure 1 Schematic cross-sectional view of an example of a cross section of a capacitor array taken along line segment B1 - B2 in FIG. DETAILED DESCRIPTION

[0048] The capacitor array of the present invention is described below. In addition, the present invention is not limited to the following structure, and can be appropriately changed within the scope of the present invention. In addition, a structure obtained by combining multiple preferred structures described below is also the present invention.

[0049] In this specification, terms indicating the relationship between elements (such as "vertical", "parallel", "orthogonal", etc.) and terms indicating the shape of an element do not express only strict meanings, but rather express essentially equivalent ranges, for example, also including differences of several percentage points.

[0050] The drawings shown below are schematic diagrams, and their dimensions, aspect ratios, and other aspects may differ from those of actual products.

[0051] Figure 1 It is a schematic perspective view showing an example of a capacitor array of the present invention.

[0052] Figure 1 The capacitor array 1 shown comprises a capacitor layer 10. It may also be, for example Figure 1 As shown, the capacitor array 1 further includes a sealing layer 25 for sealing the capacitor layer 10 .

[0053] The capacitor layer 10 includes a plurality of capacitor elements 30 .

[0054] In the capacitor layer 10 , the plurality of capacitor elements 30 are arranged in a plane in a plane direction orthogonal to the thickness direction Z by being partitioned by the plurality of through grooves 15 .

[0055] The number of capacitor elements 30 included in capacitor layer 10 is not particularly limited as long as it is two or more.

[0056] In the capacitor layer 10, the plurality of capacitor elements 30 may be arranged in a straight line, i.e., along one direction (e.g., the first direction X or the second direction Y), or in a plane, i.e., along multiple directions (e.g., the first direction X and the second direction Y). In addition, the plurality of capacitor elements 30 may be arranged regularly or irregularly. The size and planar shape of the plurality of capacitor elements 30 may be all the same, or may be partially or completely different.

[0057] Capacitor layer 10 may include two or more types of capacitor elements 30 having different areas.

[0058] Alternatively, the capacitor layer 10 includes a capacitor element 30 whose plane shape is not a rectangle. In this specification, a rectangle means a square or a rectangle. Therefore, it is also possible that the capacitor layer 10 includes a capacitor element 30 whose plane shape is a polygon such as a quadrilateral, triangle, pentagon, hexagon other than a rectangle, a shape including a curved portion, a circle, an ellipse, etc. In this case, it is also possible that the capacitor layer 10 includes two or more capacitor elements 30 with different plane shapes. In addition, in addition to including a capacitor element 30 whose plane shape is not a rectangle, the capacitor layer 10 may also include a capacitor element 30 whose plane shape is a rectangle, and may not include a capacitor element 30 whose plane shape is a rectangle.

[0059] In the capacitor layer 10, adjacent capacitor elements 30 are disconnected from each other by through grooves 15. Adjacent capacitor elements 30 only need to be physically disconnected from each other. Therefore, adjacent capacitor elements 30 can be electrically disconnected or electrically connected to each other. For example, groups of electrically disconnected capacitor elements 30 and groups of electrically connected capacitor elements 30 may be mixed.

[0060] When the capacitor array 1 includes the sealing layer 25 , it is preferable that the through-grooves 15 are filled with an insulating material such as the sealing layer 25 .

[0061] The capacitor element 30 includes a first electrode layer, a second electrode layer, and a dielectric layer, respectively. The first electrode layer and the second electrode layer face each other in the thickness direction Z with the dielectric layer interposed therebetween.

[0062] Figure 2 It means including Figure 1 A schematic cross-sectional view of an example of a cross section of a capacitor array taken along the line segment a1-a2 in FIG. Figure 2 The line segment a1-a2 in corresponds to Figure 1 The line segment a1-a2 in .

[0063] Figure 3 It means including Figure 1 A schematic cross-sectional view of an example of a cross section of a capacitor array taken along the line segment b1-b2 in FIG. Figure 3 The line segment b1-b2 in corresponds to Figure 1 The line segment b1-b2 in .

[0064] exist Figure 2 and Figure 3 In the example shown, the capacitor element 30 includes an anode plate 31, a cathode layer 36, and a dielectric layer 35, and the anode plate 31 and the cathode layer 36 are opposed to each other in the thickness direction Z via the dielectric layer 35. That is, the first electrode layer is the anode plate 31, and the second electrode layer is the cathode layer 36. Thus, the capacitor element 30 constitutes an electrolytic capacitor.

[0065] Anode plate 31 includes core 32 formed of metal, for example, and porous portion 34 provided on at least one main surface of core 32. Dielectric layer 35 is provided on the surface of porous portion 34, and cathode layer 36 is provided on the surface of dielectric layer 35.

[0066] Cathode layer 36 includes, for example, solid electrolyte layer 36A provided on the surface of dielectric layer 35. Preferably, cathode layer 36 further includes conductor layer 36B provided on the surface of solid electrolyte layer 36A. When cathode layer 36 includes solid electrolyte layer 36A, capacitor element 30 constitutes a solid electrolytic capacitor.

[0067] It is preferable that the core portion 32 be formed of a valve action metal that exhibits a so-called valve action.

[0068] Examples of the valve-acting metal include simple metals such as aluminum, tantalum, niobium, titanium, and zirconium, and alloys containing at least one of the above metals. Among them, aluminum or an aluminum alloy is preferred.

[0069] The porous portion 34 is provided on at least one main surface of the core portion 32. That is, the porous portion 34 may be provided on only one main surface of the core portion 32, or may be provided on the main surface of the core portion 32. Figure 2 and Figure 3 As shown in the figure, the porous portion 34 is provided on both main surfaces of the core portion 32. In this way, the anode plate 31 has the porous portion 34 on at least one main surface of the core portion 32.

[0070] The porous portion 34 is preferably a porous layer formed on the surface of the core portion 32 , and more preferably, the porous portion 34 is an etching layer.

[0071] The shape of the anode plate 31 is preferably a flat plate, and more preferably a foil. Thus, in this specification, "plate-like" also includes "foil-like".

[0072] The thickness of the anode plate 31 before etching is preferably 60 μm or more and 200 μm or less. The thickness of the core 32 that is not etched after etching is preferably 15 μm or more and 70 μm or less. The thickness of the porous portion 34 is designed to match the required withstand voltage and electrostatic capacity, but preferably, the total thickness of the porous portions 34 on both sides of the core 32 is 10 μm or more and 180 μm or less.

[0073] The pore size of the porous portion 34 is preferably 10 nm or more and 600 nm or less. The pore size of the porous portion 34 refers to a median diameter D50 measured by a mercury porosimeter. The pore size of the porous portion 34 can be controlled by adjusting various conditions during etching, for example.

[0074] The dielectric layer 35 is provided on the surface of the porous portion 34. The dielectric layer 35 is porous reflecting the surface state of the porous portion 34 and has a fine concavoconvex surface shape.

[0075] Preferably, the dielectric layer 35 is formed of an oxide film of the valve metal described above. For example, when the anode plate 31 is an aluminum foil, the oxide film that becomes the dielectric layer 35 is formed by subjecting the anode plate 31 to an anodic oxidation treatment (also referred to as a chemical conversion treatment) in an aqueous solution containing ammonium adipate or the like. The dielectric layer 35 is formed along the surface of the porous portion 34, and thus fine pores (recesses) are provided in the dielectric layer 35.

[0076] The thickness of the dielectric layer 35 is designed to match the required withstand voltage and electrostatic capacitance, but is preferably not less than 10 nm and not more than 100 nm.

[0077] The cathode layer 36 is provided on the surface of the dielectric layer 35 .

[0078] When the cathode layer 36 includes a solid electrolyte layer 36A, the constituent material of the solid electrolyte layer 36A may include, for example, conductive polymers such as polypyrroles, polythiophenes, and polyanilines. Among them, polythiophenes are preferred, and poly(3,4-ethylenedioxythiophene) called PEDOT is particularly preferred. In addition, the conductive polymer may include a dopant such as polystyrene sulfonic acid (PSS).

[0079] Preferably, solid electrolyte layer 36A includes an inner layer that fills the pores (recesses) of dielectric layer 35 and an outer layer that covers the surface of dielectric layer 35 .

[0080] The thickness of solid electrolyte layer 36A from the surface of porous portion 34 is preferably 2 μm or more and 20 μm or less.

[0081] The solid electrolyte layer 36A is formed, for example, by a method of forming a polymer film of poly(3,4-ethylenedioxythiophene) or the like on the surface of the dielectric layer 35 using a treatment solution containing a monomer such as 3,4-ethylenedioxythiophene, or by a method of applying a dispersion of a polymer such as poly(3,4-ethylenedioxythiophene) or the like on the surface of the dielectric layer 35 and drying it.

[0082] The solid electrolyte layer 36A is formed in a predetermined region by applying the above-mentioned treatment liquid or dispersion liquid to the surface of the dielectric layer 35 by a method such as sponge transfer, screen printing, dispenser coating, or inkjet printing.

[0083] When cathode layer 36 includes conductor layer 36B, conductor layer 36B preferably includes at least one of a conductive resin layer and a metal layer. That is, conductor layer 36B may include only a conductive resin layer, only a metal layer, or both a conductive resin layer and a metal layer.

[0084] Examples of the conductive resin layer include a conductive adhesive layer containing at least one conductive filler selected from the group consisting of a silver filler, a copper filler, a nickel filler, and a carbon filler.

[0085] Examples of the metal layer include metal plating films, metal foils, etc. Preferably, the metal layer is formed of at least one metal selected from the group consisting of nickel, copper, silver, and alloys containing at least one of these metals as a main component.

[0086] In this specification, the main component refers to the element component with the largest weight ratio.

[0087] The conductor layer 36B includes, for example, a carbon layer provided on the surface of the solid electrolyte layer 36A and a copper layer provided on the surface of the carbon layer.

[0088] The carbon layer is provided to electrically and mechanically connect the solid electrolyte layer 36A and the copper layer.

[0089] The carbon layer is formed in a predetermined area by applying carbon paste to the surface of the solid electrolyte layer 36A by sponge transfer, screen printing, dispenser coating, inkjet printing, etc. In addition, it is preferred that the carbon layer is laminated with the copper layer of the next process in a sticky state before drying. The thickness of the carbon layer is preferably 2 μm or more and 20 μm or less.

[0090] The copper layer is formed in a predetermined region by applying a copper paste to the surface of the carbon layer by, for example, sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, etc. The thickness of the copper layer is preferably 2 μm to 20 μm.

[0091] Figure 2 and Figure 3 The capacitor element 30 shown has a first main surface 30 a and a second main surface 30 b that are opposed to each other in the thickness direction Z.

[0092] like Figure 1 As shown in FIG. 1 , the plurality of through grooves 15 include first through grooves 15A along the first direction X and second through grooves 15B along the second direction Y. As shown in FIG.

[0093] The first direction X and the thickness direction Z are perpendicular to each other.

[0094] The second direction Y is orthogonal to the thickness direction Z and intersects with the first direction X.

[0095] The first direction X and the second direction Y can be Figure 1 The two axes may be orthogonal as shown in the figure, or may be crossed to form an angle other than 90°.

[0096] exist Figure 2 In the example shown, when observing the cross section along the thickness direction Z, more specifically, when observing the cross section along the thickness direction Z and the second direction Y, the width W1 of the first through groove 15A (here, the dimension in the second direction Y) is constant in the thickness direction Z.

[0097] exist Figure 2 Although not shown, it is also possible that when observing the cross section along the thickness direction Z, more specifically, when observing the cross section along the thickness direction Z and the second direction Y, the first through groove 15A has a taper with a width W1 decreasing from one of the first main surface 30a and the second main surface 30b of the capacitor element 30 toward the other.

[0098] For example, the width W1 of the first through groove 15A may decrease from the first main surface 30a toward the second main surface 30b of the capacitor element 30 , or the width W1 of the first through groove 15A may decrease from the second main surface 30b toward the first main surface 30a of the capacitor element 30 .

[0099] When the first through-groove 15A has a tapered shape, the cross-sectional shape of the first through-groove 15A along the thickness direction Z may be a symmetrical shape or an asymmetrical shape.

[0100] exist Figure 3 In the example shown, when observing the cross section along the thickness direction Z, more specifically, when observing the cross section along the thickness direction Z and the first direction X, the width W2 of the second through groove 15B (here, the dimension in the first direction X) is constant in the thickness direction Z.

[0101] exist Figure 3 Although not shown, it is also possible that when observing the cross section along the thickness direction Z, more specifically, when observing the cross section along the thickness direction Z and the first direction X, the second through groove 15B has a taper with a width W2 decreasing from one of the first main surface 30a and the second main surface 30b of the capacitor element 30 toward the other.

[0102] For example, the width W2 of the second through groove 15B may decrease from the first main surface 30a toward the second main surface 30b of the capacitor element 30 , or the width W2 of the second through groove 15B may decrease from the second main surface 30b toward the first main surface 30a of the capacitor element 30 .

[0103] When the second through-groove 15B has a tapered shape, the cross-sectional shape of the second through-groove 15B along the thickness direction Z may be a symmetrical shape or an asymmetrical shape.

[0104] When both the first through groove 15A and the second through groove 15B have a tapered shape, it is preferred that the width W1 of the first through groove 15A decreases from the first main surface 30a of the capacitor element 30 toward the second main surface 30b, and the width W2 of the second through groove 15B decreases from the first main surface 30a of the capacitor element 30 toward the second main surface 30b.

[0105] When both the first through-groove 15A and the second through-groove 15B have a tapered shape, it is preferable that the taper angle of the first through-groove 15A and the taper angle of the second through-groove 15B are different from each other.

[0106] In this specification, the taper angle of the through groove refers to an angle formed by two opposing sides constituting the outline of the through groove when a cross section along the thickness direction is viewed.

[0107] When the width W1 of the first through groove 15A decreases from the first main surface 30a toward the second main surface 30b of the capacitor element 30 and the width W2 of the second through groove 15B decreases from the first main surface 30a toward the second main surface 30b of the capacitor element 30, it is preferred that the taper angle of the second through groove 15B is smaller than the taper angle of the first through groove 15A. In this case, the inclination angle of the end face of the capacitor element 30 on the second through groove 15B side with respect to the thickness direction Z is smaller, so that the effective area of ​​the capacitor element 30 can be larger on the second through groove 15B side.

[0108] In the case where the widths of the first through groove 15A and the second through groove 15B both decrease from the first main surface 30a toward the second main surface 30b of the capacitor element 30, it is preferred that the maximum value of the width W2 of the second through groove 15B is smaller than the maximum value of the width W1 of the first through groove 15A in the same plane as the first main surface 30a of the capacitor element 30. In this case, in the capacitor layer 10, the area where the capacitor element 30 does not exist can be reduced, that is, the area where at least the second through groove 15B exists in the area where the first through groove 15A and the second through groove 15B exist can be reduced, so that in the capacitor layer 10, a larger area where the capacitor element 30 exists can be ensured.

[0109] The taper shape, taper angle, and width of the first through-groove and the second through-groove were observed using a scanning electron microscope (SEM). Figure 2 and Figure 3 This was confirmed by taking a cross section along the thickness direction as shown.

[0110] Preferably, if Figure 2 and Figure 3 As shown, the capacitor layer 10 further includes an insulating layer 24 provided on the surface of the dielectric layer 35 where the cathode layer 36 is not provided, on at least one of the first main surface 30a and the second main surface 30b of the capacitor element 30. In this case, the insulation between the anode plate 31 and the cathode layer 36 is ensured to prevent a short circuit between the two.

[0111] The insulating layer 24 may be provided on the surface of the dielectric layer 35 on the first main surface 30a side of the capacitor element 30, or on the surface of the dielectric layer 35 on the second main surface 30b side of the capacitor element 30, or may be provided on the surface of the dielectric layer 35 on the second main surface 30b side of the capacitor element 30. Figure 2 and Figure 3 As shown in FIG. 1 , the surfaces of the dielectric layer 35 are provided on both the first main surface 30 a and the second main surface 30 b of the capacitor element 30 .

[0112] The insulating layer 24 is made of an insulating material. In this case, it is preferable that the insulating layer 24 is made of an insulating resin.

[0113] Examples of the insulating resin constituting the insulating layer 24 include polyphenylsulfone resin, polyethersulfone resin, cyanate resin, fluororesin (tetrafluoroethylene, tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer, etc.), polyimide resin, polyamideimide resin, epoxy resin, and derivatives or precursors thereof.

[0114] Insulating layer 24 may be made of the same resin as sealing layer 25. If insulating layer 24 contains an inorganic filler different from sealing layer 25, it may adversely affect the capacitance effective portion of capacitor element 30. Therefore, insulating layer 24 is preferably made of a single resin.

[0115] The insulating layer 24 is formed in a predetermined region by applying a masking material such as a composition containing an insulating resin to the surface of the porous portion 34 by a method such as sponge transfer, screen printing, dispenser coating, or inkjet printing.

[0116] The insulating layer 24 may be formed on the porous portion 34 before or after the dielectric layer 35 is formed.

[0117] like Figure 2 and Figure 3 As shown, the sealing layer 25 is provided on two main surfaces of the capacitor element 30 that are opposed to each other in the thickness direction Z, that is, on the first main surface 30 a and the second main surface 30 b of the capacitor element 30 .

[0118] Preferably, if Figure 2 and Figure 3As shown, the sealing layer 25 includes a first sealing layer 25A provided on two main surfaces of the capacitor element 30 that are opposite to each other in the thickness direction Z, that is, provided on the first main surface 30 a and the second main surface 30 b of the capacitor element 30 .

[0119] Preferably, if Figure 2 As shown, the first sealing layer 25A extends in the first through-groove 15A.

[0120] Preferably, if Figure 3 As shown, the first sealing layer 25A does not extend into the second through-groove 15B.

[0121] Preferably, if Figure 2 and Figure 3 As shown, the sealing layer 25 further includes a second sealing layer 25B provided on the surface of the first sealing layer 25A.

[0122] Preferably, if Figure 2 As shown, the second sealing layer 25B does not extend into the first through-groove 15A.

[0123] Preferably, if Figure 3 As shown, the second sealing layer 25B extends in the second through-groove 15B.

[0124] According to the above, it is preferred that Figure 2 As shown, the first sealing layer 25A extends in the first through-groove 15A, and the second sealing layer 25B does not extend in the first through-groove 15A.

[0125] Furthermore, it is preferred that Figure 3 As shown in FIG. 1 , the first sealing layer 25A does not extend in the second through groove 15B, and the second sealing layer 25B extends in the second through groove 15B. That is, it is preferable that Figure 3 As shown, the first sealing layer 25A is separated by the second sealing layer 25B at a position overlapping with the second through-groove 15B in the thickness direction Z.

[0126] The sealing layers 25 such as the first sealing layer 25A and the second sealing layer 25B are made of an insulating material. In this case, it is preferable that the sealing layer 25 is made of an insulating resin.

[0127] Examples of the insulating resin constituting the sealing layer 25 include epoxy resin and phenol resin.

[0128] Preferably, the sealing layer 25 further contains a filler.

[0129] Examples of the filler contained in the sealing layer 25 include inorganic fillers such as silica particles and alumina particles.

[0130] The constituent material of the first sealing layer 25A and the constituent material of the second sealing layer 25B may be the same as or different from each other.

[0131] The sealing layers 25 such as the first sealing layer 25A and the second sealing layer 25B are formed so as to seal the capacitor layer 10 by, for example, a method of thermocompression bonding an insulating resin sheet or a method of applying an insulating resin paste and then thermally curing the paste.

[0132] For example, a layer such as a stress relaxation layer or a moisture-proof film may be provided between the capacitor layer 10 and the sealing layer 25 .

[0133] have Figure 2 and Figure 3 The capacitor array 1 having the cross section shown is manufactured, for example, by the following method.

[0134] Figure 4 It is a schematic cross-sectional view showing an example of a process of preparing the anode plate 31 .

[0135] like Figure 4 As shown, an anode plate 31 having a porous portion 34 on at least one main surface of a core portion 32 is prepared.

[0136] Figure 5 It is a schematic cross-sectional view showing an example of a process of forming a dielectric layer.

[0137] For example, by performing anodizing treatment on the anode plate 31, Figure 5 As shown, a dielectric layer 35 is formed on the surface of the porous portion 34 .

[0138] Alternatively, a chemically-formed foil may be prepared as the anode plate 31 in which the dielectric layer 35 is provided on the surface of the porous portion 34 .

[0139] Figure 6 It is a schematic cross-sectional view showing an example of a process of forming an insulating layer.

[0140] In order to divide the capacitor element 30 (refer to Figure 1 For example, by applying an insulating resin to the surface of the dielectric layer 35 by screen printing, dispenser coating, etc., so as to Figure 6 As shown, an insulating layer 24 is formed in a predetermined region.

[0141] Figure 7 It is a schematic cross-sectional view showing an example of a process of forming a solid electrolyte layer.

[0142] like Figure 7As shown, the solid electrolyte layer 36A is formed in the region where the insulating layer 24 is not provided on the surface of the dielectric layer 35. For example, the solid electrolyte layer 36A is formed by a method of forming a polymer film of poly(3,4-ethylenedioxythiophene) or the like on the surface of the dielectric layer 35 using a treatment solution containing a monomer such as 3,4-ethylenedioxythiophene, or by a method of applying a dispersion of a polymer such as poly(3,4-ethylenedioxythiophene) or the like to the surface of the dielectric layer 35 and then drying it. In addition, as the solid electrolyte layer 36A, it is preferable that an outer layer covering the surface of the dielectric layer 35 is formed after an inner layer that fills the pores (recesses) of the dielectric layer 35 is formed.

[0143] Figure 8 It is a schematic cross-sectional view showing an example of a process of forming a conductive layer.

[0144] like Figure 8 As shown, the conductor layer 36B is formed on the surface of the solid electrolyte layer 36A. For example, as the conductor layer 36B, a carbon layer and a copper layer are sequentially formed from the solid electrolyte layer 36A side. In this case, for example, the carbon layer is formed in a predetermined area by applying carbon paste to the surface of the solid electrolyte layer 36A using a method such as sponge transfer, screen printing, dispenser coating, inkjet printing, etc. Thereafter, the copper layer is formed in a predetermined area by applying copper paste to the surface of the carbon layer using a method such as sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, etc.

[0145] In this way, cathode layer 36 including solid electrolyte layer 36A and conductor layer 36B is formed on the surface of dielectric layer 35 .

[0146] Fig. 9 FIG. 1 is a schematic plan view showing an example of a capacitor sheet.

[0147] Based on the above, make Figure 8 and Fig. 9 The capacitor sheet 130 shown in the figure includes an anode plate 31 , a dielectric layer 35 provided on the surface of a porous portion 34 of the anode plate 31 , an insulating layer 24 provided on the surface of the dielectric layer 35 , and a cathode layer 36 .

[0148] like Figure 8 and Fig. 9 As shown, the capacitor chip 130 has a first main surface 130 a and a second main surface 130 b that are opposed to each other in the thickness direction Z.

[0149] Fig.10 It means along Fig. 9 2 is a schematic cross-sectional view showing an example of a process of forming the first through-groove in a cross section taken along line segment a1 - a2 in FIG.

[0150] The capacitor sheet 130 is formed along Fig. 9 The portion of the cross section of the line segment a1-a2 in FIG. 1 is laser processed, for example, from the first main surface 130a side. Fig.10 As shown, a first through groove 15 penetrating the capacitor sheet 130 in the thickness direction Z is formed along the first direction X at a position that does not overlap with the cathode layer 36 in the thickness direction Z.

[0151] Alternatively, the capacitor sheet 130 may be formed along Fig. 9 The portion of the cross section of the line segment a1 - a2 in FIG. 1 is laser processed from the second main surface 130 b side to form the first through groove 15A.

[0152] The processing method for forming the first through-groove 15A is not limited to laser processing, and for example, a cutting process, a milling process, or the like may be used.

[0153] As described above, by forming the first through groove 15A along the first direction X in the capacitor sheet 130, the capacitor sheet 130 is cut along the first direction X. At this time, it is preferable to form the first through groove 15A along the first direction X so as not to cut the capacitor sheet 130 continuously from one end to the other end along the first direction X. Thus, it is possible to prevent the capacitor sheet 130 from being completely separated and becoming a plurality of independent parts, thereby improving the handling efficiency in the subsequent process.

[0154] In addition, the capacitor sheet 130 is not formed along the Fig. 9 The step of forming the first through groove 15A is performed on the portion of the cross section of the line segment b1 - b2 in FIG.

[0155] Fig.11 Yes Fig.10 The cross section shown is a schematic cross-sectional view of an example of a state in which a step of forming the first sealing layer is performed.

[0156] For Fig.10 The capacitor sheet 130 of the cross section shown in FIG. 1 is, for example, a thermally pressed insulating resin sheet. Fig.11 As shown, the first sealing layer 25A is formed on the first main surface 130a and the second main surface 130b of the capacitor sheet 130 and fills the first through groove 15A. As described above, the capacitor sheet 130 is fixed by the first sealing layer 25A while being partially separated by the first through groove 15A.

[0157] like Fig.11 As shown, the first sealing layer 25A formed in this way is provided on the first main surface 130a and the second main surface 130b of the capacitor sheet 130 and extends in the first through-groove 15A.

[0158] When forming the first sealing layer 25A, as described above, when the capacitor sheet 130 is provided with the first through groove 15A but is not completely separated and does not become a plurality of independent parts, it is possible to prevent the following undesirable situation: the parts of the capacitor sheet 130 separated by the first through groove 15A are moved and contacted with each other due to the flow of the constituent material (for example, resin material) of the first sealing layer 25A. Thus, it is possible to prevent the occurrence of a short circuit between capacitor elements in the capacitor array obtained later.

[0159] Furthermore, when the first sealing layer 25A is formed by pressing the insulating resin sheet with heat compression, the above-mentioned undesirable situation can be prevented even if the pressing is performed under high pressure. Thus, it is possible to ensure that the processing margin when forming the first sealing layer 25A is large, thereby improving the processability. If the first sealing layer 25A can be formed by pressing under high pressure, the close contact between the first sealing layer 25A and the capacitor sheet 130 can be improved, or the gap in the first sealing layer 25A can be reduced, thereby achieving the improvement of the reliability of the capacitor array obtained later.

[0160] Fig.12 It means along Fig. 9 2 is a schematic cross-sectional view showing an example of a process of forming the second through-groove in a cross section taken along line segment b1 - b2 in FIG.

[0161] The capacitor sheet 130 provided with the first sealing layer 25A is formed along the Fig. 9 The portion of the cross section of the line segment b1-b2 in FIG. 1 is laser processed, for example, from the first main surface 130a side. Fig.12 As shown, a second through groove 15B penetrating the capacitor sheet 130 and the first sealing layer 25A in the thickness direction Z is formed along the second direction Y at a position not overlapping with the cathode layer 36 in the thickness direction Z.

[0162] Alternatively, the capacitor sheet 130 provided with the first sealing layer 25A may be formed along the Fig. 9 The portion of the cross section of the line segment b1 - b2 in FIG. 1 is laser processed from the second main surface 130 b side to form the second through groove 15B.

[0163] The processing method for forming the second through groove 15B is not limited to laser processing, and may be, for example, cutting processing, milling processing, etc. The processing method for forming the second through groove 15B may be the same as the processing method for forming the first through groove 15A, or may be different from the processing method for forming the first through groove 15A.

[0164] As described above, the second through groove 15B is formed along the second direction Y for the capacitor sheet 130 provided with the first sealing layer 25A, so that the capacitor sheet 130 and the first sealing layer 25A are cut together along the second direction Y. At this time, it is preferable to form the second through groove 15B along the second direction Y in such a manner that the capacitor sheet 130 provided with the first sealing layer 25A is not cut continuously from one end to the other end along the second direction Y. Thus, it is possible to prevent the capacitor sheet 130 provided with the first sealing layer 25A from being completely separated and becoming a plurality of independent parts, thereby improving the handling properties in the subsequent process.

[0165] In addition, for the capacitor plate 130, it is not necessary to form Fig. 9 The step of forming the second through groove 15B is performed on the portion of the cross section of the line segment a1 - a2 in FIG.

[0166] Fig.13 Yes Fig.12 The cross section shown is a schematic cross-sectional view of an example of a state in which a step of forming the second sealing layer is performed.

[0167] For Fig.12 The capacitor sheet 130 of the cross section shown in FIG. 1 is, for example, thermally pressed and bonded with an insulating resin sheet, so that Fig.13 As shown, the second sealing layer 25B is formed on the surface of the first sealing layer 25A and fills the second through-groove 15B.

[0168] like Fig.13 As shown, the second sealing layer 25B formed in this way is provided on the surface of the first sealing layer 25A and extends in the second through-groove 15B.

[0169] Based on the above, the capacitor layer 10 is manufactured in a state where the capacitor elements 30 are divided into a plurality of capacitor elements 30 by the first through grooves 15A and the second through grooves 15B and arranged in a plane, and the plurality of capacitor elements 30 are integrated by the first sealing layer 25A and the second sealing layer 25B. Figure 2 and Figure 3 A cross section of a capacitor array 1 is shown.

[0170] In the manufacturing method of the capacitor array 1 described above, the cutting process for dividing the capacitor sheet 130 into a plurality of capacitor elements 30 is divided into a process for forming the first through groove 15A and a process for forming the second through groove 15B, and the process for forming the first sealing layer 25A is performed between these processes. Thus, it is possible to prevent the capacitor sheet 130 from being completely separated and becoming independent of a plurality of parts during the manufacturing process, thereby improving the handling property. Moreover, in the process for forming the first sealing layer 25A, the pressing process can be performed under high pressure, thereby improving the processing property and also achieving the improvement of the reliability of the capacitor array 1.

[0171] Fig.14 A. Fig.14 B and Fig.14 C is a schematic plan view showing an example of a capacitor sheet cutting process of a comparative example outside the scope of the present invention. Fig.15 1 is a schematic plan view showing an example of a capacitor array according to a comparative example.

[0172] As mentioned above, when Fig.14 After the first through groove 15A is formed in the capacitor sheet 130 as shown in A, Fig.14 The first sealing layer 25A is filled in the first through groove 15A as shown in FIG. Fig.14 When the second through groove 15B is formed to intersect with the first through groove 15A as shown in FIG. 1C, if metal scraps (e.g., aluminum scraps) generated by cutting the capacitor sheet 130 are attached to the intersection area of ​​the first through groove 15A and the second through groove 15B, there is a possibility that the adjacent capacitor element 30 (see FIG. 14 ) in the finished product will be damaged. Fig.15 ) creates a short circuit. Fig.14 In C, the area surrounded by the dotted line indicates the location where the short circuit occurs.

[0173] In addition, if Fig.15 As shown, when stress concentrates on the corner of the intersection region between the first through groove 15A and the second through groove 15B, there is a possibility that it may become a starting point of cracking or separation (delamination).

[0174] Fig.16 A. Fig.16 B and Fig.16 C is a schematic plan view showing an example of a capacitor sheet cutting process according to Example 1 within the scope of the present invention. Fig.17 FIG. 1 is a schematic plan view showing an example of a capacitor array according to Example 1. FIG.

[0175] like Fig.16 As shown in A, when the first through groove 15A is formed, the area of ​​the portion intersecting with the second through groove 15B is increased. The planar shape at this time is not limited to a circle. Fig.16 After the first sealing layer 25A is filled in the first through groove 15A as shown in FIG. Fig.16 As shown in FIG. 1 , even if metal chips (e.g., aluminum chips) are generated when forming the second through groove 15B, the first through groove 15A has a larger width in the intersection region between the first through groove 15A and the second through groove 15B, thereby reducing the distance between adjacent capacitor elements 30 in the finished product (see FIG. 1 ). Fig.17 ) to avoid the risk of short circuit failure.

[0176] Furthermore, by increasing the width of the first through-groove 15A in the intersecting region between the first through-groove 15A and the second through-groove 15B, a larger effective region of the capacitor element 30 can be ensured compared to a case where the width of the entire first through-groove 15A is increased.

[0177] In addition, if Fig.17 As shown, by increasing the area of ​​the intersection of the first through groove 15A and the second through groove 15B, the area of ​​the portion functioning as a support connecting the front and back sealing layers increases, thereby increasing the adhesion strength between the front and back. As a result, delamination can be suppressed.

[0178] In addition, including Fig.17 The cross section of the capacitor array along the line segment a1-a2 corresponds to Figure 2 , including along Fig.17 The cross section of the capacitor array along the line segment b1-b2 corresponds to Figure 3 .

[0179] Fig.18 A. Fig.18 B. Fig.18 C and Fig.18 D is a schematic plan view showing an example of a capacitor sheet cutting process according to Example 2 within the scope of the present invention. Fig.19 FIG. 1 is a schematic plan view showing an example of a capacitor array according to Example 2. FIG.

[0180] Even in the Fig.18 When the first through groove 15A is formed so that the area of ​​the portion intersecting with the second through groove 15B is increased as shown in A, Fig.18 After the first sealing layer 25A is filled in the first through groove 15A as shown in FIG. Fig.18 When the second through groove 15B is formed as shown in FIG. 3B , it is also possible that the adjacent capacitor element 30 (see FIG. 3B ) in the finished product Fig.19 ) creates a short circuit. Fig.18 In C, the area surrounded by the dotted line indicates the location where the short circuit occurs.

[0181] So, it can also be, Fig.18 As shown in D, the short-circuit portion in the intersection area of ​​the first through groove 15A and the second through groove 15B is cut again using a method such as laser processing. The planar shape during cutting is not limited to a linear shape. In addition, the direction of cutting is not limited to the first direction X. Fig.18 The cut-off shown in D can further reduce the adjacent capacitor elements 30 in the finished product (refer to Fig.19 ) will cause a short circuit failure. Fig.18 As shown in D, at least the short-circuited portion may be cut off, and other portions may also be cut off.

[0182] When the short-circuited portion is cut again, since the area of ​​the intersection region of the first through groove 15A and the second through groove 15B is large, even if the cut portion is slightly offset, it is possible to prevent the capacitor element 30 from being cut. In addition, in order to prevent a new short circuit from being generated, it is preferred that the processing area of ​​the short-circuited portion is smaller than the area of ​​the first through groove 15A in the intersection region of the first through groove 15A and the second through groove 15B.

[0183] Fig. 20 FIG. 1 is a schematic plan view showing an example of an intersection region of the capacitor array according to Example 1. FIG. Fig.21 It means self Fig. 20 The capacitor array shown is a schematic top view obtained by removing the first sealing layer and the second sealing layer.

[0184] exist Fig. 20 In the example shown, the first through groove 15A and the second through groove 15B are orthogonal to each other.

[0185] like Fig.21 As shown, when the intersection region I of the first through groove 15A and the second through groove 15B is observed from the thickness direction Z, the intersection point ( Fig.21 4 points in the intersection area I (in Fig.21 The center is the inner side of the circle).

[0186] In other words, when the intersection region I is viewed from the thickness direction Z, the intersection region I (at Fig.21 The area of ​​the first imaginary groove 115A and the second imaginary groove 115B overlaps ( Fig.21 The area of ​​the quadrilateral enclosed by 4 points in the figure is larger.

[0187] In Example 1, as described above, the width of the first through groove 15A in the intersection region I is large, so the risk of a short-circuit failure between adjacent capacitor elements 30 can be reduced.

[0188] In addition, since the area of ​​the intersection region I is large, the area of ​​the portion that functions as a support connecting the front and back sealing layers is increased, so the adhesion strength between the front and back is increased. As a result, delamination can be suppressed.

[0189] like Fig. 20As shown in FIG. 1 , when the first sealing layer 25A and the second sealing layer 25B still extend in the intersection region I, when the intersection region I is viewed from the thickness direction Z, the second sealing layer 25B is located inside the intersection region I than the first sealing layer 25A, and the area of ​​the second sealing layer 25B in the intersection region I is equal to the second imaginary groove 115B in the intersection region I (refer to FIG. 1 ). Fig.21 ) have the same area.

[0190] Preferably, as in Fig. 20 As shown by the middle dotted line, at least one corner between the first through groove 15A and the intersection region I has a curved surface (so-called rounded surface) or an obtuse surface. In this case, the stress concentrated on the corner in the intersection region I is relieved, so cracks and delamination can be suppressed.

[0191] From the viewpoint of suppressing cracks and delamination, it is more preferable that all corners of the first through groove 15A and the intersection region I have curved surfaces or obtuse surfaces. When two or more corners have curved surfaces or obtuse surfaces, only corners having curved surfaces may exist, only corners having obtuse surfaces may exist, or a mixture of corners having curved surfaces and corners having obtuse surfaces may exist.

[0192] Likewise, it is preferred that at least one corner between the second through groove 15B and the intersection region I has a curved surface or an obtuse surface, and it is more preferred that all corners between the second through groove 15B and the intersection region I have curved surfaces or obtuse surfaces. When two or more corners have curved surfaces or obtuse surfaces, only the corners having the curved surfaces may exist, only the corners having the obtuse surfaces may exist, or a mixture of the corners having the curved surfaces and the corners having the obtuse surfaces may exist.

[0193] In particular, it is preferred that the first through groove 15A and at least one corner of the intersection area I have a curved surface or an obtuse surface, and the second through groove 15B and at least one corner of the intersection area I have a curved surface or an obtuse surface. It is more preferred that the first through groove 15A and all corners of the intersection area I have curved surfaces or obtuse surfaces, and the second through groove 15B and all corners of the intersection area I have curved surfaces or obtuse surfaces.

[0194] Fig. 22 FIG. 1 is a schematic plan view showing a first modified example of the intersection region of the capacitor array of the first embodiment. Fig.23 It means self Fig. 22 The capacitor array shown is a schematic top view obtained by removing the first sealing layer and the second sealing layer.

[0195] It can also be, Fig. 22 As in the illustrated example, the first through groove 15A and the second through groove 15B are not orthogonal to each other, but intersect each other at an angle other than 90°.

[0196] like Fig.23 As shown, when the intersection region I of the first through groove 15A and the second through groove 15B is observed from the thickness direction Z, the intersection point ( Fig.23 4 points in the intersection area I (in Fig.23 The center is the inner side of the circle).

[0197] Fig.24 FIG. 1 is a schematic plan view showing a second modified example of the intersection region of the capacitor array of the first embodiment.

[0198] It can also be, Fig.24 As in the example shown, the planar shape of the intersection region I when viewed from the thickness direction Z is a polygon such as a quadrilateral.

[0199] The planar shape of the intersection area I when viewed from the thickness direction Z is not particularly limited, and may be, for example, a rectangle (square or rectangular), a quadrilateral other than a rectangle, a triangle, a pentagon, a hexagon or other polygon, a circle, an ellipse, or a combination of these shapes.

[0200] Fig.25 FIG. 1 is a schematic plan view showing a third modified example of the intersection region of the capacitor array of the first embodiment.

[0201] It can also be, Fig.25 As in the example shown, the corner between the first through groove 15A and the intersection region I does not have a curved surface or an obtuse surface. Similarly, the corner between the second through groove 15B and the intersection region I may not have a curved surface or an obtuse surface.

[0202] Fig.26 FIG. 1 is a schematic plan view showing an example of an intersection region of the capacitor array according to the second embodiment.

[0203] like Fig.26 As shown in FIG. 1 , when the first sealing layer 25A and the second sealing layer 25B still extend in the intersection region I, when the intersection region I is viewed from the thickness direction Z, the second sealing layer 25B is located inside the intersection region I than the first sealing layer 25A, and the area of ​​the second sealing layer 25B in the intersection region I is larger than the second imaginary groove 115B in the intersection region I (refer to FIG. 1 ). Fig.21 ) has a large area. Other structures are the same as those in Example 1.

[0204] exist Fig.26In the example shown, the second sealing layer 25B has a linear portion along the first through groove 15A in the intersection region I. The linear portion of the second sealing layer 25B may exist in both the positive direction and the negative direction of the first direction X, or may exist in only one of the positive direction and the negative direction of the first direction X.

[0205] In the second embodiment, as described above, the risk of a short-circuit failure occurring between adjacent capacitor elements 30 can be further reduced.

[0206] Furthermore, since the contact area between the first sealing layer 25A and the second sealing layer 25B is increased compared to Example 1, delamination between the first sealing layer 25A and the second sealing layer 25B can be suppressed.

[0207] Preferably, as in Fig.26 As shown by the middle dotted line, at least one corner between the first through groove 15A and the intersection region I has a curved surface or an obtuse surface, and more preferably, all corners between the first through groove 15A and the intersection region I have a curved surface or an obtuse surface. In the case where two or more corners have a curved surface or an obtuse surface, there may be only corners having a curved surface, only corners having an obtuse surface, or a mixture of corners having a curved surface and corners having an obtuse surface.

[0208] Likewise, it is preferred that at least one corner between the second through groove 15B and the intersection region I has a curved surface or an obtuse surface, and it is more preferred that all corners between the second through groove 15B and the intersection region I have curved surfaces or obtuse surfaces. When two or more corners have curved surfaces or obtuse surfaces, only the corners having the curved surfaces may exist, only the corners having the obtuse surfaces may exist, or a mixture of the corners having the curved surfaces and the corners having the obtuse surfaces may exist.

[0209] In particular, it is preferred that the first through groove 15A and at least one corner of the intersection area I have a curved surface or an obtuse surface, and the second through groove 15B and at least one corner of the intersection area I have a curved surface or an obtuse surface. It is more preferred that the first through groove 15A and all corners of the intersection area I have curved surfaces or obtuse surfaces, and the second through groove 15B and all corners of the intersection area I have curved surfaces or obtuse surfaces.

[0210] exist Fig.26 In the example shown, the first through groove 15A and the second through groove 15B are orthogonal to each other. However, the first through groove 15A and the second through groove 15B may not be orthogonal to each other but may intersect each other at an angle other than 90°.

[0211] Fig. 27 FIG. 1 is a schematic plan view showing a first modified example of the intersection region of the capacitor array of the second embodiment.

[0212] It can also be, Fig. 27 As in the illustrated example, the second sealing layer 25B has a circular portion or an elliptical portion in the intersection region I.

[0213] Fig.28 FIG. 1 is a schematic plan view showing a second variation of the intersection region of the capacitor array of the second embodiment.

[0214] It can also be, Fig.28 As in the example shown, the planar shape of the intersection region I when viewed from the thickness direction Z is a polygon such as a quadrilateral.

[0215] exist Fig.28 In the example shown, the second sealing layer 25B has a polygonal portion such as a quadrilateral in the intersection region I, but may also have a linear portion, a circular portion, or an elliptical portion.

[0216] Fig.29 FIG. 1 is a schematic plan view showing a third modified example of the intersection region of the capacitor array of the second embodiment.

[0217] It can also be, Fig.29 As in the example shown, the corner between the first through groove 15A and the intersection region I does not have a curved surface or an obtuse surface. Similarly, the corner between the second through groove 15B and the intersection region I may not have a curved surface or an obtuse surface.

[0218] exist Fig.29 In the example shown, the second sealing layer 25B has a linear portion in the intersection region I, but may have a polygonal portion such as a quadrilateral, or may have a circular portion or an elliptical portion.

[0219] Fig.30 FIG. 1 is a schematic plan view showing a fourth variation of the intersection region of the capacitor array of the second embodiment.

[0220] It can also be, Fig.30 As in the illustrated example, the width of the linear portion of the second sealing layer 25B is larger than the width of the first through-groove 15A.

[0221] Hereinafter, an example of the lead-out structure of the first electrode layer and the second electrode layer of the capacitor element of the capacitor array of the present invention will be described.

[0222] Preferably, Figure 1 The capacitor array 1 shown further includes a through-hole conductor 60 .

[0223] Preferably, the through-hole conductor 60 includes at least one of a first through-hole conductor 62 electrically connected to the first electrode layer (eg, anode plate 31 ) of the capacitor element 30 and a second through-hole conductor 64 electrically connected to the second electrode layer (eg, cathode layer 36 ) of the capacitor element 30 .

[0224] It is preferable that the via-hole conductor 60 , more specifically, the first via-hole conductor 62 and the second via-hole conductor 64 are provided so as to penetrate the capacitor element 30 in the thickness direction Z of the capacitor layer 10 .

[0225] The anode plate 31 and the cathode layer 36 of the capacitor element 30 are led out through the first through-hole conductor 62 and the second through-hole conductor 64 , respectively.

[0226] First, an example of a lead-out structure of anode plate 31 of capacitor element 30 will be described below.

[0227] Fig.31 It means including Figure 1 A schematic cross-sectional view of an example of a cross section of a capacitor array taken along line segment A1-A2 in FIG. Fig.31 The line segment A1-A2 in corresponds to Figure 1 The line segment A1-A2 in .

[0228] Preferably, if Fig.31 As shown, the first through-hole conductor 62 is provided to penetrate the capacitor element 30 in the thickness direction Z of the capacitor layer 10 . More specifically, the first through-hole conductor 62 is preferably provided at least on the inner wall surface of a first through hole 63 penetrating the capacitor element 30 in the thickness direction Z.

[0229] Preferably, the first through-hole conductor 62 is electrically connected to an end surface of the anode plate 31 that faces the inner wall surface of the first through-hole 63 in a planar direction perpendicular to the thickness direction Z.

[0230] The planar direction is a direction including a first direction X and a second direction Y that are orthogonal to the thickness direction Z.

[0231] Preferably, the core 32 and the porous portion 34 are exposed to the end surface of the anode plate 31 and are electrically connected to the first through-hole conductor 62. In this case, the core 32 is electrically connected to the first through-hole conductor 62, and the porous portion 34 is also electrically connected to the first through-hole conductor 62.

[0232] The first through-hole conductor 62 is formed, for example, as follows. First, the portion where the first through-hole conductor 62 is to be formed is subjected to drilling processing, laser processing, etc., to form the first through-hole 63. Then, the inner wall surface of the first through-hole 63 is metallized with a low-resistance metal such as copper, gold, or silver, thereby forming the first through-hole conductor 62. When forming the first through-hole conductor 62, for example, the inner wall surface of the first through-hole 63 is metallized by electroless copper plating, electrolytic copper plating, etc., so that processing becomes easy. In addition, as for the method of forming the first through-hole conductor 62, in addition to the method of metallizing the inner wall surface of the first through-hole 63, a method of filling the first through-hole 63 with a metal, a composite material of a metal and a resin, or the like may also be used.

[0233] Preferably, if Fig.31 As shown in FIG. 1 , the capacitor array 1 further includes an anode connection layer 68 provided between the first through-hole conductor 62 and the end surface of the anode plate 31. Fig.31 In the illustrated example, the anode connecting layer 68 is in contact with both the first through-hole conductor 62 and the end surface of the anode plate 31 .

[0234] The anode connection layer 68 is provided between the first through-hole conductor 62 and the end surface of the anode plate 31, so that the anode connection layer 68 functions as a barrier layer for the anode plate 31, and more specifically, functions as a barrier layer for the core portion 32 and the porous portion 34. By utilizing such an anode connection layer 68, the dissolution of the anode plate 31 generated during the treatment with a chemical solution for forming the conductive portion 20 described later, etc., is suppressed, and the penetration of the chemical solution into the capacitor element 30 is further suppressed, so that the reliability of the capacitor array 1 is easily improved.

[0235] Preferably, if Fig.31 As shown, the first through-hole conductor 62 and the end surface of the anode plate 31 are electrically connected via the anode connecting layer 68 .

[0236] It can also be, Fig.31 As shown, the anode connecting layer 68 includes a first anode connecting layer 68A and a second anode connecting layer 68B in this order from the end surface side of the anode plate 31 .

[0237] In the anode connection layer 68, for example, the first anode connection layer 68A may be a layer having zinc as a main component, and the second anode connection layer 68B may be a layer having nickel or copper as a main component. In this case, the first anode connection layer 68A is formed on the end surface of the anode plate 31 by, for example, zincate treatment to cause zinc substitution precipitation, and thereafter, the second anode connection layer 68B is formed on the surface of the first anode connection layer 68A by, for example, electroless nickel plating treatment or electroless copper plating treatment. In addition, there is a case where the first anode connection layer 68A disappears when the second anode connection layer 68B is formed, and in this case, the anode connection layer 68 may be formed only by the second anode connection layer 68B.

[0238] Anode connection layer 68 preferably includes a layer containing nickel as a main component. In this case, damage to the metal (eg, aluminum) constituting anode plate 31 is reduced, and thus the barrier property of anode connection layer 68 to anode plate 31 is easily improved.

[0239] Preferably, if Fig.31 As shown, the anode connection layer 68 is larger than the anode plate 31 in the thickness direction Z. In this case, the entire end surface of the anode plate 31 is covered by the anode connection layer 68 , so the barrier property of the anode connection layer 68 to the anode plate 31 is easily improved.

[0240] Preferably, in the thickness direction Z, the size of the anode connecting layer 68 is larger than 100% of the size of the anode plate 31 and is equal to or smaller than 200% of the size of the anode plate 31 .

[0241] In the thickness direction Z, the size of the anode connection layer 68 may be the same as that of the anode plate 31 , or may be smaller than that of the anode plate 31 .

[0242] Furthermore, the anode connection layer 68 may not be provided between the first through-hole conductor 62 and the end surface of the anode plate 31 . In this case, the first through-hole conductor 62 may be directly connected to the end surface of the anode plate 31 .

[0243] Preferably, if Figure 1 and Fig.31 As shown in FIG. 1 , when viewed from the thickness direction Z, the first through-hole conductor 62 is electrically connected to the end surface of the anode plate 31 over the entire circumference of the first through-hole 63. Fig.31 As shown in FIG. 1 , when an anode connection layer 68 is provided between the first through-hole conductor 62 and the end surface of the anode plate 31, when viewed from the thickness direction Z, the first through-hole conductor 62 is connected to the anode connection layer 68 over the entire circumference of the first through-hole 63. In this case, the contact area between the first through-hole conductor 62 and the anode connection layer 68 becomes larger, so it is easy to reduce the connection resistance between the first through-hole conductor 62 and the anode connection layer 68. As a result, it is easy to reduce the connection resistance between the first through-hole conductor 62 and the anode plate 31, so it is easy to reduce the equivalent series resistance (ESR) of the capacitor element 30. In addition, it is easy to improve the close contact between the first through-hole conductor 62 and the anode connection layer 68, so it is not easy to cause undesirable conditions such as peeling between the first through-hole conductor 62 and the anode connection layer 68 due to thermal stress.

[0244] Preferably, if Fig.31 As shown in FIG. 1 , the capacitor array 1 further includes a conductive portion 20 electrically connected to the first through-hole conductor 62. Fig.31In the illustrated example, the conductive portion 20 is provided on the surface of the first through-hole conductor 62. The conductive portion 20 can function as a connection terminal of the capacitor array 1 (capacitor element 30).

[0245] As a constituent material of the conductive portion 20, for example, a metal having a low resistance, such as silver, gold, or copper, can be cited. In this case, the conductive portion 20 is formed by, for example, plating the surface of the first through-hole conductor 62.

[0246] In order to improve the close fit between the conductive part 20 and other components, here, in order to improve the close fit between the conductive part 20 and the first through-hole conductor 62, as the constituent material of the conductive part 20, a mixed material of at least one conductive filler selected from the group consisting of silver filler, copper filler, nickel filler and carbon filler and resin can also be used.

[0247] Preferably, if Figure 1 and Fig.31 As shown in FIG. 1 , the capacitor array 1 further includes a first resin filling portion 29A formed by filling the first through hole 63 with a resin material. Figure 1 and Fig.31 In the example shown, first resin filling portion 29A is provided in the space surrounded by first through-hole conductor 62 on the inner wall surface of first through-hole 63. If the space in first through-hole 63 is eliminated by providing first resin filling portion 29A, delamination of first through-hole conductor 62 is suppressed.

[0248] It is preferred that the thermal expansion coefficient of the first resin-filled portion 29A is larger than the thermal expansion coefficient of the first through-hole conductor 62. More specifically, it is preferred that the thermal expansion coefficient of the resin material filled in the first through-hole 63 is larger than the thermal expansion coefficient of the constituent material (e.g., copper) of the first through-hole conductor 62. In this case, the first resin-filled portion 29A, more specifically, the resin material filled in the first through-hole 63, expands under a high temperature environment, thereby pressing the first through-hole conductor 62 against the inner wall surface of the first through-hole 63 from the inside to the outside of the first through-hole 63, and thus the occurrence of delamination of the first through-hole conductor 62 is sufficiently suppressed.

[0249] The thermal expansion coefficient of the first resin-filled portion 29A may be the same as the thermal expansion coefficient of the first through-hole conductor 62, or may be smaller than the thermal expansion coefficient of the first through-hole conductor 62. More specifically, the thermal expansion coefficient of the resin material filled in the first through-hole 63 may be the same as the thermal expansion coefficient of the constituent material of the first through-hole conductor 62, or may be smaller than the thermal expansion coefficient of the constituent material of the first through-hole conductor 62.

[0250] The capacitor array 1 may not include the first resin filling portion 29A. In this case, it is preferable that the first through-hole conductor 62 is provided not only on the inner wall surface of the first through-hole 63 but also throughout the entire interior of the first through-hole 63 .

[0251] Next, an example of the lead-out structure of cathode layer 36 of capacitor element 30 will be described below.

[0252] Fig.32 It means including Figure 1 A cross-sectional schematic diagram of an example of a cross section of a capacitor array taken along line segment B1-B2 in FIG. Fig.32 The line segment B1-B2 in corresponds to Figure 1 The line segment B1-B2 in .

[0253] Preferably, if Fig.32 As shown in FIG. 1 , the second through-hole conductor 64 is provided so as to penetrate the capacitor element 30 in the thickness direction Z of the capacitor layer 10 . More specifically, it is preferable that the second through-hole conductor 64 is provided in a region that penetrates the capacitor element 30 in the thickness direction Z. Fig.31 The first through-hole conductor 62 shown in FIG. 1 is at least the inner wall surface of the second through-hole 65 of the capacitor element 30 .

[0254] Preferably, if Fig.32 As shown, the second through-hole conductor 64 is electrically connected to the cathode layer 36. Fig.32 In the example shown, the conductive portion 40 is provided on the surface of the second through-hole conductor 64 and can function as a connection terminal of the capacitor array 1 (capacitor element 30). Fig.32 In the example shown, the via conductor 42 is provided so as to penetrate the sealing layer 25 in the thickness direction Z and connect to the conductive portion 40 and the cathode layer 36. Fig.32 In the example shown, the second through-hole conductor 64 is electrically connected to the cathode layer 36 via the conductive portion 40 and the via conductor 42. In this case, the capacitor array 1 can be miniaturized.

[0255] The second through-hole conductor 64 is formed, for example, as follows. First, the portion where the second through-hole conductor 64 is to be formed is subjected to drilling processing, laser processing, etc., to form a through hole. Next, an insulating layer is formed by filling the formed through hole with the constituent material of the second sealing layer 25B (for example, a resin material). Then, the second through-hole 65 is formed by drilling processing, laser processing, etc. on the formed insulating layer. At this time, by making the diameter of the second through-hole 65 smaller than the diameter of the insulating layer, a state is formed in which the constituent material of the second sealing layer 25B exists between the through-hole formed previously and the second through-hole 65. Thereafter, the second through-hole conductor 64 is formed by metalizing the inner wall surface of the second through-hole 65 with a low-resistance metal such as copper, gold, or silver. When forming the second through-hole conductor 64, for example, the inner wall surface of the second through-hole 65 is metalized by electroless copper plating, electrolytic copper plating, etc., so that processing becomes easy. In addition, as a method of forming the second through-hole conductor 64 , in addition to the method of metallizing the inner wall surface of the second through-hole 65 , a method of filling the second through-hole 65 with metal, a composite material of metal and resin, or the like may be used.

[0256] As a constituent material of the conductive portion 40 , for example, a metal having a low resistance, such as silver, gold, or copper, can be cited. In this case, the conductive portion 40 is formed by, for example, plating the surface of the second through-hole conductor 64 .

[0257] In order to improve the close fit between the conductive part 40 and other components, here, in order to improve the close fit between the conductive part 40 and the second through-hole conductor 64, as the constituent material of the conductive part 40, a mixed material of at least one conductive filler selected from the group consisting of silver filler, copper filler, nickel filler and carbon filler and resin can also be used.

[0258] Examples of the constituent material of via conductor 42 include the same materials as the constituent material of conductive portion 40 .

[0259] Via conductor 42 is formed, for example, by plating the inner wall surface of a through hole provided so as to penetrate sealing layer 25 in thickness direction Z, or by performing heat treatment after filling with a conductive paste.

[0260] Preferably, if Figure 1 and Fig.32 As shown in FIG. 1 , the capacitor array 1 further includes a second resin filling portion 29B formed by filling the second through hole 65 with a resin material. Figure 1 and Fig.32In the example shown, second resin filling portion 29B is provided in the space surrounded by second through-hole conductor 64 on the inner wall surface of second through-hole 65. If the space in second through-hole 65 is eliminated by providing second resin filling portion 29B, delamination of second through-hole conductor 64 is suppressed.

[0261] It is preferred that the thermal expansion coefficient of the second resin filling portion 29B is larger than the thermal expansion coefficient of the second through-hole conductor 64. More specifically, it is preferred that the thermal expansion coefficient of the resin material filled in the second through-hole 65 is larger than the thermal expansion coefficient of the constituent material (e.g., copper) of the second through-hole conductor 64. In this case, the second resin filling portion 29B, more specifically, the resin material filled in the second through-hole 65, expands in a high temperature environment, thereby pressing the second through-hole conductor 64 against the inner wall surface of the second through-hole 65 from the inside to the outside of the second through-hole 65, so that the occurrence of delamination of the second through-hole conductor 64 is sufficiently suppressed.

[0262] The thermal expansion coefficient of the second resin filling portion 29B may be the same as the thermal expansion coefficient of the second through-hole conductor 64, or may be smaller than the thermal expansion coefficient of the second through-hole conductor 64. More specifically, the thermal expansion coefficient of the resin material filled in the second through-hole 65 may be the same as the thermal expansion coefficient of the constituent material of the second through-hole conductor 64, or may be smaller than the thermal expansion coefficient of the constituent material of the second through-hole conductor 64.

[0263] The capacitor array 1 may not include the second resin filling portion 29B. In this case, it is preferable that the second through-hole conductor 64 is provided not only on the inner wall surface of the second through-hole 65 but also throughout the entire interior of the second through-hole 65 .

[0264] Preferably, if Fig.32 As shown in FIG. 2 , the second sealing layer 25B extends between the anode plate 31 and the second through-hole conductor 64. Fig.32 In the example shown, the second sealing layer 25B contacts both the anode plate 31 and the second through-hole conductor 64. The second sealing layer 25B extends between the anode plate 31 and the second through-hole conductor 64, thereby ensuring insulation between the anode plate 31 and the second through-hole conductor 64, and further ensuring insulation between the anode plate 31 and the cathode layer 36, thereby preventing a short circuit between the two.

[0265] When the second sealing layer 25B extends between the anode plate 31 and the second through-hole conductor 64, it is preferable that Fig.32 As shown, the core 32 and the porous portion 34 are exposed to the end surface of the anode plate 31 in contact with the second sealing layer 25B. In this case, the contact area between the second sealing layer 25B and the porous portion 34 is increased to improve the close contact between the two, so it is not easy to produce the second sealing layer 25B and the porous portion 34.

[0266] In the case where the core portion 32 and the porous portion 34 are exposed to the end face of the anode plate 31 in contact with the second sealing layer 25B, it is preferable that the insulating layer 24 that is extended inside the porous portion 34 by the constituent material of the insulating layer 24 enters the pores of the porous portion 34 is provided around the second through-hole conductor 64. In this case, the insulation between the anode plate 31 and the second through-hole conductor 64 is sufficiently ensured, and further the insulation between the anode plate 31 and the cathode layer 36 is sufficiently ensured, and a short circuit between the two is sufficiently prevented.

[0267] When the core portion 32 and the porous portion 34 are exposed to the end surface of the anode plate 31 in contact with the second sealing layer 25B, it is preferable that the constituent material of the second sealing layer 25B enters the pores of the porous portion 34. In this case, the mechanical strength of the porous portion 34 is improved, and the occurrence of delamination due to the pores of the porous portion 34 is suppressed.

[0268] The thermal expansion coefficient of the second sealing layer 25B is preferably larger than the thermal expansion coefficient of the second through-hole conductor 64. More specifically, the thermal expansion coefficient of the constituent material of the second sealing layer 25B is preferably larger than the thermal expansion coefficient of the constituent material (e.g., copper) of the second through-hole conductor 64. In this case, the second sealing layer 25B, more specifically, the constituent material of the second sealing layer 25B expands in a high temperature environment, thereby pressing the porous portion 34 and the second through-hole conductor 64, and thus the occurrence of delamination is sufficiently suppressed.

[0269] The thermal expansion coefficient of the second sealing layer 25B may be the same as that of the second through-hole conductor 64, or may be smaller than that of the second through-hole conductor 64. More specifically, the thermal expansion coefficient of the material constituting the second sealing layer 25B may be the same as that of the material constituting the second through-hole conductor 64, or may be smaller than that of the material constituting the second through-hole conductor 64.

[0270] exist Figure 1 Although not shown, the through-hole conductor 60 may include a third through-hole conductor that is not electrically connected to the first electrode layer (eg, anode plate 31 ) and the second electrode layer (eg, cathode layer 36 ) of the capacitor element 30 .

[0271] The capacitor array of the present invention is not limited to the above-mentioned embodiment as long as the intersection point of the first virtual groove obtained by extending the first through groove to the intersection area and the second virtual groove obtained by extending the second through groove to the intersection area is located inside the intersection area when the intersection area of ​​the first through groove and the second through groove is observed from the thickness direction. Therefore, various applications and modifications can be added within the scope of the present invention with respect to the structure, manufacturing conditions, etc. of the capacitor array.

[0272] In the capacitor array of the present invention, the capacitor element is not limited to an electrolytic capacitor such as a solid electrolytic capacitor. In the capacitor array of the present invention, the capacitor element may be, for example, a ceramic capacitor using barium titanate, a ceramic capacitor using silicon nitride (SiN), a ceramic capacitor using silicon dioxide (SiO 2 ), thin film capacitors using hydrogen fluoride (HF), etc., trench capacitors with a MIM (Metal Insulator Metal) structure, etc.

[0273] In the capacitor array of the present invention, from the viewpoint of thinning and increasing the area of ​​the capacitor layer and improving the mechanical properties of the capacitor layer such as rigidity and flexibility, it is preferred that the capacitor element constitutes a capacitor with aluminum or other metal as the base material, and it is more preferred that the capacitor element constitutes an electrolytic capacitor with aluminum or other metal as the base material.

[0274] The capacitor array of the present invention is used, for example, in a composite electronic component. Such a composite electronic component includes, for example, the capacitor array of the present invention and an electronic component electrically connected to the external electrode layer of the capacitor array of the present invention.

[0275] In the composite electronic component, the electronic component electrically connected to the external electrode layer may be a passive element, an active element, both a passive element and an active element, or a composite of a passive element and an active element.

[0276] As a passive element, an inductor etc. can be mentioned, for example.

[0277] Examples of active elements include a memory, a GPU (Graphical Processing Unit), a CPU (Central Processing Unit), an MPU (Micro Processing Unit), and a PMIC (Power Management IC).

[0278] When the capacitor array of the present invention is used for a composite electronic component, the capacitor array of the present invention is, for example, treated as a substrate for mounting the electronic component. Therefore, by setting the capacitor array of the present invention as a sheet as a whole, and then setting the electronic component mounted on the capacitor array of the present invention as a sheet, the capacitor array of the present invention and the electronic component can be electrically connected in the thickness direction via a through-hole conductor that penetrates the electronic component in the thickness direction. As a result, the passive components and active components as electronic components can be configured as batch modules.

[0279] For example, a switching regulator can be formed by electrically connecting the capacitor array of the present invention between a voltage regulator including a semiconductor active element and a load to which the converted DC voltage is supplied.

[0280] In a composite electronic component, a circuit layer may be formed on one main surface of a capacitor matrix sheet having a plurality of capacitor arrays of the present invention laid out, and the circuit layer may be electrically connected to a passive element or an active element as the electronic component.

[0281] Alternatively, the capacitor array of the present invention may be disposed in a cavity pre-formed in a substrate, embedded in a resin, and then a circuit layer may be formed on the resin. Alternatively, passive or active elements as other electronic components may be mounted in other cavities of the substrate.

[0282] Alternatively, the capacitor array of the present invention may be mounted on a smooth carrier such as a wafer or glass, and after the outer layer is formed by resin, a circuit layer is formed, and on this basis, the circuit layer is electrically connected to passive elements or active elements serving as electronic components.

[0283] The following contents are disclosed in this specification.

[0284] <1>

[0285] A capacitor array, wherein:

[0286] The capacitor array includes a capacitor layer, the capacitor layer includes a plurality of capacitor elements, the plurality of capacitor elements are arranged in a plane in a plane direction orthogonal to a thickness direction by being divided by a plurality of through grooves,

[0287] The capacitor element includes a first electrode layer, a second electrode layer, and a dielectric layer, respectively, wherein the first electrode layer and the second electrode layer are opposed to each other in the thickness direction via the dielectric layer.

[0288] The through grooves include a first through groove along a first direction and a second through groove along a second direction intersecting the first direction.

[0289] When observing the intersection area of ​​the above-mentioned first through groove and the above-mentioned second through groove from the above-mentioned thickness direction, the intersection point of the first imaginary groove obtained by extending the above-mentioned first through groove to the above-mentioned intersection area and the second imaginary groove obtained by extending the above-mentioned second through groove to the above-mentioned intersection area is located on the inner side of the above-mentioned intersection area.

[0290] <2>

[0291] The capacitor array according to <1>, wherein:

[0292] The capacitor array further includes a sealing layer for sealing the capacitor layer.

[0293] <3>

[0294] The capacitor array according to <2>, wherein:

[0295] The sealing layer includes a first sealing layer provided on two main surfaces of the capacitor layer that are opposite to each other in the thickness direction.

[0296] The first sealing layer extends in the first through-groove and does not extend in the second through-groove.

[0297] <4>

[0298] The capacitor array according to <3>, wherein:

[0299] The sealing layer further includes a second sealing layer provided on the surface of the first sealing layer.

[0300] The second sealing layer does not extend in the first through groove, but extends in the second through groove.

[0301] <5>

[0302] The capacitor array according to <4>, wherein:

[0303] The first sealing layer and the second sealing layer further extend in the intersection region.

[0304] When the intersection region is viewed from the thickness direction, the second sealing layer is located inside the intersection region than the first sealing layer, and an area of ​​the second sealing layer in the intersection region is larger than an area of ​​the second imaginary groove in the intersection region.

[0305] <6>

[0306] The capacitor array according to any one of <1> to <5>, wherein:

[0307] At least one corner between the first through groove and the intersection region has a curved surface or an obtuse-angled surface.

[0308] <7>

[0309] The capacitor array according to any one of <1> to <5>, wherein:

[0310] All corners between the first through groove and the intersection region have curved surfaces or obtuse-angled surfaces.

[0311] <8>

[0312] The capacitor array according to any one of <1> to <5>, wherein:

[0313] At least one corner between the second through groove and the intersection region has a curved surface or an obtuse-angled surface.

[0314] <9>

[0315] The capacitor array according to any one of <1> to <5>, wherein:

[0316] All corners between the second through groove and the intersection region have curved surfaces or obtuse-angled surfaces.

[0317] <10>

[0318] The capacitor array according to any one of <1> to <5>, wherein:

[0319] At least one corner between the first through groove and the intersection region has a curved surface or an obtuse-angled surface, and at least one corner between the second through groove and the intersection region has a curved surface or an obtuse-angled surface.

[0320] <11>

[0321] The capacitor array according to any one of <1> to <5>, wherein:

[0322] All corners between the first through groove and the intersection region have curved surfaces or obtuse-angled surfaces, and all corners between the second through groove and the intersection region have curved surfaces or obtuse-angled surfaces.

[0323] <12>

[0324] The capacitor array according to any one of <1> to <11>, wherein:

[0325] The first electrode layer is an anode plate having a core portion and a porous portion, wherein the core portion is formed of metal and the porous portion is provided on at least one main surface of the core portion.

[0326] The dielectric layer is provided on the surface of the porous portion.

[0327] The second electrode layer is a cathode layer provided on the surface of the dielectric layer.

[0328] <13>

[0329] The capacitor array according to <12>, wherein:

[0330] The cathode layer includes a solid electrolyte layer provided on a surface of the dielectric layer.

[0331] Description of Reference Numerals

[0332] 1. capacitor array; 10. capacitor layer; 15. through groove; 15A. first through groove; 15B. second through groove; 20. conductive part; 24. insulating layer; 25. sealing layer; 25A. first sealing layer; 25B. second sealing layer; 29A. first resin filling part; 29B. second resin filling part; 30. capacitor element; 30a. first main surface of capacitor element; 30b. second main surface of capacitor element; 31. anode plate; 32. core; 34. porous part; 35. dielectric layer; 36. cathode layer; 36A. solid electrolyte layer; 36B. conductor layer; 40. conductive part; 4 2. via conductor; 60. through-hole conductor; 62. first through-hole conductor; 63. first through-hole; 64. second through-hole conductor; 65. second through-hole; 68. anode connection layer; 68A. first anode connection layer; 68B. second anode connection layer; 115A. first imaginary groove; 115B. second imaginary groove; 130. capacitor sheet; 130a. first main surface of capacitor sheet; 130b. second main surface of capacitor sheet; I. intersection area of ​​first through-groove and second through-groove; W1. width of first through-groove; W2. width of second through-groove; X. first direction; Y. second direction; Z. thickness direction.

Claims

1. A capacitor array, wherein: The capacitor array includes a capacitor layer, the capacitor layer includes a plurality of capacitor elements, the plurality of capacitor elements are arranged in a plane in a plane direction orthogonal to a thickness direction by being divided by a plurality of through grooves, The capacitor element includes a first electrode layer, a second electrode layer, and a dielectric layer, respectively, wherein the first electrode layer and the second electrode layer are opposed to each other in the thickness direction via the dielectric layer. The through grooves include a first through groove along a first direction and a second through groove along a second direction intersecting the first direction. When observing the intersection area of ​​the first through groove and the second through groove from the thickness direction, the intersection point of the first imaginary groove obtained by extending the first through groove to the intersection area and the second imaginary groove obtained by extending the second through groove to the intersection area is located on the inner side of the intersection area.

2. The capacitor array according to claim 1, wherein: The capacitor array further includes a sealing layer sealing the capacitor layer.

3. The capacitor array according to claim 2, wherein: The sealing layer includes a first sealing layer provided on two main surfaces of the capacitor layer that are opposite to each other in the thickness direction. The first sealing layer extends in the first through-groove and does not extend in the second through-groove.

4. The capacitor array according to claim 3, wherein: The sealing layer further includes a second sealing layer provided on a surface of the first sealing layer, The second sealing layer does not extend in the first through-groove but extends in the second through-groove.

5. The capacitor array according to claim 4, wherein: The first sealing layer and the second sealing layer further extend in the intersection region, When the intersection region is viewed from the thickness direction, the second sealing layer is located inside the intersection region than the first sealing layer, and an area of ​​the second sealing layer in the intersection region is larger than an area of ​​the second virtual groove in the intersection region.

6. The capacitor array according to any one of claims 1 to 5, wherein: At least one corner portion between the first through groove and the intersection region has a curved surface or an obtuse-angled surface.

7. The capacitor array according to any one of claims 1 to 5, wherein: All corners between the first through groove and the intersection region have curved surfaces or obtuse-angled surfaces.

8. The capacitor array according to any one of claims 1 to 5, wherein: At least one corner between the second through groove and the intersection region has a curved surface or an obtuse-angle surface.

9. The capacitor array according to any one of claims 1 to 5, wherein: All corners between the second through groove and the intersection region have curved surfaces or obtuse-angled surfaces.

10. The capacitor array according to any one of claims 1 to 5, wherein: At least one corner between the first through-groove and the intersection region has a curved surface or an obtuse-angled surface, and at least one corner between the second through-groove and the intersection region has a curved surface or an obtuse-angled surface.

11. The capacitor array according to any one of claims 1 to 5, wherein: All corners between the first through-groove and the intersection region have curved surfaces or obtuse-angled surfaces, and all corners between the second through-groove and the intersection region have curved surfaces or obtuse-angled surfaces.

12. The capacitor array according to any one of claims 1 to 11, wherein: The first electrode layer is an anode plate having a core portion and a porous portion, the core portion is formed of metal, and the porous portion is provided on at least one main surface of the core portion. The dielectric layer is provided on the surface of the porous portion. The second electrode layer is a cathode layer provided on the surface of the dielectric layer.

13. The capacitor array according to claim 12, wherein: The cathode layer includes a solid electrolyte layer provided on a surface of the dielectric layer.