Fault detection method and system for key equipment in electrical engineering

Abstract

The present application relates to the technical field of electrical fault detection, and specifically to a fault detection method and system for key equipment in electrical engineering. The present application first obtains the degree of post-stage power mutation that characterizes instantaneous abnormality according to the time series changes of the current and voltage output by the post-stage circuit; after obtaining the mutation degree clustering clusters that characterize each time period, the abnormal clustering clusters that characterize the output abnormality of the post-stage circuit are screened out according to the change range and discreteness of the degree of post-stage power mutation in each mutation degree clustering cluster; according to the similarity of the correlation between the degree of previous stage power mutation and the degree of post-stage power mutation at the sampling moment corresponding to the abnormal clustering cluster, it is judged whether the output abnormality of the post-stage circuit is affected by the previous stage, so as to more accurately detect the fault position of the IGBT drive circuit.

Description

Technical Field

[0001] The present application relates to the technical field of electrical fault detection, and in particular to a fault detection method and system for key equipment in electrical engineering. Background Art

[0002] Power electronic equipment plays an important role in power conversion, power control, and power protection in electrical engineering construction. Therefore, fault detection of power electronic equipment is an essential part of electrical engineering. In power electronic equipment, three-terminal devices, such as transistors and field effect transistors, play a key role and are used in signal processing or switching circuits in power equipment. When a three-terminal device fails, the voltage and current flowing through the power electronic equipment will become unstable, causing overheating, voltage instability, and other phenomena, resulting in the power electronic equipment being in a fault state.

[0003] Insulate-Gate Bipolar Transistor (IGBT) has the advantages of both power transistors and power field effect transistors. It can withstand high voltage and high current and has good controllability. It is widely used in various power electronic equipment and is one of the key components in electrical engineering. When the IGBT drive circuit fails, the power electronic equipment will be in a fault state, but this detection result is relatively rough and is not very helpful for subsequent diagnostic equipment and maintenance equipment. More accurate fault location detection is required.

[0004] When an IGBT drive circuit fails, the output voltage and current will fluctuate abnormally. Therefore, the existing technology usually performs abnormal detection based on the current and voltage of each level of the IGBT circuit, and evaluates whether the operating status of the power electronic equipment has failed based on the detected abnormal current and abnormal voltage.

[0005] However, the IGBT driving circuit includes two parts: the front-stage circuit and the rear-stage circuit. When the front-stage circuit outputs a fault, the abnormal current and voltage outputted by it will affect the output of the rear-stage circuit. Therefore, for a rear-stage circuit that has not failed, when the front-stage circuit fails, the rear-stage circuit will also be affected by the abnormal output current and voltage. At this time, the existing technology is used to detect the abnormality of the current and voltage outputted by the rear-stage circuit to determine whether it is a fault. In the IGBT driving circuit, the current and voltage outputted by the rear-stage circuit will not be affected by the fault of the front-stage circuit, which makes the accuracy of the fault position detection of the IGBT driving circuit low, and it is difficult to obtain the accurate fault position. Summary of the invention

[0006] The present application provides a fault detection method for key equipment in electrical engineering. The method combines the timing output correlation between the front-stage circuit and the rear-stage circuit on the basis of abnormality detection of the output data of the rear-stage circuit, thereby solving the problem that the prior art does not take into account that the current and voltage outputs of the rear-stage circuit in the IGBT drive circuit will be affected by the fault of the front-stage circuit, thereby making the fault location detection of the IGBT drive circuit more accurate.

[0007] The first aspect of the present application provides a fault detection method for key equipment in electrical engineering, comprising:

[0008] The current and voltage output by the front-stage circuit of the IGBT driving circuit at each sampling moment and the current and voltage output by the rear-stage circuit are collected by the sensor;

[0009] According to the current timing change of the subsequent circuit in the IGBT driving circuit and the voltage timing change of the subsequent circuit, the subsequent power mutation degree of the subsequent circuit at each sampling time is obtained;

[0010] Performing cluster analysis on the degree of post-stage power mutation of the post-stage circuit at all sampling moments to obtain at least two mutation degree clustering clusters; obtaining the abnormal possibility of each mutation degree clustering cluster according to the variation range and discrete degree of the post-stage power mutation degree in each mutation degree clustering cluster; and screening out abnormal clustering clusters among all mutation degree clustering clusters according to the abnormal possibility;

[0011] Determine the degree of power mutation of the front stage circuit at each sampling moment; obtain the possibility of the influence of the front stage fault of the IGBT drive circuit according to the similarity of the timing correlation between the power mutation degree of the rear stage and the power mutation degree of the front stage in all sampling moments corresponding to the abnormal clustering cluster; detect the fault position of the IGBT drive circuit according to the possibility of the front stage fault influence, and perform fault repair of the power electronic equipment according to the fault position obtained by the detection.

[0012] In the above scheme, according to the changes in the time sequence of the current and voltage output by the rear-stage circuit obtained by the acquisition, the degree of the rear-stage power mutation that characterizes the overall mutation characteristics of the current and voltage is obtained; further, after clustering and analyzing all the degrees of the rear-stage power mutation, in the dimension of outlier characteristics, the abnormal possibility of each mutation degree cluster is analyzed in combination with the change range and discrete degree of the degree of the rear-stage power mutation, so as to filter out the abnormal output data in the abnormal cluster according to the abnormal possibility; in this way, the abnormal degree of voltage and current is analyzed from the local and overall perspectives, respectively, so that the abnormal output data obtained can be more accurate. Further, in all sampling moments corresponding to the abnormal cluster, according to the similarity of the time sequence correlation between the degree of the rear-stage power mutation and the degree of the front-stage power mutation, the possibility of the influence of the front-stage fault is calculated, so as to combine the situation that the current and voltage output of the rear-stage circuit in the IGBT drive circuit will be affected by the fault of the front-stage circuit, so that the fault location of the IGBT drive circuit can be more accurately detected according to the possibility of the influence of the front-stage fault.

[0013] In an embodiment of the first aspect of the present application, the method for obtaining the degree of sudden change in the power of the subsequent stage includes:

[0014] In the subsequent circuit, the degree of change of the subsequent current at each sampling moment is obtained according to the current deviation between each sampling moment and the adjacent sampling moment;

[0015] In the subsequent circuit, the voltage variation degree of the subsequent voltage at each sampling moment is obtained according to the voltage deviation between each sampling moment and the adjacent sampling moment;

[0016] The degree of change of the rear-stage current and the degree of change of the rear-stage voltage are integrated to determine the degree of sudden change of the rear-stage power at each sampling moment; wherein the degree of change of the rear-stage current and the degree of change of the rear-stage voltage are both positively correlated with the degree of sudden change of the rear-stage power.

[0017] In the above scheme, the degree of change of the subsequent current that characterizes the magnitude of the voltage mutation at each sampling moment and the degree of change of the subsequent voltage that characterizes the magnitude of the voltage mutation at each sampling moment are combined. The obtained degree of subsequent power mutation is used to characterize the abnormal prominence of the output of the subsequent circuit at an instant, making the characterization of the degree of abnormality more accurate.

[0018] In an embodiment of the first aspect of the present application, the method for obtaining the mutation degree clusters includes:

[0019] In a coordinate system having a sampling time dimension and a subsequent power mutation degree dimension corresponding to each sampling time, obtaining a reference data coordinate point corresponding to the subsequent power mutation degree at each sampling time;

[0020] At least two mutation degree clusters are determined by cluster analysis method based on all reference data coordinate points.

[0021] In the above scheme, the sampling time dimension and the post-stage power mutation degree dimension are combined to perform coordinate mapping on the post-stage power mutation degree, so that each mutation degree clustering cluster obtained by clustering analysis combined with the coordinate points can correspond to a time range, which is convenient for characterizing the degree of abnormality in the local time range, thereby indirectly improving the accuracy of the abnormal clustering clusters screened out subsequently.

[0022] In an embodiment of the first aspect of the present application, the method for obtaining the abnormal possibility includes:

[0023] According to the extreme difference of the degree of mutation of the rear-stage power at all sampling moments in each mutation degree clustering cluster, the degree of change of the output power of each mutation degree clustering cluster is determined; according to the standard deviation of the degree of mutation of the rear-stage power at all sampling moments in each mutation degree clustering cluster, the degree of fluctuation of the output power of each mutation degree clustering cluster is determined;

[0024] Determine the output power instability of each mutation degree cluster according to the output power variation degree and the output power fluctuation degree; wherein the output power variation degree and the output power fluctuation degree are both positively correlated with the output power instability;

[0025] According to the relative size of the output power instability of each mutation degree cluster and the output power instability of the other mutation degree clusters, the abnormal possibility of each mutation degree cluster is determined.

[0026] In the above scheme, since abnormal voltage and abnormal current will be output when a fault occurs in the subsequent circuit, the corresponding output power change degree usually deviates greatly from the normal output power change degree, and the overall volatility of the output power change degree in the corresponding mutation degree clustering cluster is relatively large. Therefore, the range of the output power change degree corresponding to the mutation degree clustering cluster and the standard deviation of the overall discreteness of the output power change degree are calculated to obtain the corresponding output power instability, so that the abnormal possibility obtained according to the relative size of the output power instability is more accurate.

[0027] In an embodiment of the first aspect of the present application, the method for determining the abnormal possibility of each mutation degree clustering cluster according to the relative size of the output power instability of each mutation degree clustering cluster and the output power instability of the remaining mutation degree clustering clusters includes:

[0028] Each mutation degree cluster is used as the target cluster in turn; other mutation degree clusters outside the target cluster are used as comparison clusters of the target cluster;

[0029] Comparing the output power instability of the target cluster with the output instability of each comparison cluster to determine the relative instability of the target cluster and each comparison cluster; wherein the output power instability of the target cluster is positively correlated with the relative instability; and the output instability of the comparison cluster is negatively correlated with the relative instability;

[0030] The normalized value of the mean of the relative instability between the target cluster and all the comparison clusters is used as the abnormal possibility of the target cluster.

[0031] In the above scheme, the relative instability between the target cluster and each comparison cluster is analyzed and calculated from the perspective of relative size, which can make the subsequent abnormal possibility obtained based on the relative instability more robust and make the measurement of the abnormality degree more accurate.

[0032] In an embodiment of the first aspect of the present application, the method for obtaining abnormal clusters includes:

[0033] The mutation degree clusters whose abnormal probability is greater than the preset abnormal threshold are clustered as abnormal clusters.

[0034] In the above scheme, abnormal clusters with greater abnormality degree or abnormality possibility are screened out by presetting abnormality thresholds, reducing the amount of data for subsequent correlation similarity analysis and improving the accuracy of correlation similarity analysis, making the judgment of the fault location more accurate.

[0035] In an embodiment of the first aspect of the present application, the method for obtaining the possibility of impact of the previous stage fault includes:

[0036] All sampling moments corresponding to all abnormal clusters are regarded as fault moments;

[0037] Determine a sequence of subsequent power mutation levels after the subsequent power mutation levels at all fault moments are arranged in time sequence, and a sequence of preceding power mutation levels after the preceding power mutation levels at all fault moments are arranged in time sequence;

[0038] Calculating the DTW distance between the subsequent power mutation degree sequence and the previous power mutation degree sequence by the DTW algorithm; using the negative correlation mapping value of the DTW distance as the power mutation similarity between the previous circuit and the subsequent circuit at all fault moments;

[0039] Normalizing the absolute value of the covariance between the subsequent power mutation degree sequence and the preceding power mutation degree sequence to obtain the power mutation correlation degree between the preceding circuit and the subsequent circuit at all fault moments;

[0040] According to the power mutation similarity degree and the power mutation correlation degree, the possibility of the impact of the previous stage fault of the IGBT drive circuit is determined; the power mutation similarity degree and the power mutation correlation degree are both positively correlated with the possibility of the impact of the previous stage fault.

[0041] In the above scheme, when a fault occurs in the front-stage circuit, the front-stage circuit will output abnormal current and voltage, and the rear-stage circuit will also be affected by outputting abnormal current and voltage; therefore, by characterizing the similarity in the distribution trend of the timing between the degree of the rear-stage power mutation that characterizes the local power abnormality change and the degree of the front-stage power mutation, it is possible to indirectly characterize the influence of the front-stage circuit on the rear-stage circuit within the time range corresponding to the abnormal clustering cluster, thereby reflecting the possibility of the influence of the front-stage fault in the time period corresponding to the abnormal clustering cluster where the rear-stage circuit outputs abnormality, making the fault location judgment of the IGBT drive circuit more accurate.

[0042] In an embodiment of the first aspect of the present application, the method for detecting a fault position of an IGBT drive circuit according to the possibility of influence of the previous stage fault includes:

[0043] When the possibility of the impact of the previous stage fault is greater than or equal to the preset impact threshold, the previous stage circuit in the IGBT drive circuit is regarded as a fault circuit; when the possibility of the impact of the previous stage fault is less than the preset impact threshold, the subsequent stage circuit in the IGBT drive circuit is regarded as a fault circuit.

[0044] In the above solution, the circuit location causing the fault impact is more accurately determined by the relative size of the previous fault impact possibility and the preset impact threshold.

[0045] In an embodiment of the first aspect of the present application, the method for obtaining the degree of sudden change in the power of the previous stage includes:

[0046] In the front stage circuit, the degree of change of the front stage current at each sampling moment is obtained according to the current deviation between each sampling moment and the adjacent sampling moment;

[0047] In the front stage circuit, the voltage variation degree of the front stage at each sampling moment is obtained according to the voltage deviation between each sampling moment and the adjacent sampling moment;

[0048] The degree of change of the front-stage current and the degree of change of the front-stage voltage are combined to determine the degree of sudden change of the rear-stage power at each sampling moment.

[0049] In the above scheme, since the possibility of the impact of the previous stage fault needs to be analyzed in combination with the previous stage power mutation degree corresponding to the previous stage circuit, the previous stage power mutation degree is obtained according to the method for obtaining the subsequent stage power mutation degree.

[0050] A second aspect of the present application provides a fault detection system for key equipment in electrical engineering, the system comprising:

[0051] The electric variable acquisition module is used to acquire the current and voltage output by the front-stage circuit of the IGBT drive circuit at each sampling moment, as well as the current and voltage output by the rear-stage circuit through a sensor;

[0052] The post-stage power mutation degree calculation module is used to obtain the post-stage power mutation degree of the post-stage circuit at each sampling time according to the current timing change of the post-stage circuit in the IGBT drive circuit and the voltage timing change of the post-stage circuit; cluster analysis is performed on the post-stage power mutation degree of the post-stage circuit at all sampling times to obtain at least two mutation degree clustering clusters;

[0053] The abnormal screening module is used to obtain the abnormal possibility of each mutation degree cluster according to the variation range and discrete degree of the subsequent power mutation degree in each mutation degree cluster; and screen out abnormal clusters in all mutation degree clusters according to the abnormal possibility;

[0054] The fault detection module is used to determine the degree of mutation of the front-stage power of the front-stage circuit at each sampling moment according to the method for obtaining the degree of mutation of the rear-stage power; obtain the possibility of the influence of the front-stage fault of the IGBT drive circuit according to the similarity of the timing correlation between the degree of mutation of the rear-stage power and the degree of mutation of the front-stage power in all sampling moments corresponding to the abnormal clustering clusters; detect the fault position of the IGBT drive circuit according to the possibility of the influence of the front-stage fault, and perform fault repair of the power electronic equipment according to the fault position obtained by the detection.

[0055] In a third aspect, the present application provides a computer program product, wherein the computer program product comprises a computer program code. When the computer program code is executed, the method of the first aspect or any embodiment of the first aspect of the present application is performed.

[0056] In a fourth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program code. When the computer program code is executed, the method of the first aspect or any embodiment of the first aspect of the present application is executed. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] In order to more clearly illustrate the technical solutions and advantages in the embodiments of the present application or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0058] Figure 1 A flow chart of a method for fault detection of key equipment in electrical engineering provided by one embodiment of the present application;

[0059] Figure 2 A schematic diagram of the output voltage waveforms in normal and fault timing according to an embodiment of the present application;

[0060] Figure 3 A flow chart of a method for obtaining a sudden change degree of power in a later stage provided by an embodiment of the present application;

[0061] Figure 4 A flow chart of a method for obtaining abnormality possibility provided by an embodiment of the present application;

[0062] Figure 5 A flow chart of a method for obtaining the possibility of impact of a previous stage fault provided by an embodiment of the present application;

[0063] Figure 6 A structural diagram of a fault detection system for key equipment in electrical engineering provided by one embodiment of the present application;

[0064] Figure 7 A schematic diagram of the structure of a computer device provided for one embodiment of the present application. DETAILED DESCRIPTION

[0065] In order to further explain the technical means and effects adopted by the present application to achieve the predetermined invention purpose, the following is a detailed description of the fault detection method and system for key equipment in electrical engineering proposed in accordance with the present application, its specific implementation method, structure, features and effects, in combination with the accompanying drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" does not necessarily refer to the same embodiment, and the specific features, structures or characteristics in one or more embodiments may be combined in any suitable form. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as implying or suggesting relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features.

[0066] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0067] The specific scheme of the fault detection method and system for key equipment in electrical engineering provided by the present application is described in detail below with reference to the accompanying drawings.

[0068] The present application provides a method for detecting faults of key equipment in electrical engineering. Figure 1, which shows a flow chart of a fault detection method for key equipment in electrical engineering provided by an embodiment of the present application, the method comprising:

[0069] Step S101: collecting, by means of sensors, the current and voltage output by the front-stage circuit of the IGBT driving circuit at each sampling moment, as well as the current and voltage output by the rear-stage circuit.

[0070] In this application, in electrical engineering, power electronic equipment connected to IGBT includes but is not limited to DC motor drivers, motor controllers, inverters, and traction converters. When an IGBT circuit fails, the output voltage and current will fluctuate abnormally, and subsequent analysis needs to take into account the impact of the front-stage circuit on the rear-stage circuit. Therefore, in the working process of the IGBT drive circuit, the embodiment of this application collects the current output by the front-stage circuit and the current output by the rear-stage circuit of the IGBT drive circuit at each sampling time through a current sensor; and collects the voltage output by the front-stage circuit and the voltage output by the rear-stage circuit of the IGBT drive circuit at each sampling time through a voltage sensor.

[0071] In one implementation of the embodiment of the present application, the sampling time interval is set to 0.1s; that is, the time interval between two adjacent sampling moments is 0.1s. In one implementation of the embodiment of the present application, the sampling time period is set to 10 minutes before the current moment; it is used to limit the scope of data analysis of the embodiment of the present application and ensure the real-time performance of IGBT drive circuit fault detection. It should be noted that the implementer can adjust the sampling time interval and sampling time period according to the specific implementation environment, which will not be further elaborated here.

[0072] Step S102: Obtain the subsequent power mutation degree of the subsequent circuit at each sampling moment according to the current timing variation and the voltage timing variation of the subsequent circuit in the IGBT driving circuit.

[0073] When there is no fault in the IGBT circuit, the output current and voltage are usually relatively stable, with no obvious fluctuation characteristics in the timing sequence; however, when there is a fault in the IGBT circuit, the output voltage and current will fluctuate abnormally, which is manifested as a sudden change in the current and voltage, and the change in the timing sequence is more obvious, such as Figure 2 As shown in the figure, the solid line and dotted line represent the normal fluctuation and abnormal fluctuation of the output voltage in the timing within 1 second when there is no fault and when a fault occurs, respectively; therefore, the degree of the subsequent power mutation that can characterize the instantaneous abnormal fluctuation corresponding to each sampling moment is obtained through the changes in the current and voltage corresponding to the subsequent circuit in the timing.

[0074] Step S103: performing cluster analysis on the degree of post-stage power mutation of the post-stage circuit at all sampling moments to obtain at least two mutation degree clustering clusters; obtaining the abnormal possibility of each mutation degree clustering cluster according to the variation range and discreteness of the degree of post-stage power mutation in each mutation degree clustering cluster; and screening out abnormal clustering clusters among all mutation degree clustering clusters according to the abnormal possibility.

[0075] The degree of post-stage power mutation can only characterize the degree of change of the current and voltage corresponding to the post-stage circuit at an instantaneous moment. However, under normal circumstances where there is no fault in the circuit, the current and voltage will also change with the change of the load power, that is, the current and voltage of the post-stage circuit may have different changes in different time periods. Therefore, the degree of post-stage power mutation is further clustered and analyzed, and the abnormal possibility is analyzed according to the overall change range and discreteness of the degree of post-stage power mutation in each mutation degree clustering cluster obtained; thus, from an overall perspective, the circuit output abnormality of each mutation degree clustering cluster as a whole is characterized, and the abnormal clustering cluster is further screened out according to the abnormal possibility, so that a more accurate fault location judgment analysis can be performed based on the abnormal clustering cluster.

[0076] Step S104: determine the degree of power mutation of the front stage circuit at each sampling moment; in all sampling moments corresponding to the abnormal clustering clusters, according to the similarity of the timing correlation between the power mutation degree of the rear stage and the power mutation degree of the front stage, obtain the possibility of the influence of the front stage fault of the IGBT drive circuit; perform the fault position detection of the IGBT drive circuit according to the possibility of the influence of the front stage fault.

[0077] After the processing from step S101 to step S103, the abnormal clustering cluster that characterizes the output abnormality in the rear-stage circuit has been locked. However, the output abnormality of the rear-stage circuit cannot completely characterize the failure of the rear-stage circuit, because when the output is abnormal due to a fault in the front-stage circuit, the output signal of the corresponding rear-stage circuit will become unstable after being processed by the IGBT, resulting in an abnormality. Therefore, it is necessary to further determine the location of the abnormality based on the relationship between the front-stage circuit and the rear-stage circuit, that is, to determine the rear-stage circuit failure or the front-stage circuit failure. Because the output of the front-stage circuit will affect the output of the rear-stage circuit, at the sampling moment corresponding to the abnormal clustering cluster, if the abnormal outputs of the front-stage circuit and the rear-stage circuit are highly consistent or have a certain correlation, it means that the output abnormality of the rear-stage circuit is caused by the fault of the front-stage circuit. Therefore, according to the degree of power mutation of the subsequent stage, the degree of instantaneous abnormality of current and voltage at each moment can be characterized by the subsequent stage circuit. After obtaining the degree of power mutation of the previous stage circuit corresponding to the previous stage circuit, the possibility of influence of the previous stage fault is determined according to the similarity of the timing correlation between the degree of power mutation of the subsequent stage and the degree of power mutation of the previous stage, so as to perform more accurate IGBT drive circuit fault location detection according to the possibility of influence of the previous stage fault.

[0078] Preferably, in some possible implementations of the embodiments of the present application, the specific implementation process of obtaining the degree of subsequent power mutation of the subsequent circuit at each sampling moment in step 102 includes: Figure 3 , which shows a flow chart of a method for obtaining a sudden change degree of power in a later stage provided by an embodiment of the present application, the method comprising:

[0079] Step S301: in the subsequent circuit, according to the current deviation between each sampling moment and the adjacent sampling moment, the subsequent current variation degree at each sampling moment is obtained.

[0080] Among them, adjacent sampling moments are the previous sampling moment and the next sampling moment of each sampling moment in time sequence. For each sampling moment, the larger the current deviation, that is, the current difference, between it and the adjacent sampling moment, the larger the span or prominence of the current change occurring at each sampling moment, and the more likely it is that an abnormal mutation will occur at the corresponding sampling moment. In a specific implementation of an embodiment of the present application, in the subsequent circuit, the current difference between each sampling moment and the previous sampling moment is added to the current difference between each sampling moment and the next sampling moment to obtain the degree of change of the subsequent current at each sampling moment.

[0081] It should be noted that when the previous sampling moment does not exist, the current difference between the corresponding sampling moment and the next sampling moment is used as the degree of change of the subsequent current; similarly, when the next sampling moment does not exist, the current difference between the corresponding sampling moment and the previous sampling moment is used as the degree of change of the subsequent current.

[0082] Step S302: in the subsequent circuit, according to the voltage deviation between each sampling moment and the adjacent sampling moment, the subsequent voltage variation degree at each sampling moment is obtained.

[0083] By changing the electrical variable involved in the method for obtaining the degree of change of the subsequent current from current to voltage, the required degree of change of the subsequent voltage can be obtained; similarly, when the previous sampling moment does not exist, the voltage difference between the corresponding sampling moment and the next sampling moment is used as the degree of change of the subsequent voltage; similarly, when the next sampling moment does not exist, the current difference between the corresponding sampling moment and the previous sampling moment is used as the degree of change of the subsequent voltage. It should be noted that in other possible implementation methods of the embodiments of the present application, the nearest preset number of sampling moments with each sampling moment as the center moment can also be selected as the adjacent sampling moments of each sampling moment. The preset number of empirical values ​​is 4, which can be adjusted at will.

[0084] Step S303: The degree of change of the rear-stage current and the degree of change of the rear-stage voltage are integrated to determine the degree of sudden change of the rear-stage power at each sampling moment; wherein the degree of change of the rear-stage current and the degree of change of the rear-stage voltage are both positively correlated with the degree of sudden change of the rear-stage power.

[0085] When an IGBT circuit fails, the output voltage and current will fluctuate abnormally. Therefore, the abnormal mutation of current and voltage at each sampling moment are used to jointly characterize the instantaneous abnormality corresponding to each sampling moment. In a specific implementation method of an embodiment of the present application, the subsequent current mutation degree and the subsequent voltage mutation degree at each sampling moment are combined in the form of a product to obtain the subsequent power mutation degree required by the embodiment of the present application to characterize the instantaneous abnormality at each sampling moment. The implementer may also combine in other ways according to the specific implementation environment, for example, the sum of the normalized value of the subsequent current mutation degree and the normalized value of the subsequent voltage mutation degree is used as the subsequent power mutation degree, and the normalization method may adopt linear normalization.

[0086] In a specific implementation of the embodiment of the present application, the process of obtaining the degree of the subsequent power mutation is expressed by the formula: ;in, For the subsequent circuit The degree of power mutation of the subsequent stage at each sampling moment; For the subsequent circuit The current output at each sampling moment; For the subsequent circuit The current output at each sampling moment; For the subsequent circuit The current output at each sampling moment; For the subsequent circuit The output voltage at each sampling moment; For the subsequent circuit The output voltage at each sampling moment; For the subsequent circuit The output voltage at each sampling moment; is the absolute value symbol. The larger the value, the higher the subsequent circuit The output current at the sampling moment is relative to the The sampling time and The greater the deviation of the output current corresponding to the sampling moment, the The more abnormal the current at a sampling moment is in the instantaneous dimension; similarly, The larger the The more abnormal the voltage is at each sampling moment in the instantaneous dimension; therefore, the current anomaly and voltage anomaly are combined in the form of a product to obtain the required degree of subsequent power mutation.

[0087] In other possible implementations of the embodiments of the present application, a method for obtaining the degree of change in the post-stage power includes: calculating the power output by the post-stage circuit at each sampling moment based on the current and voltage output by the post-stage circuit at each sampling moment; in the post-stage circuit, obtaining the degree of change in the post-stage power at each sampling moment based on the power deviation between each sampling moment and an adjacent sampling moment.

[0088] Preferably, in some possible implementations of the embodiments of the present application, the method for obtaining mutation degree clusters includes:

[0089] In a coordinate system with sampling time dimension and subsequent power mutation degree dimension, obtain reference data coordinate points corresponding to subsequent power mutation degree at each sampling time; determine at least two mutation degree clusters through cluster analysis method based on all reference data coordinate points. The horizontal axis corresponding to the coordinate system is time, and the vertical axis is the subsequent power mutation degree, so that the subsequent power mutation degree at each sampling time can correspond to a reference data coordinate point.

[0090] The cluster analysis method uses the k-means clustering algorithm, and the number of clusters is determined by the elbow rule. It should be noted that the k-means clustering algorithm and the elbow rule are both prior arts well known to those skilled in the art, and are not further limited or elaborated here. Each mutation degree cluster obtained by cluster analysis in combination with the coordinate points can correspond to a time range, which is convenient for characterizing the degree of abnormality in the local time range, thereby indirectly improving the accuracy of the subsequent screened abnormal clusters, reducing the amount of data for the subsequent front-stage circuit correlation analysis, and reducing the influence of normal working data on the subsequent front-stage fault impact possibility calculation, thereby improving the accuracy of the front-stage fault impact possibility.

[0091] Considering that the main purpose of each mutation degree clustering cluster obtained by cluster analysis is that each mutation degree clustering cluster can correspond to a time range, that is, a local time period; therefore, the sampling time period can also be directly divided into local time periods to obtain a mutation degree clustering cluster characterizing each local time period. In other possible implementations of the embodiments of the present application, the sampling time period is divided into at least two local time periods of the same time length, and the subsequent power mutation degree of all sampling moments corresponding to each local time period is taken as a mutation degree clustering cluster; the number of local time periods is the same as the number of the above-mentioned clustering clusters, and no further elaboration is given here.

[0092] Preferably, in some possible implementations of the embodiments of the present application, the method for obtaining the abnormal possibility includes: Figure 4 , which shows a flow chart of a method for obtaining abnormality possibility provided by an embodiment of the present application, the method comprising:

[0093] Step S401: Determine the output power variation degree of each mutation degree cluster according to the extreme difference of the subsequent power mutation degree at all sampling moments in each mutation degree cluster.

[0094] When the output of the subsequent circuit is abnormal, the corresponding output power change degree will show a large deviation relative to the normal output power change degree; therefore, compared with the case when the output of the subsequent circuit is normal, the numerical span of the subsequent power mutation degree corresponding to the clustering cluster with the prominent degree of output abnormality is larger, that is, the range of the subsequent power mutation degree at all corresponding sampling moments is larger. Therefore, when the output power change degree is greater, the corresponding mutation degree clustering cluster is more likely to be an abnormal clustering cluster.

[0095] Step S402: determining the output power fluctuation degree of each mutation degree cluster according to the standard deviation of the subsequent power mutation degree at all sampling moments in each mutation degree cluster.

[0096] When an output abnormality occurs in the subsequent circuit, the voltage change and current change are usually irregular, so the corresponding output power change degree is usually more chaotic or discrete, that is, when the overall output power change degree in the mutation degree clustering cluster is more chaotic or more discrete, it is more likely to be an abnormal clustering cluster; therefore, the output power fluctuation degree of the mutation degree clustering cluster is determined by characterizing the standard deviation of the discrete degree. The greater the output power fluctuation degree, the more likely the corresponding mutation degree clustering cluster is to be an abnormal clustering cluster. It should be noted that in other possible implementation methods of the embodiments of the present application, information entropy and variance can also be used to replace the standard deviation to determine the output power fluctuation degree of each mutation degree clustering cluster.

[0097] Step S403: Determine the output power instability of each mutation degree cluster according to the output power variation degree and the output power fluctuation degree.

[0098] The greater the output power change and the greater the output power fluctuation, the more likely the corresponding mutation degree cluster is to be an abnormal cluster. The output power instability characterizes the abnormality of each mutation degree cluster from an unstable perspective. Therefore, the output power change and the output power fluctuation are positively correlated with the output power instability.

[0099] In a specific implementation of the embodiment of the present application, the product of the output power variation degree and the output power fluctuation degree is taken as the output power instability; the process of obtaining the output power instability is expressed by the formula: ;in, For the The output power instability of each mutation degree cluster; For the The maximum value of the subsequent power mutation degree at all sampling moments corresponding to the mutation degree clusters; For the The minimum value of the subsequent power mutation degree at all sampling moments corresponding to the mutation degree clustering clusters; therefore, minus Get the first The extreme difference of the power mutation degree of the next stage at all sampling moments corresponding to the mutation degree clusters, that is, The degree of output power change corresponding to each mutation degree cluster; For the The standard deviation of the power mutation degree of the subsequent stage at all sampling moments corresponding to the mutation degree cluster; that is, The output power fluctuation degree corresponding to each mutation degree cluster.

[0100] Step S404: Determine the abnormal possibility of each mutation degree cluster according to the relative magnitude of the output power instability of each mutation degree cluster and the output power instability of the remaining mutation degree clusters.

[0101] The output power instability of each mutation degree cluster is compared with the output power instability of other mutation degree clusters, and the abnormality possibility is characterized according to the relative size of the output instability obtained by the comparison, so that the abnormality possibility of the mutation degree cluster with abnormalities is relatively larger, the robustness is better, and the measurement of the abnormality degree is more accurate.

[0102] In some possible implementations of the embodiments of the present application, the specific implementation process of determining the abnormal possibility of each mutation degree clustering cluster according to the relative size of the output power instability of each mutation degree clustering cluster and the output power instability of the remaining mutation degree clustering clusters in step S404 may include: taking each mutation degree clustering cluster in turn as the target clustering cluster; taking other mutation degree clustering clusters outside the target clustering cluster as comparison clustering clusters of the target clustering cluster; comparing the output power instability of the target clustering cluster with the output instability of each comparison clustering cluster to determine the relative instability of the target clustering cluster with each comparison clustering cluster; wherein, the output power instability of the target clustering cluster is positively correlated with the relative instability; the output instability of the comparison clustering cluster is negatively correlated with the relative instability; taking the normalized value of the mean of the relative instability of the target clustering cluster and all the comparison clustering clusters as the abnormal possibility of the target clustering cluster; the normalization method adopts linear normalization, and the implementer can adjust it according to the specific implementation environment.

[0103] In a specific implementation of the embodiment of the present application, the difference between the relative instability of the target cluster and the relative instability of each comparison cluster is used as the relative instability of the target cluster and each comparison cluster. The greater the output power instability of the target cluster relative to the output power instability of each comparison cluster, the more abnormal the target cluster is, and the greater the corresponding abnormal possibility. The process of obtaining the abnormal possibility is expressed by the formula: ;in, For the The abnormal probability of each mutation degree cluster, For the The number of contrast clusters corresponding to each mutation degree cluster, that is, the total number of mutation degree clusters minus the positive number 1; For the The output power instability corresponding to each mutation degree cluster; For the The mutation degree clusters correspond to The output power instability of the contrast clusters; For the The mutation degree clusters and the corresponding The relative instability of the contrasting clusters; To normalize the function, the normalization method uses linear normalization. The larger the The greater the instability of the output of the mutation degree cluster relative to each comparison cluster in representing the abnormality degree, the greater the corresponding abnormality possibility. Therefore, the average is used to represent the first The instability of individual mutation degree clusters relative to all comparison clusters makes the abnormality probability obtained after normalization more accurate.

[0104] In another specific implementation of the embodiment of the present application, the ratio of the relative instability of the target cluster to the relative instability of each comparison cluster is used as the relative instability of the target cluster and each comparison cluster.

[0105] Preferably, in some possible implementations of the embodiments of the present application, the method for obtaining the degree of sudden change in the front-stage power includes:

[0106] In the front-stage circuit, the degree of change of the front-stage current at each sampling moment is obtained according to the current deviation between each sampling moment and the adjacent sampling moment; in the front-stage circuit, the degree of change of the front-stage voltage at each sampling moment is obtained according to the voltage deviation between each sampling moment and the adjacent sampling moment; the degree of change of the front-stage current and the degree of change of the front-stage voltage are combined to determine the degree of sudden change of the power of the rear stage at each sampling moment. The acquisition process is similar to the following: Figure 3 The process of obtaining the degree of the subsequent power mutation corresponding to step S301 to step S303 is the same and will not be further described here.

[0107] Preferably, in some possible implementations of the embodiments of the present application, the method for obtaining the abnormal clustering cluster includes: taking the mutation degree clustering cluster whose abnormal probability is greater than the preset abnormal threshold as the abnormal clustering cluster. In a specific implementation of the embodiments of the present application, the preset abnormal threshold is set to 0.73, which can be adjusted by the implementer. That is, when the abnormal probability of the mutation degree clustering cluster is greater than 0.73, the corresponding mutation degree clustering cluster is taken as the abnormal clustering cluster, that is, the output of the subsequent circuit at all sampling moments corresponding to the abnormal clustering cluster is abnormal, and it is further necessary to determine the fault location in the IGBT circuit based on the abnormality. In addition, it should be noted that when there is no abnormal clustering cluster, it means that there is no abnormality in the IGBT circuit.

[0108] Preferably, in some possible implementations of the embodiments of the present application, the method for obtaining the possibility of the impact of the previous stage fault includes: Figure 5 , which shows a flow chart of a method for obtaining the possibility of impact of a previous stage fault provided by an embodiment of the present application, the method comprising:

[0109] Step S501: taking all sampling moments corresponding to all abnormal clusters as fault moments; determining a sequence of subsequent power mutation degrees after time-sequential arrangement of subsequent power mutation degrees at all fault moments, and a sequence of preceding power mutation degrees after time-sequential arrangement of preceding power mutation degrees at all fault moments.

[0110] Since the abnormal outputs of the front-stage circuit and the rear-stage circuit are highly consistent or have a certain correlation, it means that the output abnormality of the rear-stage circuit is caused by the fault of the front-stage circuit; therefore, according to the characteristic that the degree of power mutation of the rear-stage circuit can characterize the instantaneous abnormal degree of current and voltage at each moment, combined with the similarity of the temporal correlation between the degree of power mutation of the front-stage circuit and the degree of power mutation of the rear-stage circuit, the correlation or consistency of the abnormal outputs of the front-stage circuit and the rear-stage circuit is measured, so as to determine whether the output abnormality is caused by the fault of the front-stage circuit. The sequence arranged in time order can characterize its corresponding change trend, so the sequence of power mutation degree of the rear-stage circuit and the sequence of power mutation degree of the front-stage circuit are obtained in advance to perform subsequent calculations of similar correlation.

[0111] Step S502: Calculate the DTW distance between the subsequent power mutation degree sequence and the previous power mutation degree sequence by using the DTW algorithm; use the negative correlation mapping value of the DTW distance as the power mutation similarity between the previous circuit and the subsequent circuit at all fault moments.

[0112] According to the Dynamic Time Warping (DTW) algorithm, when the DTW distance between two sequences is calculated by the DTW algorithm, the higher the sequence similarity between the two sequences, the smaller the corresponding DTW; therefore, the greater the power mutation similarity obtained after negative correlation mapping of the DTW distance, the greater the sequence similarity between the subsequent power mutation degree sequence and the previous power mutation degree sequence; that is, the higher the consistency or similarity of the abnormal output of the previous circuit and the subsequent circuit, the greater the possibility of failure of the previous circuit. In another specific implementation of the embodiment of the present application, the cosine similarity between the subsequent power mutation degree sequence and the previous power mutation degree sequence is used as the power mutation similarity between the previous circuit and the subsequent circuit at all fault moments. It should be noted that the DTW algorithm and the calculation method of cosine similarity are both prior arts well known to those skilled in the art, and will not be further elaborated here.

[0113] Step S503: normalizing the absolute value of the covariance between the subsequent power mutation degree sequence and the preceding power mutation degree sequence to obtain the power mutation correlation degree between the preceding circuit and the subsequent circuit at all fault moments.

[0114] According to the characteristics of covariance, when the absolute value of covariance is larger, the correlation of data changes between the subsequent power mutation degree sequence and the previous power mutation degree sequence is larger; therefore, when the power mutation correlation degree obtained according to the normalized value of the absolute value of covariance is larger, the corresponding correlation of abnormal outputs of the previous circuit and the subsequent circuit is larger, and the possibility of failure of the previous circuit is larger. In another specific implementation of the embodiment of the present application, the absolute value of the Pearson correlation coefficient between the subsequent power mutation degree sequence and the previous power mutation degree sequence is used as the power mutation correlation degree between the previous circuit and the subsequent circuit at all fault moments. It should be noted that the calculation method of covariance and Pearson correlation coefficient is a prior art well known to those skilled in the art, and is not further limited or elaborated here.

[0115] Step S504: determining the possibility of the impact of the previous stage fault of the IGBT drive circuit according to the power mutation similarity degree and the power mutation correlation degree.

[0116] The greater the power mutation similarity and the greater the power mutation correlation, the greater the impact of the output abnormality of the subsequent circuit on the fault of the previous circuit, that is, the greater the possibility of the previous circuit failing. Therefore, the possibility of the previous circuit failing is characterized by the possibility of the previous circuit failing. The power mutation similarity and the power mutation correlation are both positively correlated with the possibility of the previous circuit failing.

[0117] In a specific implementation of the embodiment of the present application, the product of the power mutation similarity and the power mutation correlation is used as the possibility of the previous stage fault impact. It should be noted that in other possible implementations of the embodiment of the present application, the average of the sum of the power mutation similarity and the power mutation correlation can also be used as the possibility of the previous stage fault. In a specific implementation of the embodiment of the present application, the process of obtaining the possibility of the previous stage fault impact is expressed by the formula: ;in, The possibility of the impact of the previous stage fault of the IGBT drive circuit; is the sequence of power mutation degree of the previous stage; is the sequence of power mutation degree of the subsequent stage; is the sequence of power mutation degree of the previous stage The sequence of power mutation degree of the next stage The DTW distance between them; is the sequence of power mutation degree of the previous stage The sequence of power mutation degree of the next stage The similarity of power mutation between them; is the sequence of power mutation degree of the previous stage The sequence of power mutation degree of the next stage The covariance between is the absolute value symbol; is the sequence of power mutation degree of the previous stage The sequence of power mutation degree of the next stage The degree of correlation between power mutations; is the normalization function, and the normalization method uses linear normalization; is an exponential function with a natural constant as the base; the power mutation correlation degree and the power mutation similarity degree are combined in the form of a product, which is consistent with the fact that both the power mutation similarity degree and the power mutation correlation degree are positively correlated with the possibility of the impact of the previous stage fault. In another specific implementation of the embodiment of the present application, the inverse replacement exponential function can be used for negative correlation mapping.

[0118] Preferably, in some possible implementations of the embodiments of the present application, the method for detecting the fault position of the IGBT drive circuit according to the possibility of the influence of the previous stage fault includes:

[0119] When the possibility of the impact of the previous stage fault is greater than or equal to the preset impact threshold, the previous stage circuit in the IGBT drive circuit is taken as the fault circuit; when the possibility of the impact of the previous stage fault is less than the preset impact threshold, the subsequent stage circuit in the IGBT drive circuit is taken as the fault circuit. In a specific implementation of the embodiment of the present application, the preset impact threshold is set to 0.6. The implementer can adjust it according to the specific implementation environment; that is, when the calculated possibility of the impact of the previous stage fault is less than 0.6, the IGBT drive circuit fails in the subsequent stage circuit, and the possibility that the abnormal output of the subsequent stage circuit is affected by the previous stage fault is small; when the calculated possibility of the impact of the previous stage fault is greater than 0.6, it means that the possibility that the previous stage circuit fault causes the subsequent stage circuit to have an abnormal output is large, that is, the IGBT drive circuit fails in the previous stage circuit.

[0120] Furthermore, the fault data and fault location of the IGBT drive circuit are sent to the maintenance personnel of the power electronic equipment to assist in the specific maintenance of the power electronic equipment, wherein the fault data is the current data and voltage data collected at the IGBT fault location. In summary, the fault detection method for key equipment in electrical engineering first obtains the degree of post-stage power mutation that characterizes the instantaneous abnormality according to the time series changes of the current and voltage output by the post-stage circuit; after obtaining the mutation degree clustering clusters that characterize each time period, the abnormal clustering clusters that characterize the output abnormality of the post-stage circuit are screened out according to the change range and discreteness of the post-stage power mutation degree in each mutation degree clustering cluster; according to the similarity of the correlation between the previous stage power mutation degree and the post-stage power mutation degree at the sampling moment corresponding to the abnormal clustering cluster, it is judged whether the output abnormality of the post-stage circuit is affected by the previous stage, so as to more accurately detect the fault location of the IGBT drive circuit.

[0121] The present application also provides a fault detection system for key equipment in electrical engineering. Figure 6 , which shows a structural diagram of a fault detection system for key equipment in electrical engineering provided by an embodiment of the present application, the system comprising: an electrical variable acquisition module 601, a post-stage power mutation degree calculation module 602, an abnormality screening module 603 and a fault detection module 604.

[0122] The electric variable acquisition module 601 is used to acquire the current and voltage output by the front-stage circuit and the current and voltage output by the rear-stage circuit of the IGBT driving circuit at each sampling moment through a sensor;

[0123] The post-stage power mutation degree calculation module 602 is used to obtain the post-stage power mutation degree of the post-stage circuit at each sampling time according to the current timing change of the post-stage circuit in the IGBT drive circuit and the voltage timing change of the post-stage circuit;

[0124] The abnormal screening module 603 is used to perform cluster analysis on the degree of post-stage power mutation of the post-stage circuit at all sampling moments to obtain at least two mutation degree clustering clusters; obtain the abnormal possibility of each mutation degree clustering cluster according to the variation range and discrete degree of the post-stage power mutation degree in each mutation degree clustering cluster; and screen out the abnormal clustering clusters among all mutation degree clustering clusters according to the abnormal possibility;

[0125] The fault detection module 604 is used to determine the degree of power mutation of the previous stage circuit at each sampling moment according to the method for obtaining the degree of power mutation of the subsequent stage; in all sampling moments corresponding to the abnormal clustering clusters, according to the similarity of the timing correlation between the degree of power mutation of the subsequent stage and the degree of power mutation of the previous stage, obtain the possibility of the influence of the previous stage fault of the IGBT drive circuit; according to the possibility of the influence of the previous stage fault, detect the fault position of the IGBT drive circuit, and perform fault repair of the power electronic equipment according to the fault position obtained by the detection.

[0126] It should be noted that the system provided in the above embodiment is only illustrated by the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the computer device is divided into different functional modules to complete all or part of the functions described above. In addition, the fault detection system for key equipment in electrical engineering provided in the above embodiment and the fault detection method embodiment for key equipment in electrical engineering belong to the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0127] The present application also provides a computer device. Figure 7 , which shows a schematic diagram of the structure of a computer device provided by an embodiment of the present application, the computer device includes a memory 701, a processor 702, and a computer program 703 stored in the memory 701 and running on the processor 702, wherein when the processor 702 executes the computer program 703, the computer device can execute any of the above-mentioned fault detection methods for key equipment in electrical engineering.

[0128] The embodiment of the present application also provides a computer program product. When the computer program product is run on a computer device, the computer device can execute any of the above-mentioned fault detection methods for key equipment in electrical engineering.

[0129] An embodiment of the present application also provides a computer-readable storage medium, in which a computer program code is stored. When the computer program code is executed on a computer device, the computer device can execute any of the above-mentioned fault detection methods for key equipment in electrical engineering.

[0130] In the embodiments provided in the present application, it should be understood that the provided computer device, computer program product and computer-readable storage medium are all used to execute the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the methods provided above and will not be repeated here.

[0131] It should be noted that the sequence of the above embodiments of the present application is only for description and does not represent the advantages and disadvantages of the embodiments. The processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0132] The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments.

Claims

1. A fault detection method for key equipment in electrical engineering, characterized in that: The method comprises: The current and voltage output by the front-stage circuit of the IGBT driving circuit at each sampling moment and the current and voltage output by the rear-stage circuit are collected by the sensor; According to the current timing change of the subsequent circuit in the IGBT driving circuit and the voltage timing change of the subsequent circuit, the subsequent power mutation degree of the subsequent circuit at each sampling time is obtained; Performing cluster analysis on the degree of post-stage power mutation of the post-stage circuit at all sampling moments to obtain at least two mutation degree clustering clusters; obtaining the abnormal possibility of each mutation degree clustering cluster according to the variation range and discrete degree of the post-stage power mutation degree in each mutation degree clustering cluster; and screening out abnormal clustering clusters among all mutation degree clustering clusters according to the abnormal possibility; Determine the degree of power mutation of the front stage circuit at each sampling moment; obtain the possibility of the influence of the front stage fault of the IGBT drive circuit according to the similarity of the timing correlation between the power mutation degree of the rear stage and the power mutation degree of the front stage in all sampling moments corresponding to the abnormal clustering cluster; detect the fault position of the IGBT drive circuit according to the possibility of the influence of the front stage fault, and perform fault repair of the power electronic equipment according to the fault position obtained by the detection; The method for obtaining the possibility of the impact of the previous stage fault includes: All sampling moments corresponding to all abnormal clusters are regarded as fault moments; Determine a sequence of subsequent power mutation levels after the subsequent power mutation levels at all fault moments are arranged in time sequence, and a sequence of preceding power mutation levels after the preceding power mutation levels at all fault moments are arranged in time sequence; Calculating the DTW distance between the subsequent power mutation degree sequence and the previous power mutation degree sequence by the DTW algorithm; using the negative correlation mapping value of the DTW distance as the power mutation similarity between the previous circuit and the subsequent circuit at all fault moments; Normalizing the absolute value of the covariance between the subsequent power mutation degree sequence and the preceding power mutation degree sequence to obtain the power mutation correlation degree between the preceding circuit and the subsequent circuit at all fault moments; Determine the possibility of influence of the previous stage fault of the IGBT drive circuit according to the power mutation similarity degree and the power mutation correlation degree; the power mutation similarity degree and the power mutation correlation degree are both positively correlated with the possibility of influence of the previous stage fault; The method for detecting the fault position of the IGBT drive circuit according to the possibility of the influence of the previous stage fault includes: When the possibility of the impact of the previous stage fault is greater than or equal to the preset impact threshold, the previous stage circuit in the IGBT drive circuit is regarded as a fault circuit; when the possibility of the impact of the previous stage fault is less than the preset impact threshold, the subsequent stage circuit in the IGBT drive circuit is regarded as a fault circuit.

2. The fault detection method for key equipment in electrical engineering according to claim 1, characterized in that: The method for obtaining the degree of the subsequent power mutation includes: In the subsequent circuit, the degree of change of the subsequent current at each sampling moment is obtained according to the current deviation between each sampling moment and the adjacent sampling moment; In the subsequent circuit, the voltage variation degree of the subsequent voltage at each sampling moment is obtained according to the voltage deviation between each sampling moment and the adjacent sampling moment; The degree of change of the rear-stage current and the degree of change of the rear-stage voltage are integrated to determine the degree of sudden change of the rear-stage power at each sampling moment; wherein the degree of change of the rear-stage current and the degree of change of the rear-stage voltage are both positively correlated with the degree of sudden change of the rear-stage power.

3. The fault detection method for key equipment in electrical engineering according to claim 1, characterized in that: The method for obtaining the mutation degree clusters comprises: In a coordinate system having a sampling time dimension and a subsequent power mutation degree dimension corresponding to each sampling time, obtaining a reference data coordinate point corresponding to the subsequent power mutation degree at each sampling time; At least two mutation degree clusters are determined by cluster analysis method based on all reference data coordinate points.

4. The fault detection method for key equipment in electrical engineering according to claim 1, characterized in that: The method for obtaining the abnormal possibility includes: According to the extreme difference of the degree of mutation of the rear-stage power at all sampling moments in each mutation degree clustering cluster, the degree of change of the output power of each mutation degree clustering cluster is determined; according to the standard deviation of the degree of mutation of the rear-stage power at all sampling moments in each mutation degree clustering cluster, the degree of fluctuation of the output power of each mutation degree clustering cluster is determined; Determine the output power instability of each mutation degree cluster according to the output power variation degree and the output power fluctuation degree; wherein the output power variation degree and the output power fluctuation degree are both positively correlated with the output power instability; According to the relative size of the output power instability of each mutation degree cluster and the output power instability of the other mutation degree clusters, the abnormal possibility of each mutation degree cluster is determined.

5. The fault detection method for key equipment in electrical engineering according to claim 4, characterized in that: The method for determining the abnormal possibility of each mutation degree clustering cluster according to the relative magnitude of the output power instability of each mutation degree clustering cluster and the output power instability of the remaining mutation degree clustering clusters includes: Each mutation degree cluster is used as the target cluster in turn; other mutation degree clusters outside the target cluster are used as comparison clusters of the target cluster; Comparing the output power instability of the target cluster with the output instability of each comparison cluster to determine the relative instability of the target cluster and each comparison cluster; wherein the output power instability of the target cluster is positively correlated with the relative instability; and the output instability of the comparison cluster is negatively correlated with the relative instability; The normalized value of the mean of the relative instability between the target cluster and all the comparison clusters is used as the abnormal possibility of the target cluster.

6. The fault detection method for key equipment in electrical engineering according to claim 1, characterized in that: The method for obtaining the abnormal clustering clusters includes: The mutation degree clusters whose abnormal probability is greater than the preset abnormal threshold are clustered as abnormal clusters.

7. The fault detection method for key equipment in electrical engineering according to claim 1, characterized in that: The method for obtaining the degree of sudden change of the front-stage power includes: In the front stage circuit, the degree of change of the front stage current at each sampling moment is obtained according to the current deviation between each sampling moment and the adjacent sampling moment; In the front stage circuit, the voltage variation degree of the front stage at each sampling moment is obtained according to the voltage deviation between each sampling moment and the adjacent sampling moment; The degree of change of the front-stage current and the degree of change of the front-stage voltage are combined to determine the degree of sudden change of the rear-stage power at each sampling moment.

8. A fault detection system for key equipment in electrical engineering, characterized in that: The system comprises: The electric variable acquisition module is used to acquire the current and voltage output by the front-stage circuit of the IGBT drive circuit at each sampling moment, as well as the current and voltage output by the rear-stage circuit through a sensor; The post-stage power mutation degree calculation module is used to obtain the post-stage power mutation degree of the post-stage circuit at each sampling time according to the current timing change of the post-stage circuit in the IGBT drive circuit and the voltage timing change of the post-stage circuit; The abnormal screening module is used to perform cluster analysis on the degree of post-stage power mutation of the post-stage circuit at all sampling moments to obtain at least two mutation degree clustering clusters; obtain the abnormal possibility of each mutation degree clustering cluster according to the variation range and discrete degree of the post-stage power mutation degree in each mutation degree clustering cluster; and screen out abnormal clustering clusters among all mutation degree clustering clusters according to the abnormal possibility; A fault detection module is used to determine the degree of mutation of the front-stage power of the front-stage circuit at each sampling moment according to the method for obtaining the degree of mutation of the rear-stage power; obtain the possibility of the influence of the front-stage fault of the IGBT drive circuit according to the similarity of the timing correlation between the degree of mutation of the rear-stage power and the degree of mutation of the front-stage power in all sampling moments corresponding to the abnormal clustering clusters; detect the fault position of the IGBT drive circuit according to the possibility of the influence of the front-stage fault, and perform fault repair of the power electronic equipment according to the fault position obtained by the detection; The method for obtaining the possibility of the impact of the previous stage fault includes: All sampling moments corresponding to all abnormal clusters are regarded as fault moments; Determine a sequence of subsequent power mutation levels after the subsequent power mutation levels at all fault moments are arranged in time sequence, and a sequence of preceding power mutation levels after the preceding power mutation levels at all fault moments are arranged in time sequence; Calculating the DTW distance between the subsequent power mutation degree sequence and the previous power mutation degree sequence by the DTW algorithm; using the negative correlation mapping value of the DTW distance as the power mutation similarity between the previous circuit and the subsequent circuit at all fault moments; Normalizing the absolute value of the covariance between the subsequent power mutation degree sequence and the preceding power mutation degree sequence to obtain the power mutation correlation degree between the preceding circuit and the subsequent circuit at all fault moments; Determine the possibility of influence of the previous stage fault of the IGBT drive circuit according to the power mutation similarity degree and the power mutation correlation degree; the power mutation similarity degree and the power mutation correlation degree are both positively correlated with the possibility of influence of the previous stage fault; The method for detecting the fault position of the IGBT drive circuit according to the possibility of the influence of the previous stage fault includes: When the possibility of the impact of the previous stage fault is greater than or equal to the preset impact threshold, the previous stage circuit in the IGBT drive circuit is regarded as a fault circuit; when the possibility of the impact of the previous stage fault is less than the preset impact threshold, the subsequent stage circuit in the IGBT drive circuit is regarded as a fault circuit.

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