Microprocessor starting method and device and computer equipment
Reading the system startup program from Flash through the Flash controller solves the problem that the MCU system cannot flexibly select flash chips from different manufacturers in the existing technology, and realizes ROM-free design, reduces costs and improves system flexibility.
Patent Information
- Application Number
- CN202411306338.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2025-01-07
AI Technical Summary
The existing microprocessor system loading methods require on-chip read-only memory (ROM) to store boot programs, resulting in the inability to flexibly select flash chips from different manufacturers, and lack of MCU system startup methods that apply flash from different manufacturers.
Read the system startup program from Flash through the Flash controller, use the configuration area to obtain configuration information to generate instruction information, access the program area to obtain the system startup program, and realize the startup of the MCU system. It does not require the use of on-chip ROM, and can adapt to different types of flash chip.
Simplify MCU chip design, reduce costs, improve system flexibility, and allow different types of flash chips to be configured according to requirements.
Smart Images

Figure CN119271283A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of microcontrollers, and in particular to a method and device for starting a microprocessor and a computer device. Background Art
[0002] At present, the system loading method of microprocessor (Micro Control Unit, MCU) generally uses the on-chip bootloader to load the system. When the MCU starts, the bootloader executes the bootloader, reads the system program from the on-chip or off-chip flash, and stores it in the on-chip instruction buffer or executes it directly.
[0003] However, the drawbacks of this method are: first, the MCU chip needs to have an on-chip read-only memory (ROM) to store and execute the boot program. Second, since the ROM cannot be modified, the MCU can usually only read a specified type of on-chip flash or off-chip flash. This results in the MCU chip being unable to flexibly select flash chips from different manufacturers.
[0004] Therefore, the prior art lacks an MCU system startup method applicable to flash memories of different manufacturers. Summary of the invention
[0005] Based on this, it is necessary to provide a system loading method, device, computer equipment and storage medium for microprocessors that can be applicable to flash chips from different manufacturers in order to solve the above technical problems.
[0006] In a first aspect, the present application provides a microprocessor startup method, which is applied to a microprocessor MCU, and the method comprises:
[0007] In response to the MCU startup command, control the Flash controller to read the system startup program from the Flash;
[0008] Obtain the system startup program read by the Flash controller and execute the system startup program to start the MCU system.
[0009] In one embodiment, controlling the Flash controller to read the system startup program from the Flash includes:
[0010] A startup command is sent to the Flash controller via the command bus to instruct the Flash controller to read the system startup program from the Flash via the basic read command; the basic read command is stored in a storage unit connected to the Flash controller.
[0011] In one embodiment, the Flash includes a configuration area and a program area, and the Flash controller reads a system startup program from the Flash, including:
[0012] The Flash controller reads the configuration information of the Flash in the configuration area;
[0013] The Flash controller generates instruction information according to the configuration information, and accesses the program area through the instruction information to obtain the system startup program from the program area.
[0014] In one embodiment, obtaining a system startup program read by a Flash controller includes:
[0015] Get the system boot program from the Flash controller through the command bus; or,
[0016] The system startup program read by the Flash controller is obtained from the instruction cache area. The system startup program in the instruction cache area is stored by the Flash controller.
[0017] In a second aspect, the present application provides a microprocessor startup system, the startup system comprising: a microprocessor MCU, a Flash controller and Flash; the MCU is connected to the Flash via the Flash controller;
[0018] The MCU is used to respond to the MCU startup command, control the Flash controller to read the system startup program from the Flash, obtain the system startup program read by the Flash controller, and execute the system startup program to start the MCU system.
[0019] In one embodiment, the startup system further includes an instruction cache area and a storage unit; the storage unit is connected to the Flash controller, and the instruction storage area is connected to the Flash controller and the MCU respectively;
[0020] Instruction cache area, used to store instructions read from the Flash by the Flash controller;
[0021] The storage unit is used to store the factory parameters of the MCU, which include the basic read instructions for reading the Flash.
[0022] In one of the embodiments, the Flash controller includes an instruction bus interface, a register read / write interface, a program cache interface, a controller state machine, and a Flash read / write interface; the Flash controller is connected to the MCU through the instruction bus interface, the Flash controller is connected to the storage unit through the register read / write interface, the Flash controller is connected to the instruction cache area through the program cache interface, and the Flash controller is connected to the Flash through the Flash read / write interface.
[0023] In one of the embodiments, the Flash includes a configuration area and a program area;
[0024] Configuration area, used to store Flash configuration information;
[0025] Program area, used to store the MCU's system startup program.
[0026] In a third aspect, the present application further provides a microprocessor startup device, which is applied to an MCU, and the device comprises:
[0027] The control module is used to respond to the startup command of the MCU and control the Flash controller to read the system startup program from the Flash;
[0028] The startup module is used to obtain the system startup program read by the Flash controller and execute the system startup program to start the MCU system.
[0029] In a third aspect, the present application further provides a computer device, which includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method in any one of the embodiments of the first aspect when executing the computer program.
[0030] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method in any one of the embodiments of the first aspect.
[0031] In a fifth aspect, the present application further provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the steps of the method in any one of the embodiments of the first aspect are implemented.
[0032] The above-mentioned microprocessor startup method, device and computer equipment can simplify the MCU chip design, without the need to use on-chip ROM, thereby reducing chip costs. The MCU chip can adaptively read system instructions from different flashes to execute through the Flash controller, so that the MCU chip can configure different types of flash according to system requirements to reduce system costs and improve the flexibility of system implementation. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 is a schematic diagram of the structure of a startup system of a microprocessor in one embodiment;
[0034] Figure 2 is a schematic structural diagram of a microprocessor startup system in another embodiment;
[0035] Figure 3 is a schematic structural diagram of a microprocessor startup system in another embodiment;
[0036] Figure 4 is a schematic structural diagram of a microprocessor startup system in another embodiment;
[0037] Figure 5 A schematic flow chart of a method for starting a microprocessor in one embodiment;
[0038] Figure 6 is a flow chart of a method for starting a microprocessor in another embodiment;
[0039] Figure 7 is a flow chart of a method for starting a microprocessor in another embodiment;
[0040] Figure 8 is a structural block diagram of a microprocessor startup device in one embodiment;
[0041] Fig. 9 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment.
[0042] Description of reference numerals:
[0043] 100. microprocessor startup system; 101. MCU; 102. Flash controller; 103. Flash;
[0044] 201, instruction cache area; 202, storage unit;
[0045] 301, instruction bus interface; 302, register read and write interface; 303 program cache interface; 304, controller state machine; 305, Flash read and write interface;
[0046] 401, configuration area; 402, program area. DETAILED DESCRIPTION
[0047] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0048] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "connection" and "attachment" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present application can be understood according to specific circumstances.
[0049] In an exemplary embodiment, the present application provides a microprocessor startup system, such as Figure 1 As shown, the boot system 100 includes: MCU 101, Flash controller 102 and Flash 103; MCU 101 is connected to Flash 103 through Flash controller 102. MCU 101 is used to respond to the MCU boot command, control Flash controller 102 to read the system boot program from Flash 103; and obtain the system boot program read by Flash controller 102, execute the system boot program, so as to boot the MCU system.
[0050] The Flash controller is a non-volatile memory (flash) controller. Flash is an on-chip or off-chip flash. The MCU communicates with the Flash through the Flash controller.
[0051] When the MCU chip is started, the Flash controller can directly read the Flash instructions and transmit them back to the MCU, so that the MCU can start the system.
[0052] In this embodiment, after the MCU is started, the MCU does not read the system startup program directly from the Flash, but configures the Flash controller and waits for the Flash controller to read the system startup program in the Flash, so that the MCU chip does not need to configure ROM to store the boot program (startup program), and the MCU can directly read the Flash of different manufacturers to load the MCU system.
[0053] In an exemplary embodiment, Figure 2 As shown, the boot system 100 further includes an instruction cache area 201 and a storage unit 202; the storage unit 202 is connected to the Flash controller 102, and the instruction storage area 201 is connected to the Flash controller 102 and the MCU 101 respectively.
[0054] The instruction cache area 201 is used to store instructions read by the Flash controller 102 from the Flash 103 ; the storage unit 202 is used to store the factory parameters of the MCU 101 , and the factory parameters include basic read instructions for reading the Flash 103 .
[0055] Usually, the Flash used to store instruction data is a non-volatile storage (NOR) type Flash. Currently, there are standards that specify some instructions for this type of Flash. For example, basic instructions for reading Flash. Therefore, the Flash controller can directly access the Flash using the specified basic read instructions to read the relevant information of the Flash. Considering that different Flash may also have different read instructions, the most basic instructions for reading Flash can be stored in the storage unit of the chip. Generally, the chip will be configured with a storage unit to save the factory parameters of the chip, and the factory parameters include basic read instructions for reading Flash. The system startup program read by the Flash controller from the Flash can be directly transmitted back to the MCU to start the system, or stored in the instruction buffer, and then the MCU reads the instructions in the instruction buffer to start the system.
[0056] The storage unit may be an electronic fuse (Electronic Fuse, EFUSE) or a one-time programmable memory (One-Time Programmable Memory, OTP).
[0057] Therefore, after the Flash controller reads the system startup program from the Flash, it can directly transmit it back to the MCU, or it can store the system startup program in the instruction buffer. After the MCU reads the system startup program in the instruction buffer, it executes the system startup program to start the MCU system.
[0058] In an exemplary embodiment, Figure 3 As shown, the Flash controller 102 includes an instruction bus interface 301, a register read / write interface 302, a program cache interface 303, a controller state machine 304, and a Flash read / write interface 305; the Flash controller 102 is connected to the MCU 101 through the instruction bus interface 301, the Flash controller 102 is connected to the storage unit 202 through the register read / write interface 302, the Flash controller 102 is connected to the instruction cache area 201 through the program cache interface 303, and the Flash controller 102 is connected to the Flash 103 through the Flash read / write interface 305.
[0059] The Flash controller can be divided into an instruction bus interface, a register read / write interface, an optional program cache interface, a controller state machine, and a Flash read / write interface.
[0060] The instruction bus interface is used to receive the read instruction of the MCU and read the instruction program in the Flash through the state machine; the register interface is used to configure the control or status register of the Flash controller. At the same time, through the register read and write interface, the MCU can also fully control the Flash to perform operations such as reading, erasing and writing. The optional program cache interface allows the Flash controller to automatically read the system program in the Flash and store it in the instruction cache area of the chip when the chip is started. In this way, after the MCU is started, it can directly read the system startup program in the instruction cache area to execute. Since the instruction cache area is generally implemented by the static random access memory (SRAM) on the chip, the MCU can directly access it at high speed, thereby improving the operating efficiency of the system. Relatively speaking, the speed of the MCU directly reading the Flash through the instruction bus is relatively slow and inefficient. In addition, through the program cache interface, the Flash controller can also dynamically load the program into the specified cache area to improve the instruction reading efficiency of the MCU. In this way, the size of the instruction cache area can be much smaller than the size of the system and application program, thereby reducing the chip cost.
[0061] In an exemplary embodiment, Figure 4 As shown, Flash 103 includes a configuration area 401 and a program area 402 ; the configuration area 401 is used to store configuration information of Flash 103 ; and the program area 402 is used to store a system startup program of MCU 101 .
[0062] When the MCU chip starts, the MCU does not directly read the system program of the Flash, but waits for the Flash controller to read the configuration information of the Flash before reading it. Because different Flashes define different status registers, address management methods, etc., their access instructions are also different. The Flash controller does not initially have enough Flash information to read the Flash content according to the instructions of the MCU. Therefore, this embodiment divides the Flash into two areas, one is the configuration area and the other is the program area. The configuration area is specifically used to store configuration information such as the instruction format and usage of the Flash. The program area is used to store system and user programs, and can also be used to store user data.
[0063] When the MCU chip starts, the Flash controller first accesses the Flash configuration area through the basic read instruction and reads all the configuration information. In this way, the Flash obtains enough instruction information to flexibly access the Flash program area. Generally speaking, the basic read instruction is defined by the Flash standard and can be directly implemented in the Flash controller. Considering the more efficient reading of the Flash configuration area in the future, this read and write instruction can be stored in the chip's storage unit.
[0064] It can be understood that the design of each structure in the microprocessor startup system in the above embodiment is only one example of achieving the technical effect of the present application. In practical applications, it can also be adaptively modified to achieve easily conceivable technical effects. The embodiment of the present application does not limit its structure.
[0065] Next, the startup method of the microprocessor provided in the embodiments of the present application is described. The startup method of the microprocessor in the embodiments of the present application is described based on a startup system applied to the microprocessor and the microprocessor is used as the execution subject.
[0066] In an exemplary embodiment, Figure 5 As shown, a microprocessor startup method is provided, which is applied to a microprocessor MCU, and the method comprises the following steps:
[0067] S501, in response to the MCU startup command, controlling the Flash controller to read the system startup program from the Flash.
[0068] The MCU startup command may be that the MCU is powered on, or that a start button of the MCU is triggered.
[0069] For example, when a start button of the MCU is triggered, it means that the MCU has received an MCU start instruction. After the MCU receives the start instruction, the Flash controller can be controlled to read a system start program from the Flash.
[0070] Optionally, the manner in which the MCU controls the Flash controller to read the system startup program from the Flash may be that the MCU sends a program read instruction to the Flash controller, so that the Flash controller reads the system startup program from the Flash.
[0071] In an exemplary embodiment, controlling the Flash controller to read the system startup program from the Flash includes: sending a startup command to the Flash controller through an instruction bus to instruct the Flash controller to read the system startup program from the Flash through a basic read instruction; the basic read instruction is stored in a storage unit connected to the Flash controller.
[0072] The MCU accesses the FLash controller through the instruction bus. The FLash controller is used to control the reading and writing of on-chip or off-chip Flash. The FLash controller accesses the off-chip FLash through the off-chip FLash access bus. The off-chip Flash access bus can use a serial communication protocol (Serial Peripheral Interface, SPI) type bus to reduce the number of pins, for example, dual serial peripheral interface (Dual SPI, DSPI), quad serial peripheral interface (Quad SPI, QSPI), etc.
[0073] Among them, Flash includes configuration area and program area, such as Figure 6 As shown in the figure, the Flash controller reads the system startup program from the Flash, including the following steps:
[0074] S601: The Flash controller reads the configuration information of the Flash in the configuration area.
[0075] S602, the Flash controller generates instruction information according to the configuration information, and accesses the program area through the instruction information to obtain the system startup program from the program area.
[0076] The configuration area of FLash stores configuration information such as the instruction format and usage of Flash, and the program area stores system and user programs, etc.; therefore, when the Flash controller obtains the system startup program of the MCU from the Flash, it first reads the configuration information of the Flash from the configuration area, then generates instruction information based on the configuration information, accesses the program area of FLash through the instruction information, and reads the system startup program of the MCU from the program area.
[0077] S502, obtaining a system startup program read by the Flash controller, and executing the system startup program to start the MCU system.
[0078] Acquiring the system startup program read by the Flash controller includes: acquiring the system startup program from the Flash controller through an instruction bus; or acquiring the system startup program read by the Flash controller from an instruction cache, where the system startup program in the instruction cache is stored in the Flash controller.
[0079] Specifically, after the Flash controller reads the system startup program of the MCU stored in the Flash, the Flash controller can directly transmit the system startup program back to the MCU through the instruction bus, that is, the MCU can directly receive the system startup instruction sent by the Flash controller, and execute the system startup instruction to load the MCU system to start the MCU system; or, after the Flash controller reads the system startup program of the MCU stored in the Flash, the Flash controller can also store the system startup program in the instruction cache area, the MCU obtains the system startup program by accessing the instruction cache area, and then executes the system startup instruction to load the MCU system to start the MCU system.
[0080] In an exemplary embodiment, Figure 7 As shown, the present application also provides a microprocessor startup system, which includes a microprocessor unit, a Flash controller, an on-chip or off-chip Flash, an optional instruction cache, and EFUSE or OTP. After the MCU chip is started, the flash controller directly reads the flash instruction and transmits it back to the MCU to start the system, or stores it in the instruction buffer, and then the MCU reads the instruction in the instruction cache to start the system.
[0081] This application can simplify the MCU chip design, eliminating the need for on-chip ROM, thereby reducing chip costs. The MCU chip can adaptively read system instructions from different flashes for execution, so that the MCU chip can be configured with different types of flash according to system requirements to reduce system costs and improve system implementation flexibility.
[0082] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.
[0083] Based on the same inventive concept, the embodiment of the present application also provides a microprocessor startup device for implementing the above-mentioned microprocessor startup method. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above-mentioned method, so the specific limitations in the embodiments of the startup device of one or more microprocessors provided below can refer to the limitations of the microprocessor startup method above, and will not be repeated here.
[0084] In one embodiment, Figure 8 As shown, a microprocessor startup device 800 is provided, which is applied to MCU and includes: a control module 801 and a startup module 802, wherein:
[0085] The control module 801 is used to respond to the startup command of the MCU and control the Flash controller to read the system startup program from the Flash;
[0086] The startup module 802 is used to obtain the system startup program read by the Flash controller and execute the system startup program to start the MCU system.
[0087] In an exemplary embodiment, the control module 801 is specifically used to send a startup command to the Flash controller through the command bus to instruct the Flash controller to read the system startup program from the Flash through the basic read instruction; the basic read instruction is stored in a storage unit connected to the Flash controller.
[0088] In an exemplary embodiment, the Flash includes a configuration area and a program area, and the control module 801 is specifically used to control the Flash controller to read the configuration information of the Flash in the configuration area; and control the Flash controller to generate instruction information according to the configuration information, and access the program area through the instruction information to obtain the system startup program from the program area.
[0089] In an exemplary embodiment, the startup module 802 is specifically used to obtain the system startup program from the Flash controller through the instruction bus; or, obtain the system startup program read by the Flash controller from the instruction cache, and the system startup program in the instruction cache is stored in the Flash controller.
[0090] Each module in the startup device of the above-mentioned microprocessor can be implemented in whole or in part by software, hardware or a combination thereof. Each of the above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.
[0091] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Fig. 9 As shown. The computer device includes a processor, a memory and a network interface connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the startup data of the microprocessor. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a startup method of a microprocessor is implemented.
[0092] Those skilled in the art will understand that Fig. 9 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.
[0093] In one embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the technical solution of the microprocessor startup method provided in any of the following embodiments is implemented.
[0094] The above embodiment provides a computer device, whose implementation principle and technical effect are similar to those of the above method embodiment, and will not be repeated here.
[0095] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the technical solution of the microprocessor startup method provided in any of the above embodiments is implemented.
[0096] The above embodiment provides a computer-readable storage medium, whose implementation principle and technical effect are similar to those of the above method embodiment, and will not be repeated here.
[0097] In one embodiment, a computer program product is provided, including a computer program, which, when executed by a processor, implements the technical solution of the microprocessor startup method provided in any of the above embodiments.
[0098] The above embodiment provides a computer program product, whose implementation principle and technical effect are similar to those of the above method embodiment, and will not be repeated here.
[0099] It should be noted that the data involved in this application (including but not limited to data used for analysis, stored data, displayed data, etc.) are all information and data authorized by the user or fully authorized by all parties.
[0100] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.
[0101] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0102] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. A method for starting a microprocessor, characterized in that: Applied to a microprocessor MCU, the method comprises: In response to the MCU startup command, control the Flash controller to read the system startup program from the Flash; The system startup program read by the Flash controller is obtained, and the system startup program is executed to start the MCU system.
2. The method according to claim 1, characterized in that The controlling the Flash controller to read the system startup program from the Flash includes: The startup command is sent to the Flash controller via the command bus to instruct the Flash controller to read the system startup program from the Flash via the basic read instruction; the basic read instruction is stored in a storage unit connected to the Flash controller.
3. The method according to claim 1 or 2, characterized in that: The Flash includes a configuration area and a program area, and the Flash controller reads a system startup program from the Flash, including: The Flash controller reads the configuration information of the Flash in the configuration area; The Flash controller generates instruction information according to the configuration information, and accesses the program area through the instruction information to obtain the system startup program from the program area.
4. The method according to claim 1 or 2, characterized in that: The obtaining of the system startup program read by the Flash controller includes: Obtain the system startup program from the Flash controller via the instruction bus; or, The system startup program read by the Flash controller is obtained from the instruction cache area, and the system startup program in the instruction cache area is stored in the Flash controller.
5. A microprocessor startup system, characterized in that: The startup system includes: a microprocessor MCU, a Flash controller and Flash; the MCU is connected to the Flash through the Flash controller; The MCU is used to respond to the MCU startup command, control the Flash controller to read the system startup program from the Flash; and obtain the system startup program read by the Flash controller, and execute the system startup program to start the MCU system.
6. The system according to claim 5, characterized in that The startup system further includes an instruction cache area and a storage unit; the storage unit is connected to the Flash controller, and the instruction storage area is connected to the Flash controller and the MCU respectively; The instruction cache is used to store instructions read from the Flash by the Flash controller; The storage unit is used to store the factory parameters of the MCU, and the factory parameters include basic read instructions for reading Flash.
7. The system according to claim 6, characterized in that The Flash controller includes an instruction bus interface, a register read-write interface, a program cache interface, a controller state machine, and a Flash read-write interface; the Flash controller is connected to the MCU through the instruction bus interface, the Flash controller is connected to the storage unit through the register read-write interface, the Flash controller is connected to the instruction cache area through the program cache interface, and the Flash controller is connected to the Flash through the Flash read-write interface.
8. The system according to claim 5, characterized in that The Flash includes a configuration area and a program area; The configuration area is used to store the configuration information of the Flash; The program area is used to store the system startup program of the MCU.
9. A microprocessor startup device, characterized in that: Applied to a microprocessor MCU, the device comprises: The control module is used to respond to the startup command of the MCU and control the Flash controller to read the system startup program from the Flash; The startup module is used to obtain the system startup program read by the Flash controller and execute the system startup program to start the MCU system.
10. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 4 are implemented.