Pixel circuit, control method thereof and display panel

Abstract

The invention provides a pixel circuit, a control method thereof and a display panel, and relates to the technical field of electronic equipment, a control sub-circuit is additionally arranged between a driving sub-circuit of the pixel circuit and an anode of a light-emitting device, so that in the process of carrying out threshold voltage compensation on each node coupled with the driving sub-circuit, the threshold voltage of each node is compensated; therefore, the control sub-circuit can be utilized to separate the driving sub-circuit from the anode of the light-emitting device, so that the voltage for threshold voltage compensation does not continue to flow to the anode of the light-emitting device to cause an electric leakage phenomenon, the effect of threshold voltage compensation on each node coupled to the driving sub-circuit can be ensured, and the reliability of the light-emitting device is improved. Therefore, the light leakage problem of the sub-pixel when the driving sub-circuit drives the light-emitting device to emit light is improved, and the brightness uniformity of the sub-pixel when the display panel displays the sub-pixel is further improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of electronic devices, and in particular to a pixel circuit and a control method thereof, and a display panel. Background Art

[0002] With the rapid development of electronic equipment technology, users' pursuit of electronic equipment screen display effects is also constantly improving. However, in the related art, when the display panel of the electronic device is performing image refresh display, there is still a problem of poor uniformity of sub-pixel display brightness. Therefore, how to design a new type of pixel circuit to improve the uniformity of sub-pixel display brightness has become a technical problem to be solved in the field of electronic equipment technology. Summary of the invention

[0003] The embodiments of the present application provide a pixel circuit and a control method thereof, and a display panel, aiming to improve the uniformity of display brightness of sub-pixels.

[0004] To achieve the above-mentioned purpose, the embodiment of the present application adopts the following technical solution: by adding a control circuit between the driving subcircuit of the pixel circuit and the first pole of the light-emitting device of the display panel, and using the control circuit to separate the driving circuit from the first pole of the light-emitting device during the compensation stage within a frame cycle, thereby ensuring the effect of threshold voltage compensation for the node coupled to the driving subcircuit, improving the light leakage problem of the sub-pixel when the pixel circuit drives the light-emitting device to emit light, and thereby improving the brightness uniformity of the display panel for the sub-pixel.

[0005] In the first aspect, a pixel circuit is provided. The pixel circuit is a pixel circuit in a display panel of an electronic device, and the pixel circuit is coupled to a light-emitting device of the display panel. Specifically, the pixel circuit may include a driving subcircuit, a first control subcircuit, a second control subcircuit, and a data writing subcircuit. The control end of the first control subcircuit is coupled to a first light-emitting control line, the first end of the first control subcircuit is coupled to a first voltage end, and the second end of the first control subcircuit is coupled to a second node. The control end of the driving subcircuit is coupled to a first node, the first end of the driving subcircuit is coupled to a second node, and the second end of the driving subcircuit is coupled to a third node. The control end of the second control subcircuit is coupled to a second light-emitting control line, the first end of the second control subcircuit is coupled to a third node, and the second end of the second control subcircuit is coupled to a first pole of the light-emitting device. The second pole of the light-emitting device is coupled to a voltage end. In addition, the control end of the data writing subcircuit is coupled to a data writing control line, the first end of the data writing subcircuit is coupled to a light-emitting data line, and the second end of the data writing subcircuit is coupled to a first node.

[0006] In the present application, the first control subcircuit connects the first voltage terminal with the second node in response to the control signal provided by the first light-emitting control line. Thus, the working voltage provided by the first voltage terminal will compensate the threshold voltage of the driving subcircuit through the first control subcircuit. The second control subcircuit connects the third node with the first pole of the light-emitting device in response to the control signal provided by the second light-emitting control line, but in the compensation stage, the second light-emitting control line does not provide a control signal, so that the second control subcircuit will keep the third node disconnected from the first pole of the light-emitting device, so that the voltage used by the first voltage terminal to compensate the threshold voltage of the driving subcircuit will not flow out from the second end of the driving subcircuit. The data writing subcircuit connects the light-emitting data line with the first node in response to the control signal provided by the data writing control line, so that the light-emitting data line writes the data voltage to the first node. In the light-emitting stage, the first light-emitting control line provides a control signal to control the first control subcircuit to connect, so that the first control subcircuit connects the first voltage terminal with the second node, and the second light-emitting control line provides a control signal to control the second control subcircuit to connect, so that the second control subcircuit connects the third node with the first pole of the light-emitting device, thus forming a path in which the first voltage terminal, the first control subcircuit, the driving subcircuit, the second control subcircuit, the light-emitting device and the second voltage terminal are connected in series in sequence. The driving subcircuit controls the opening of the current switch based on the data voltage on the first node, thereby generating a driving current on the path to drive the light-emitting device to emit light.

[0007] In a feasible embodiment of the first aspect, the driving subcircuit may include at least one driving transistor, and the driving transistor is used to generate a driving current for driving the light-emitting device to emit light. When the driving subcircuit includes a driving transistor, the control electrode of the driving transistor is coupled to the first node, the first electrode of the driving transistor is coupled to the second node, and the second electrode of the driving transistor is coupled to the third node. In this way, when the potential on the first node becomes the data voltage in the light-emitting stage, the driving transistor generates a driving current for driving the light-emitting device to emit light based on the data voltage.

[0008] In a feasible embodiment of the first aspect, the first control subcircuit includes at least one first transistor. When the first control subcircuit includes a first transistor, the control electrode of the first transistor is coupled to the first light-emitting control line, the first electrode of the first transistor is coupled to the first voltage terminal, and the second electrode of the first transistor is coupled to the second node. In the compensation stage and the light-emitting stage, the first light-emitting control line provides a control signal to the control electrode of the first transistor, and the first transistor connects the first voltage terminal to the second node in response to the control signal.

[0009] In a feasible embodiment of the first aspect, the second control subcircuit includes at least one second transistor. When the second control subcircuit includes a second transistor, the control electrode of the second transistor is coupled to the second light-emitting control line, the first electrode of the second transistor is coupled to the third node, and the second electrode of the second transistor is coupled to the first electrode of the light-emitting device. In the light-emitting stage, the second light-emitting control line provides a control signal to the control electrode of the second transistor, and the second transistor connects the third node to the first electrode of the light-emitting device in response to the control signal, thereby forming a first voltage terminal, a first transistor, a driving transistor, a second transistor, a light-emitting device, and a voltage terminal.

[0010] The driving current generated by the driving transistor can enter the light emitting device through the second transistor. In addition, in the compensation stage, the second light emitting control line does not provide a control signal to control the second transistor to turn on, so that the second transistor will remain closed to disconnect the third node from the first electrode of the light emitting device.

[0011] In a feasible embodiment of the first aspect, the data input subcircuit includes at least one third transistor. When the data writing subcircuit includes a third transistor, the control electrode of the third transistor is coupled to the data writing control line, the first electrode of the third transistor is coupled to the light emitting data line, and the second electrode of the third transistor is coupled to the first node. In the data writing stage, the data writing control line provides a control signal to the control electrode of the third transistor, and the third transistor connects the light emitting data line to the first node in response to the control signal, so that the light emitting data line writes the data voltage to the first node.

[0012] In a feasible embodiment of the first aspect, the pixel circuit may further include a first reset subcircuit and a second reset subcircuit. The control end of the first reset subcircuit is coupled to the first reset control line, the first end of the first reset subcircuit is coupled to the first voltage line, and the second end of the first reset subcircuit is coupled to the first node. The control end of the second reset subcircuit is coupled to the second reset control line, the first end of the second reset subcircuit is coupled to the second voltage line, and the second end of the second reset subcircuit is coupled to the third node.

[0013] In the present application, the first reset subcircuit controls the first voltage line to be connected to the first node in response to the control signal provided by the first reset control line, thereby writing the first voltage provided by the first voltage line into the first node, thereby resetting the first node. In addition, the second reset subcircuit controls the second voltage line to be connected to the third node in response to the control signal provided by the second reset control line, thereby writing the second voltage provided by the second voltage line into the third node, thereby resetting the third node.

[0014] In a feasible embodiment of the first aspect, the first reset subcircuit includes at least one fourth transistor. When the first reset subcircuit includes a fourth transistor, the control electrode of the fourth transistor is coupled to the first reset control line, the first electrode of the fourth transistor is coupled to the first voltage line, and the second electrode of the fourth transistor is coupled to the first node. In the reset phase, the first reset control line provides a control signal to the control electrode of the fourth transistor, and the fourth transistor connects the first voltage line to the first node in response to the control signal, so that the first voltage line writes the first voltage into the first node to reset the first node.

[0015] In a feasible embodiment of the first aspect, the second reset subcircuit includes at least one fifth transistor. When the second reset subcircuit includes a fifth transistor, the control electrode of the fifth transistor is coupled to the second reset control line, the first electrode of the fifth transistor is coupled to the second voltage line, and the second electrode of the fifth transistor is coupled to the third node. In the reset phase, the second reset control line provides a control signal to the control electrode of the fifth transistor, and the fifth transistor connects the second voltage line to the third node in response to the control signal, so that the second voltage line writes the second voltage into the third node to reset the third node.

[0016] In a feasible embodiment of the first aspect, the pixel circuit further comprises a bootstrap subcircuit. A first end of the bootstrap subcircuit is coupled to the first node, and a second end of the bootstrap subcircuit is coupled to the third node. When the voltage at the first node jumps, the bootstrap subcircuit also lifts the voltage at the third node.

[0017] In the present application, when the voltage at the first node of the bootstrap subcircuit jumps, the voltage at the third node is automatically raised, so that when the driving subcircuit generates a driving current based on the voltage of the first node during the light-emitting stage, the threshold voltage remaining at the third node is eliminated to complete the compensation of the threshold voltage. Thus, the uniformity of the brightness of the light-emitting device driven by the pixel circuit can be improved.

[0018] In a feasible embodiment of the first aspect, when the bootstrap subcircuit includes a first capacitor, a first plate of the first capacitor is coupled to the first node, and a second plate of the first capacitor is coupled to the third node. When the voltage of the first node jumps, the first capacitor automatically raises the voltage of the third node.

[0019] In a feasible embodiment of the first aspect, the pixel circuit further includes a third reset subcircuit. A control end of the third reset subcircuit is coupled to the second reset control line, a first end of the third reset subcircuit is coupled to the third voltage line, and a second end of the third reset subcircuit is coupled to a fourth node; the fourth node is coupled to the light emitting device. The third reset subcircuit controls the third voltage line to be connected to the fourth node in response to a control signal provided by the second reset control line, thereby writing a third voltage provided by the third voltage line to the fourth node, and resetting the fourth node.

[0020] In a feasible embodiment of the first aspect, the third reset subcircuit includes at least one sixth transistor. The control electrode of the sixth transistor is coupled to the second reset control line, the first electrode of the sixth transistor is coupled to the third voltage line, and the second electrode of the sixth transistor is coupled to the fourth node. When the second reset control line provides a control signal to the control electrode of the sixth transistor, the sixth transistor connects the third voltage line to the fourth node in response to the control signal, thereby writing the third voltage provided by the third voltage line into the fourth node.

[0021] In a feasible embodiment of the first aspect, the pixel circuit further includes a first isolation subcircuit, a second isolation subcircuit, a third control subcircuit and a fourth reset subcircuit. The control end of the third control subcircuit is coupled to the second light-emitting control line, the first end of the third control subcircuit is coupled to the first node, the second end of the third control subcircuit is coupled to the fifth node, and the fifth node is coupled to the second end of the data writing subcircuit. The first end of the first isolation subcircuit is coupled to the fifth node, and the second end of the first isolation subcircuit is coupled to the sixth node; the first end of the second isolation subcircuit is coupled to the sixth node, and the second end of the second isolation subcircuit is coupled to the third node. The control end of the fourth reset subcircuit is coupled to the first reset control line, the first end of the fourth reset subcircuit is coupled to the first voltage line, and the second end of the fourth reset subcircuit is coupled to the sixth node.

[0022] In the present application, the fourth reset subcircuit continuously writes the first voltage provided by the first voltage line into the sixth node in response to the control signal provided by the first reset control line. The third control subcircuit connects the fifth node with the first node in response to the control signal provided by the second light-emitting control line, the first isolation subcircuit is between the fifth node and the sixth node to isolate the fifth node from the sixth node, and the second isolation subcircuit is between the sixth node and the third node to isolate the sixth node from the third node.

[0023] In a feasible embodiment of the first aspect, the first isolation subcircuit includes at least one second capacitor. The first plate of the second capacitor is coupled to the fifth node, and the second plate of the second capacitor is coupled to the sixth node, so that the second capacitor can isolate the fifth node from the sixth node, so that the first voltage written to the sixth node does not affect the data voltage written on the fifth node.

[0024] In a feasible embodiment of the first aspect, the second isolation subcircuit includes at least one third capacitor. The first plate of the third capacitor is coupled to the sixth node, and the second plate of the third capacitor is coupled to the third node. In this way, the third capacitor can also isolate the sixth node from the third node.

[0025] In a feasible embodiment of the first aspect, the third control subcircuit includes at least one seventh transistor. The control electrode of the seventh transistor is coupled to the second light-emitting control line, the first electrode of the seventh transistor is coupled to the first node, and the second electrode of the seventh transistor is coupled to the fifth node. In the light-emitting stage, the second light-emitting control line provides a control signal to the control electrode of the seventh transistor, and the seventh transistor connects the fifth node to the first node in response to the control signal, so that the data voltage on the fifth node can be written to the first node through the seventh transistor.

[0026] In a feasible embodiment of the first aspect, the fourth reset subcircuit includes at least one eighth transistor. The control electrode of the eighth transistor is coupled to the first reset control line, the first electrode of the eighth transistor is coupled to the first voltage line, and the second electrode of the eighth transistor is coupled to the sixth node. In the reset phase, the first reset control line provides a control signal to the control electrode of the eighth transistor, and the eighth transistor connects the first voltage line to the sixth node in response to the control signal, so that the first voltage line writes the first voltage to the sixth node to reset the sixth node.

[0027] In a feasible embodiment of the first aspect, the pixel circuit further includes an energy storage subcircuit. A first end of the energy storage subcircuit is coupled to the second node, and a second end of the energy storage subcircuit is coupled to the third node. In this way, the energy storage subcircuit can maintain the potential of the second node and the potential of the third node through a preset constant voltage.

[0028] In another feasible embodiment of the first aspect, the first end of the energy storage subcircuit can also be coupled to the first voltage end, and the second end of the energy storage subcircuit is also coupled to the third node. Based on this, the energy storage subcircuit can raise the voltage of the third node in proportion to the working voltage provided by the first voltage end, thereby maintaining the potential of the third node.

[0029] In a feasible embodiment of the first aspect, the energy storage subcircuit includes at least one fourth capacitor. The first plate of the fourth capacitor is coupled to the second node, and the second plate of the fourth capacitor is coupled to the third node. At this time, the fourth capacitor can simultaneously maintain the potential of the second node and the third node. Alternatively, the first plate of the fourth capacitor can also be coupled to the first voltage terminal, and the second plate of the fourth capacitor is still coupled to the third node. At this time, the fourth capacitor can maintain the potential of the third node.

[0030] In the present application, the fourth capacitor is used to maintain the potential of the second node and the potential of the third node, or the fourth capacitor is used to maintain the potential of the third node, both of which can control the influence of the data voltage on the driving current generated by the driving transistor. Therefore, by adjusting the size of the fourth capacitor, the data voltage required for the driving transistor to generate the driving current can be adjusted. In this way, based on the different voltage output capabilities of the light-emitting data lines on different display panels, the pixel circuit can be compatible with the data voltage for the driving transistor to generate the driving current by adjusting the size of the fourth capacitor, that is, the pixel circuit generates a driving current to drive the light-emitting device more stably and reliably.

[0031] In a second aspect, a control method for a pixel circuit is provided, and the control method for a pixel circuit is mainly applied to the pixel circuit described in any of the above embodiments. In a frame period of a display panel performing image refresh display, after the pixel circuit enters an enabled state based on the working voltage provided by the first voltage terminal, in a compensation stage in a frame period, the first light-emitting control line provides a control signal to, and the first control subcircuit connects the first voltage terminal with the second node in response to the control signal. Thus, the working voltage provided by the first voltage terminal will compensate the threshold voltage of the driving subcircuit through the first control subcircuit. Moreover, in the compensation stage, the second light-emitting control line does not provide a control signal to control the connection of the second control subcircuit, so that the third node and the first pole of the light-emitting device will remain disconnected, so that the voltage of the threshold voltage compensation of the driving subcircuit by the first voltage terminal will not flow out from the second end of the driving subcircuit. Afterwards, in the data writing stage, the data writing control line provides a control signal to the control end of the data writing subcircuit, and the data writing subcircuit connects the light-emitting data line with the first node in response to the control signal, so that the light-emitting data line writes the data voltage to the first node. Afterwards, in the light-emitting stage, the first control subcircuit provides a control signal to the control terminal of the first control subcircuit, and the second light-emitting control line provides a control signal to the control terminal of the second control subcircuit, so that the first control subcircuit and the second control subcircuit both respond to the corresponding control signals to connect the first voltage terminal with the second node, and connect the third node with the first electrode of the light-emitting device, respectively. In addition, the driving subcircuit generates a driving current based on the data voltage on the first node, and the driving current enters the light-emitting device through the third node, the second control subcircuit and the first electrode of the light-emitting device to drive the light-emitting device to emit light.

[0032] In the present application, since the voltage used to compensate the threshold voltage of the driver subcircuit by the first voltage terminal in the compensation stage will not flow out from the second terminal of the driver subcircuit, that is, the second terminal of the driver subcircuit will not have leakage problems in the compensation stage. In this way, the effect of the first voltage terminal compensating the threshold voltage of the driver subcircuit will be better, so that the uniformity of the brightness of the light-emitting device driven by the pixel circuit can also be improved. For the display panel, when the pixel circuit is used to drive the light-emitting device to emit light for refreshing the image pixel, the uniformity of the display brightness of the image pixel can also be effectively improved. In other words, the pixel circuit can improve the uniformity of the brightness displayed by the display panel for the image pixel by connecting the first voltage terminal and the second node connected to the driver subcircuit by the first control subcircuit in the compensation stage, and disconnecting the third node connected to the driver subcircuit and the first pole of the light-emitting device by the second control subcircuit.

[0033] In a feasible embodiment of the second aspect, during a reset phase within a frame period, the first reset control line provides a control signal to a control terminal of the first reset subcircuit, and the first reset subcircuit responds to the control signal to control the first voltage line to be connected to the first node, thereby writing the first voltage provided by the first voltage line to the first node, thereby resetting the first node. Furthermore, during the reset phase, the second reset control line provides a control signal to a control terminal of the second reset subcircuit, and the second reset subcircuit responds to the control signal to control the second voltage line to be connected to the third node, thereby writing the second voltage provided by the second voltage line to the third node, thereby resetting the third node.

[0034] In addition, in the reset stage, the second light-emitting control line also sends a control signal to the control terminal of the second control subcircuit, and the second control subcircuit controls the third node to be connected to the first electrode of the light-emitting device in response to the control signal. In this way, the second voltage written into the third node by the second voltage line is also further written into the first electrode of the light-emitting device, thereby resetting the first electrode of the light-emitting device.

[0035] In the present application, in the reset stage, by simultaneously resetting the first node and the third node connected to the driver subcircuit, it is possible to avoid the residual voltage of the two nodes in the light-emitting stage from affecting the drive current generated by the driver subcircuit in the next frame period, thereby ensuring that the driver subcircuit can accurately generate the current for driving the light-emitting device to emit light in each frame period, thereby ensuring the stability of the light-emitting brightness of the light-emitting device. In addition, in the reset stage, the voltage written to the third node is synchronized to the first pole of the light-emitting device to reset the first pole of the light-emitting device, thereby avoiding the residual voltage of the light-emitting device itself after the light-emitting ends, which will interfere when responding to the driver subcircuit to emit light in the next light-emitting stage, thereby further ensuring the stability of the light-emitting brightness of the light-emitting device.

[0036] In a feasible embodiment of the second aspect, when the pixel circuit includes a third reset subcircuit, in the reset stage, the second reset control line provides a control signal to the control end of the third reset subcircuit, and the third reset subcircuit controls the third voltage line to be connected to the first electrode of the light-emitting device in response to the control signal, thereby writing the third voltage provided by the third voltage line to the first electrode of the light-emitting device, and resetting the first electrode of the light-emitting device. In addition, when the pixel circuit includes the third reset subcircuit, the second light-emitting control line does not provide a control signal to connect the second control subcircuit, so that the third node and the first electrode of the light-emitting device will remain disconnected in the reset stage.

[0037] In a feasible embodiment of the second aspect, when the pixel circuit further includes a first isolation subcircuit, a second isolation subcircuit, a third control subcircuit and a fourth reset subcircuit, the pixel circuit can perform data writing operations in the compensation phase. That is, in the compensation phase, the first reset control line provides a control signal to the control terminals of the first reset subcircuit and the fourth reset subcircuit, so that the first reset subcircuit will continuously write the first voltage provided by the first voltage line into the first node, and the fourth reset subcircuit will also continuously write the first voltage provided by the first voltage line into the sixth node. However, since the second light-emitting control line does not provide a control signal to control the third control subcircuit to be connected in the compensation phase, the fifth node and the first node will remain disconnected in the compensation phase, and therefore, the first voltage line writes the first voltage to the first node, which will not affect the voltage on the fifth node. In addition, since the first isolation subcircuit is between the fifth node and the sixth node, the fifth node will be isolated from the sixth node, and the second isolation subcircuit will also isolate the sixth node from the third node, and therefore, the first voltage line writes the first voltage to the sixth node, which will not affect the voltage on the fifth node. Thus, the data writing subcircuit can connect the light-emitting data line with the fifth node in response to the control signal provided by the data writing control line during the compensation phase, so that the light-emitting data line can write the data voltage into the fifth node. Afterwards, during the light-emitting phase, since the first light-emitting control line and the second light-emitting control line each provide a control signal, the third control subcircuit connects the first node with the fifth node. In this way, the data voltage on the fifth node will be transmitted to the first node through the third control subcircuit, so that the driving subcircuit generates a driving current for driving the light-emitting device to emit light. In addition, since the first reset control line does not provide a control signal to control the fourth reset subcircuit to be connected during the light-emitting phase, there will be no first voltage written by the first voltage line on the sixth node. In this way, the first isolation subcircuit and the second isolation subcircuit will be coupled as a bootstrap subcircuit to automatically raise the voltage at the third node when the voltage at the first node jumps to.

[0038] In a third aspect, a display panel is provided, the display panel comprising a plurality of sub-pixels, each sub-pixel comprising a pixel circuit and a light-emitting device connected to each other, the pixel circuit being the pixel circuit as described in any embodiment of the first aspect above.

[0039] In a fourth aspect, a display panel is provided, the display panel comprising a plurality of sub-pixels, each sub-pixel comprising a pixel circuit and a light-emitting device connected to each other. When the display panel is in operation, the pixel circuit executes the method described in any embodiment of the second aspect above.

[0040] In a fifth aspect, an electronic device is provided, comprising: a display panel, a processor and a memory, wherein the display panel comprises a plurality of sub-pixels, each sub-pixel comprises a pixel circuit and a light-emitting device connected to each other, and the pixel circuit is the pixel circuit described in any embodiment of the first aspect above.

[0041] In a sixth aspect, an electronic device is provided. The electronic device includes: a display panel, a processor and a memory, wherein the processor is coupled to the memory; the memory is used to store computer program code; the computer program code includes computer instructions, and when the processor executes the computer instructions, the pixel circuit in the display panel can execute the method described in any embodiment of the second aspect above.

[0042] In a seventh aspect, the present application provides a computer-readable storage medium, which stores computer instructions. When the computer-readable storage medium is run on an electronic device, the pixel circuit of the display panel of the electronic device can execute the method described in any embodiment of the second aspect above.

[0043] In an eighth aspect, the present application provides a computer program product comprising instructions, which, when executed on an electronic device, enables a pixel circuit of a display panel of the electronic device to execute the method described in any one of the embodiments of the second aspect above.

[0044] In a ninth aspect, a device is provided, the device comprising a processor, configured to support a pixel circuit of a display panel of an electronic device to implement the functions corresponding to the method described in any embodiment of the second aspect. In a possible design, the device further comprises a memory, the memory being configured to store necessary program instructions and data of the electronic device.

[0045] Among them, the technical effects brought about by any design method in the third to ninth aspects can refer to the technical effects brought about by different implementation methods in the second aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 A schematic diagram of a structure of a pixel circuit involved in an embodiment of the present application;

[0047] Figure 2 for Figure 1 A schematic diagram of a transistor structure corresponding to a pixel circuit shown;

[0048] Figure 3 A schematic diagram of a structure of a pixel circuit including an energy storage subcircuit involved in an embodiment of the present application;

[0049] Figure 4 for Figure 3 A schematic diagram of a transistor structure corresponding to a pixel circuit shown;

[0050] Figure 5 Another structural schematic diagram of a pixel circuit including an energy storage subcircuit according to an embodiment of the present application;

[0051] Figure 6 for Figure 5 A schematic diagram of a transistor structure corresponding to a pixel circuit shown;

[0052] Figure 7 A schematic diagram of a range variation of a data voltage Vdata corresponding to a pixel circuit according to an embodiment of the present application;

[0053] Figure 8 A schematic diagram of the voltage across the working voltage provided by VDD when the pixel circuit involved in the embodiment of the present application generates a small driving current;

[0054] Fig. 9 A schematic diagram of the voltage across the working voltage provided by VDD when the pixel circuit involved in the embodiment of the present application generates a driving current;

[0055] Fig.10 A schematic diagram of the voltage across the working voltage provided by VDD when the pixel circuit involved in the embodiment of the present application generates a large driving current;

[0056] Fig.11 A schematic diagram of the structure of a pixel circuit according to an embodiment of the present application including a first reset subcircuit and a second reset subcircuit;

[0057] Fig.12 for Fig.11 A schematic diagram of a transistor structure corresponding to a pixel circuit shown;

[0058] Fig.13 A schematic diagram of the structure of a pixel circuit including a bootstrap sub-circuit involved in an embodiment of the present application;

[0059] Fig.14 for Fig.13 A schematic diagram of a transistor structure corresponding to a pixel circuit shown;

[0060] Fig.15 This is a schematic diagram of a first control timing sequence of a pixel circuit involved in an embodiment of the present application;

[0061] Fig.16 A schematic diagram of the structure of a pixel circuit including a third reset subcircuit involved in an embodiment of the present application;

[0062] Fig.17 for Fig.16 A schematic diagram of a transistor structure corresponding to a pixel circuit shown;

[0063] Fig.18 A second control timing diagram of the pixel circuit involved in the embodiment of the present application;

[0064] Fig.19 A schematic diagram of the structure of a pixel circuit involved in an embodiment of the present application includes a third control subcircuit, a fourth reset subcircuit, a first isolation subcircuit and a second isolation subcircuit;

[0065] Fig. 20 for Fig.19 A schematic diagram of a transistor structure corresponding to a pixel circuit shown;

[0066] Fig.21 This is a third control timing diagram of the pixel circuit involved in the embodiment of the present application. DETAILED DESCRIPTION

[0067] The following will describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.

[0068] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.

[0069] When describing some embodiments, the expressions "coupled", "connected", "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct or indirect physical contact with each other. For example, A and B are connected, which may mean that A and B are connected, or that A and B are connected through other components. In addition, the term "coupled" may be a way of achieving electrical connection for signal transmission.

[0070] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0071] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0072] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of variation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0073] It should be noted that the transistors involved in the embodiments of the present application can all be oxide thin film transistors (thin film transistors, TFTs). It should be understood that, based on different design requirements of practical applications, in some feasible embodiments, the transistors constituting the pixel circuit can of course also be thin film transistors, field effect transistors, metal oxide semiconductor field effect transistors (metal oxide semiconductor field effect transistors, MOSFETs) or other electronic devices with the same characteristics other than oxide TFTs. For the convenience of explanation and understanding, the following text takes the transistor as an example of oxide TFT to illustrate the embodiments of the present application. Based on this, in the embodiments of the present application, the gate of the oxide TFT is collectively referred to as the control electrode, and in order to distinguish the two electrodes of the oxide TFT other than the gate, one of the electrodes is referred to as the first electrode and the other electrode is referred to as the second electrode. For example, the first electrode of the so-called transistor can be the drain electrode of the oxide TFT, and the second electrode of the so-called transistor can be the source electrode of the oxide TFT; or, the first electrode of the so-called transistor can also be the source electrode of the oxide TFT, and the second electrode of the so-called transistor is the drain electrode of the oxide TFT.

[0074] In addition, the transistors involved in the embodiments of the present application can all be N-type oxide TFTs. Alternatively, among the transistors involved in the embodiments of the present application, the driving transistor TD for generating the driving current is an N-type oxide TFT, and the remaining transistors except the driving transistor TD are all P-type oxide TFTs. For the convenience of explanation and understanding, the embodiments of the present application are described below using the transistors as N-type oxide TFTs as an example. As for the implementation process of the embodiment of the present application in which the driving transistor TD is an N-type oxide TFT and the remaining transistors are all P-type oxide TFTs, it is only necessary to exchange the high and low levels of the control signal corresponding to the timing of the pixel circuit one by one, and the remaining operation contents are basically the same as the operation contents of the pixel circuit driving the light-emitting device to emit light when all the transistors are N-type oxide TFTs described below.

[0075] Before introducing the embodiments of the present application, a brief introduction to the overall concept of the technical solution involved in the embodiments of the present application is first given here.

[0076] Nowadays, with the rapid development of electronic equipment technology, users' pursuit of electronic equipment screen display effects is also constantly improving. However, when the display panel of the electronic device is refreshing and displaying an image, the display brightness of different sub-pixels in the display area is often uneven, that is, the uniformity of the display panel controlling the sub-pixel luminous brightness is poor. In order to improve the uniformity of the sub-pixel display brightness, the relevant technology is mainly based on oxide TFT to develop the pixel circuit of the display panel, thereby utilizing the small leakage characteristics of the oxide TFT itself to improve the uniformity of the sub-pixel display brightness. However, even the pixel circuit developed using oxide TFT still has leakage, but because the relevant technology cannot effectively control the leakage phenomenon of the pixel circuit, the display brightness of the sub-pixel still has the problem of poor uniformity.

[0077] In response to the problem of poor brightness uniformity in sub-pixel display by the above-mentioned display panel, an embodiment of the present application proposes a pixel circuit and a control method thereof, by adding a control sub-circuit between the driving sub-circuit of the pixel circuit and the anode of the light-emitting device, so that during the process of threshold voltage compensation for the driving sub-circuit, the control sub-circuit can be used to separate the driving sub-circuit from the anode of the light-emitting device, so that the voltage used to compensate the threshold voltage of the driving sub-circuit will not continue to flow to the anode of the light-emitting device and cause leakage. In this way, the effect of threshold voltage compensation for the driving sub-circuit can be ensured, thereby improving the light leakage problem of the sub-pixels, and further improving the brightness uniformity of the sub-pixels when the display panel displays the sub-pixels.

[0078] Based on the overall concept of the technical solution involved in the above-mentioned embodiments of the present application, various specific implementation methods of the pixel circuit and the control method thereof provided in the embodiments of the present application are further described in detail.

[0079] In an embodiment of the present application, the pixel circuit provided in the embodiment of the present application is a pixel circuit in a display panel of an electronic device, the pixel circuit is coupled to a light-emitting device of the display panel, and after the pixel circuit enters an enabled state based on the working voltage provided by the power supply voltage terminal on the display panel, a driving current is generated to drive the light-emitting device to emit light. In this way, the display panel can refresh and display the sub-pixel. It should be noted that the electronic devices involved in the embodiments of the present application may include but are not limited to mobile phones, tablet computers, laptops, handheld computers, netbooks, personal digital assistants (personal digital assistants, PDAs), wearable electronic devices, virtual reality devices, etc., which have a display panel and a terminal device having the function of refreshing and displaying an image through the display panel. In addition, the light-emitting device involved in the embodiment of the present application may be an organic light-emitting diode (OLED), or the light-emitting device may also be a light-emitting diode (LED), etc. The anode of the light-emitting device is collectively referred to as the first pole, and the cathode of the light-emitting device is collectively referred to as the second pole. For example, in the case where the light-emitting device is specifically an OLED, the anode of the OLED is called the first pole of the light-emitting device, and the cathode of the OLED is called the second pole of the light-emitting device. Furthermore, in the embodiment of the present application, the power supply voltage terminal on the display panel includes a first voltage terminal VDD and a second voltage terminal VSS, wherein the voltage value of the voltage provided by the first voltage terminal VDD is higher than the voltage value of the voltage provided by the second voltage terminal VSS. It should be understood that, based on different requirements of practical applications, in different implementations, the voltage values ​​of the voltages provided by the first voltage terminal VDD and the second voltage terminal VSS can of course be different, and the embodiment of the present application does not specifically limit the voltage values ​​of the voltages provided by the first voltage terminal VDD and the second voltage terminal VSS.

[0080] In addition, in the embodiment of the present application, the control method of the pixel circuit provided in the embodiment of the present application is mainly applied to the pixel circuit provided in the embodiment of the present application. That is, when the display panel of the electronic device refreshes and displays any image, the pixel circuit in the display panel can execute the control method of the pixel circuit provided in the embodiment of the present application, and first reset the nodes connected to the driving subcircuit in the reset stage within a frame period in which the display panel refreshes and displays the image, thereby eliminating the residual potential of each node after the driving subcircuit drives the light-emitting device to emit light in the previous frame period, thereby improving the hysteresis phenomenon when the driving subcircuit drives the light-emitting device to emit light in the next frame period. Then, in the compensation stage, the threshold voltage compensation is performed on the driving subcircuit to avoid the threshold voltage offset and the brightness attenuation of the light-emitting device caused by the voltage drop in the driving subcircuit, and then in the data writing stage, the data voltage is written to the control end of the driving subcircuit, and finally in the light-emitting stage, a driving current is generated in the pixel circuit based on the data voltage at the control end of the driving subcircuit to drive the light-emitting device of the display panel to emit light.

[0081] In some embodiments, the pixel circuit may include a driving subcircuit, a first control subcircuit, a second control subcircuit, and a data writing subcircuit. The driving subcircuit may include an N-type oxide TFT. As for the first control subcircuit, the second control subcircuit, and the data writing subcircuit, each of them may include an N-type oxide TFT or a P-type oxide TFT.

[0082] like Figure 1 As shown, in the pixel circuit, the control end of the first control subcircuit 210 is coupled to the first light emitting control line EM1, the first end of the first control subcircuit 210 is coupled to the first voltage end VDD, and the second end of the first control subcircuit 210 is coupled to the second node N2.

[0083] The control terminal of the driving sub-circuit 110 is coupled to the first node N1 , the first terminal of the driving sub-circuit 110 is coupled to the second node N2 , and the second terminal of the driving sub-circuit 110 is coupled to the third node N3 .

[0084] The control terminal of the second control subcircuit 220 is coupled to the second light emitting control line EM2, the first terminal of the second control subcircuit 220 is coupled to the third node N3, and the second terminal of the second control subcircuit 220 is coupled to the first electrode of the light emitting device 310. The second electrode of the light emitting device 310 is coupled to the second voltage terminal VSS.

[0085] A control end of the data writing sub-circuit 410 is coupled to the data writing control line Gate, a first end of the data writing sub-circuit 410 is coupled to the light emitting data line Data, and a second end of the data writing sub-circuit 410 is coupled to the first node N1.

[0086] Based on this, when the pixel circuit executes the control method of the pixel circuit provided by the embodiment of the present application, in the compensation stage within the above-mentioned one frame period, the first light-emitting control line EM1 provides a control signal to the control terminal of the first control subcircuit 210, and the first control subcircuit 210 responds to the control signal to connect the first voltage terminal VDD with the second node N2. In addition, in the compensation stage, the second light-emitting control line EM2 provides a control signal to the control terminal of the second control subcircuit 220 to control the second control subcircuit 220 to disconnect, so that the second control subcircuit 220 will respond to the control signal to keep the third node N3 disconnected from the first pole of the light-emitting device 310. Afterwards, in the data writing stage, the data writing control line Gate provides a control signal to the control terminal of the data writing subcircuit 410, and the data writing subcircuit 410 responds to the control signal to connect the light-emitting data line Data with the first node N1. Afterwards, in the light-emitting stage, the first light-emitting control line EM1 provides a control signal to the control terminal of the first control subcircuit 210, and the second light-emitting control line EM2 also provides a control signal to the control terminal of the second control subcircuit 220, so that the first control subcircuit 210 connects the first voltage terminal VDD with the second node N2 in response to the control signal provided by the first light-emitting control line EM1, and the second control subcircuit 220 also connects the third node N3 with the first electrode of the light-emitting device 310 in response to the control signal provided by the second light-emitting control line EM2, thereby forming a path in which the first voltage terminal VDD, the first control subcircuit 210, the driving subcircuit 110, the second control subcircuit 220, the light-emitting device 310 and the second voltage terminal VSS are connected in series in sequence. In this way, the driving subcircuit 110 can generate a driving current on the path by connecting the second node N2 and the third node N3 to turn on the current switch on the entire path. Then, the light-emitting device 310 on the path can emit light based on the driving current.

[0087] In the embodiment of the present application, in the compensation stage, when the first voltage terminal VDD connected to the pixel circuit provides the working voltage to compensate the threshold voltage of the third node connected to the driving subcircuit 110 through the first control subcircuit 210, the third node N3 is disconnected from the first pole of the light-emitting device 310, so that the voltage written to the third node N3 by the first voltage terminal VDD through the first control subcircuit 210 and the driving subcircuit 110 will not continue to flow from the third node N3 to the light-emitting device 310. That is, the third node N3 connected to the second end of the driving subcircuit 110 will not have leakage problems during the compensation stage. In this way, the first voltage terminal VDD will have a better effect of compensating the threshold voltage of the driving subcircuit 110, so that the uniformity of the brightness of the light-emitting device driven by the pixel circuit can also be improved. For the display panel, when the pixel circuit is used to drive the light-emitting device to emit light for refreshing the sub-pixel, the uniformity of the display brightness of the sub-pixel can be effectively improved because the leakage problem of the pixel circuit is effectively controlled. That is to say, the pixel circuit can improve the uniformity of the brightness of the sub-pixels displayed on the display panel by connecting the first voltage terminal VDD and the second node connected to the driving sub-circuit 110 by the first control sub-circuit 210 during the compensation stage, and disconnecting the third node connected to the driving sub-circuit 110 and the first electrode of the light-emitting device 310 by the second control sub-circuit 220.

[0088] In some embodiments, the driving subcircuit may include at least one driving transistor, and the driving transistor is used to control the degree of conduction between the first electrode and the second electrode based on the voltage of the control electrode, thereby generating a current corresponding to the degree of conduction. When the driving transistor is an N-type oxide TFT, the driving transistor may specifically be an N-type LTPO transistor. Alternatively, in other feasible embodiments, the driving transistor may specifically be an N-type indium gallium zinc oxide (IGZO) IGZO transistor. In general, the driving transistor may be represented as a transistor DTFT, a transistor TD, to distinguish the driving transistor from transistors with other uses in the pixel circuit. For ease of explanation and understanding, the driving transistor included in the driving subcircuit is hereinafter described in detail with the driving transistor TD as the driving transistor included in the driving subcircuit.

[0089] like Figure 2 As shown, when the driving sub-circuit 110 includes a driving transistor TD, the control electrode of the driving transistor TD is coupled to the first node N1 as the control end of the driving sub-circuit 110, and the first electrode of the driving transistor TD is coupled to the second node N2 as the first end of the driving sub-circuit 110, and the second electrode of the driving transistor TD is coupled to the third node N3 as the second end of the driving sub-circuit 110.

[0090] In this way, when the potential at the first node N1 becomes the data voltage Vdata, and the transistor T1 connected to the second node N2 and the transistor T2 connected to the third node N3 are both turned on, the driving transistor TD is turned on based on the data voltage Vdata of the control electrode to control the conduction between the second node N2 and the third node N3 to turn on the current switch, thereby generating a driving current that drives the light-emitting device 310 to emit light in the path formed by the transistor T1, the driving transistor TD, the transistor T2 and the light-emitting device 310 connected in series in sequence.

[0091] In some embodiments, the first control subcircuit includes at least one first transistor. The first transistor may be an LTPO transistor, or the first transistor may also be an IGZO transistor.

[0092] like Figure 2 As shown, when the first control subcircuit 210 includes a first transistor T1, the control electrode of the first transistor T1 is coupled to the first light-emitting control line EM1 as the control end of the first control subcircuit 210, and the first electrode of the first transistor T1 is coupled to the first voltage end VDD as the first end of the first control subcircuit 210, and the second electrode of the first transistor T1 is coupled to the second node N2 as the second end of the first control subcircuit 210.

[0093] Thus, when the first light emitting control line EM1 provides a control signal for controlling the first transistor T1 to be turned on to the control electrode of the first transistor T1, the first transistor T1 is turned on in response to the control signal to connect the first voltage terminal VDD with the second node N2. In addition, when the first light emitting control line EM1 provides a control signal for controlling the first transistor T1 to be turned off to the control electrode of the first transistor T1, the first transistor T1 is turned off in response to the control signal to keep the first voltage terminal VDD disconnected from the second node N2.

[0094] In some embodiments, the second control subcircuit includes at least one second transistor. The second transistor is similar to the first transistor, that is, the second transistor can be an LTPO transistor or an IGZO transistor.

[0095] like Figure 2 As shown, when the second control subcircuit 220 includes a second transistor T2, the control electrode of the second transistor T2 is coupled to the second light-emitting control line EM2 as the control end of the second control subcircuit 220, and the first electrode of the second transistor T2 is coupled to the third node N3 as the first end of the second control subcircuit 220, and the second electrode of the second transistor T2 is coupled to the first electrode of the light-emitting device 310 as the second end of the second control subcircuit 220.

[0096] Thus, when the second light-emitting control line EM2 provides a control signal for controlling the second transistor T2 to be turned on to the control electrode of the second transistor T2, the second transistor T2 is turned on in response to the control signal to connect the third node N3 with the first electrode of the light-emitting device 310. In addition, when the second light-emitting control line EM2 provides a control signal for controlling the second transistor T2 to be turned off to the second transistor T2, the second transistor T2 is turned off in response to the control signal to keep the third node N3 disconnected from the first electrode of the light-emitting device 310.

[0097] In some embodiments, the data input subcircuit includes at least one third transistor. The third transistor may be a LTPO transistor, or the third transistor may be an IGZO transistor.

[0098] like Figure 2 As shown, when the data writing sub-circuit 410 includes a third transistor T3, the control electrode of the third transistor T3 is coupled to the data writing control line Gate as the control end of the data writing sub-circuit 410, and the first electrode of the third transistor T3 is coupled to the light-emitting data line Data as the first end of the data writing sub-circuit 410, and the second electrode of the third transistor T3 is coupled to the first node N1 as the second end of the data writing sub-circuit 410.

[0099] Thus, when the data writing control line Gate provides a control signal for controlling the third transistor T3 to be turned on to the control electrode of the third transistor T3, the third transistor T3 is turned on in response to the control signal to connect the light emitting data line Data to the first node N1. In addition, when the data writing control line Gate provides a control signal for controlling the third transistor T3 to be turned off to the control electrode of the third transistor T3, the third transistor T3 is turned off in response to the control signal to keep the light emitting data line Data disconnected from the first node N1.

[0100] In some embodiments, the pixel circuit further includes an energy storage subcircuit, and the energy storage subcircuit is coupled to the second node and the third node respectively.

[0101] like Figure 3 As shown, the first end of the energy storage subcircuit 810 is coupled to the second node N2, and the second end of the energy storage subcircuit 810 is coupled to the third node N3. In this way, the energy storage subcircuit 810 can maintain the potential of the second node N2 and the potential of the third node N3 through a preset constant voltage.

[0102] In some embodiments, the energy storage subcircuit includes at least one fourth capacitor. The fourth capacitor is an energy storage capacitor. Figure 4As shown, the first end of the fourth capacitor Cst4 can be coupled to the second node N2, and the second end of the fourth capacitor Cst4 can be coupled to the third node N3. At this time, by calibrating the voltage value of the voltage stored in the fourth capacitor Cst4 in advance to the voltage value of the working voltage provided by the first voltage terminal VDD (or calibrating to a voltage value of other magnitude), the fourth capacitor Cst4 can simultaneously maintain the potentials of the second node N2 and the third node N3.

[0103] In some other embodiments, the energy storage subcircuit is further coupled to the first voltage terminal and the third node respectively. Figure 5 As shown, the first end of the energy storage subcircuit 810 can also be coupled to the first voltage terminal VDD, and the second end of the energy storage subcircuit 810 is also coupled to the third node N3. Based on this, the energy storage subcircuit 810 can stabilize the voltage of the third node N3 according to the working voltage provided by the first voltage terminal VDD to maintain the potential of the third node N3.

[0104] In some embodiments, when the energy storage subcircuit includes at least one fourth capacitor, Figure 6 As shown, the first end of the fourth capacitor Cst4 can also be coupled to the first voltage terminal VDD, and the second end of the fourth capacitor Cst4 is still coupled to the third node N3. At this time, by controlling the first voltage terminal VDD to provide an operating voltage to the first end of the fourth capacitor Cst4, the fourth capacitor can maintain the potential of the third node N3.

[0105] In the embodiment of the present application, the fourth capacitor Cst4 is used to maintain the potential of the second node N2 and the potential of the third node N3, or the fourth capacitor is used to maintain the potential of the third node N3, both of which can control the influence of the data voltage Vdata on the driving current Ids generated by the driving transistor TD. Therefore, by adjusting the size of the fourth capacitor Cst3, the data voltage Vdata required when the driving transistor TD generates the driving current Ids can be adjusted. Figure 7 As shown in the figure, when the fourth capacitor Cst4 is increased, the overall range of the data voltage Vdata required for the driving transistor TD to generate the driving current Ids will be shifted to the right. In this way, based on the different voltage output capabilities of the light-emitting data lines Data on different display panels, the pixel circuit can be compatible with the data voltage Vdata for the driving transistor TD to generate the driving current by adjusting the size of the fourth capacitor Cst4, that is, the pixel circuit generates the driving current to drive the light-emitting device more stably and reliably.

[0106] In addition, when the third node N3 is coupled to the first voltage terminal VDD and the third node N3 respectively through the fourth capacitor Cst4, the third node N3 serves as the drain of the driving transistor TD, and its potential can be kept stable based on the constant operating voltage provided by the first voltage terminal VDD. And, because when the voltage at the first node N1 jumps from the first voltage V1 to the data voltage Vdata, due to the principle of capacitive coupling, the voltage of the third node N3 will also jump upward. Therefore, when the first voltage line Vninit1 provides a higher first voltage V1, so that the smaller the difference between the voltage value of the first voltage V1 and the voltage value of the data voltage Vdata, the smaller the amount of the voltage upward jump of the third node N3 will be. Therefore, by using a higher voltage for the first voltage line Vinit1, the voltage written to the third node N3 by the first voltage terminal VDD can be made lower. In this way, compared with the technical solution in the related art that does not use the fourth capacitor Cst4 to maintain the potential of the third node N3, the embodiment of the present application can reduce the amount of voltage jump coupling of the pixel circuit during operation, thereby reducing the cross-voltage. For example, as Figure 8 As shown, when the driving current generated by the driving transistor TD based on the data voltage Vdata is a small current, the working voltage provided by the first voltage terminal VDD connected to the pixel circuit of the embodiment of the present application has almost no fluctuation, and the related art does not adopt the technical solution of the fourth capacitor Cst4 to maintain the potential of the third node N3, and the cross-voltage of the working voltage provided by the first voltage terminal VDD is more obvious. Fig. 9 As shown, when the driving current generated by the driving transistor TD based on the data voltage Vdata is a medium current, the working voltage provided by the first voltage terminal VDD connected to the pixel circuit of the embodiment of the present application has almost no fluctuation. The related art does not adopt the technical solution of the fourth capacitor Cst4 to maintain the potential of the third node N3, and the cross-voltage of the working voltage provided by the first voltage terminal VDD is still relatively obvious. Fig.10 As shown, even when the driving current generated by the driving transistor TD based on the data voltage Vdata is a large current, the operating voltage provided by the first voltage terminal VDD connected to the pixel circuit in the embodiment of the present application changes gradually and smoothly without irregular fluctuations. The related technology does not adopt the technical solution of using the fourth capacitor Cst4 to maintain the potential of the third node N3, and the cross-voltage fluctuation of the operating voltage provided by the first voltage terminal VDD is relatively difficult to control.

[0107] In some embodiments, the pixel circuit may further include a first reset subcircuit and a second reset subcircuit. The first reset subcircuit is coupled to the first reset control line and the first voltage line respectively, and the first reset subcircuit is also coupled to the first node to which the driving subcircuit is coupled. The second reset subcircuit is coupled to the second reset control line and the second voltage line respectively, and the second reset subcircuit is also coupled to the third node to which the driving subcircuit is coupled.

[0108] like Fig.11 As shown, in the pixel circuit, the control end of the first reset subcircuit 510 is coupled to the first reset control line Reset1, the first end of the first reset subcircuit 510 is coupled to the first voltage line Vinit1, and the second end of the first reset subcircuit 510 is coupled to the first node N1.

[0109] Based on this, when the pixel circuit executes the control method of the pixel circuit provided in the embodiment of the present application, in the reset stage within the above-mentioned frame period, the first reset control line Reset1 provides a control signal to the control end of the first reset sub-circuit 510, and the first reset sub-circuit 510 responds to the control signal to control the first voltage line Vinit1 to be connected to the first node N1, so that the first voltage line Vinit1 writes a first voltage of 1 to the first node N, thereby resetting the first node N1.

[0110] In addition, a control terminal of the second reset sub-circuit 520 is coupled to the second reset control line Reset2, a first terminal of the second reset sub-circuit 520 is coupled to the second voltage line Vinit2-1, and a second terminal of the second reset sub-circuit 520 is coupled to the third node N3.

[0111] In this way, when the pixel circuit executes the control method of the pixel circuit provided by the embodiment of the present application, in the above-mentioned reset stage, the second reset control line Reset2 provides a control signal to the control end of the second reset sub-circuit 520, and the second reset sub-circuit 520 responds to the control signal to control the second voltage line Vinit2-1 to be connected to the third node N3, so that the second voltage line Vinit2-1 continuously writes the second voltage to the third node N3, thereby resetting the third node N3.

[0112] In addition, when the pixel circuit executes the control method of the pixel circuit provided by the embodiment of the present application, in the reset stage, the second light-emitting control line EM2 also sends a control signal to the control terminal of the second control subcircuit 220, and the second control subcircuit 220 responds to the control signal to control the third node N3 to be connected to the first electrode of the light-emitting device. In this way, the second voltage line Vinit2-1 writes the second voltage of the third node N3, and will also be further written to the first electrode of the light-emitting device, thereby resetting the first electrode of the light-emitting device.

[0113] In some embodiments, the voltage value of the first voltage provided by the first voltage line Vinit1 may be less than the voltage value of the working voltage provided by the first voltage terminal VDD, or may be the same as the voltage value of the working voltage provided by the first voltage terminal VDD. The voltage value of the second voltage provided by the second voltage line Vinit2-1 may be less than the voltage value of the first voltage. Alternatively, in other embodiments, the voltage value of the second voltage provided by the second voltage line Vinit2-1 may also be equal to the voltage value of the first voltage. It should be understood that, based on different design requirements of actual applications, the voltage value of the first voltage, the voltage value of the working voltage, and the voltage value of the second voltage may all be adapted to change based on different types of electronic devices, different oxide TFTs used in electronic devices, and / or different light-emitting devices used in electronic devices. That is, the embodiments of the present application do not limit the specific magnitudes of the voltage values ​​of the working voltage, the first voltage, the second voltage, and the third voltage proposed later.

[0114] In the embodiment of the present application, in the reset stage, by simultaneously resetting the first node and the third node connected to the driving subcircuit, it is possible to avoid the residual voltage of the two nodes in the light-emitting stage from affecting the driving subcircuit driving the light-emitting device to emit light in the next frame period, thereby ensuring that the driving subcircuit can accurately control the current development in each frame period to generate a current in the pixel circuit to drive the light-emitting device to emit light, thereby ensuring the stability of the light-emitting brightness of the light-emitting device. In addition, in the reset stage, by synchronizing the voltage written to the third node to the first pole of the light-emitting device to reset the first pole of the light-emitting device, it is also possible to avoid the residual voltage of the light-emitting device itself after the light-emitting ends, which will interfere when responding to the driving subcircuit to emit light in the next light-emitting stage, thereby further ensuring the stability of the light-emitting brightness of the light-emitting device.

[0115] In some embodiments, the first reset subcircuit includes at least one fourth transistor. The fourth transistor may be an LTPO transistor, or the fourth transistor may be an IGZO transistor.

[0116] like Fig.12 As shown, when the first reset sub-circuit 510 includes a fourth transistor T4, the control electrode of the fourth transistor T4 is coupled to the first reset control line Reset1 as the control end of the first reset sub-circuit 510, and the first electrode of the fourth transistor T4 is coupled to the first voltage line Vinit1 as the first end of the first reset sub-circuit 510, and the second electrode of the fourth transistor T4 is coupled to the first node N1 as the second end of the first reset sub-circuit 510.

[0117] In the reset stage, when the first reset control line Reset1 provides a control signal for controlling the fourth transistor T4 to be turned on to the control electrode of the fourth transistor T4, the fourth transistor T4 is turned on in response to the control signal to connect the first voltage line Vinit1 to the first node N1, so that the first voltage line Vinit1 writes the first voltage into the first node N1 to reset the first node N1. In this way, it can be avoided that after the driving subcircuit drives the light-emitting device to emit light in the previous frame period, the residual voltage at the first node N1 affects the driving transistor TD to drive the light-emitting device to emit light in the next frame period.

[0118] In some embodiments, the second reset subcircuit includes at least one fifth transistor. The fifth transistor may be an LTPO transistor, or the fifth transistor may be an IGZO transistor.

[0119] like Fig.12 As shown, when the second reset sub-circuit 520 includes a fifth transistor T5, the control electrode of the fifth transistor T5 is coupled to the second reset control line Reset2 as the control end of the second reset sub-circuit 520, and the first electrode of the fifth transistor T5 is coupled to the second voltage line Vinit2-1 as the first end of the second reset sub-circuit 520, and the second electrode of the fifth transistor T5 is coupled to the third node N3 as the second end of the second reset sub-circuit 520.

[0120] In the reset stage, when the second reset control line Reset2 provides a control signal for controlling the fifth transistor T5 to be turned on to the control electrode of the fifth transistor T5, the fifth transistor T5 is turned on in response to the control signal to connect the second voltage line Vinit2-1 to the third node N3, so that the second voltage line Vinit2-1 writes the second voltage to the third node N3 to reset the third node N3. In this way, it can be avoided that the residual voltage at the third node N3 after the driving sub-circuit drives the light-emitting device to emit light in the previous frame period affects the driving transistor TD to drive the light-emitting device to emit light in the next frame period.

[0121] In some embodiments, the pixel circuit further includes a bootstrap subcircuit, and the bootstrap subcircuit is respectively coupled to the first node and the third node.

[0122] like Fig.13 As shown, the first end of the bootstrap sub-circuit 610 is coupled to the first node N1, and the second end of the bootstrap sub-circuit 610 is coupled to the third node N3. In the data writing stage, the data writing sub-circuit 410 couples the light emitting data line Data to the first node N1 in response to the control signal g provided by the data writing control line Gate, so that when the data voltage Vdata is written to the first node N1 by the light emitting data line Data, the voltage at the first node N1 jumps compared to the reset stage, so that the bootstrap sub-circuit 610 also lifts the voltage at the third node N3.

[0123] In some embodiments, the bootstrap subcircuit includes at least one first capacitor. Fig.14 As shown, when the bootstrap sub-circuit 610 includes a first capacitor Cst1, the first plate of the first capacitor Cst1 is coupled to the first node N1, and the second plate of the first capacitor Cst1 is coupled to the third node N3. In this way, the first capacitor Cst1 can automatically lift up the voltage of the third node N3 when the voltage of the first node N1 rises to the data voltage.

[0124] In some other embodiments, the bootstrap sub-circuit may further include a plurality of capacitors connected in series. For example, when the bootstrap sub-circuit includes N capacitors connected in series, among the capacitors Cst1, Cst2, Cst3 to CstN connected in series, the first electrode of the first capacitor Cst1 is coupled to the first node N1 as the first end of the bootstrap sub-circuit, and the second electrode of the Nth capacitor CstN is coupled to the third node N3 as the second end of the bootstrap sub-circuit.

[0125] In some embodiments, the pixel circuit can be specifically configured as follows: Fig.15 The timing cycle shown drives the light-emitting device of the display panel to emit light, so that the display panel can refresh the image pixels. Fig.14 and Fig.15 As shown, the description is made by taking the case where the transistors included in each sub-circuit in the pixel circuit are all N-type oxide TFTs as an example.

[0126] In the reset phase, the first light emitting control line EM1 provides a low-level control signal, and the first transistor T1 remains turned off in response to the control signal provided by the first light emitting control line EM1, so that the first voltage terminal VDD is disconnected from the second node N2.

[0127] The second light emitting control line EM2 provides a high-level control signal, and the second transistor T2 is turned on in response to the control signal provided by the second light emitting control line EM2 , so that the third node N3 is connected to the first electrode of the light emitting device 310 .

[0128] The first reset control line Reset1 provides a high level control signal, and the fourth transistor T4 is turned on in response to the control signal provided by the first reset control line Reset1 to connect the first voltage line Vinit1 with the first node N1. Thus, the first voltage line Vinit1 starts to write the first voltage to the first node N1 to reset the first node N1.

[0129] The second reset control line Reset2 provides a high-level control signal, and the fifth transistor T5 is turned on in response to the control signal provided by the second reset control line Reset2 to connect the second voltage line Vinit2-1 to the third node N3. Thus, the second voltage line Vinit2-1 begins to write the second voltage to the third node N3 to reset the third node N3. In addition, since the second transistor T2 is turned on to connect the third node N3 to the first electrode of the light-emitting device 310, the voltage at the third node N3 will also be written downward to the first electrode of the light-emitting device 310, thereby resetting the first electrode of the light-emitting device 310.

[0130] The data writing control line Gate provides a low level control signal, so the third transistor T3 remains turned off in response to the control signal provided by the data writing control line Gate, so that the light emitting data line Data is disconnected from the first node N1.

[0131] In the compensation phase after the reset phase, the first light emitting control line EM1 provides a high-level control signal, and the first transistor T1 is turned on in response to the control signal provided by the first light emitting control line EM1 to connect the first voltage terminal VDD with the second node N2. Thus, the operating voltage provided by the first voltage terminal VDD is written into the third node N3 through the first transistor T1 and the driving transistor TD to compensate for the threshold voltage Vth of the third node N3.

[0132] The second light emitting control line EM2 provides a low-level control signal, and the second transistor T2 remains turned off in response to the control signal provided by the second light emitting control line EM2 , so that the third node N3 is disconnected from the first electrode of the light emitting device 310 .

[0133] The first reset control line Reset1 provides a high-level control signal, and the fourth transistor T4 is turned on in response to the control signal provided by the first reset control line Reset1 to connect the first voltage line Vinit1 with the first node N1, so that the first voltage line Vinit1 also continuously writes the first voltage to the first node N1 to compensate for the threshold voltage Vth of the first node N1.

[0134] The second reset control line Reset2 provides a low-level control signal, and the fifth transistor T5 remains turned off in response to the control signal provided by the second reset control line Reset2 to disconnect the second voltage line Vinit2 - 1 from the third node N3 .

[0135] The data writing control line Gate provides a low level control signal, so the third transistor T3 remains turned off in response to the control signal provided by the data writing control line Gate, so that the light emitting data line Data is disconnected from the first node N1.

[0136] In the data writing phase after the compensation phase, the first light emitting control line EM1 provides a low level control signal, and the first transistor T1 remains turned off in response to the control signal provided by the first light emitting control line EM1, so that the first voltage terminal VDD is disconnected from the second node N2.

[0137] The second light emitting control line EM2 provides a low-level control signal, and the second transistor T2 remains turned off in response to the control signal provided by the second light emitting control line EM2 , so that the third node N3 is disconnected from the first electrode of the light emitting device 310 .

[0138] The first reset control line Reset1 provides a low-level control signal, and the fourth transistor T4 remains turned off in response to the control signal provided by the first reset control line Reset1 to disconnect the first voltage line Vinit1 from the first node N1.

[0139] The second reset control line Reset2 provides a low-level control signal, and the fifth transistor T5 remains turned off in response to the control signal provided by the second reset control line Reset2 to disconnect the second voltage line Vinit2 - 1 from the third node N3 .

[0140] The data write control line Gate provides a high level control signal, and the third transistor T3 is turned on in response to the control signal provided by the data write control line Gate to connect the light emitting data line Data with the first node N1, so that the light emitting data line Data writes the data voltage Vdata into the first node N1.

[0141] In the light emitting stage, the first light emitting control line EM1 provides a high level control signal, and the first transistor T1 is turned on in response to the control signal provided by the first light emitting control line EM1 to connect the first voltage terminal VDD with the second node N2.

[0142] The second light emitting control line EM2 provides a high-level control signal, and the second transistor T2 is turned on in response to the control signal provided by the second light emitting control line EM2 , so that the third node N3 is connected to the first electrode of the light emitting device 310 .

[0143] The first reset control line Reset1 provides a low-level control signal, and the fourth transistor T4 remains turned off in response to the control signal provided by the first reset control line Reset1 to disconnect the first voltage line Vinit1 from the first node N1.

[0144] The second reset control line Reset2 provides a low-level control signal, and the fifth transistor T5 remains turned off in response to the control signal provided by the second reset control line Reset2 to disconnect the second voltage line Vinit2 - 1 from the third node N3 .

[0145] In this way, a path is formed in which the first voltage terminal VDD, the first transistor T1, the second node N2, the driving transistor TD, the third node N3, the second transistor T2, the light-emitting device 310 and the second voltage terminal VSS are connected in series in sequence. The driving transistor TD controls the conduction between the second node N2 and the third node N3 to turn on the current switch based on the data voltage Vdata of the first node N1, thereby generating a driving current in the path to drive the light-emitting device 310 to emit light, thereby driving the light-emitting device 310 to emit light.

[0146] It should be noted that, in the reset phase, the voltage at the first node N1 will be reset to the first voltage V1, and the third node N3 and the first electrode of the light emitting device 310 will be reset to the second voltage V2-1. In addition, since the voltage VN1 at the first node N1 is the first voltage V1 continuously written by the first voltage line Vinit1 during the compensation phase. The difference between the voltage VN1 at the first node N1 and the voltage VN3 at the third node N3 is the threshold voltage Vth of the driving transistor TD, that is, VN1-VN3=Vth. Therefore, after the compensation phase is over, the voltage VN3 at the third node N3 will be written as VN1-Vth, and VN1 is equal to the first voltage V1, so that VN3=V1-Vth. And, since the voltage at the first node N1 jumps to Vdata during the data writing phase, the first capacitor Cst1 will automatically raise the voltage at the third node N3. That is, the voltage VN3 at the third node N3 during the data writing phase changes from VN3=V1-Vth to VN3=(Vdata-V1)*Cst1 / CN3+V1-Vth. Where Cst1 is the capacitance of the first capacitor Cst1, and CN3 is all the capacitances on the third node N3. Fig.14 As shown, all the capacitances on the third node N3 at least include the sum of the capacitance of the third node N3 itself and the capacitance of the fourth capacitor Cst. Thus, Cst1 / CN3 is the voltage division of the first capacitor Cst1 relative to the sum of all the capacitances of the third node N3.

[0147] In this way, in the light-emitting stage, the voltage Vgs=VN1-VN3 used by the driving transistor TD to generate the driving current Ids can be changed to Vgs=Vdata-(Vdata-V1)*Cst1 / CN3-V1+Vth. Therefore, by substituting the voltage Vgs into the current formula Ids=K(Vgs-Vth)^2 of the driving transistor TD in the light-emitting stage, the driving current Ids=K(Vdata-(Vdata-V1)*Cst1 / CN3-V1)^2 generated by the driving transistor TD based on the voltage Vgs can be obtained. In this way, there is no threshold voltage Vth in the new current formula, so that the driving current Ids will no longer be affected by the threshold voltage Vth. That is, the embodiment of the present application can overcome the influence of the threshold voltage Vth on the driving current and complete the compensation of the threshold voltage Vth.

[0148] It should be noted that in the current formula for obtaining the driving current Ids based on the voltage Vgs, K=1 / 2*μC(W / L). Here, "μC" is the process parameter of the transistor, and "W / L" is the width-to-length ratio of the channel inside the transistor. Therefore, for a specific oxide TFT with known "μC" and "W / L", K=1 / 2*μC(W / L) is a constant.

[0149] In some embodiments, the pixel circuit may further include a third reset subcircuit, which is coupled to the second reset control line, is also coupled to the third voltage line, and is coupled to a fourth node, which is coupled to the first electrode of the light-emitting device.

[0150] like Fig.16 As shown, the control end of the third reset subcircuit 530 is coupled to the second reset control line Reset2, the first end of the third reset subcircuit 530 is coupled to the third voltage line Vinit2, and the second end of the third reset subcircuit 530 is coupled to the fourth node N4. In this way, when the pixel circuit executes the control method of the pixel circuit provided in the embodiment of the present application, in the reset stage, the second reset control line Reset2 provides a control signal to the control end of the third reset subcircuit 530, and the third reset subcircuit 530 controls the third voltage line Vinit2 to be connected to the fourth node N4 in response to the control signal, so that the third voltage line Vinit2 can write the third voltage into the fourth node N4. Since the fourth node N4 is coupled to the first electrode of the light-emitting device 310, the third voltage will be further written into the first electrode of the light-emitting device 310, thereby resetting the first electrode of the light-emitting device 310.

[0151] It should be noted that the voltage value of the third voltage can be the same as the voltage value of the second voltage mentioned above, for example, the voltage value of the third voltage is equal to the voltage value of the second voltage, which is equal to -3 volts (v). Alternatively, the voltage value of the third voltage can also be greater than the voltage value of the second voltage, for example, the voltage value of the third voltage is equal to -3v, and the voltage value of the second voltage is equal to -2v. It should be understood that, based on the different design needs of practical applications, in different feasible implementations, the voltage values ​​of the third voltage and the second voltage can of course also be other sizes not listed here. The embodiments of the present application are not limited to the specific sizes of the voltage values ​​of the third voltage and the second voltage, as long as the voltage value of the third voltage is equal to the voltage value of the second voltage, or the voltage value of the third voltage is slightly greater than the voltage value of the second voltage, and in accordance with the technical concept of the embodiments of the present application, they should be included in the protection scope of the embodiments of the present application.

[0152] In addition, when the pixel circuit includes a third reset sub-circuit 530, in the reset stage, the second light-emitting control line EM2 provides a control signal to the control end of the second control sub-circuit 220 to control the second control sub-circuit 220 to shut down, so that the second control sub-circuit 220 remains closed in the reset stage in response to the control signal, so that the third node N3 is disconnected from the fourth node N4.

[0153] In some embodiments, the third reset subcircuit includes at least one sixth transistor. The sixth transistor may be an LTPO transistor, or the sixth transistor may also be an IGZO transistor.

[0154] like Fig.17 As shown, the control electrode of the sixth transistor T6 is coupled to the second reset control line Reset2 as the control terminal of the third reset sub-circuit 530, the first electrode of the sixth transistor T6 is coupled to the third voltage line Vinit2 as the first terminal of the third reset sub-circuit 530, and the second electrode of the sixth transistor T6 is coupled to the fourth node N4 as the second terminal of the third reset sub-circuit 530, and the fourth node N4 is coupled to the first electrode of the light-emitting device 310. When the second reset control line Reset2 provides a control signal for controlling the sixth transistor T6 to be turned on to the control electrode of the sixth transistor T6, the sixth transistor T6 is turned on in response to the control signal to connect the third voltage line Vinit2 to the fourth node N4, so that the third voltage line Vinit2 writes the third voltage V2 into the fourth node N4, and further writes into the first electrode of the light-emitting device 310.

[0155] In some embodiments, the pixel circuit may also be specifically configured as follows: Fig.18 The timing cycle shown drives the light-emitting device of the display panel to emit light, so that the display panel can refresh the image pixels. Fig.17 and Fig.18As shown, the description is still made by taking the case where the transistors included in each sub-circuit in the pixel circuit are all N-type oxide TFTs as an example.

[0156] In the reset phase, the first light emitting control line EM1 provides a low-level control signal, and the first transistor T1 remains turned off in response to the control signal provided by the first light emitting control line EM1, so that the first voltage terminal VDD is disconnected from the second node N2.

[0157] The second light emitting control line EM2 provides a low-level control signal, and the second transistor T2 remains turned off in response to the control signal provided by the second light emitting control line EM2 , so that the third node N3 is disconnected from the first electrode of the light emitting device 310 .

[0158] The first reset control line Reset1 provides a high level control signal, and the fourth transistor T4 is turned on in response to the control signal provided by the first reset control line Reset1 to connect the first voltage line Vinit1 with the first node N1. Thus, the first voltage line Vinit1 starts to write the first voltage to the first node N1 to reset the first node N1.

[0159] The second reset control line Reset2 provides a high-level control signal, and the fifth transistor T5 is turned on in response to the control signal provided by the second reset control line Reset2 to connect the second voltage line Vinit2-1 to the third node N3. Thus, the second voltage line Vinit2-1 starts to write the second voltage to the third node N3 to reset the third node N3. In addition, the sixth transistor T6 is also turned on in response to the control signal provided by the second reset control line Reset2 to connect the third voltage line Vinit2 to the fourth node N4. The fourth node N4 is coupled to the first electrode of the light-emitting device 310, so that the third voltage line Vinit2 starts to write the third voltage V2 to the first electrode of the light-emitting device 310 to reset the first electrode of the light-emitting device 310.

[0160] The data writing control line Gate provides a low level control signal, so the third transistor T3 remains turned off in response to the control signal provided by the data writing control line Gate, so that the light emitting data line Data is disconnected from the first node N1.

[0161] It should be noted that the pixel circuit is Fig.18 When the timing sequence shown in the figure drives the light emitting device to emit light, except for the reset phase and the above-mentioned Fig.15 Except for the difference in the timing driving the light-emitting device to emit light, in the remaining light-emitting stages, compensation stages and data writing stages, the method operations performed by the pixel circuit are the same as the aforementioned method operations, and the same contents will not be repeated here.

[0162] In some embodiments, the pixel circuit further includes a first isolation subcircuit, a second isolation subcircuit, a third control subcircuit, and a fourth reset subcircuit. Among them, the third control subcircuit is coupled to the second light-emitting control line to share the control signal provided by the second light-emitting control line. In addition, the third control subcircuit is also coupled to the first node and the fifth node respectively (the fifth node is coupled to the data writing subcircuit); the first isolation subcircuit is coupled to the fifth node and the sixth node respectively to isolate the fifth node from the sixth node. The second isolation subcircuit is coupled to the sixth node and the third node respectively to isolate the sixth node from the third node. The fourth reset subcircuit is coupled to the above-mentioned first reset control line, the first voltage line, and the sixth node respectively.

[0163] like Fig.19 As shown, the control end of the third control subcircuit 230 is coupled to the second light emitting control line EM2, the first end of the third control subcircuit 230 is coupled to the first node N1, the second end of the third control subcircuit 230 is coupled to the fifth node N5, and the fifth node N5 is coupled to the second end of the data writing subcircuit 410. In addition, the first end of the first isolation subcircuit 710 is coupled to the fifth node N5, and the second end of the first isolation subcircuit 710 is coupled to the sixth node N6; the first end of the second isolation subcircuit 720 is coupled to the sixth node N6, and the second end of the second isolation subcircuit 720 is coupled to the third node N3. Finally, the control end of the fourth reset subcircuit 540 is coupled to the first reset control line Reset1, the first end of the fourth reset subcircuit 540 is coupled to the first voltage line Vnint1, and the second end of the fourth reset subcircuit 540 is coupled to the sixth node N6.

[0164] In this way, when the pixel circuit executes the control method of the pixel circuit provided by the embodiment of the present application, the pixel circuit can perform data writing operation in the compensation stage. That is, since the third control subcircuit 230 controls the fifth node N5 to be connected to the first node N1 in response to the control signal em2 provided by the second light-emitting control line EM2, but in the compensation stage, the third control subcircuit 230 remains closed in response to the control signal provided by the second light-emitting control line EM2, so that the fifth node N5 and the first node N1 are kept disconnected in the compensation stage. Therefore, in the compensation stage, the first voltage line Vinit1 writes the first voltage to the first node N1, which will not affect the voltage on the fifth node. Moreover, the first reset control line Reset1 still provides a control signal to turn on the control subcircuit in the compensation stage, so that the fourth reset subcircuit 540 will also turn on in response to the control signal provided by the first reset control line Reset1, so that the first voltage line Vinit1 continues to write the first voltage at the sixth node N6. However, since the first isolation subcircuit 710 is located between the fifth node N5 and the sixth node N6, the fifth node is isolated from the sixth node. Therefore, the first voltage line Vinit1 writes the first voltage to the sixth node N6, and does not affect the voltage on the fifth node. Therefore, the data writing control line Gate can provide a control signal to turn on the control subcircuit in the compensation stage, so that the data writing subcircuit 410 responds to the control signal provided by the data writing control line Gate to turn on, so as to connect the light-emitting data line Data with the fifth node N5, so that the light-emitting data line Data writes the data voltage Vdata to the fifth node N5. Afterwards, in the light-emitting stage, since the first light-emitting control line EM1 and the second light-emitting control line EM2 each provide a control signal to turn on the control subcircuit, the third control subcircuit 230 responds to the control signal provided by the second light-emitting control line EM2 to turn on, so as to connect the first node N1 with the fifth node N5. In this way, the data voltage Vdata on the fifth node N5 will be transmitted to the first node N1 through the third control sub-circuit 230, so that the potential of the driving sub-circuit 110 on the first node N1 becomes the data voltage Vdata, and when the first control sub-circuit and the second control sub-circuit are both turned on, the conduction between the second node N2 and the third node N3 is controlled to be turned on based on the data voltage Vdata to turn on the current switch, thereby generating a driving current in the path to drive the light-emitting device 310 to emit light.In addition, since the first reset control line Reset1 and the second reset control line Reset2 will not provide a control signal for turning on the control sub-circuit during the light-emitting stage, the fourth reset sub-circuit 540 will remain closed during the light-emitting stage to disconnect the sixth node N6 from the first voltage line Vinit1. In this way, since there is no longer any first voltage input between the first isolation sub-circuit 710 and the second isolation sub-circuit 720, the first isolation sub-circuit 710 and the second isolation sub-circuit 720 will be coupled as a bootstrap sub-circuit, thereby automatically raising the voltage at the third node N3 when the voltage at the first node N1 jumps to Vdata.

[0165] In some embodiments, the first isolation subcircuit includes at least one second capacitor. Fig. 20 As shown, the first plate of the second capacitor Cst2 is coupled to the fifth node N5, and the second plate of the second capacitor Cst2 is coupled to the sixth node N6, so that the second capacitor Cst2 can isolate the fifth node N5 from the sixth node N6, so that the first voltage V1 written to the sixth node N6 will not affect the data voltage Vdata written on the fifth node N5.

[0166] In some embodiments, the second isolation subcircuit includes at least one third capacitor. Fig. 20 As shown, the first plate of the third capacitor Cst3 is coupled to the sixth node N6, and the second plate of the third capacitor Cst3 is coupled to the third node N3. In this way, the third capacitor Cst can also isolate the sixth node N6 from the third node N3, so that when the first voltage line Vinit1 writes the first voltage V1 to the sixth node N6 to reset the sixth node N6, the first voltage V1 of the sixth node N1 will not affect the second voltage line V2-1 writing the second voltage V2-1 on the third node N3.

[0167] In some embodiments, the third control subcircuit includes at least one seventh transistor. The seventh transistor is the same as the first to sixth transistors, that is, the seventh transistor may be an LTPO transistor, or the seventh transistor may also be an IGZO transistor.

[0168] like Fig. 20As shown, the control electrode of the seventh transistor T7 is coupled to the second light-emitting control line EM2 as the control terminal of the third control subcircuit 230, the first electrode of the seventh transistor T7 is coupled to the first node N1 as the first terminal of the third control subcircuit 230, and the second electrode of the seventh transistor T7 is coupled to the fifth node N5 as the second terminal of the third control subcircuit 230. In the light-emitting stage, when the second light-emitting control line EM2 provides a control signal for controlling the seventh transistor T7 to be turned on to the control electrode of the seventh transistor T7, the seventh transistor T7 is turned on in response to the control signal to connect the fifth node N5 with the first node N1, so that the data voltage Vdata on the fifth node N5 can be written to the first node N1 through the seventh transistor T7.

[0169] In some embodiments, the fourth reset subcircuit includes at least one eighth transistor. The eighth transistor may be an LTPO transistor, or the eighth transistor may be an IGZO transistor.

[0170] like Fig. 20 As shown, the control electrode of the eighth transistor T8 is coupled to the first reset control line Reset1 as the control terminal of the fourth reset sub-circuit 540, the first electrode of the eighth transistor T8 is coupled to the first voltage line Vinit1 as the first terminal of the fourth reset sub-circuit 540, and the second electrode of the eighth transistor T8 is coupled to the sixth node N6 as the second terminal of the fourth reset sub-circuit 540. In the reset stage, when the first reset control line Reset1 provides a control signal for controlling the eighth transistor T8 to turn on to the control electrode of the eighth transistor T8, the eighth transistor T8 is turned on in response to the control signal to connect the first voltage line Vinit1 to the sixth node N6, so that the first voltage line Vinit1 writes the first voltage V1 into the sixth node N6 to reset the sixth node N6.

[0171] In some embodiments, the pixel circuit may also be specifically configured as follows: Fig.21 The timing cycle shown drives the light-emitting device of the display panel to emit light, so that the display panel can refresh the image pixels. Fig. 20 and Fig.21 As shown, the description is still made by taking the case where the transistors included in each sub-circuit in the pixel circuit are all N-type oxide TFTs as an example.

[0172] In the data writing phase, the first light emitting control line EM1 provides a low level control signal, and the first transistor T1 remains turned off in response to the control signal provided by the first light emitting control line EM1, so that the first voltage terminal VDD is disconnected from the second node N2.

[0173] The second light emitting control line EM2 provides a low-level control signal, and the second transistor T2 remains turned off in response to the control signal provided by the second light emitting control line EM2, so that the third node N3 is disconnected from the fourth node N4. In addition, the seventh transistor T7 also remains turned off in response to the control signal provided by the second light emitting control line EM2, so that the first node N1 is disconnected from the fifth node N5.

[0174] The first reset control line Reset1 provides a high-level control signal, and the fourth transistor T4 is turned on in response to the control signal provided by the first reset control line Reset1 to connect the first voltage line Vinit1 to the first node N1. Thus, the first voltage line Vinit1 starts to write the first voltage to the first node N1 to perform threshold voltage compensation on the first node N1. In addition, the eighth transistor T8 is turned on in response to the control signal provided by the first reset control line Reset1 to connect the first voltage line Vinit1 to the sixth node N6. Thus, the first voltage line Vinit1 starts to continuously write the first voltage to the sixth node N6.

[0175] The second reset control line Reset2 provides a low-level control signal, and the fifth transistor T5 remains turned off in response to the control signal provided by the second reset control line Reset2 to disconnect the second voltage line Vinit2 - 1 from the third node N3 .

[0176] The data write control line Gate provides a high level control signal, and the third transistor T3 is turned on in response to the control signal provided by the data write control line Gate to connect the light emitting data line Data with the fifth node N5, so that the light emitting data line Data writes the data voltage Vdata into the fifth node N5.

[0177] Afterwards, in the light emitting stage, the first light emitting control line EM1 provides a high level control signal, and the first transistor T1 is turned on in response to the control signal provided by the first light emitting control line EM1 to connect the first voltage terminal VDD with the second node N2.

[0178] The second light emitting control line EM2 provides a high-level control signal, and the second transistor T2 is turned on in response to the control signal provided by the second light emitting control line EM2, so that the third node N3 is connected to the fourth node N4, and then connected to the first electrode of the light emitting device 310. In addition, the seventh transistor T7 is also turned on in response to the control signal provided by the second light emitting control line EM2, so that the first node N1 is connected to the fifth node N5, so that the data voltage Vdata on the fifth node N5 will be written down to the first node N1.

[0179] The first reset control line Reset1 provides a low-level control signal, and the fourth transistor T4 remains turned off in response to the control signal provided by the first reset control line Reset1 to disconnect the first voltage line Vinit1 from the first node N1. In addition, the eighth transistor T8 also remains turned off in response to the control signal provided by the first reset control line Reset1 to disconnect the first voltage line Vinit1 from the sixth node N6.

[0180] The second reset control line Reset2 provides a low-level control signal, and the fifth transistor T5 remains turned off in response to the control signal provided by the second reset control line Reset2 to disconnect the second voltage line Vinit2 - 1 from the third node N3 .

[0181] In this way, a path is formed in which the first voltage terminal VDD, the first transistor T1, the second node N2, the driving transistor TD, the third node N3, the second transistor T2, the light-emitting device 310 and the second voltage terminal VSS are connected in series in sequence. The driving transistor TD controls the conduction between the second node N2 and the third node N3 to turn on the current switch based on the data voltage Vdata of the first node N1, thereby generating a driving current in the path to drive the light-emitting device 310 to emit light, thereby driving the light-emitting device 310 to emit light.

[0182] It should be noted that the pixel circuit is Fig.21 When the timing sequence shown in the figure is used to drive the light emitting device to emit light, except for the data writing phase and the light emitting phase, the same as above is performed. Fig.18 Except for the difference in the timing of driving the light emitting device to emit light, in the remaining compensation stage and reset stage, the method and operation performed by the pixel circuit are the same as those described above. Fig.18 The method of driving the light-emitting device to emit light in the timing shown is the same in operation, and the same content will not be repeated here. In addition, the data writing stage is between the compensation stages, that is, the start time of the data writing stage is later than the start time of the compensation stage, but the end time of the data writing stage is earlier than the end time of the compensation stage.

[0183] In the embodiment of the present application, by adding a seventh transistor T7 between the first node N1 and the fifth node N5, and the seventh transistor T7 remains closed in the compensation stage to disconnect the first node N1 and the fifth node N5, so that the first voltage line Vinit1 writes the first voltage to the first node N1, which will not affect the light-emitting data line Data writing the data voltage Vdata to the fifth node N5. In addition, by adding a second capacitor Cst2 between the fifth node N5 and the sixth node N6 and a third capacitor Cst3 between the sixth node N6 and the third node N3, and adding an eighth transistor T8 to the sixth node N6 so that the eighth transistor T8 is turned on in the compensation stage, the first voltage is continuously written to the sixth node N6, so that the first voltage line Vinit1 writes the first voltage to the sixth node N6, and will not affect the light-emitting data line Data writing the data voltage Vdata to the fifth node N5. In this way, the pixel circuit can perform data writing operations in the compensation stage, thereby improving the efficiency of the pixel circuit driving the light-emitting device to emit light.

[0184] In addition, in the embodiment of the present application, since the fourth reset subcircuit 540 remains closed in the light-emitting stage to disconnect the sixth node N6 from the first voltage line Vinit1, the second capacitor Cst2 and the third capacitor Cst3 are coupled as a capacitor to automatically raise the voltage at the third node N3 when the voltage at the first node N1 jumps to the data voltage Vdata. Therefore, when the voltage at the first node N1 jumps, the voltage at the third node N3 is automatically raised by the bootstrap subcircuit, so that when the driving subcircuit turns on the second node N2 and the third node N3 based on the data voltage Vdata of the first node N1 to generate a driving current in the light-emitting stage, the threshold voltage at the third node N3 is eliminated, thereby completing the compensation of the threshold voltage.

[0185] In some embodiments, an embodiment of the present application provides a display panel, the display panel includes a plurality of sub-pixels, each sub-pixel includes a pixel circuit and a light-emitting device connected to each other, and the pixel circuit is the pixel circuit described in the above embodiments.

[0186] In some embodiments, the present application provides a display panel, the display panel includes a plurality of sub-pixels, each sub-pixel includes a pixel circuit and a light-emitting device connected to each other. When the display panel is running, the pixel circuit on the display panel executes the control method of the pixel circuit described in the above embodiments.

[0187] In some embodiments, the embodiments of the present application provide an electronic device, which has the function of implementing the control method of the pixel circuit described in each of the above embodiments. The function can be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0188] In the embodiments of the present application, the electronic devices provided in the embodiments of the present application may include but are not limited to mobile phones, tablet computers, laptop computers, handheld computers, netbooks, personal digital assistants (PDAs), wearable electronic devices, virtual reality devices, and other terminal devices that have their own display panels.

[0189] In some embodiments, an embodiment of the present application provides an electronic device, including: a display panel, a processor and a memory; the display panel includes multiple sub-pixels, each sub-pixel includes a pixel circuit and a light-emitting device connected to each other, and the pixel circuit is such as the pixel circuit described in each embodiment.

[0190] In some embodiments, an embodiment of the present application provides an electronic device, including: a display panel, a processor and a memory; the memory is used to store computer program code, the computer program code includes computer execution instructions, and when the electronic device is running, the processor executes the computer execution instructions to enable the pixel circuit on the display panel of the electronic device to execute the control method of the pixel circuit described in the above embodiments.

[0191] In some embodiments, an embodiment of the present application provides an electronic device, comprising: a processor; the processor is used to couple with a memory, and after reading instructions in the memory, execute the control method of the pixel circuit described in the above embodiments according to the instructions.

[0192] In some embodiments, an embodiment of the present application provides a computer-readable storage medium, including computer instructions. When the computer instructions are executed on an electronic device, the pixel circuit of the display panel of the electronic device executes the pixel circuit control method as described above.

[0193] In some embodiments, an embodiment of the present application provides a computer-readable storage medium, including computer instructions. When the computer instructions are executed on an electronic device, the pixel circuit of the display panel of the electronic device executes the pixel circuit control method as described above.

[0194] In some embodiments, the embodiments of the present application provide a computer program product. When the computer program product is run on an electronic device, the pixel circuit of the display panel of the electronic device executes the pixel circuit control method described in the above embodiments.

[0195] In some embodiments, the embodiments of the present application provide a computer program product. When the computer program product is run on an electronic device, the pixel circuit of the display panel of the electronic device executes the pixel circuit control method described in the above embodiments.

[0196] In some embodiments, an embodiment of the present application provides a device, which includes a display panel and a processor; the display panel includes a plurality of sub-pixels, each sub-pixel includes a pixel circuit and a light-emitting device connected to each other, and the pixel circuit is as described in each embodiment. In addition, the processor of the device is used to support the pixel circuit of the display panel to implement the functions corresponding to the control methods of the pixel circuits described in each of the above embodiments. In one possible design, the device also includes a memory, which is used to store program instructions and data necessary for the electronic device.

[0197] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0198] The above contents are only specific implementation methods of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application shall be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A pixel circuit, characterized in that: The pixel circuit is coupled to the light emitting device, and the pixel circuit includes: a driving subcircuit, a first control subcircuit, a second control subcircuit and a data writing subcircuit; The first control subcircuit is used to couple with the first light-emitting control line and the first voltage terminal respectively, and the first control subcircuit is also coupled with the second node; the first control subcircuit is configured to control the first voltage terminal to be connected with the second node in response to a control signal provided by the first light-emitting control line; The second control subcircuit is used to couple with the second light-emitting control line and the light-emitting device respectively, and the light-emitting device is also coupled with the second voltage terminal; the voltage value of the voltage provided by the second voltage terminal is lower than the voltage value of the voltage provided by the first voltage terminal; The second control subcircuit is also coupled to a third node, and the second control subcircuit is configured to control the third node to be connected or disconnected with the light emitting device in response to a control signal provided by the second light emitting control line; The data writing subcircuit is used to couple with the data writing control line and the light emitting data line respectively, and the data writing subcircuit is also coupled with the first node; the data writing subcircuit is configured to control the light emitting data line to be connected with the first node in response to a control signal provided by the data writing control line; The driving subcircuit is coupled to the first node, the second node and the third node respectively, and is configured to control the second node and the third node to be connected based on the potential of the first node; and to generate a driving current for driving the light-emitting device when the first control subcircuit controls the first voltage terminal to be connected to the second node and the second control subcircuit controls the third node to be connected to the light-emitting device.

2. The pixel circuit according to claim 1, characterized in that: The driving subcircuit includes a driving transistor; The control electrode of the driving transistor is coupled to the first node, the first electrode of the driving transistor is coupled to the second node, and the second electrode of the driving transistor is coupled to the third node; the driving transistor is configured to control the second node and the third node to be connected based on the potential of the first node to generate the driving current; The driving transistor is an N-type low temperature polysilicon oxide LTPO transistor, or the driving transistor is an N-type indium gallium zinc oxide IGZO transistor.

3. The pixel circuit according to claim 1 or 2, characterized in that: The first control subcircuit includes a first transistor; The control electrode of the first transistor is coupled to the first light-emitting control line, the first electrode of the first transistor is coupled to the first voltage terminal, and the second electrode of the first transistor is coupled to the second node; the first transistor is configured to connect the first voltage terminal and the second node in response to a control signal provided by the first light-emitting control line.

4. The pixel circuit according to any one of claims 1 to 3, characterized in that: The second control subcircuit includes a second transistor; The control electrode of the second transistor is coupled to the second light-emitting control line, the first electrode of the second transistor is coupled to the third node, and the second electrode of the second transistor is coupled to the light-emitting device; the second transistor is configured to connect the third node and the light-emitting device in response to a control signal provided by the second light-emitting control line.

5. The pixel circuit according to any one of claims 1 to 4, characterized in that: The data writing sub-circuit includes a third transistor; The control electrode of the third transistor is coupled to the data write control line, the first electrode of the third transistor is coupled to the light-emitting data line, and the second electrode of the third transistor is coupled to the first node; the third transistor is configured to connect the light-emitting data line and the first node in response to a control signal provided by the data write control line.

6. The pixel circuit according to any one of claims 1 to 5, characterized in that: The pixel circuit further includes: a first reset subcircuit and a second reset subcircuit; The first reset subcircuit is used to couple with the first reset control line and the first voltage line respectively, and the first reset subcircuit is also coupled with the first node; the first reset subcircuit is configured to control the first voltage line to be connected with the first node in response to a control signal provided by the first reset control line; The second reset sub-circuit is used to couple to the second reset control line and the second voltage line respectively, and the second reset sub-circuit is also coupled to the third node; the second reset sub-circuit is configured to control the second voltage line to be connected to the third node in response to a control signal provided by the second reset control line.

7. The pixel circuit according to claim 6, characterized in that: The first reset subcircuit includes a fourth transistor; The control electrode of the fourth transistor is coupled to the first reset control line, the first electrode of the fourth transistor is coupled to the first voltage line, and the second electrode of the fourth transistor is coupled to the first node; the fourth transistor is configured to connect the first voltage line and the first node in response to a control signal provided by the first reset control line.

8. The pixel circuit according to claim 6 or 7, characterized in that: The second reset subcircuit includes a fifth transistor; The control electrode of the fifth transistor is coupled to the second reset control line, the first electrode of the fifth transistor is coupled to the second voltage line, and the second electrode of the fifth transistor is coupled to the third node; the fifth transistor is configured to connect the second voltage line and the third node in response to a control signal provided by the second reset control line.

9. The pixel circuit according to any one of claims 1 to 8, characterized in that: The pixel circuit further includes: a third reset subcircuit; The third reset subcircuit is used to couple to the second reset control line and the third voltage line respectively, and the third reset subcircuit is coupled to a fourth node, and the fourth node is used to couple to the light-emitting device; the third reset subcircuit is configured to control the third voltage line to be connected to the fourth node in response to a control signal provided by the second reset control line.

10. The pixel circuit according to claim 9, characterized in that: The third reset subcircuit includes a sixth transistor; The control electrode of the sixth transistor is coupled to the second reset control line, the first electrode of the sixth transistor is coupled to the third voltage line, and the second electrode of the sixth transistor is coupled to the fourth node; the sixth transistor is configured to connect the third voltage line and the fourth node in response to a control signal provided by the second reset control line.

11. The pixel circuit according to any one of claims 1 to 10, characterized in that: The pixel circuit further comprises: a bootstrap subcircuit; The bootstrap sub-circuit is coupled to the first node and the third node respectively; the bootstrap sub-circuit is configured to, in response to a voltage jump at the first node, lift the voltage of the third node.

12. The pixel circuit according to claim 11, characterized in that: The bootstrap subcircuit includes a first capacitor; The first plate of the first capacitor is coupled to the first node, and the second plate of the first capacitor is coupled to the third node; the first capacitor is configured to raise the voltage of the third node in response to a jump in the voltage of the first node.

13. The pixel circuit according to any one of claims 1 to 10, characterized in that: The pixel circuit further includes: a first isolation subcircuit, a second isolation subcircuit, a third control subcircuit and a fourth reset subcircuit; The third control subcircuit is used to couple with the second light emitting control line, and the third control subcircuit is also coupled with the first node and the fifth node respectively, and the fifth node is used to couple with the data writing subcircuit; the third control subcircuit is configured to control the fifth node to be connected with the first node in response to the control signal provided by the second light emitting control line; The first isolation subcircuit is coupled to the fifth node and the sixth node respectively, and the first isolation subcircuit is configured to isolate the fifth node from the sixth node; The second isolation subcircuit is coupled to the sixth node and the third node respectively, and the second isolation subcircuit is configured to isolate the sixth node from the third node; The fourth reset sub-circuit is used to couple to the first reset control line and the first voltage line respectively, and the fourth reset sub-circuit is coupled to the sixth node; the fourth reset sub-circuit is configured to control the first voltage line to be connected to the sixth node in response to a control signal provided by the first reset control line.

14. The pixel circuit according to claim 13, characterized in that: The first isolation subcircuit includes a second capacitor; The first plate of the second capacitor is coupled to the fifth node, and the second plate of the second capacitor is coupled to the sixth node; the second capacitor is configured to isolate the fifth node from the sixth node.

15. The pixel circuit according to claim 13 or 14, characterized in that: The second isolation subcircuit includes a third capacitor; The first plate of the third capacitor is coupled to the sixth node, and the second plate of the third capacitor is coupled to the third node; the third capacitor is configured to isolate the sixth node from the third node.

16. The pixel circuit according to any one of claims 13 to 15, characterized in that: The third control subcircuit includes a seventh transistor; The control electrode of the seventh transistor is coupled to the second light-emitting control line, the first electrode of the seventh transistor is coupled to the first node, and the second electrode of the seventh transistor is coupled to the fifth node; the seventh transistor is configured to connect the fifth node and the first node in response to a control signal provided by the second light-emitting control line.

17. The pixel circuit according to any one of claims 13 to 16, characterized in that: The fourth reset sub-circuit comprises an eighth transistor; The control electrode of the eighth transistor is coupled to the first reset control line, the first electrode of the eighth transistor is coupled to the first voltage line, and the second electrode of the eighth transistor is coupled to the sixth node; the eighth transistor is configured to connect the first voltage line and the sixth node in response to a control signal provided by the first reset control line.

18. The pixel circuit according to any one of claims 1 to 17, characterized in that: The pixel circuit further includes: an energy storage subcircuit; The energy storage subcircuit is coupled to the second node and the third node respectively, and the energy storage subcircuit is configured to maintain the potential of the second node and the third node; Alternatively, the energy storage subcircuit is coupled to the first voltage terminal and the third node respectively, and the energy storage subcircuit is configured to maintain the potential of the third node.

19. The pixel circuit according to claim 18, characterized in that: The energy storage subcircuit includes a fourth capacitor; A first end of the fourth capacitor is coupled to the second node, and a second end of the fourth capacitor is coupled to the third node; the fourth capacitor is configured to maintain the potentials of the second node and the third node; Alternatively, the first end of the fourth capacitor is coupled to the first voltage end, and the second end of the fourth capacitor is coupled to the third node; the fourth capacitor is configured to maintain the potential of the third node.

20. A method for controlling a pixel circuit, characterized in that: The control method is applied to a pixel circuit, the pixel circuit comprising a driving subcircuit, a first control subcircuit, a second control subcircuit and a data writing subcircuit; the first control subcircuit is used to couple with a first light emitting control line and a first voltage terminal respectively, and the first control subcircuit is coupled with a second node; The second control subcircuit is used to be coupled to the second light emitting control line and the light emitting device respectively, and the light emitting device is coupled to the second voltage terminal; The voltage value of the voltage provided by the second voltage terminal is smaller than the voltage value of the voltage provided by the first voltage terminal; The second control subcircuit is coupled to the third node; the data writing subcircuit is used to couple to the data writing control line and the light emitting data line respectively, and the data writing subcircuit is coupled to the first node; the driving subcircuit is coupled to the first node, the second node and the third node respectively; A frame period at least includes a compensation phase, a data writing phase and a light emitting phase; the control method includes: In the compensation stage, the first control subcircuit controls the first voltage terminal to be connected to the second node in response to the control signal provided by the first light-emitting control line, and the second control subcircuit controls the third node to be disconnected from the light-emitting device in response to the control signal provided by the second light-emitting control line; In the data writing stage, the data writing subcircuit controls the light emitting data line to be connected to the first node in response to a control signal provided by the data writing control line; In the light-emitting stage, the first control subcircuit controls the first voltage terminal to be connected to the second node in response to the control signal provided by the first light-emitting control line, the second control subcircuit controls the third node to be connected to the light-emitting device in response to the control signal provided by the second light-emitting control line, and the driving subcircuit controls the second node and the third node to be connected based on the potential of the first node, thereby generating a driving current to drive the light-emitting device.

21. The method according to claim 20, characterized in that The pixel circuit further includes: a first isolation subcircuit, a second isolation subcircuit, a third control subcircuit and a fourth reset subcircuit; the third control subcircuit is used to couple with the second light emitting control line, and the third control subcircuit is respectively coupled with the first node and the fifth node; the fifth node is used to couple with the data writing subcircuit; the first isolation subcircuit is respectively coupled with the fifth node and the sixth node; the second isolation subcircuit is respectively coupled with the sixth node and the third node; the fourth reset subcircuit is respectively coupled with the first reset control line and the first voltage line, and the fourth reset subcircuit is coupled with the sixth node; The method further comprises: In a reset phase and a compensation phase within a frame period, the fourth reset subcircuit controls the first voltage line to be connected to the sixth node in response to a control signal provided by the first reset control line; In the data writing phase, the data writing subcircuit controls the light emitting data line to be connected to the fifth node in response to a control signal provided by the data writing control line; the data writing phase is between the start time and the end time of the compensation phase; In the light emitting stage, the third control subcircuit controls the fifth node to be connected to the first node in response to a control signal provided by the second light emitting control line.

22. A display panel, characterized in that: The display panel includes a plurality of sub-pixels, each of which includes a pixel circuit and a light-emitting device connected to each other, and the pixel circuit is the pixel circuit as claimed in any one of claims 1 to 19.

23. An electronic device, characterized in that: The electronic device comprises: a display panel, a processor and a memory, the display panel comprises a plurality of sub-pixels, each sub-pixel comprises a pixel circuit and a light-emitting device connected to each other, the pixel circuit being the pixel circuit as described in any one of claims 1 to 19; and / or, the electronic device comprises: a display panel, a processor and a memory, the processor being coupled to the memory; the memory being used to store computer program code; the computer program code comprises computer instructions, and when the processor executes the above-mentioned computer instructions, the pixel circuit executes the method as described in any one of claims 20-21.

24. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes computer instructions, and when the computer instructions are executed on an electronic device, a pixel circuit of a display panel of the electronic device executes the method as claimed in any one of claims 20 to 21.

25. A computer program product, characterized in that The computer program product includes computer instructions, and when the computer instructions are executed on an electronic device, the pixel circuit of the display panel of the electronic device executes the method as claimed in any one of claims 20 to 21.

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