Addressing circuit, battery management unit, battery management system and energy storage system

By using automatic addressing circuit in the energy storage system, using high-level signals to determine the input and output of the battery management unit, the problems of low addressing efficiency and misinterpolation of multiple battery management units are solved, and efficient addressing is achieved and simplified plug-ins to use.

CN119275978AActive Publication Date: 2025-01-07SHENZHEN MEGMEET ELECTRICAL CO LTD +1
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
CN202411797750.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-09
Publication Date
2025-01-07
Estimated Expiration
2044-12-09

AI Technical Summary

Technical Problem

The addressing efficiency of multiple battery management units in the energy storage system is low, and docking plug-ins are required to be designed for anti-stopping to avoid misinsertion, which increases hardware cost and inconvenience in use.

Method used

Provides addressing circuits, including control modules and bidirectional modules, which automatically determines the input and output terminals of the battery management unit through high-level signals, realizes bidirectional automatic addressing of the battery management unit, avoids artificially distinguishing the input and output terminals, thereby realizing arbitrary insertion. addressing interface, automatically detect and address.

Benefits of technology

It improves addressing efficiency, avoids system exceptions caused by misinsertion of input and output, simplifies the use and maintenance process of plug-ins, and reduces the complexity and cost of hardware design.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119275978A_ABST
    Figure CN119275978A_ABST
Patent Text Reader

Abstract

The invention provides an addressing circuit, a battery management unit, a battery management system and an energy storage system. The addressing circuit comprises a control module; a first addressing module coupled to the control module, the first addressing module providing a first addressing interface; the second addressing module is coupled with the control module, and the second addressing module provides a second addressing interface; wherein the control module responds to one of the first addressing interface and the second addressing interface to input a high level and perform addressing operation, one of the first addressing interface and the second addressing interface serves as the input end of the battery management unit, the other one serves as the output end of the battery management unit, and the output end of the battery management unit is used for being connected with the input ends of the other battery management units. Through the above mode, the input and output of the battery management unit are automatically identified and set by using the first addressing module and the second addressing circuit, and automatic addressing is performed on the battery management unit, so that plugging and unplugging of any port are realized, wrong access is avoided, and the addressing efficiency of the battery management unit is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application mainly relates to the technical field of energy storage systems, and in particular to addressing circuits, battery management units, battery management systems and energy storage systems. Background Art

[0002] Energy storage systems are developing towards high-voltage, large-capacity platforms. A system contains many battery modules, and each battery module requires a corresponding battery management unit (BMU) to manage analog quantities such as voltage, temperature, and current. Therefore, an energy storage system often requires multiple BMUs. How to uniformly address and manage these BMUs is an important issue facing system design. In production line production, subsequent applications, and debugging and maintenance, due to the large number of sockets that are difficult to distinguish, a separate fool-proof design is required for the docking plug-in to avoid the risk of improper human plug-in causing the system to not work properly or even damage the BMU, which increases hardware and design costs and brings inconvenience in use. Summary of the invention

[0003] The main purpose of the present application is to provide an addressing circuit, a battery management unit, a battery management system and an energy storage system to solve the problems of low addressing efficiency for multiple battery management units in the energy storage system and the need for fool-proof design of the docking plug-in to avoid incorrect insertion, so as to realize that the battery management unit can be automatically addressed in both directions without manually distinguishing between the input and output ends, thereby realizing arbitrary insertion of the addressing interface, avoiding system anomalies caused by incorrect insertion of the input and output ends, and automatically addressing it when the input is detected, greatly improving the addressing efficiency.

[0004] To solve the above problems, the present application provides an addressing circuit, a battery management unit, a battery management system and an energy storage system, wherein the addressing circuit comprises: a control module; a first addressing module, coupled to the control module, the first addressing module providing a first addressing interface; a second addressing module, coupled to the control module, the second addressing module providing a second addressing interface; wherein the control module performs an addressing operation in response to a high level input from one of the first addressing interface and the second addressing interface, and uses one as the input end of the battery management unit and the other as the output end of the battery management unit, and the output end of the battery management unit is used to connect the input ends of the remaining battery management units.

[0005] In one embodiment, the first addressing module or the second addressing module includes: a bidirectional module; a primary side, the first end of the primary side is connected to the first end of the bidirectional module, the second end of the primary side is connected to the second end of the bidirectional module, and the third end of the primary side is connected to the third end of the bidirectional module; a secondary side, the first end of the secondary side is connected to the fourth end of the bidirectional module, the second end of the secondary side is connected to the fifth end of the bidirectional module, and the third end of the secondary side is connected to the sixth end of the bidirectional module; wherein the second end of the bidirectional module is connected to the control module through the primary side, and the fifth end of the bidirectional module is connected to the control module through the secondary side; the sixth end of the bidirectional module is used as the first addressing interface or the second addressing interface through the secondary side.

[0006] In one embodiment, the first addressing module and the second addressing module have the same structure.

[0007] In one embodiment, the primary side includes: a first resistor, a first end of the first resistor is connected to the second end of the bidirectional module, and the second end of the first resistor is grounded; a first capacitor, a first end of the first capacitor is connected to the first end of the bidirectional module, and the second end of the first capacitor is grounded; wherein the third end of the bidirectional module is grounded.

[0008] In one embodiment, the secondary side includes: a second capacitor, a first end of the second capacitor is connected to the fourth end of the bidirectional module, and a second end of the second capacitor is grounded; a pull-down unit, a first end of the pull-down unit is connected to the fifth end of the bidirectional module, a second end of the pull-down unit is connected to the sixth end of the bidirectional module, and a third end of the pull-down unit is grounded; a filtering unit, a first end of the filtering unit is connected to the sixth end of the bidirectional module, and a second end of the filtering unit is grounded; a protection unit, a first end of the protection unit is connected to the third end of the filtering unit, a second end of the protection unit is connected to the first addressing interface or the second addressing interface, and a third end of the protection unit is grounded; wherein the control module is connected to the fifth end of the bidirectional module through the pull-down unit.

[0009] In one embodiment, the pull-down unit includes: a second resistor, a first end of the second resistor is connected to the fifth end of the bidirectional module, and a second end of the second resistor is grounded; a third resistor, a first end of the third resistor is connected to the sixth end of the bidirectional module, and a second end of the third resistor is grounded.

[0010] In one embodiment, the filtering unit includes: a fourth resistor, a first end of the fourth resistor is connected to the sixth end of the bidirectional module; a third capacitor, a first end of the third capacitor is connected to the second end of the fourth resistor, and a second end of the third capacitor is grounded.

[0011] In one embodiment, the protection unit includes: a magnetic bead, a first end of the magnetic bead is connected to the second end of the filtering unit, and the second end of the magnetic bead is connected to the first addressing interface or the second addressing interface; an anti-reverse diode, an anode end of the anti-reverse diode is grounded, and a cathode end of the anti-reverse diode is connected to the second end of the magnetic bead.

[0012] In order to solve the above problems, the present application also provides a battery management unit, which includes an addressing circuit as described in any one of the above embodiments.

[0013] To solve the above problems, the present application also provides a battery management system, which includes: a master control module and at least one slave control module, which are connected in sequence; each slave control module includes: N communication interfaces, which are used to connect to the master control module for data transmission, or to couple with the previous slave control module for data transmission; wherein N is greater than or equal to 2; an addressing circuit, which is an addressing circuit as described in any of the above embodiments.

[0014] To solve the above problems, the present application also provides an energy storage system, which includes: a battery cluster, the battery cluster includes N battery packs, and the N battery packs are connected in series; a battery management system, the battery management system is the battery management system described in any of the above embodiments.

[0015] The present application provides an addressing circuit, a battery management unit, a battery management system and an energy storage system, wherein the addressing circuit includes: a control module; a first addressing module coupled to the control module, the first addressing module provides a first addressing interface; a second addressing module coupled to the control module, the second addressing module provides a second addressing interface; wherein the control module responds to the input of a high level to one of the first addressing interface and the second addressing interface, performs an addressing operation, and uses one as the input end of the battery management unit and the other as the output end of the battery management unit, and the output end of the battery management unit is used to connect the input ends of the remaining battery management units. Through the above-mentioned method, the input and output ends of the battery management unit are determined according to the high level, the addressing interface with the high level input is used as the input end of the battery management unit, and the other addressing interface is used as the output end of the battery management unit, and the addressing circuit is addressed, without artificially distinguishing the input and output ends, thereby realizing the arbitrary insertion of the addressing interface, avoiding the system abnormality caused by the wrong insertion of the input and output ends, and automatically addressing it when the input is detected, which greatly improves the efficiency of addressing. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them: Figure 1 is a structural diagram of a first embodiment of an addressing circuit provided by the present application; Figure 2is a structural diagram of the first embodiment of the first addressing module or the second addressing module provided by the present application; Figure 3 is a structural schematic diagram of a second embodiment of the first addressing module or the second addressing module provided by the present application; Figure 4 It is a structural diagram of the third embodiment of the first addressing module or the second addressing module provided by the present application; Figure 5 is a structural diagram of a fourth embodiment of the first addressing module or the second addressing module provided by the present application; Figure 6 is a structural diagram of a fifth embodiment of the first addressing module or the second addressing module provided by the present application; Figure 7 is a structural schematic diagram of an embodiment of a battery management unit provided by the present application; Figure 8 It is a structural schematic diagram of an embodiment of a battery management system provided by the present application; Fig. 9 It is a structural schematic diagram of an embodiment of an energy storage system provided by the present application; Fig.10 It is a schematic diagram of the first control logic step in an embodiment of the energy storage system provided by the present application; Fig.11 It is a schematic diagram of the second control logic step in an embodiment of the energy storage system provided in the present application.

[0017] Figure Number: Addressing circuit 100; control module 10; single-chip microcomputer 11; memory 12; first addressing module 20a; second addressing module 20b; bidirectional module 21; primary side 22; secondary side 23; pull-down unit 231; filter unit 232; protection unit 233; first resistor R1; second resistor R2; third resistor R3; fourth resistor R4; first capacitor C1; second capacitor C2; third capacitor C3; magnetic bead L; anti-reverse diode D1; battery management unit 200; battery management system 300; main control module 310; slave control module 320; energy storage system 400; battery cluster 410; battery pack 420. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It will be appreciated that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only some but not all structures related to the present application are shown in the drawings. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the art without making creative work are within the scope of protection of the present application.

[0019] The terms "first", "second", etc. in this application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0020] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0021] In the related art, the controller of the battery management system for energy storage can usually be composed of a central processing unit, a memory, an input / output interface, an analog-to-digital converter, and large-scale integrated circuits such as an integer circuit and a drive circuit. The automatic addressing module of the slave control module (BATTERY MANAGEMENT UNIT, BMU) of the common battery management system (BATTERY MANAGEMENT SYSTEM, BMS) adopts a hard-wired connection. The general structure is to use the hard wire of the master control module (BATTERYCLUSTER UNIT, BCU) of the battery management system to connect to the first slave control module of the battery management system, and the remaining slave control modules are connected in sequence to form a "string" in the physical structure, and then the hard wire of the last slave control module is connected back to the master control module to form a "loop". Based on this connection structure, under the dominance of the master control module, the starting point of the automatic addressing of the slave control module must be the first slave control module that receives the signal directly connected to the master control module. Due to the limitation of the physical connection order, if a specific slave control module in the string needs to be specified as the addressing starting point, the automatic addressing module under this connection structure is difficult to implement. It can be seen that in the prior art, the process of automatic addressing of the slave control module of the battery management system is not flexible enough. In addition, in the subsequent application, maintenance and debugging, the plug-in needs to be flexibly adjusted. Therefore, when facing multiple plug-in interfaces, human errors may occur, and the input and output terminals are reversed, thereby causing system abnormalities. Therefore, a physical fool-proof design is usually made for the interface of the plug-in to avoid misoperation by the user, but this will increase the trouble of hardware design and the inconvenience of use.

[0022] Therefore, the present application provides an addressing circuit, a battery management unit, a battery management system and an energy storage system to solve the above problems.

[0023] See also Figure 1 As shown, Figure 1 It is a structural diagram of the first embodiment of the addressing circuit provided by the present application; specifically, the addressing circuit 100 includes: a control module 10, a first addressing module 20a and a second addressing module 20b; wherein, the first addressing module 20a is coupled to the control module 10, and the first addressing module 20a provides a first addressing interface; the second addressing module 20b is coupled to the control module 10, and the second addressing module 20b provides a second addressing interface; wherein, the control module 10 responds to a high level input from one of the first addressing interface and the second addressing interface, performs an addressing operation, and uses one as the input end of the battery management unit and the other as the output end of the battery management unit, and the output end of the battery management unit is used to connect the input ends of the remaining battery management units.

[0024] In the above scheme, the first addressing module 20a and the second addressing module 20b in the addressing circuit 100 can both realize the input function when no signal is connected. However, when either the first addressing module 20a or the second addressing module 20b receives a high level input from the outside, the control module 10 is used to address the addressing circuit 100, and the control module 10 controls the other addressing module as an output, thereby realizing the insertion of any input and output ends of the two interfaces. The addressing circuit 100 will automatically convert according to the input level signal, thereby avoiding the wrong insertion of the interface, realizing any plug-in and unplugging of the plug-in, and facilitating the subsequent after-sales and use of personnel; further, when a high level is input to one of the first addressing interface and the second addressing interface, and the addressing operation is performed on it through the control module 10, it is convenient to realize the automatic addressing function in the test environment, which greatly improves the efficiency of programming.

[0025] In the above solution, the specific implementation of the first addressing module 20a and the second addressing module 20b is further described in other embodiments. The specific solution is as follows: In one embodiment, if Figure 2 As shown, Figure 2It is a structural diagram of an embodiment of the first addressing module or the second addressing module provided in the present application; wherein, the first addressing module 20a or the second addressing module 20b includes: a bidirectional module 21, a primary side 22 and a secondary side 23; specifically, the first end of the primary side 22 is connected to the first end of the bidirectional module 21, the second end of the primary side 22 is connected to the second end of the bidirectional module 21, and the third end of the primary side 22 is connected to the third end of the bidirectional module 21; the first end of the secondary side 23 is connected to the fourth end of the bidirectional module 21, the second end of the secondary side 23 is connected to the fifth end of the bidirectional module 21, and the third end of the secondary side 23 is connected to the sixth end of the bidirectional module 21; wherein, the second end of the bidirectional module 21 is connected to the control module 10 through the primary side 22, and the fifth end of the bidirectional module 21 is connected to the control module 10 through the secondary side 23; the sixth end of the bidirectional module 21 is used as the first addressing interface or the second addressing interface through the secondary side 23.

[0026] The data direction is changed by combining the bidirectional module 21 with the control module 10, such as Figure 2 As shown, in the initial state: when the sixth end of the bidirectional module 21, that is, the first addressing interface or the second addressing interface does not receive an external signal (high level), the second end, the fifth end and the sixth end of the bidirectional module 21 are all low levels, and the data flow direction of the bidirectional module 21 at this time is transmitted from the sixth end to the second end, and the control module 10 monitors the input state of the first addressing interface or the second addressing interface in real time by reading the level of the second end of the bidirectional module 21. At this time, the first addressing interface or the second addressing interface is input. When the signal is input: when the sixth end of the bidirectional module 21, that is, the first addressing interface or the second addressing interface receives an external signal (high level), the control module 10 writes its address into the memory when reading that the second end of the bidirectional module 21 is high level, and at the same time, the control module 10 controls the fifth end of the bidirectional module 21 in another addressing module to be high level, and sets the data flow direction of its bidirectional module 21 to be transmitted from the second end to the sixth end, and sets the second end to be high level, so that the addressing interface of the addressing module becomes a high level output. In one embodiment, the bidirectional module 21 can be a COMOS device used for bidirectional logic control. The bidirectional module 21 can also be an integrated gate circuit device with a level conversion function, with a primary side powered by 3.3V and a secondary side powered by 5V. In another embodiment, discrete devices such as transistors can also be used.

[0027] In one embodiment, the first addressing module 20a and the second addressing module 20b have the same structure. As can be seen from the above embodiment, the bidirectional module 21 is combined with the primary and secondary sides, and the bidirectional module 21 is controlled by the control module 10 to realize the switching of the data flow. Therefore, in one embodiment, the first addressing module 20a and the second addressing module 20b have the same structure, and the above technical solution can also be realized.

[0028] The primary side 22 and the secondary side 23 in the first addressing module 20a or the second addressing module 20b are described in another embodiment as follows: In one embodiment, if Figure 3 As shown, Figure 3 It is a structural diagram of the second embodiment of the first addressing module or the second addressing module provided in the present application; the primary side 22 includes: a first resistor R1 and a first capacitor C1; the first end of the first resistor R1 is connected to the second end of the bidirectional module 21, and the second end of the first resistor R1 is grounded; the first end of the first capacitor C1 is connected to the first end of the bidirectional module 21, and the second end of the first capacitor C1 is grounded; wherein the third end of the bidirectional module 21 is grounded.

[0029] The first capacitor C1 is a primary power decoupling capacitor of the bidirectional module 21, and the first resistor R1 is a pull-down resistor. The first capacitor C1 and the first resistor R1 can ensure that the second end network of the bidirectional module 21 is at a low level in the initial state.

[0030] In one embodiment, if Figure 4 As shown, Figure 4 It is a structural schematic diagram of the third embodiment of the first addressing module or the second addressing module provided by the present application; the secondary side 23 includes: a second capacitor C2, a pull-down unit 231, a filtering unit 232 and a protection unit 233; the first end of the second capacitor C2 is connected to the fourth end of the bidirectional module 21, and the second end of the second capacitor C2 is grounded; the first end of the pull-down unit 231 is connected to the fifth end of the bidirectional module 21, the second end of the pull-down unit 231 is connected to the sixth end of the bidirectional module 21, and the third end of the pull-down unit 231 is grounded; the first end of the filtering unit 232 is connected to the sixth end of the bidirectional module 21, and the second end of the filtering unit 232 is grounded; the first end of the protection unit 233 is connected to the third end of the filtering unit 232, the second end of the protection unit 233 is connected to the first addressing interface or the second addressing interface, and the third end of the protection unit 233 is grounded; wherein the control module 10 is connected to the fifth end of the bidirectional module 21 through the pull-down unit 231.

[0031] Similarly, the second capacitor C2 and the pull-down unit 231 can ensure that in the initial state, the sixth terminal network of the bidirectional module 21 is at a low level. The filter unit 232 is used to eliminate transient interference generated by the bidirectional module 21 during data stream switching, and the protection unit 233 is used for electrostatic protection to prevent the electrostatic discharge of the port from damaging the components.

[0032] The specific scheme for implementing the unit structure in the above embodiment is as follows: like Figure 5 As shown, Figure 5It is a structural diagram of the fourth embodiment of the first addressing module or the second addressing module provided by the present application. In one embodiment, the pull-down unit 231 includes: a second resistor R2 and a third resistor R3, the first end of the second resistor R2 is connected to the fifth end of the bidirectional module 21, and the second end of the second resistor R2 is grounded; the first end of the third resistor R3 is connected to the sixth end of the bidirectional module 21, and the second end of the third resistor R3 is grounded.

[0033] It can be understood that the second resistor R2 and the third resistor R3 are both used as pull-down resistors to ensure that the port is at a low level in the initial state.

[0034] In one embodiment, if Figure 5 The filtering unit 232 includes: a fourth resistor R4 and a third capacitor C3; the first end of the fourth resistor R4 is connected to the sixth end of the bidirectional module 21; the first end of the third capacitor C3 is connected to the second end of the fourth resistor R4, and the second end of the third capacitor C3 is grounded.

[0035] The fourth resistor R4 and the third capacitor C3 described above form a low-pass filter to eliminate the instantaneous interference caused by the circuit state switching in the circuit and thus the influence on the signal in the circuit.

[0036] In one embodiment, if Figure 5 The protection unit 233 includes: a magnetic bead L and an anti-reverse diode D1; the first end of the magnetic bead L is connected to the second end of the filter unit 232, and the second end of the magnetic bead L is connected to the first addressing interface or the second addressing interface; the anode end of the anti-reverse diode D1 is grounded, and the cathode end of the anti-reverse diode D1 is connected to the second end of the magnetic bead L.

[0037] In the above implementation, a ferrite bead L is used in combination with an anti-reverse diode D1 for electrostatic protection; the ferrite bead L is a passive component used to suppress high-frequency noise in the circuit. The anti-reverse diode D1 uses a TVS, which is a highly efficient circuit protection device made using semiconductor technology and usually includes a single PN junction or multiple PN junctions.

[0038] Combining the above solutions and Figure 6 As shown, Figure 6It is a structural schematic diagram of the fifth embodiment of the first addressing module or the second addressing module provided by the present application; the upper part of the figure is the first addressing module 20a or the second addressing module 20b, and the lower part of the figure is the control module 10; TVS is one embodiment of the anti-reverse diode D1 mentioned above; wherein, in one embodiment, the control module 10 in the above embodiment includes: a single-chip microcomputer 11 and a memory 12; specifically, the first end of the single-chip microcomputer 11 is connected to the second end of the bidirectional module 21, and the second end of the single-chip microcomputer 11 is connected to the fifth end of the bidirectional module 21; the memory 12 is connected to the single-chip microcomputer 11; wherein, the data flow transmission of the bidirectional module 21 is reversely controlled by the single-chip microcomputer 11, and the addressing information of the addressing module is stored in the memory 12 therein. The IIC here usually refers to "Inter-Integrated Circuit", that is, the I²C (Inter-IC) bus protocol, which is a widely used serial communication protocol for connecting microcontrollers and other integrated circuits.

[0039] Among them, MCU_IO and MCU_DIR are correspondingly connected to the two ports of the microcontroller 11; its specific implementation process: the bidirectional module 21 includes six ports on the primary side 22 and the secondary side 23, wherein the first and fourth ends of the bidirectional module 21 are power supply 3.3V and 5V network numbers, the second and sixth ends are input and output networks, and the third and fifth ends are DIR and GND networks (DIR end is connected to the control module 10, GND is grounded). Further, the primary side 22 (3.3V) is grounded through the first capacitor C1; the second end is grounded through the first resistor R1 and is connected to the control module 10; the secondary side 23 (5V) is grounded through the second capacitor C2, the sixth end is grounded through the third resistor R3, and one end of the fourth resistor R4 is connected in series, the other end of the fourth resistor R4 is grounded through the third capacitor C3, and the other end of the fourth resistor R4 is connected in series with a magnetic bead L, and the other end of the magnetic bead L is connected to the automatic addressing interface (i.e., the first addressing interface or the second addressing interface, Addr_IO); wherein the third resistor R3 and the third capacitor C3 constitute an RC filtering circuit, the magnetic bead L is used to improve EMI (electromagnetic interference), and the anti-reverse diode D1 is used to protect the interface from static electricity.

[0040] Regarding the input or output of the data flow controlled by the bidirectional module 21, it is implemented through software configuration and is determined by the level value of the fifth end of the bidirectional module 21. Specifically: when the fifth end is at a low level, the data flow is from right to left, from end B to end A, that is, from the sixth end of the bidirectional module 21 (the part connected to the addressing interface) as the input, and the second end of the bidirectional module 21 (the part connected to the control module 10) as the input; when the fifth end is at a high level, the data flow is from left to right, from end A to end B, that is, from the sixth end of the bidirectional module 21 (the part connected to the addressing interface) as the output, and the second end of the bidirectional module 21 (the part connected to the control module 10) as the output.

[0041] To solve the above problems, the present application also provides a battery management unit 200, see Figure 7 As shown, Figure 7 2 is a schematic diagram of the structure of an embodiment of a battery management unit provided in the present application; the battery management unit 200 includes an addressing circuit 100 as described in any one of the above embodiments.

[0042] In the above manner, the input and output ends of the battery management unit 200 are determined according to the high level, the addressing interface with the input high level is used as the input end of the battery management unit 200, and the other addressing interface is used as the output end of the battery management unit 200, and the addressing circuit 100 is addressed without manually distinguishing between the input and output ends, thereby realizing arbitrary insertion of the addressing interface, avoiding system abnormalities caused by incorrect insertion of the input and output ends, and automatically addressing it when the input is detected, greatly improving the efficiency of addressing.

[0043] To solve the above problems, the present application also provides a battery management system 300, see Figure 8 As shown, Figure 8 It is a structural diagram of an embodiment of a battery management system provided in the present application; the battery management system 300 includes: a main control module 310 and at least one slave control module 320, the main control module 310 and at least one slave control module 320 are connected in sequence; each slave control module 320 includes: N communication interfaces, used to connect to the main control module 310 for data transmission, or used to couple with the previous slave control module 320 for data transmission; wherein N is greater than or equal to 2; an addressing circuit 100, the addressing circuit 100 is the addressing circuit 100 described in any of the above embodiments.

[0044] It can be understood that the slave control module 320 is the BMU described above, wherein the BMU power supply is connected to the CAN communication, wherein the automatic assembly port of the slave control module 320 is connected end to end, and the first and automatic assembly ports of the slave control module 320 are connected to the IO output interface of the master control, such as Figure 8 As shown; adjacent slave control modules 320 are coupled to transmit data through a communication interface, and the slave control module 320 is arranged inside or on the surface of the battery cluster and connected to the battery cell in the PACK through a wiring harness to collect information such as the voltage and temperature of the battery cell in the PACK.

[0045] The master control unit is connected to the slave control module 320 through the power supply / CAN and the addressing interface (i.e., the first addressing interface or the second addressing interface) to address the slave control module 320 and collect information such as voltage and temperature in the slave control module 320 through CAN to estimate SOC and SOH. Among them, CAN (Controller Area Network) is a commonly used serial communication protocol used to connect various modules in the battery management system 300 (BMS), such as the battery monitoring unit (BMU), the energy management system (EMS), etc. The CAN communication protocol supports distributed control or real-time control, and provides an effective way to monitor and control the state of the battery system. SOC (State of Charge) is a key parameter in the battery management system 300, which indicates the percentage of the current remaining power of the battery. SOC is an important parameter used by the battery management system 300 to estimate the remaining power of the battery and predict the battery life. It is usually expressed as a percentage, ranging from 0% (fully discharged) to 100% (fully charged). SOH (State of Health) is another important battery parameter that reflects the health status and remaining life of the battery. SOH is usually used to estimate the capacity, internal resistance, power and energy of the battery, and is the basis for the battery management system 300 to predict battery performance and maintenance plan.

[0046] In combination with the scheme of the above-mentioned embodiment, regarding the automatic addressing process: when the output high level of the master control module 310 is connected to any addressing interface of slave control module No. 1 320 (i.e., the first slave control module 320), the addressing interface is configured as input, and the address is written into the memory 12 of the control module 10 in the slave control module 320 through CAN communication. At the same time, another addressing interface of the slave control module 320 is set as output, and the second slave control module 320 is addressed through CAN communication, and so on, until the last slave control module 320 completes addressing.

[0047] To solve the above problems, the present application also provides an energy storage system 400, see Fig. 9 As shown, Fig. 9 It is a structural schematic diagram of an embodiment of an energy storage system provided in the present application; the energy storage system 400 includes: a battery cluster 410, the battery cluster 410 includes N battery packs 420, and the N battery packs 420 are connected in series; a battery management system 300, and the battery management system 300 is the battery management system 300 described in any of the above embodiments.

[0048] Among them, the battery PACK (i.e., battery cluster 410) is formed by connecting multiple battery cells (i.e., battery pack 420) in series. Optionally, the battery cells are lithium-ion single battery cells, and the materials of the single battery cells include but are not limited to lithium iron phosphate or ternary lithium materials; in one embodiment, the total voltage of the battery cluster 410 is as high as 1500V.

[0049] When the above solution is applied to the energy storage system 400, the automatic addressing process is as follows: It can be understood that the addressing circuit 100 in the slave control module 320 includes a first addressing interface and a second addressing interface, and the wiring harness therein can be plugged in and out arbitrarily, that is, the high level (5V) output by the master control module 310 can be connected to any addressing interface in the addressing circuit 100 in the slave control module 320, that is, the first addressing interface or the second addressing interface, and the other interface can be set as output. Correspondingly, in the next-level slave control module 320, the previous interface set as output can be connected to any addressing interface of the slave control module 320, that is, the first addressing interface and the second addressing interface can be plugged in and out arbitrarily.

[0050] In the initial state: due to the effect of the pull-down resistor in the circuit, the second end, the fifth end and the sixth end of the bidirectional module 21 are all at low levels, and the data flow direction of the bidirectional module 21 is transmitted from the sixth end to the second end. The single-chip microcomputer 11 in the control module 10 monitors the input state of the sixth end (i.e., the addressing interface) in real time by reading the level value of the second end; similarly, the corresponding two ports in the other addressing module are also input.

[0051] When the high level (5V) of the master control module 310 is received: when the high level output by the master control module 310 is connected to any addressing interface of the first slave control module 320, it is recorded as the first addressing module 20a and the first addressing interface, and the first address of the first slave control module 320 is written into the memory 12 in the control module 10 through CAN communication (i.e., the communication interface). At the same time, the single-chip microcomputer 11 in the control module 10 controls the fifth end of the bidirectional module 21 in another addressing module (i.e., corresponding to the first addressing module 20a, recorded as the second addressing module 20b) to be set to a high level, wherein the direction of the data flow is transmitted from the second end to the sixth end, and the second end is set to a high level through software, and the sixth end of the second addressing module 20b (i.e., the second addressing interface) becomes a high level output.

[0052] In the above manner, when the second slave control module 320 receives the high level output by the first slave control module 320, the master control module 310 addresses the second slave control module 320 through CAN communication; then the subsequent slave control modules 320 are addressed in turn until all the slave control modules 320 are correctly addressed.

[0053] It can be understood that the high level (5V) output by the main control module 310 can also be output by a 5V power supply, which is not dependent on the main control module 310. This makes it convenient in the subsequent actual test environment. Only one 5V voltage source is needed to complete the addressing of N BMUs (slave control modules 320), which greatly improves the convenience of addressing the slave control module 320 and has certain promotion value and economic benefits in practical applications.

[0054] like Fig.10 As shown, Fig.10 This is a schematic diagram of the first control logic step in an embodiment of the energy storage system provided by the present application; wherein, it mainly includes the following steps: During the start of the automatic addressing procedure, the main control or power supply outputs a low level (0V). At this time, the system is in an initial state, that is, in the first addressing module 20a and the second addressing module 20b, the fifth end of the bidirectional module 21 is set to a low level, and the first addressing interface and the second addressing interface are set to input.

[0055] When the main control module 310 or the power supply outputs a high level (5V), in response to different addressing modules receiving signals, there are different steps as follows: Step S10 : in response to the first addressing interface of the first addressing module 20 a receiving an input high level, the control module 10 reads a high level at a side of the fifth terminal of the bidirectional module 21 coupled to the secondary side 23 .

[0056] Step S20: The address is written into the memory 12 in the control module 10 through CAN communication, and it is displayed as #m (n) addressing is successful.

[0057] Step S30: setting the fifth terminal and the second terminal of the bidirectional module 21 in the second addressing module 20b to a high level, and setting the second terminal of the bidirectional module 21 in the first addressing module 20a to an output.

[0058] Step S40: When m is greater than n, the addressing is completed; wherein n is the number of slave control modules 320, and m is a sequence number that increases in sequence starting from 1.

[0059] Step S50: setting the fifth terminal and the second terminal of the bidirectional module 21 in the first addressing module 20a and the second addressing module 20b to a low level, that is, restoring the initial state.

[0060] It can be understood that the steps for the first connected second addressing module 20b (i.e., in response to the second addressing interface of the second addressing module 20b receiving the input high level, the control module 10 reads the side of the fifth terminal of the bidirectional module 21 coupled via the secondary side 23 as a high level) are the same, only the setting order is different. Fig.11 As shown, Fig.11This is a schematic diagram of the second control logic steps in an embodiment of the energy storage system provided by the present application; it specifically includes the following steps: Step S11 : in response to the second addressing interface of the second addressing module 20 b receiving an input high level, the control module 10 reads a high level at a side of the fifth terminal of the bidirectional module 21 coupled to the secondary side 23 .

[0061] Step S21: The address is written into the memory 12 in the control module 10 through CAN communication, and it is displayed as #m (n) addressing is successful.

[0062] Step S31: setting the fifth terminal and the second terminal of the bidirectional module 21 in the first addressing module 20a to a high level, and setting the second terminal of the bidirectional module 21 in the second addressing module 20b to an output.

[0063] Step S41: When m is greater than n, the addressing is completed; wherein n is the number of slave control modules 320, and m is a sequence number that increases in sequence starting from 1.

[0064] Step S51: setting the fifth terminal and the second terminal of the bidirectional module 21 in the first addressing module 20a and the second addressing module 20b to a low level, that is, restoring the initial state.

[0065] Among them, the high level (5V) output by the main control module 310 in the above implementation can be output by the IO port of the main control module 310, or 5V can be directly output by the power supply; in the above real-time example, the main control module 310 can be implemented by a secondary main control board with CAN communication or by a PC with a CAN tool.

[0066] The present application provides an addressing circuit 100, which includes: a control module 10, a first addressing module 20a and a second addressing module; wherein the first addressing module 20a is coupled to the control module 10, and the first addressing module 20a provides a first addressing interface; the second addressing module 20b is coupled to the control module 10, and the second addressing module 20b provides a second addressing interface; wherein the control module 10 performs an addressing operation in response to a high level input from one of the first addressing interface and the second addressing interface, and uses one as the input end of the battery management unit 200 and the other as the output end of the battery management unit 200, and the output end of the battery management unit 200 is used to connect the input ends of the remaining battery management units 200.

[0067] Through the above method, when any addressing interface of the first addressing module 20a or the second addressing module 20b receives an input signal, the addressing interface of the other addressing module is controlled to be output, and the addressing circuit 100 is addressed, so as to realize the insertion of the interface at any end, avoid the system abnormality caused by the human-induced wrong insertion of the input and output ends, and automatically address it when the input is detected, which greatly improves the addressing efficiency. In the actual production or test maintenance process, the first or second addressing port cable can be plugged in arbitrarily, without special fool-proofing treatment, which can improve production efficiency and prevent safety risks caused by wrong connection; and any 5V power output can be used to replace the 5V output of the main control unit, which is not dependent on the main control unit, and can simplify the test environment and improve test efficiency.

[0068] The embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An addressing circuit, characterized in that: Applied to a battery management unit, the addressing circuit comprises: Control module; A first addressing module, coupled to the control module, wherein the first addressing module provides a first addressing interface; A second addressing module, coupled to the control module, wherein the second addressing module provides a second addressing interface; Among them, the control module performs an addressing operation in response to a high level input from one of the first addressing interface and the second addressing interface, and uses the one as the input end of the battery management unit and the other as the output end of the battery management unit, and the output end of the battery management unit is used to connect the input ends of the remaining battery management units.

2. The addressing circuit according to claim 1, characterized in that: The first addressing module or the second addressing module includes: Bidirectional module; A primary side, wherein a first end of the primary side is connected to a first end of the bidirectional module, a second end of the primary side is connected to a second end of the bidirectional module, and a third end of the primary side is connected to a third end of the bidirectional module; A secondary side, wherein a first end of the secondary side is connected to a fourth end of the bidirectional module, a second end of the secondary side is connected to a fifth end of the bidirectional module, and a third end of the secondary side is connected to a sixth end of the bidirectional module; Among them, the second end of the bidirectional module is connected to the control module through the primary side, the fifth end of the bidirectional module is connected to the control module through the secondary side; the sixth end of the bidirectional module serves as the first addressing interface or the second addressing interface through the secondary side.

3. The addressing circuit according to claim 1, characterized in that: The first addressing module and the second addressing module have the same structure.

4. The addressing circuit according to claim 2, characterized in that: The original side includes: a first resistor, wherein a first end of the first resistor is connected to a second end of the bidirectional module, and a second end of the first resistor is grounded; A first capacitor, wherein a first end of the first capacitor is connected to a first end of the bidirectional module, and a second end of the first capacitor is grounded; Wherein, the third terminal of the bidirectional module is grounded.

5. The addressing circuit according to claim 2, characterized in that: The secondary side comprises: a second capacitor, wherein a first end of the second capacitor is connected to the fourth end of the bidirectional module, and a second end of the second capacitor is grounded; A pull-down unit, wherein a first end of the pull-down unit is connected to a fifth end of the bidirectional module, a second end of the pull-down unit is connected to a sixth end of the bidirectional module, and a third end of the pull-down unit is grounded; A filter unit, wherein a first end of the filter unit is connected to the sixth end of the bidirectional module, and a second end of the filter unit is grounded; A protection unit, wherein a first end of the protection unit is connected to a third end of the filtering unit, a second end of the protection unit is connected to the first addressing interface or the second addressing interface, and a third end of the protection unit is grounded; Wherein, the control module is connected to the fifth end of the bidirectional module through the pull-down unit.

6. The addressing circuit according to claim 5, characterized in that: The pull-down unit comprises: a second resistor, wherein a first end of the second resistor is connected to the fifth end of the bidirectional module, and a second end of the second resistor is grounded; A third resistor, wherein a first end of the third resistor is connected to the sixth end of the bidirectional module, and a second end of the third resistor is grounded.

7. The addressing circuit according to claim 5, characterized in that: The filtering unit comprises: a fourth resistor, a first end of the fourth resistor being connected to a sixth end of the bidirectional module; A third capacitor, wherein a first end of the third capacitor is connected to the second end of the fourth resistor, and a second end of the third capacitor is grounded.

8. The addressing circuit according to claim 5, characterized in that: The protection unit comprises: A magnetic bead, wherein a first end of the magnetic bead is connected to a second end of the filtering unit, and a second end of the magnetic bead is connected to the first addressing interface or the second addressing interface; An anti-reverse diode, wherein an anode terminal of the anti-reverse diode is grounded, and a cathode terminal of the anti-reverse diode is connected to the second end of the magnetic bead.

9. A battery management unit, characterized in that: The battery management unit comprises the addressing circuit as claimed in any one of claims 1-8.

10. A battery management system, characterized in that: The battery management system comprises: a master control module and at least one slave control module, wherein the master control module and the at least one slave control module are connected in sequence; Each of the slave control modules comprises: N communication interfaces, used to connect to the master control module for data transmission, or to couple to the previous slave control module for data transmission; wherein N is greater than or equal to 2; An addressing circuit, wherein the addressing circuit is an addressing circuit as described in any one of claims 1-8.

11. An energy storage system, characterized in that: The energy storage system comprises: A battery cluster, the battery cluster comprising N battery packs, the N battery packs being connected in series; A battery management system, wherein the battery management system is the battery management system according to claim 10.

Citation Information

Patent Citations

  • Parallel addressing method, battery pack and parallel addressing system

    CN113596189A

  • Battery management system and battery management system control method

    CN115912573A

  • Battery management system and vehicle

    CN117818420A

  • Automatic coding method for battery pack of battery subarray system

    CN118826747A

  • Address allocation method and apparatus

    WO2024125122A1