Power failure detection circuit
By designing a power-down detection circuit, the DC bus and power supply lines of the battery charging and discharging test equipment are accurately detected, which solves the problem of data storage errors in the prior art and realizes timely storage and integrity of data.
Patent Information
- Application Number
- CN202411263143.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-09
- Publication Date
- 2025-01-10
AI Technical Summary
The prior art cannot accurately detect whether the battery charge and discharge test process is powered down, resulting in errors in the test data storage.
A power-down detection circuit is designed, including a first power-down detection unit and a second power-down detection unit. Through the comparison unit, an isolation device and a trigger unit, it detects whether the DC bus of the target device and the power supply line of the central machine are powered off. , and send a signal to the control unit when power is detected to ensure timely storage of test data.
This circuit can accurately detect whether the DC bus and power supply line are powered off, avoid data errors caused by power failure, and ensure the integrity and reliability of the test data.
Smart Images
Figure CN119291276A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of battery charging and discharging detection, and in particular to a power-off detection circuit. Background Art
[0002] With the development of new energy technology, the market demand for power batteries and energy storage batteries is increasing, and the demand for battery charging and discharging detection equipment is also increasing. The data integrity and continuity of battery charging and discharging are very high. Often the charging and discharging process cycle of a battery is as short as a few days or as long as a few months. If the data is disordered after power failure, the test data and results before power failure will be meaningless, which not only consumes human resources, but also wastes the time of the entire test cycle, causing immeasurable losses.
[0003] In addition, during the operation of the battery charge and discharge test equipment, there is a possibility of power outages in the power grid and equipment abnormalities. Both external and internal factors may cause the equipment to lose power. In the prior art, it is impossible to accurately detect whether there is a power outage during the battery charge and discharge test process, which easily leads to errors in the storage of test data. Summary of the invention
[0004] The technical problem to be solved by the embodiments of the present invention is that in the prior art, it is impossible to accurately detect whether a battery is powered off during a charge and discharge test.
[0005] In order to solve the above problems, an embodiment of the present invention proposes a power-off detection circuit, including a first power-off detection unit and a second power-off detection unit, wherein the first power-off detection unit is connected to the DC bus of the target device and the control unit of the mid-position machine, and is used to detect whether the DC bus of the target device is powered off; the second power-off detection unit is connected to the control unit of the mid-position machine and the power supply line of the mid-position machine, and is used to detect whether the power supply line of the mid-position machine is powered off.
[0006] A further technical solution is that the first power-off detection unit includes a comparison unit, an isolation device and a trigger unit, the comparison unit is connected to the isolation device and the DC bus, the isolation device is connected to the trigger unit, and the trigger unit is connected to the control unit, wherein when the DC bus loses power, the comparison unit turns on the isolation device; when the isolation device is turned on, the trigger unit sends a power-off detection signal to the control unit.
[0007] Its further technical solution is that the isolation device is a photoelectric coupler, and the comparison unit includes a first resistor, a second resistor and a voltage regulator; one end of the first resistor is connected to the DC bus, the other end of the first resistor is connected to the reference electrode of the voltage regulator and the second resistor, and the second resistor is grounded; the cathode of the voltage regulator is connected to the negative electrode of the light-emitting diode of the photoelectric coupler, and the anode of the voltage regulator is grounded; the positive electrode of the light-emitting diode of the photoelectric coupler is connected to the DC bus.
[0008] Its further technical solution is that the comparison unit also includes a third resistor and a diode, the positive electrode of the light-emitting diode of the photoelectric coupler is connected to the DC bus through the third resistor; the positive electrode of the diode is connected to the negative electrode of the light-emitting diode of the photoelectric coupler, and the negative electrode of the diode is connected to the positive electrode of the light-emitting diode of the photoelectric coupler.
[0009] Its further technical solution is that the trigger unit includes a first NPN transistor and a second NPN transistor, the base of the first NPN transistor is connected to the output end of the isolation device, the collector of the first NPN transistor is used to be connected to a first voltage source, and the emitter of the first NPN transistor is grounded; the base of the second NPN transistor is connected to the first voltage source, the collector of the second NPN transistor is connected to the control unit, and the emitter of the second NPN transistor is grounded.
[0010] Its further technical solution is that the trigger unit also includes a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first voltage regulator and a first capacitor; the fourth resistor is connected to the output end of the isolation device and is grounded; the fifth resistor is connected to the output end of the isolation device and the negative electrode of the first voltage regulator, and the positive electrode of the first voltage regulator is connected to the base of the first NPN transistor; the first capacitor is connected to the base of the first NPN transistor and is grounded, and the sixth resistor is connected in parallel with the first capacitor; one end of the seventh resistor is connected to the first voltage source, and the other end of the seventh resistor is connected to the collector of the first NPN transistor and the base of the second NPN transistor.
[0011] Its further technical solution is that the second power-off detection unit includes a PNP transistor and a third NPN transistor, the base of the PNP transistor is connected to the power supply line, the collector of the PNP transistor is connected to the base of the third NPN transistor, the emitter of the third NPN transistor is grounded, and the collector of the third NPN transistor is connected to the second voltage source and the control unit.
[0012] Its further technical solution is that the second power-off detection unit also includes an eighth resistor, a ninth resistor, a second capacitor and a second voltage regulator, the negative electrode of the second voltage regulator is connected to the power supply line through the eighth resistor, and the positive electrode of the second voltage regulator is connected to the base of the PNP transistor; the second capacitor is connected to the base of the PNP transistor and grounded, and the ninth resistor is connected in parallel with the second capacitor.
[0013] Its further technical solution is that the second power-off detection unit also includes a tenth resistor, an eleventh resistor, a twelfth resistor, a third capacitor and a fourth capacitor; the tenth resistor is respectively connected to the collector of the PNP transistor and the base of the third NPN transistor; the eleventh resistor is connected to the second voltage source and the collector of the third NPN transistor; the twelfth resistor is connected to the control unit and the collector of the third NPN transistor; the third capacitor is connected to the base of the third NPN transistor and is grounded; the fourth capacitor is connected to the collector of the third NPN transistor and is grounded.
[0014] A further technical solution is that the power-off detection circuit further includes an energy storage unit and a boost converter, the energy storage unit is connected to the emitter of the PNP transistor and the boost converter, and the boost converter is connected to the control unit;
[0015] The second voltage source is a buck converter, and the boost converter is connected to the buck converter.
[0016] Compared with the prior art, the technical effects achieved by the embodiments of the present invention include:
[0017] The technical solution of the embodiment of the present invention is a power-off detection circuit, comprising a first power-off detection unit and a second power-off detection unit, wherein the first power-off detection unit is connected to the DC bus of the target device and the control unit of the mid-position machine, and is used to detect whether the DC bus of the target device is powered off; the second power-off detection unit is connected to the control unit of the mid-position machine and the power supply line of the mid-position machine, and is used to detect whether the power supply line of the mid-position machine is powered off. It can be seen that the power-off detection circuit can accurately detect whether the DC bus and / or the power supply line are powered off, so that the control unit of the mid-position machine can store test data in time when power off occurs (the test data can specifically be battery test data), to avoid data errors caused by the inability to record data in time due to power off. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.
[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
[0020] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.
[0021] Figure 1 A schematic diagram of the structure of a power failure detection circuit proposed in an embodiment of the present invention;
[0022] Figure 2 A circuit diagram of a first power failure detection unit of a power failure detection circuit proposed in an embodiment of the present invention;
[0023] Figure 3 A circuit diagram of a second power failure detection unit of a power failure detection circuit proposed in an embodiment of the present invention;
[0024] Figure 4 A block diagram of the power supply principle of an energy storage unit of a power failure detection circuit proposed in an embodiment of the present invention.
[0025] Reference numerals
[0026] DC bus 10, control unit 20, first power-off detection unit 30, second power-off detection unit 40, comparison unit 50, isolation device 60, trigger unit 70, boost converter 80, buck converter 90, power supply line 100, intermediate machine 110, first resistor R1, second resistor R2, voltage regulator D1, third resistor R3, diode D2, first NPN transistor Q1, second NPN transistor Q2, fourth resistor R4, fifth resistor R5, sixth resistor R6, seventh resistor R7, first voltage regulator D41, first capacitor C1, PNP transistor Q3, third NPN transistor Q4, eighth resistor R8, ninth resistor R9, second capacitor C2, second voltage regulator D7, tenth resistor R10, eleventh resistor R11, twelfth resistor R12, third capacitor C3, fourth capacitor C4, energy storage unit C5. DETAILED DESCRIPTION
[0027] The technical solutions in the embodiments will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Similar component numbers in the drawings represent similar components. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0028] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.
[0029] It should also be understood that the terms used in this description of the embodiments of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the embodiments of the present invention. As used in the description of the embodiments of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms of "a", "an" and "the" are intended to include plural forms.
[0030] See also Figure 1-Figure 4 The present invention proposes a power failure detection circuit, which is used to accurately detect whether the DC bus 10 of the target device is powered off and whether the power supply line 100 of the intermediate machine 110 is powered off. The target device can be specifically a battery charging and discharging test device. When the DC bus 10 and / or the power supply line 100 loses power, the power failure detection circuit can promptly send a power failure detection signal to the control unit 20 of the intermediate machine 110, so that the control unit 20 of the intermediate machine 110 can store the test data (specifically, the test data can be the battery test data) in time, avoiding data errors caused by the failure of data to be recorded in time due to power failure.
[0031] In order to achieve the above technical purpose, the power-off detection circuit includes a first power-off detection unit 30 and a second power-off detection unit 40, wherein the first power-off detection unit 30 is connected to the DC bus 10 of the target device and the control unit 20 of the intermediate machine 110, and is used to detect whether the DC bus 10 of the target device is powered off; the second power-off detection unit 40 is connected to the control unit 20 of the intermediate machine 110 and the power supply line 100 of the intermediate machine 110, and is used to detect whether the power supply line 100 of the intermediate machine 110 is powered off. The control unit 20 can be specifically a control chip.
[0032] In a specific implementation, the target device may be a battery charge and discharge test device, and the DC bus 10 of the battery charge and discharge test device is used to charge and discharge the battery, thereby testing the charge and discharge performance of the battery. It can be understood that the intermediate machine 110 is connected to the target device to collect and store the test data of the target device. The power supply line 100 of the intermediate machine 110 is used to power the intermediate machine 110.
[0033] The technical solution of the embodiment of the present invention is a power failure detection circuit, which includes a first power failure detection unit 30 and a second power failure detection unit 40. The first power failure detection unit 30 is connected to the DC bus 10 of the target device and the control unit 20 of the intermediate machine 110, and is used to detect whether the DC bus 10 of the target device is powered off; the second power failure detection unit 40 is connected to the control unit 20 of the intermediate machine 110 and the power supply line 100 of the intermediate machine 110, and is used to detect whether the power supply line 100 of the intermediate machine 110 is powered off. It can be seen that the power failure detection circuit can accurately detect whether the DC bus 10 and / or the power supply line 100 is powered off, so that the control unit 20 of the intermediate machine 110 can store test data in time when power failure occurs (the test data can specifically be battery test data), so as to avoid data errors caused by the inability to record data in time due to power failure.
[0034] In some embodiments, such as the present embodiment, the first power-off detection unit 30 includes a comparison unit 50, an isolation device 60, and a trigger unit 70, wherein the comparison unit 50 is connected to the isolation device 60 and the DC bus 10, the isolation device 60 is connected to the trigger unit 70, and the trigger unit 70 is connected to the control unit 20. When the DC bus 10 loses power, the comparison unit 50 turns on the isolation device 60; when the isolation device 60 is turned on, the trigger unit 70 sends a power-off detection signal to the control unit 20, so that the control unit 20 can timely know the power-off of the DC bus 10, and then the control unit 20 records the test data in time.
[0035] Specifically, the isolation device 60 is a photoelectric coupler, and the comparison unit 50 includes a first resistor R1, a second resistor R2, and a voltage regulator D1; one end of the first resistor R1 is connected to the DC bus 10, and the other end of the first resistor R1 is connected to the reference electrode of the voltage regulator D1 and the second resistor R2, and the second resistor R2 is grounded; the cathode of the voltage regulator D1 is connected to the negative electrode of the light-emitting diode of the photoelectric coupler, and the anode of the voltage regulator D1 is grounded; the positive electrode of the light-emitting diode of the photoelectric coupler is connected to the DC bus 10. Specifically, the model of the voltage regulator D1 can be TL431.
[0036] The working principle of the comparison unit 50 is as follows: when the DC bus 10 loses power, the voltage of the reference electrode of the voltage regulator D1 will be reduced. When the voltage of the reference electrode is lower than the reference voltage of the voltage regulator D1, the cathode of the voltage regulator D1 is at a low level, and the light emitting diode of the optocoupler is turned on. When the voltage of the power-off is less than the threshold voltage Vd, the light emitting diode of the optocoupler is turned on.
[0037] Wherein, Vd=(R10+R20) / R20*Vref, Vref is the reference voltage of the regulator D1, R10 is the voltage of the resistor R1, and R20 is the voltage of the resistor R2.
[0038] The comparison unit 50 also includes a third resistor R3 and a diode D2. The anode of the light emitting diode of the photoelectric coupler is connected to the DC bus 10 through the third resistor R3. The anode of the diode D2 is connected to the cathode of the light emitting diode of the photoelectric coupler, and the cathode of the diode D2 is connected to the anode of the light emitting diode of the photoelectric coupler. The third resistor R3 and the diode D2 both play a protective role to ensure the reliability of the circuit.
[0039] Further, the trigger unit 70 includes a first NPN transistor Q1 and a second NPN transistor Q2, and the base of the first NPN transistor Q1 is connected to the output end of the isolation device 60. In this embodiment, the isolation device 60 is a photocoupler, and the output end of the isolation device 60 is the emitter of the phototransistor of the photocoupler. The collector of the phototransistor is used to connect to a voltage source, such as a +24V voltage, and the voltage source can specifically be a power output pin of the intermediate computer 110.
[0040] The collector of the first NPN transistor Q1 is used to be connected to a first voltage source, and the emitter of the first NPN transistor Q1 is grounded. The first voltage source may be a power output pin of the intermediate computer 110, and the output voltage may be +24V.
[0041] The base of the second NPN transistor Q2 is connected to the first voltage source, the collector of the second NPN transistor Q2 is connected to the control unit 20, and the emitter of the second NPN transistor Q2 is grounded.
[0042] The working principle of the trigger unit 70 is as follows: when the isolation device 60 (photocoupler) is turned on, the base of the first NPN transistor Q1 is at a high level, and the first NPN transistor Q1 is turned on at this time; when the first NPN transistor Q1 is turned on, the voltage of the base of the second NPN transistor Q2 is pulled down, and the second NPN transistor Q2 is turned off. When the second NPN transistor Q2 is turned off, the collector of the second NPN transistor Q2 outputs a high level signal CHK1 to the control unit 20, and the high level signal CHK1 is the power-off detection signal of the DC bus 10.
[0043] Furthermore, the trigger unit 70 further includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a first voltage regulator tube D41 and a first capacitor C1.
[0044] The fourth resistor R4 is connected to the output end of the isolation device 60 and is grounded; the fourth resistor R4 serves to increase the base voltage of the first NPN transistor Q1 to ensure that the first NPN transistor Q1 is reliably turned on.
[0045] The fifth resistor R5 is connected to the output end of the isolation device 60 and the negative electrode of the first voltage regulator D41, and the positive electrode of the first voltage regulator D41 is connected to the base of the first NPN transistor Q1. The fifth resistor R5 plays a current limiting role, and the first voltage regulator D41 can improve voltage stability and ensure that the first NPN transistor Q1 is reliably turned on.
[0046] The first capacitor C1 is connected to the base of the first NPN transistor Q1 and is grounded, and the sixth resistor R6 is connected in parallel with the first capacitor C1; the first capacitor C1 and the sixth resistor R6 form a filter circuit, which can absorb clutter in the circuit and improve the stability of the circuit.
[0047] One end of the seventh resistor R7 is connected to the first voltage source, and the other end of the seventh resistor is connected to the collector of the first NPN transistor Q1 and the base of the second NPN transistor Q2. The seventh resistor R7 plays a role of current limiting.
[0048] In some embodiments, such as the present embodiment, the second power-off detection unit 40 includes a PNP transistor Q3 and a third NPN transistor Q4, the base of the PNP transistor Q3 is connected to the power supply line 100, the collector of the PNP transistor Q3 is connected to the base of the third NPN transistor Q4, the emitter of the third NPN transistor Q4 is grounded, and the collector of the third NPN transistor Q4 is connected to the second voltage source and the control unit 20.
[0049] The working principle of the second power-off detection unit 40 is that when the power supply line 100 loses power, the base voltage of the PNP transistor Q3 decreases, and the PNP transistor Q3 is turned on. When the PNP transistor Q3 is turned on, the base voltage of the third NPN transistor Q4 is pulled up, and the third NPN transistor Q4 is turned on. When the third NPN transistor Q4 is turned on, the third NPN transistor Q4 sends a low-level signal CHK2 to the control unit 20, and the low-level signal CHK2 is the power-off detection signal of the power supply line 100.
[0050] Furthermore, the second power-off detection unit 40 also includes an eighth resistor R8, a ninth resistor R9, a second capacitor C2 and a second voltage regulator D7. The cathode of the second voltage regulator D7 is connected to the power supply line 100 through the eighth resistor R8, and the anode of the second voltage regulator D7 is connected to the base of the PNP transistor Q3. The eighth resistor R8 plays a current limiting role. The second voltage regulator D7 can improve voltage stability and ensure that the PNP transistor Q3 is reliably turned on.
[0051] The second capacitor C2 is connected to the base of the PNP transistor Q3 and grounded, and the ninth resistor R9 is connected in parallel with the second capacitor C2. The second capacitor C2 and the ninth resistor R9 form a filter circuit that can absorb clutter in the circuit and improve the stability of the circuit.
[0052] Furthermore, the second power-off detection unit 40 further includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a third capacitor C3 and a fourth capacitor C4. The tenth resistor R10 is connected to the collector of the PNP transistor Q3 and the base of the third NPN transistor Q4 respectively. The tenth resistor R10 plays a current limiting role, thereby improving the safety of the circuit.
[0053] The eleventh resistor R11 is connected to the second voltage source and the collector of the third NPN transistor Q4; the twelfth resistor R12 is connected to the control unit 20 and the collector of the third NPN transistor Q4. The eleventh resistor R11 and the twelfth resistor R12 play a current limiting role, thereby improving the safety of the circuit.
[0054] The third capacitor C3 is connected to the base of the third NPN transistor Q4 and is grounded; the fourth capacitor C4 is connected to the collector of the third NPN transistor Q4 and is grounded. The third capacitor C3 and the fourth capacitor C4 can filter out clutter in the circuit, thereby improving the stability and reliability of the circuit.
[0055] Furthermore, in order to ensure that the control unit 20 of the intermediate machine 110 has enough power to complete the operation of storing test data when the power is off. The power-off detection circuit also includes an energy storage unit C5 and a boost converter 80, wherein the energy storage unit C5 is connected to the emitter of the PNP transistor Q3 and the boost converter 80, and the boost converter 80 is connected to the control unit 20. Specifically, the energy storage unit C5 can be a supercapacitor, which can store energy. When the intermediate machine 110 is powered off, the energy storage unit C5, on the one hand, serves as a voltage source when the PNP transistor Q3 is turned on, and on the other hand, the energy storage unit C5 supplies power to the control unit 20 through the boost converter 80. The boost converter 80 can raise the voltage of the energy storage unit C5, for example, to +5V. The boost converter 80 can be a BOOST converter.
[0056] Further, the second voltage source is a buck converter 90, and the boost converter 80 is connected to the buck converter 90. The buck converter 90 is used to reduce the voltage of the boost converter 80, for example, to +3.3V, and the voltage is reduced to +3.3V to supply power to the third NPN transistor Q4. The buck converter 90 can be specifically a BUCK converter.
[0057] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0058] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.
[0059] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0060] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be connected, detachably connected, or integrated; it can be mechanically connected or electrically connected; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0061] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0062] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms should not be understood as necessarily referring to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.
[0063] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.
[0064] The above is a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.
Claims
1. A power failure detection circuit, characterized in that: It includes a first power-off detection unit and a second power-off detection unit. The first power-off detection unit is connected to the DC bus of the target device and the control unit of the mid-position machine, and is used to detect whether the DC bus of the target device is powered off; the second power-off detection unit is connected to the control unit of the mid-position machine and the power supply line of the mid-position machine, and is used to detect whether the power supply line of the mid-position machine is powered off.
2. The power-off detection circuit according to claim 1, characterized in that: The first power-off detection unit includes a comparison unit, an isolation device and a trigger unit, wherein the comparison unit is connected to the isolation device and the DC bus, the isolation device is connected to the trigger unit, and the trigger unit is connected to the control unit, wherein when the DC bus loses power, the comparison unit turns on the isolation device; when the isolation device is turned on, the trigger unit sends a power-off detection signal to the control unit.
3. The power-off detection circuit according to claim 2, characterized in that: The isolation device is a photoelectric coupler, and the comparison unit includes a first resistor, a second resistor and a voltage regulator; one end of the first resistor is connected to the DC bus, the other end of the first resistor is connected to the reference electrode of the voltage regulator and the second resistor, and the second resistor is grounded; the cathode of the voltage regulator is connected to the negative electrode of the light-emitting diode of the photoelectric coupler, and the anode of the voltage regulator is grounded; the positive electrode of the light-emitting diode of the photoelectric coupler is connected to the DC bus.
4. The power-off detection circuit according to claim 3, characterized in that: The comparison unit also includes a third resistor and a diode, the positive electrode of the light-emitting diode of the photoelectric coupler is connected to the DC bus through the third resistor; the positive electrode of the diode is connected to the negative electrode of the light-emitting diode of the photoelectric coupler, and the negative electrode of the diode is connected to the positive electrode of the light-emitting diode of the photoelectric coupler.
5. The power-off detection circuit according to claim 2, characterized in that: The trigger unit includes a first NPN transistor and a second NPN transistor, the base of the first NPN transistor is connected to the output end of the isolation device, the collector of the first NPN transistor is used to be connected to a first voltage source, and the emitter of the first NPN transistor is grounded; the base of the second NPN transistor is connected to the first voltage source, the collector of the second NPN transistor is connected to the control unit, and the emitter of the second NPN transistor is grounded.
6. The power-off detection circuit according to claim 5, characterized in that: The trigger unit further includes a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first voltage regulator and a first capacitor; the fourth resistor is connected to the output end of the isolation device and is grounded; the fifth resistor is connected to the output end of the isolation device and the negative electrode of the first voltage regulator, and the positive electrode of the first voltage regulator is connected to the base of the first NPN transistor; the first capacitor is connected to the base of the first NPN transistor and is grounded, and the sixth resistor is connected in parallel with the first capacitor; One end of the seventh resistor is connected to the first voltage source, and the other end of the seventh resistor is connected to the collector of the first NPN transistor and the base of the second NPN transistor.
7. The power failure detection circuit according to claim 1, characterized in that: The second power-off detection unit includes a PNP transistor and a third NPN transistor, the base of the PNP transistor is connected to the power supply line, the collector of the PNP transistor is connected to the base of the third NPN transistor, the emitter of the third NPN transistor is grounded, and the collector of the third NPN transistor is connected to the second voltage source and the control unit.
8. The power-off detection circuit according to claim 7, characterized in that: The second power-off detection unit also includes an eighth resistor, a ninth resistor, a second capacitor and a second voltage regulator. The negative electrode of the second voltage regulator is connected to the power supply line through the eighth resistor, and the positive electrode of the second voltage regulator is connected to the base of the PNP transistor; the second capacitor is connected to the base of the PNP transistor and is grounded, and the ninth resistor is connected in parallel with the second capacitor.
9. The power-off detection circuit according to claim 7, characterized in that: The second power-off detection unit also includes a tenth resistor, an eleventh resistor, a twelfth resistor, a third capacitor and a fourth capacitor; the tenth resistor is respectively connected to the collector of the PNP transistor and the base of the third NPN transistor; the eleventh resistor is connected to the second voltage source and the collector of the third NPN transistor; the twelfth resistor is connected to the control unit and the collector of the third NPN transistor; the third capacitor is connected to the base of the third NPN transistor and is grounded; the fourth capacitor is connected to the collector of the third NPN transistor and is grounded.
10. The power-off detection circuit according to claim 7, characterized in that: The power failure detection circuit further includes an energy storage unit and a boost converter, wherein the energy storage unit is connected to the emitter of the PNP transistor and the boost converter, and the boost converter is connected to the control unit; The second voltage source is a buck converter, and the boost converter is connected to the buck converter.