Novel low-noise and low-power-consumption band-gap reference

Abstract

The invention discloses a novel low-noise and low-power-consumption band-gap reference, and belongs to the field of analog integrated circuits, the novel low-noise and low-power-consumption band-gap reference is composed of a network structure composed of a plurality of delta VBE units, and each delta VBE unit comprises triodes Q1A-Q1B and a current source I1; the emitting electrode area of the triode Q1A is N times of the emitting electrode area of the triode Q1B, and N is a positive integer greater than 1; and the emitting electrode of the triode Q1A can generate the required delta VBE voltage. The invention has the advantages of low noise and low power consumption, and is suitable for high-precision and low-power-consumption application.

Description

Technical Field

[0001] The invention belongs to the technical field of analog integrated circuits, and in particular relates to a novel low-noise, low-power bandgap reference. Background Art

[0002] In existing high-precision bandgap reference voltage sources, in order to reduce noise, it is usually necessary to greatly increase power consumption. Specifically, for every 4-fold increase in power consumption, the noise can be reduced by 2 times. Although this method of reducing noise is effective, it greatly wastes power consumption. Summary of the invention

[0003] In order to solve the above problems, the present invention proposes a novel low-noise, low-power bandgap reference.

[0004] The technical solution of the present invention is: a new type of low-noise, low-power bandgap reference, which is composed of multiple ΔV BE The network structure consists of units, where a single ΔV BE The unit includes transistor Q 1A -Q 1B , current source I1; the positive electrode of the current source I1 is connected to the power supply voltage V DD Connection: The transistor Q 1B The emitter of the current source I1 is grounded; the negative electrode of the current source I1 and the transistor Q 1A The collector of transistor Q 1A The base of transistor Q 1B The base of the transistor Q 1A The emitter and transistor Q 1B The collector of the transistor Q 1A The emitter area of ​​the transistor is Q 1B N times the emitter area, N is a positive integer greater than 1; the transistor Q 1A The emitter stage can generate the required ΔV BE Voltage.

[0005] Furthermore, the network structure can be in series, including ΔV BE Unit 1-ΔV BE Unit 9, current source I1; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-9, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xAThe emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of x represents the number 1 to the number 8. This connection method is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit 1 1A The base and collector are connected; the ΔV BE Transistor Q in unit 1 1A The collector of the current source I1 is connected to the negative electrode, thereby achieving ΔV BE The current of unit 1 is provided by current source I1; the positive electrode of current source I1 is connected to the power supply voltage V DD connection; the ΔV BE Transistor Q in unit 9 9B The emitter of the transistor Q 9A The emitter can generate the required voltage ΔV BE ×9, transistor Q 9A The base of the REF .

[0006] Furthermore, the network structure can also be in series or parallel form, including ΔV BE Unit 1-ΔV BE Unit 9, current source I1, current source I4, current source I7; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-9, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xA The emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of , x represents the number 1, 2, 4, 5, 7, 8, this connection mode is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit x xB The collector and ΔVBE Transistor Q in unit x+3 (x+3)B The emitter of is connected, x represents the numbers 3 and 6, this connection is ΔV BE The parallel form of the unit; the ΔV BE Transistor Q in unit x xA The base and collector are connected, x represents the number 1, 4, 7; the ΔV BE Transistor Q in unit x xA The collector and current source I x The negative electrode is connected to achieve ΔV BE The current of cell x is provided by current source I x Provided, x represents a number 1, 4, 7; the current source I x The positive pole is connected to the power supply voltage V DD connection, x represents the number 1, 4, 7; the ΔV BE Transistor Q in unit 3 3B The emitter is grounded; the ΔV BE Transistor Q in unit 9 9A The emitter can generate the required voltage ΔV BE ×9, transistor Q 9A The base of the REF .

[0007] Furthermore, the network structure may also adopt another series or parallel form, including ΔV BE Unit 1-ΔV BE Unit 8, current source I1, current source I5; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-8, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xA The emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of , x represents the number 1, 2, 3, 5, 6, 7, this connection mode is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit 4 4B The collector and ΔVBE Transistor Q in unit 8 8B The emitter connection of this connection is ΔV BE The parallel form of the unit; the ΔV BE Transistor Q in unit x xA The base and collector are connected, x represents the numbers 1 and 5; the ΔV BE Transistor Q in unit x xA The collector and current source I x The negative electrode is connected to achieve ΔV BE The current of cell x is provided by current source I x Provided that x represents the numbers 1 and 5; the current source I x The positive pole is connected to the power supply voltage V DD connection, x represents the numbers 1 and 5; the ΔV BE Transistor Q in unit 4 4B The emitter is grounded; the ΔV BE Transistor Q in unit 8 8A The emitter can generate the required voltage ΔV BE ×8, transistor Q 8A The base of the REF .

[0008] The invention has the beneficial effects of low noise and low power consumption, and is suitable for high-precision and low-power consumption applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 =ΔV BE Unit schematic diagram;

[0010] Figure 2 A new low-noise, low-power bandgap reference (Example 1);

[0011] Figure 3 A new low-noise, low-power bandgap reference (Example 2);

[0012] Figure 4 It is a new type of low-noise, low-power bandgap reference (Example 3). DETAILED DESCRIPTION

[0013] The embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

[0014] The present invention provides a novel low-noise, low-power bandgap reference, which is composed of multiple ΔV BE The network structure consists of units, where a single ΔV BE The unit includes transistor Q 1A -Q 1B , current source I1, such as Figure 1As shown; the positive electrode of the current source I1 and the power supply voltage V DD Connection: The transistor Q 1B The emitter of the current source I1 is grounded; the negative electrode of the current source I1 and the transistor Q 1A The collector of transistor Q 1A The base of transistor Q 1B The base of the transistor Q 1A The emitter and transistor Q 1B The collector of the transistor Q 1A The emitter area of ​​the transistor is Q 1B N times the emitter area, N is a positive integer greater than 1; the transistor Q 1A The emitter stage can generate the required ΔV BE Voltage.

[0015] The following is divided into three embodiments for explanation, respectively as follows: Figure 2 , Figure 3 , Figure 4 shown.

[0016] Embodiment 1:

[0017] In the first embodiment of the present invention, Figure 2 As shown, the network structure can be in series form, including ΔV BE Unit 1-ΔV BE Unit 9, current source I1; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-9, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xA The emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of x represents the number 1 to the number 8. This connection method is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit 1 1A The base and collector are connected; the ΔV BE Transistor Q in unit 1 1AThe collector of the current source I1 is connected to the negative electrode, thereby achieving ΔV BE The current of unit 1 is provided by current source I1; the positive electrode of current source I1 is connected to the power supply voltage V DD connection; the ΔV BE Transistor Q in unit 9 9B The emitter of the transistor Q 9A The emitter can generate the required voltage ΔV BE ×9, transistor Q 9A The base of the REF .

[0018] Embodiment 2:

[0019] In the second embodiment of the present invention, Figure 3 As shown, the network structure can be in series or parallel form, including ΔV BE Unit 1-ΔV BE Unit 9, current source I1, current source I4, current source I7; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-9, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xA The emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of , x represents the number 1, 2, 4, 5, 7, 8, this connection mode is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit x xB The collector and ΔV BE Transistor Q in unit x+3 (x+3)B The emitter of is connected, x represents the numbers 3 and 6, this connection is ΔV BE The parallel form of the unit; the ΔV BE Transistor Q in unit x xA The base and collector are connected, x represents the number 1, 4, 7; the ΔV BE Transistor Q in unit x xA The collector and current source I xThe negative electrode is connected to achieve ΔV BE The current of cell x is provided by current source I x Provided, x represents a number 1, 4, 7; the current source I x The positive pole is connected to the power supply voltage V DD connection, x represents the number 1, 4, 7; the ΔV BE Transistor Q in unit 3 3B The emitter is grounded; the ΔV BE Transistor Q in unit 9 9A The emitter can generate the required voltage ΔV BE ×9, transistor Q 9A The base of the REF .

[0020] Embodiment three:

[0021] In the third embodiment of the present invention, Figure 4 As shown, the network structure can adopt another series or parallel form, including ΔV BE Unit 1-ΔV BE Unit 8, current source I1, current source I5; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-8, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xA The emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of , x represents the number 1, 2, 3, 5, 6, 7, this connection mode is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit 4 4B The collector and ΔV BE Transistor Q in unit 8 8B The emitter connection of this connection is ΔV BE The parallel form of the unit; the ΔV BE Transistor Q in unit x xA The base and collector are connected, x represents the numbers 1 and 5; the ΔV BE Transistor Q in unit xxA The collector and current source I x The negative electrode is connected to achieve ΔV BE The current of cell x is provided by current source I x Provided that x represents the numbers 1 and 5; the current source I x The positive pole is connected to the power supply voltage V DD connection, x represents the numbers 1 and 5; the ΔV BE Transistor Q in unit 4 4B The emitter is grounded; the ΔV BE Transistor Q in unit 8 8A The emitter can generate the required voltage ΔV BE ×8, transistor Q 8A The base of the REF .

[0022] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. A novel low noise, low power bandgap reference, characterized in that: It is composed of multiple ΔV BE The network structure consists of units, where a single ΔV BE The unit includes transistor Q 1A -Q 1B , current source I1; the positive electrode of the current source I1 is connected to the power supply voltage V DD Connection: The transistor Q 1B The emitter of the current source I1 is grounded; the negative electrode of the current source I1 and the transistor Q 1A The collector of transistor Q 1A The base of transistor Q 1B The base of the transistor Q 1A The emitter and transistor Q 1B The collector of the transistor Q 1A The emitter area of ​​the transistor is Q 1B N times the emitter area, N is a positive integer greater than 1; the transistor Q 1A The emitter stage can generate the required ΔV BE Voltage.

2. The novel low noise, low power bandgap reference according to claim 1, characterized in that: The network structure adopts a series form, including ΔV BE Unit 1-ΔV BE Unit 9, current source I1; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-9, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xA The emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of x represents the number 1 to the number 8. This connection method is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit 1 1A The base and collector are connected; the ΔV BE Transistor Q in unit 1 1A The collector of the current source I1 is connected to the negative electrode, thereby achieving ΔV BE The current of unit 1 is provided by current source I1; the positive electrode of current source I1 is connected to the power supply voltage V DD connection; the ΔV BE Transistor Q in unit 9 9B The emitter of the transistor Q 9A The emitter can generate the required voltage ΔV BE ×9, transistor Q 9A The base of the REF .

3. The novel low noise, low power bandgap reference according to claim 1, characterized in that: The network structure adopts series and parallel forms, including ΔV BE Unit 1-ΔV BE Unit 9, current source I1, current source I4, current source I7; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-9, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xA The emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of , x represents the number 1, 2, 4, 5, 7, 8, this connection mode is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit x xB The collector and ΔV BE Transistor Q in unit x+3 (x+3)B The emitter of is connected, x represents the numbers 3 and 6, this connection is ΔV BE The parallel form of the unit; the ΔV BE Transistor Q in unit x xA The base and collector are connected, x represents the number 1, 4, 7; the ΔV BE Transistor Q in unit x xA The collector and current source I x The negative electrode is connected to achieve ΔV BE The current of cell x is provided by current source I x Provided, x represents a number 1, 4, 7; the current source I x The positive pole is connected to the power supply voltage V DD connection, x represents the number 1, 4, 7; the ΔV BE Transistor Q in unit 3 3B The emitter is grounded; the ΔV BE Transistor Q in unit 9 9A The emitter can generate the required voltage ΔV BE ×9, transistor Q 9A The base of the REF .

4. The novel low noise, low power bandgap reference according to claim 1, characterized in that: The network structure adopts series and parallel forms, including ΔV BE Unit 1-ΔV BE Unit 8, current source I1, current source I5; the ΔV BE Unit x includes transistor Q xA -Q xB , x represents the number 1-8, transistor Q xA The collector and transistor Q xB The base connection of transistor Q xA The emitter and transistor Q xB The collector connection of BE Transistor Q in unit x xA The emitter and ΔV BE Transistor Q in unit x+1 (x+1)A The base connection, ΔV BE Transistor Q in unit x xB The emitter and ΔV BE Transistor Q in unit x+1 (x+1)B The base connection of , x represents the number 1, 2, 3, 5, 6, 7, this connection mode is ΔV BE The series form of the unit; the ΔV BE Transistor Q in unit 4 4B The collector and ΔV BE Transistor Q in unit 8 8B The emitter connection of this connection is ΔV BE The parallel form of the unit; the ΔV BE Transistor Q in unit x xA The base and collector are connected, x represents the numbers 1 and 5; the ΔV BE Transistor Q in unit x xA The collector and current source I x The negative electrode is connected to achieve ΔV BE The current of cell x is provided by current source I x Provided that x represents the numbers 1 and 5; the current source I x The positive pole is connected to the power supply voltage V DD connection, x represents the numbers 1 and 5; the ΔV BE Transistor Q in unit 4 4B The emitter is grounded; the ΔV BE Transistor Q in unit 8 8A The emitter can generate the required voltage ΔV BE ×8, transistor Q 8A The base of the REF .

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