RAM read-write control method and device, electronic equipment and storage medium

By detecting the number of consecutive recurrences of RAM input data, generating index data, and writing and reading operations based on the enable signal, the power consumption problem caused by excessive RAM read and write addresses in the prior art is solved, and the power consumption problem is achieved. Efficient data storage and reading.

CN119292445AActive Publication Date: 2025-01-10SHANGHAI OLEADVISION TECHONOLOGY CO LTD
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Patent Information

Application Number
CN202411210090.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-30
Publication Date
2025-01-10
Estimated Expiration
2044-08-30

AI Technical Summary

Technical Problem

Existing RAM reading and writing methods fail to effectively reduce the generation of write addresses and read addresses, resulting in waste of power consumption.

Method used

By detecting the number of consecutive recurrences of data in the input data, the index data is generated, and according to the write enable signal and read enable signal, the index data and the corresponding data are written to or read out the RAM address, reducing the write address and read Generation of address.

Benefits of technology

It effectively reduces the number of operations of RAM write and read addresses and reduces power consumption.

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Abstract

The invention discloses a read-write control method and device of an RAM, electronic equipment and a storage medium. The read-write control method of the RAM comprises the steps that input data written into the RAM is sent; detecting the input data, obtaining the number of data which continuously and repeatedly appear in multiple groups of data, and generating index data; writing index data and a group of data corresponding to the index data into an RAM address according to the write enable signal; reading index data in the RAM address and a group of data corresponding to the index data according to the read enable signal; and generating output data according to the index data and the group of data corresponding to the index data. The method can effectively reduce the generation of the write address and the read address of the RAM, reduces the operation times of the read address and the write address on the RAM, and reduces the power consumption.
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Description

Technical Field

[0001] The present invention relates to the technical field of data reading and writing, and in particular to a RAM reading and writing control method, device, electronic equipment and storage medium. Background Art

[0002] Random Access Memory (RAM) is an internal memory that directly exchanges data with the CPU. It can be read and written at any time, and the speed is very fast. It is usually used as a temporary data storage medium for operating systems or other running programs. When working, RAM can write or read data from any specified address at any time. It is used in computers and digital systems to temporarily store programs, data, and intermediate results; therefore, RAM is widely used in various data cache interaction fields.

[0003] Figure 1 A schematic diagram of the read and write state of a RAM read and write method of the prior art is shown, wherein Figure 1 As shown, the input data example includes eight groups of data. When the RAM stores data, eight write addresses are generated, and eight write operations are performed on the RAM. When the RAM reads data, eight read addresses are generated, and eight read operations are performed on the RAM. However, the RAM reading and writing method of the prior art does not consider the characteristics of the data, and will generate more RAM write addresses and read addresses, and the corresponding number of RAM read and write operations is more, thereby causing a waste of power consumption when reading and writing the RAM. Summary of the invention

[0004] In view of the above problems, the purpose of the present invention is to provide a RAM read and write control method, device, electronic device and storage medium, which can effectively reduce the generation of RAM write addresses and read addresses, reduce the number of operations of read and write addresses on RAM, and reduce power consumption. The present invention provides a read-write control method for a RAM, comprising: sending input data to be written into the RAM; detecting the input data, obtaining the number of consecutively repeated occurrences of data in multiple groups of data, and generating index data; writing the index data and a group of data corresponding to the index data into a RAM address together according to a write enable signal; reading out the index data and a group of data corresponding to the index data in the RAM address according to a read enable signal; and generating output data according to the index data and a group of data corresponding to the index data.

[0005] Optionally, obtaining the number of consecutive repetitions of data in multiple groups of data includes: performing data comparison to obtain the first group of data and the last group of data in which data appear consecutively; and obtaining the number of consecutive repetitions of data in multiple groups of data based on the sorting positions of the first group of data and the last group of data in which data appear consecutively.

[0006] Optionally, performing data comparison to obtain the first and last groups of data that appear continuously and repeatedly includes: sequentially comparing two adjacent groups of data among the multiple groups of data, and obtaining the first and last groups of data that appear continuously and repeatedly according to the comparison result.

[0007] Optionally, performing data comparison to obtain the first set of data and the last set of data that appear repeatedly includes: performing data comparison to obtain the first set of data; comparing the first set of data with subsequent data in sequence until the two sets of data are different, and determining the last set of data.

[0008] Optionally, the data comparison includes: when comparing two sets of data, comparing whether numbers corresponding to the same digits are the same, and repeating until the numbers corresponding to each digit are compared.

[0009] Optionally, when comparing two sets of data, comparing whether the numbers corresponding to the same digits are the same, and repeating until the numbers corresponding to each digit are compared, including: setting the digit length of one of the two sets of data as the count number; comparing whether the numbers corresponding to the same digits are the same, and repeating until the numbers corresponding to each digit are compared, and reducing the count number by one each time a comparison operation corresponding to a digit is performed, until the comparison operation is stopped when the count number is zero.

[0010] Optionally, writing the index data and a group of data corresponding to the index data together to the RAM address according to a write enable signal includes: setting a group of data corresponding to the index data as the first group of data or the last group of data that appears continuously and repeatedly; writing the index data and a group of data corresponding to the index data together to the RAM address according to a write enable signal.

[0011] The present invention also provides a read-write control device for a RAM, comprising an input module, a detection module, a write module, a read-out module and an output module; the input module is used to send input data written into the RAM; the detection module is used to detect the input data, obtain the number of consecutive repetitions of data in multiple groups of data, and generate index data; the write module is used to write the index data and a group of data corresponding to the index data into a RAM address according to a write enable signal; the read-out module is used to read the index data and a group of data corresponding to the index data in the RAM address according to a read enable signal; the output module is used to generate output data according to the index data and a group of data corresponding to the index data.

[0012] The present invention also provides an electronic device, comprising a memory and a processor, wherein the memory stores executable code, and the processor implements the steps of the above-mentioned RAM read and write control method when executing the executable code.

[0013] The present invention also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned RAM read and write control method are implemented.

[0014] The RAM read and write control method, device, electronic device and storage medium provided by the present invention can obtain the number of consecutive repeated occurrences of data in multiple groups of data according to the characteristics of data stored in the RAM, generate index data, and write the index data and a group of data corresponding to the index data into the RAM address together according to a write enable signal; read out the index data in the RAM address and a group of data corresponding to the index data according to a read enable signal; generate output data according to the index data and a group of data corresponding to the index data, which can effectively reduce the generation of RAM write addresses and read addresses, reduce the number of operations of the read and write addresses on the RAM, and reduce power consumption. BRIEF DESCRIPTION OF THE DRAWINGS In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0015] Figure 1 A schematic diagram showing the read and write states of a RAM read and write method of the prior art is shown; Figure 2 A flowchart of a RAM reading and writing method according to an embodiment of the present invention is shown; Figure 3A schematic diagram showing the read and write states of a RAM read and write method according to an embodiment of the present invention is shown; Figure 4 A schematic structural diagram of a RAM reading and writing device according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0016] The aforementioned and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of the preferred embodiments with reference to the drawings. Through the description of the specific implementation methods, the technical means and effects adopted by the present invention to achieve the intended purpose can be more deeply and specifically understood. However, the attached drawings are only for reference and illustration purposes, and are not used to limit the present invention. Some well-known parts may not be shown. In each of the drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the drawings are not necessarily drawn strictly in accordance with the actual proportions.

[0017] It should be understood that the terms "first", "second", "third", "fourth", etc. are only used to distinguish components or circuits with similar properties, rather than indicating or implying relative importance or a specific order. The terms "include", "comprises", or any other variation thereof, are intended to cover non-exclusive inclusion, and may include other elements not explicitly listed in addition to those listed elements.

[0018] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0019] Please also refer to Figure 2 and Figure 3 , Figure 2 A flowchart of a RAM reading and writing method according to an embodiment of the present invention is shown; Figure 3 A schematic diagram of the read and write states of a RAM read and write method according to an embodiment of the present invention is shown.

[0020] like Figure 2 As shown, this embodiment provides a RAM reading and writing method, and the RAM reading and writing method includes: S110, sending input data to be written into RAM.

[0021] For example, in Figure 3 In the example, the input data sent to be written into the RAM may include eight groups of data from data0 to data7, but the present invention is not limited to this, and may also be multiple groups of data of other numbers.

[0022] S120, detecting the input data, obtaining the number of consecutive repetitions of data in multiple groups of data, and generating index data.

[0023] For example, in Figure 3 In the example, for eight groups of data from data0 to data8 in the input data, the data characteristics stored in the RAM are that data0 and data1 are the same data, data3, data4 and data5 are the same data, data6 and data7 are the same data, data2 and the adjacent data1 or data3 are different data, and data6 and the adjacent data5 are different data. This is only used to illustrate the embodiment and is not used to specifically limit the data characteristics stored in the RAM. Thus, Figure 3 The number of consecutive repetitions of data in the example is 2, 1, 3 and 2, respectively. Figure 3 The index data shown.

[0024] S130, writing the index data and a group of data corresponding to the index data into the RAM address together according to the write enable signal.

[0025] For example, in Figure 3 In the example, the index data is 2, 1, 3 and 2. The first 2 in the index data can correspond to data0 and data1, so a write address can be generated. According to the write enable signal, the first 2 in the index data and a group of data data0 or data1 corresponding to the 2 are written to RAM address 0. Similarly, the 1 in the index data and a group of data data2 corresponding to the 1 are written to RAM address 1. The 3 in the index data and a group of data data3, data4 or data5 corresponding to the 3 are written to RAM address 2. The second 2 in the index data and a group of data data6 or data7 corresponding to the 2 are written to RAM address 3. Figure 3 and Figure 1 By comparison, it can be seen that the prior art generates eight write addresses when storing data in RAM and performs eight RAM write operations, while the present embodiment generates four write addresses when storing data in RAM and performs four RAM write operations. Thus, the generation of RAM write addresses can be effectively reduced, the number of write address operations on RAM can be reduced, and power consumption can be reduced.

[0026] S140, reading out the index data in the RAM address and a group of data corresponding to the index data according to the read enable signal.

[0027] For example, in Figure 3In the read enable signal, the data stored in the RAM can be read out, that is, according to the read enable signal, the first 2 in the index data in RAM address 0 and a group of data data0 or data1 corresponding to the 2 can be read out, the 1 in the index data in RAM address 1 and a group of data data2 corresponding to the 1 can be read out, the 3 in the index data in RAM address 2 and a group of data data3, data4 or data5 corresponding to the 3 can be read out, and the second 2 in the index data in RAM address 3 and a group of data data6 or data7 corresponding to the 2 can be read out. Figure 3 and Figure 1 By comparison, it can be seen that the prior art generates eight read addresses when the RAM reads data, and performs eight RAM read operations, while the present embodiment generates four read addresses when the RAM reads data, and performs four RAM read operations. Thus, the generation of RAM read addresses can be effectively reduced, the number of operations of the read addresses on the RAM can be reduced, and power consumption can be reduced.

[0028] S150: Generate output data according to the index data and a group of data corresponding to the index data.

[0029] For example, in Figure 3 In the example, according to the first 2 in the index data read from RAM address 0 and a group of data data0 or data1 corresponding to the 2, the group of data can be repeatedly output 2 times to obtain data0 and data1 in the output data; according to the 1 in the index data read from RAM address 1 and a group of data data2 corresponding to the 1, the group of data can be output only once to obtain data2 in the output data; according to the 3 in the index data read from RAM address 2 and a group of data data3, data4 or data5 corresponding to the 3, the group of data can be repeatedly output 3 times to obtain data3, data4 and data5 in the output data; according to the second 2 in the index data read from RAM address 3 and a group of data data6 or data7 corresponding to the 2, the group of data can be repeatedly output 2 times to obtain data6 and data7 in the output data. Thus, the output data finally obtained are data0, data1, data2, data3, data4, data5, data6 and data7, which are the same as the input data data0 to data7.

[0030] Therefore, the RAM read and write control method provided in this embodiment can obtain the number of consecutive repetitions of data in multiple groups of data according to the characteristics of the data stored in the RAM, generate index data, and write the index data and a group of data corresponding to the index data into the RAM address together according to a write enable signal; read out the index data in the RAM address and a group of data corresponding to the index data according to a read enable signal; generate output data according to the index data and a group of data corresponding to the index data, which can effectively reduce the generation of RAM write addresses and read addresses, reduce the number of operations of the read and write addresses on the RAM, and reduce power consumption.

[0031] Optionally, obtaining the number of consecutive repetitions of data in multiple groups of data includes: performing data comparison to obtain the first group of data and the last group of data in which data appear consecutively; and obtaining the number of consecutive repetitions of data in multiple groups of data based on the sorting positions of the first group of data and the last group of data in which data appear consecutively.

[0032] For example, in Figure 3 , perform data comparison; the first group of data data0 and the last group of data data1 that appear continuously can be obtained. According to the sorting positions of data0 and data1, the number of data that appear continuously in multiple groups of data can be obtained as 2; the first group of data data2 and the last group of data data2 that appear continuously can be obtained. According to the sorting positions of data2 and data2, the number of data that appear continuously in multiple groups of data can be obtained as 1; the first group of data data3 and the last group of data data5 that appear continuously can be obtained. According to the sorting positions of data3 and data5, the number of data that appear continuously in multiple groups of data can be obtained as 3; the first group of data data6 and the last group of data data7 that appear continuously can be obtained. According to the sorting positions of data6 and data7, the number of data that appear continuously in multiple groups of data can be obtained as 2.

[0033] Optionally, performing data comparison to obtain the first and last groups of data that are repeated continuously includes: sequentially comparing two adjacent groups of data among the multiple groups of data, and obtaining the first and last groups of data that are repeated continuously according to the comparison result.

[0034] For example, in Figure 3, two adjacent groups of data in the multiple groups of data are compared in sequence, and the comparison result is that data0 and data1 are the same data, data1 and data2 are different data, data2 and data3 are different data, data3 and data4 are the same data, data4 and data5 are the same data, data5 and data6 are different data, and data6 and data7 are the same data; thus, the first group of data data0 and the last group of data data1 that are repeatedly appearing can be obtained, the first group of data data2 and the last group of data data2 that are repeatedly appearing can be obtained, the first group of data data3 and the last group of data data5 that are repeatedly appearing can be obtained, and the first group of data data6 and the last group of data data7 that are repeatedly appearing can be obtained.

[0035] Optionally, performing data comparison to obtain the first set of data and the last set of data that appear repeatedly includes: performing data comparison to obtain the first set of data; comparing the first set of data with subsequent data in sequence until the two sets of data are different, and then determining the last set of data.

[0036] For example, in Figure 3 , data comparison is performed to obtain the first group of data data0, and data0 is compared with subsequent data in sequence until data0 is compared with data2 and the two groups of data are different. It is determined that the last group of data when the first group of data data0 is data1, then the first group of data data0 and the last group of data data1 that are repeatedly appearing can be obtained; similarly, the first group of data data2 and the last group of data data2 that are repeatedly appearing can be obtained, the first group of data data3 and the last group of data data5 that are repeatedly appearing can be obtained, and the first group of data data6 and the last group of data data7 that are repeatedly appearing can be obtained.

[0037] Optionally, performing data comparison includes: when comparing two sets of data, comparing whether the numbers corresponding to the same digits are the same, and repeating until the numbers corresponding to each digit are compared. For example, when comparing data0 with data1, comparing whether the numbers corresponding to the same digits are the same, and repeating until the numbers corresponding to each digit are compared, it can be obtained that the numbers corresponding to all digits are the same, and it can be determined that data0 and data1 are the same data; when comparing data1 with data2, comparing whether the numbers corresponding to the same digits are the same, and repeating until the numbers corresponding to each digit are compared, it can be obtained that the numbers corresponding to at least one digit are different, and it can be determined that data1 and data2 are different data.

[0038] Optionally, when comparing two sets of data, compare whether the numbers corresponding to the same digits are the same, and repeat until the numbers corresponding to each digit are compared, including: setting the digit length of one of the two sets of data to the count number; compare whether the numbers corresponding to the same digits are the same, and repeat until the numbers corresponding to each digit are compared, and reduce the count number by one each time a comparison operation corresponding to a digit is performed, until the comparison operation is stopped when the count number is zero. For example, when comparing data0 with data1, the digit length of data0 can be set to the count number; compare whether the numbers corresponding to the same digits are the same, and repeat until the numbers corresponding to each digit are compared, and the count number is reduced by one each time a comparison operation corresponding to a digit is performed, until the comparison operation is stopped when the count number is zero, it can be obtained that the numbers corresponding to all digits are the same, and it can be determined that data0 and data1 are the same data; when comparing data1 with data2, the digit length of data1 can be set to the count number; compare whether the numbers corresponding to the same digits are the same, and repeat until the numbers corresponding to each digit are compared, and the count number is reduced by one each time a comparison operation corresponding to a digit is performed, until the comparison operation is stopped when the count number is zero, it can be obtained that the numbers corresponding to at least one of the digits are different, and it can be determined that data1 and data2 are different data.

[0039] Optionally, according to a write enable signal, the index data and a group of data corresponding to the index data are written together to a RAM address, including: setting a group of data corresponding to the index data as the first group of data or the last group of data that appears continuously and repeatedly; according to a write enable signal, the index data and a group of data corresponding to the index data are written together to a RAM address.

[0040] For example, in Figure 3 In the example, a group of data corresponding to 3 in the index data can be set to the first group of data data3 or the last group of data data5 that appear continuously and repeatedly; according to the write enable signal, 3 in the index data and data3 or data5 corresponding to the 3 are written into the RAM address together.

[0041] Based on the same inventive concept, Figure 4As shown, the embodiment of the present invention also provides a read-write control device for RAM, including an input module 100, a detection module 200, a write module 300, a read module 400 and an output module 500; the input module 100 is used to send input data written into the RAM; the detection module 200 is used to detect the input data, obtain the number of consecutive repetitions of data in multiple groups of data, and generate index data; the write module 300 is used to write the index data and a group of data corresponding to the index data into the RAM address together according to the write enable signal; the read module 400 is used to read the index data and a group of data corresponding to the index data in the RAM address according to the read enable signal; the output module 500 is used to generate output data according to the index data and a group of data corresponding to the index data. The implementation of the read-write control device for RAM can refer to the embodiment of the read-write control method for RAM mentioned above, and the repeated parts will not be repeated.

[0042] Based on the same inventive concept, an embodiment of the present invention further provides an electronic device, including a memory and a processor, wherein the memory stores executable code, and the processor implements the steps of the RAM read-write control method of the aforementioned embodiment when executing the executable code. The implementation of the electronic device can refer to the embodiment of the RAM read-write control method, and the repeated parts will not be repeated.

[0043] Based on the same inventive concept, an embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the RAM read-write control method of the aforementioned embodiment are implemented. The implementation of the computer-readable storage medium can refer to the embodiment of the RAM read-write control method described above, and the repeated parts will not be repeated.

[0044] The RAM read and write control method, device, electronic device and storage medium provided by the embodiments of the present invention can obtain the number of consecutive repetitions of data in multiple groups of data according to the characteristics of the data stored in the RAM, generate index data, and write the index data and a group of data corresponding to the index data into the RAM address together according to a write enable signal; read out the index data in the RAM address and a group of data corresponding to the index data according to a read enable signal; generate output data according to the index data and a group of data corresponding to the index data, which can effectively reduce the generation of RAM write addresses and read addresses, reduce the number of operations of the read and write addresses on the RAM, and reduce power consumption.

[0045] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept. For example, the above features are replaced with (but not limited to) technical features with similar functions disclosed in the present application.

Claims

1. A RAM read and write control method, characterized in that: include: Send input data written to RAM; Detect the input data, obtain the number of consecutive repetitions of data in multiple groups of data, and generate index data; According to a write enable signal, writing the index data and a group of data corresponding to the index data into a RAM address together; According to a read enable signal, reading out the index data in the RAM address and a group of data corresponding to the index data; Output data is generated according to the index data and a group of data corresponding to the index data.

2. The RAM read-write control method according to claim 1, characterized in that: The obtaining the number of consecutive repetitions of data in the multiple sets of data includes: Compare the data and obtain the first and last set of data that appear repeatedly; The number of consecutively repeated data in multiple groups of data is obtained according to the sorting positions of the first group of data and the last group of data in which the data are consecutively repeated.

3. The RAM read-write control method according to claim 2, characterized in that: The data comparison is performed to obtain the first set of data and the last set of data that are repeated continuously, including: Two adjacent groups of data in the plurality of groups of data are compared in sequence, and the first group of data and the last group of data in which the data are continuously repeated are obtained according to the comparison result.

4. The RAM read-write control method according to claim 1, characterized in that: The data comparison is performed to obtain the first set of data and the last set of data that are repeated continuously, including: Performing data comparison to obtain the first set of data; The first set of data is compared with subsequent data in sequence until the two sets of data are different, and then the last set of data is determined.

5. The RAM read-write control method according to claim 1, characterized in that: The data comparison comprises: When comparing two sets of data, compare whether the numbers corresponding to the same digits are the same, and repeat until the numbers corresponding to each digit are compared.

6. The RAM read and write control method according to claim 5, characterized in that: When comparing two sets of data, comparing whether the numbers corresponding to the same digits are the same, and repeating until the numbers corresponding to each digit are compared, includes: The digit length of one of the two sets of data is set to the count number; Compare whether the numbers corresponding to the same digits are the same, and repeat until the numbers corresponding to each digit are compared, and reduce the count number by one each time a comparison operation corresponding to a digit is performed, until the comparison operation is stopped when the count number is zero.

7. The RAM read and write control method according to claim 1, characterized in that: Writing the index data and a group of data corresponding to the index data into a RAM address together according to a write enable signal comprises: Set a group of data corresponding to the index data to be the first group of data or the last group of data that appears repeatedly; According to a write enable signal, the index data and a group of data corresponding to the index data are written into a RAM address together.

8. A RAM read / write control device, characterized in that: include: Input module, used to send input data written into RAM; A detection module, used to detect the input data, obtain the number of consecutive repetitions of data in multiple groups of data, and generate index data; A writing module, used for writing the index data and a group of data corresponding to the index data into a RAM address according to a write enable signal; A readout module, configured to read out the index data in the RAM address and a group of data corresponding to the index data according to a read enable signal; An output module is used to generate output data according to the index data and a group of data corresponding to the index data.

9. An electronic device, comprising a memory and a processor, wherein the memory stores executable code, characterized in that: When the processor executes the executable code, the steps of the RAM read and write control method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the RAM read and write control method according to any one of claims 1 to 7 are implemented.

Citation Information

Patent Citations

  • System and method for peripheral data transfer

    CA2111264A1

  • RAM read-write control method

    CN114265796A

  • Storage device

    CN1542842A

  • Method and auxiliary device for testing a RAM memory circuit

    US20030217313A1