XDP jig with network port and test method thereof

Abstract

The invention relates to an XDP jig with a network port and a test thereof, and the XDP jig comprises at least one network interface; the input end of the network controller is connected with the network interface; the number of the data buffer is at least one, and the input end of the data buffer is connected with the output end of the network controller; the input end of the PCIE interface is connected with the output end of the data buffer, and the output end of the PCIE interface is connected with the input end of the XDP chip set. The XDP jig with the network port provides an improved scheme using network control, an existing XDP jig is improved, a network interface is added for data transmission and control, one end of the improved XDP jig is connected with a server to be tested, the other end of the improved XDP jig is connected with a switch network port or a test upper computer, a remote upper computer 600 is used as a test environment machine, and the XDP jig with the network port is connected with the network port or the test environment machine. Test resources are saved, and operation and management are facilitated.

Description

Technical Field

[0001] The present invention relates to the field of server testing, and in particular to an XDP fixture with a network port and a testing method thereof. Background Art

[0002] XPD is a fixture used for server RAS testing. It is used to connect the server under test and the test environment machine. It uses the test environment machine and XDP to control the machine under test. Its main function is to query and modify the CPU, UPI, memory PCIE and other underlying registers of the server under test. In the RAS test, XDP can also be used to perform injection error tests on the system registers of the machine under test. In actual testing, the server is usually placed in the test room. If you want to perform RAS testing by remotely connecting to the server, you must find a machine to serve as the test environment machine. The test environment machine is used to build the test environment, and then remotely manage the test environment machine to control the machine under test. Therefore, an additional machine needs to be invested in the test environment machine, and the operation is cumbersome, which reduces work efficiency. Summary of the invention

[0003] The present invention provides an XDP fixture with a network port and a control method thereof, aiming to solve at least one of the technical problems existing in the prior art.

[0004] The technical solution of the present invention is an XDP fixture with a network port, comprising: A network interface, wherein the number of the network interface is at least one; A network controller, an input end of the network controller is connected to the network interface; A data buffer, the number of the data buffer being at least one, and the input end of the data buffer being connected to the output end of the network controller; A PCIE interface, wherein an input end of the PCIE interface is connected to an output end of the data buffer, and an output end of the PCIE interface is connected to an input end of the XDP chipset.

[0005] Furthermore, the number of the data buffers is consistent with the number of the network interfaces.

[0006] Further, the network interface includes a first network interface and a second network interface, the data buffer includes a first buffer memory and a second buffer memory, The first network interface and the second network interface are connected to the input end of the network controller respectively, and the output end of the network controller is connected to the input end of the first buffer memory and the second buffer memory respectively. The output ends of the first buffer memory and the second buffer memory are respectively connected to the PCIE interface, and the PCIE interface is a dual-channel PCIE interface.

[0007] Furthermore, the first network interface and the second network interface are both RJ45 ports.

[0008] Furthermore, the output end of the PCIE interface is connected to the XDP chipset based on the PCIe 4.0x1 interface specification.

[0009] Furthermore, the present invention also provides a server RAS testing device, including the XDP fixture with a network port, and further including: A host computer, wherein a test environment is provided on the host computer, and the host computer is connected to an input end of the XDP fixture with a network port via a network; The server under test has a mainboard connected to the output end of the XDP fixture with a network port through a MIPI60BD cable.

[0010] Furthermore, a switch is included, and the host computer and the XDP fixture with a network port are respectively connected to the switch.

[0011] Furthermore, the present invention also provides a server RAS testing method, which is applied to the server RAS testing device, and the server RAS testing method comprises the following steps: S100. If there is a switch, the network interfaces of the host computer and the server RAS test device are connected to the switch respectively, and the PCIE interface of the XDP fixture with a network port is connected to the mainboard of the server under test through a MIPI60BD cable. If there is no switch, the network port of the host computer is connected to the network interface of the server RAS test device through a network cable, and the PCIE interface of the XDP fixture with a network port is connected to the mainboard of the server under test through a MIPI60BD cable. S200, the test environment of the host computer executes a test on the server under test.

[0012] Further, the step S200 includes: S210, the host computer obtains system resource information of the tested server through the server RAS test device, and the system resource information at least includes CPU information, core quantity information, UPI resource information, memory information, memory rank & Bank information, PCIe information, PCIe topology information and channel resource bandwidth information; S220, the host computer obtains error information through the server RAS test device, checks whether there is error information in the resource device registers such as the CPU, memory and PCIe of the tested server, and modifies the values ​​of the relevant resource registers; S230, the host computer performs an error injection test through the server RAS test device, injects errors into the registers of the tested server, and checks the reliability of the device through the RAS test. The error injection test at least includes a CPU Err error injection test, a memory error injection test, and a PCIe ieh error injection test.

[0013] Furthermore, before step S210, the following steps are also included: S201, installing a software package on the Windows test environment machine of the host computer, and issuing instructions to operate the server under test through the server RAS test device; S202, for the test item, the host computer modifies the BIOS settings of the tested server through the server RAS test device; The step S220 includes: S221, the host computer issues instructions through the server RAS test device to check the stored value of the tested server, confirm that the value is correct, and ensure that the environment before the injection error is normal; S222, the host computer sends an error injection instruction through the server RAS test device to modify the value of the register of the tested server; S223, the host computer triggers an error by using a command or restarting the machine through the server RAS test device; S224, the host computer reads and collects the test data of the tested server (700) through the server RAS test device, and determines the test result.

[0014] The beneficial effects of the present invention are: The XDP fixture with a network port provides an improved solution for using network control, which improves the current XDP fixture and adds a network interface for data transmission and control. One end of the improved XDP fixture is connected to the server under test, and the other end is connected to the switch network port or the test host computer. The remote host computer is used as the test environment machine, which saves test resources and facilitates operation and management. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The figure is a schematic diagram of the overall structure of the XDP fixture with a network port.

[0016] Figure 2 A schematic diagram of the structure of an implementation of an XDP fixture with a network port.

[0017] Figure 3This is a structural diagram of a server RAS test device that does not include a switch.

[0018] Figure 4 The schematic diagram of the structure of the server RAS test device including a switch.

[0019] Figure 5 It is a structural schematic diagram of a server RAS testing device in the prior art.

[0020] Figure 6 The figure is a usage topology diagram of a server RAS testing device in the prior art.

[0021] Figure 7 Schematic diagram of a first network port and a second network port in an XDP fixture with a network port.

[0022] Figure numerals, 100, network interface; 110, first network interface; 120, second network interface; 200, network controller; 300, data cache; 310, first buffer memory; 320, second buffer memory; 400, PCIE interface; 500, XDP chipset; 600, host computer; 700, server under test. DETAILED DESCRIPTION

[0023] The following will be combined with the embodiments and drawings to clearly and completely describe the concept, specific structure and technical effects of the present invention, so as to fully understand the purpose, scheme and effect of the present invention. It should be noted that the embodiments and features in the embodiments of this application can be combined with each other without conflict.

[0024] It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it may be directly fixed or connected to the other feature, or it may be indirectly fixed or connected to the other feature. In addition, the descriptions of up, down, left, right, top, bottom, etc. used in the present invention are only relative to the relative positional relationship of the components of the present invention in the drawings.

[0025] In addition, unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art. The terms used in this specification are only for describing specific embodiments, not for limiting the present invention. The term "and / or" used herein includes any combination of one or more related listed items.

[0026] It should be understood that, although the terms first, second, third, etc. may be used to describe various elements in the present disclosure, these elements should not be limited to these terms. These terms are only used to distinguish elements of the same type from each other. For example, without departing from the scope of the present disclosure, the first element may also be referred to as the second element, and similarly, the second element may also be referred to as the first element.

[0027] Reference Figures 1 to 7 In some embodiments, the technical solution of the present invention is an XDP fixture with a network port, referring to Figure 1 and Figure 2 ,include: A network interface 100, wherein the network interface 100 is at least one; A network controller 200, wherein an input end of the network controller 200 is connected to the network interface 100; A data buffer 300, wherein the data buffer 300 is at least one, and an input end of the data buffer 300 is connected to an output end of the network controller 200; A PCIE interface 400 , wherein an input end of the PCIE interface 400 is connected to an output end of the data buffer 300 , and an output end of the PCIE interface 400 is connected to an input end of the XDP chipset 500 .

[0028] The beneficial effects of the present invention are: The XDP fixture with a network port provides an improved solution for using network control, which improves the current XDP fixture and adds a network interface 100 for data transmission and control. One end of the improved XDP fixture is connected to the server under test 700, and the other end is connected to the switch network port or the test host computer 600. The remote host computer 600 is used as a test environment machine, which saves test resources and facilitates operation and management.

[0029] RAS testing refers to the testing and evaluation of the reliability, availability and serviceability of the server. This test is designed to ensure the performance of the server system under normal operation and abnormal conditions, as well as its recovery ability when a failure occurs. RAS testing is usually conducted by server manufacturers or third-party certification agencies to ensure that the server system can maintain stable operation under various conditions. RAS testing includes the following key aspects: Hardware reliability testing: The testing at this stage simulates different workloads and pressures to ensure that the server hardware will not fail or degrade in performance during long-term operation. System availability testing: The test simulates different conditions such as hardware failure, network failure and power failure to verify whether the server's redundant design and failover mechanism can ensure the continuous operation of the system. Fault recovery capability testing: Evaluate the server's recovery capability after a failure, including testing the server's backup and recovery mechanism, database recovery mechanism, system mirroring and system restore capabilities, etc. Security testing: Test the server's protection capabilities and security mechanisms by simulating various attacks and intrusion behaviors. Service performance testing: Including load testing and stress testing, by simulating a large number of users accessing the server at the same time, test the server's response speed, throughput and performance under high load.

[0030] RAS testing is very important for the reliability, availability and maintainability of server systems. It helps server manufacturers ensure that their products can maintain stable and efficient operation in the face of various unpredictable situations, thereby providing users with stable and reliable services. The RAS capability of a server actually requires an increase in cost to achieve, so users need to consider actual needs and cost-effectiveness when selecting a server, or they should choose their own server according to their own industry needs. For example, industries such as finance, electricity, and medical care may pay more attention to computing reliability, while other industries may pay more attention to computing performance.

[0031] The XDP fixture is a system debugger for JTAG-assisted debugging and tracing solutions for Intel architecture. The XDP fixture provides deep system-level insights for Intel architecture-based platforms, with specific OS-aware modules for embedded and real-time operating systems. The Intel System Debugger is a JTAG-based debugging solution that supports deep debugging and tracing of system software and embedded applications based on Intel architecture. It enables developers to perform comprehensive system-level debugging and tracing of Intel architecture-based platforms, such as UEFI / firmware, SoC peripheral registers, OS kernel and drivers, with full OS awareness. The XDP fixture accelerates debugging and testing with deep hardware and software insights, enhances system reliability, and enhances system stability with deep system-level debugging and tracing capabilities. The XDP fixture supports Linux and Windows hosts. JTAG debugging for Intel Atom, Core, Xeon and Quark SoC platforms. EFI / UEFI firmware, bootloader debugging, Linux OS awareness and kernel module debugging. Full CPU register description and bit field editor. Access to page translation and descriptor tables. LBR, IPT on-chip instruction trace support, SMP run control support. JTAG debugging and instruction trace to Microsoft WinDbg kernel debugger. System trace: system-level hardware and software event trace. The Intel Silicon Vision Technology Closed Chassis Adapter (also known as SVTCCA or BSSB) provides access to DFx features (for 6th Generation Intel Core) such as JTAG and run control through Intel Direct Connect Interface (DCI) enabled silicon and USB3 ports on the platform. The tool supports closed chassis use cases where USB3 host-hosted DCI is limited, intermittent, or unavailable, including initial cold boot, suspend state operation and survival, reset flow, and USB3 or IOSF path failures. Intel ITP Software or Intel System Studio Software includes: 1x 3m USB 3.0 Standard A to B connector cable: connects host and CCA, 1x 6in USB 3.0 Standard A to A connector cable: connects CCA to target system, 1x 6in USB 3.0 Standard A to uB connector cable: connects CCA to target system.

[0032] Intel ITP software works with Intel silicon that has DCI capabilities. Specifically, this includes the mobile 4th generation Intel Core i3, i5, and i7 U processor families, including chipset families codenamed Lynxpoint-LP (LPT-LP), Wildcat Point (WPT), and Sunrise Point (SPT). Intel® System Studio software supports SunrisePoint (SPT).

[0033] ITP-XDP 3BR Kit: The ITP-XDP 3BR is the latest revision of the ITP-XDP hardware. It is used for run control and OBS trace collection of Intel processors. It also provides some remote platform control capabilities through supported platform hooks. Intel ITP PDT software includes a 3-meter USB2 cable. Includes power adapter and power cord set. The ITP-XDP 3BR is functionally equivalent to the older ITP-XDP 3B. The only difference is that the 3BR is RoHS compliant and the 3B is not. Among them, the host connection method is USB2, the target connector type is XDP 60-pin connector, run control / JTAG, and supports dual scan chains, OBS trace collection, I2C / SMBUS, and multi-pod synchronous input / synchronous output.

[0034] Further, refer to Figure 1 and Figure 2 , the number of the data buffers 300 is consistent with the number of the network interfaces 100.

[0035] Further, referring to FIG. Figure 2 , the network interface 100 includes a first network interface 110 and a second network interface 120, the data buffer includes a first buffer memory 310 and a second buffer memory 320, The first network interface 110 and the second network interface 120 are respectively connected to the input end of the network controller 200, and the output end of the network controller 200 is respectively connected to the input end of the first buffer memory 310 and the second buffer memory 320. The output ends of the first buffer memory 310 and the second buffer memory 320 are respectively connected to the PCIE interface 400 , and the PCIE interface 400 is a dual-channel PCIE interface 400 .

[0036] Further, refer to Figure 2 and Figure 7 , the first network interface 110 and the second network interface 120 are both RJ45 ports.

[0037] Specifically, the first network interface 110 is PORTA, the second network interface 120 is PORTB, and the first network interface 110 is PORTA and the second network interface 120 is PORTB respectively include: A1, A2, A4, A5, A7, A8, A10, A11: Network signal channels, corresponding to the 8 pins of the network port; AL1: 100 / 10M Ethernet port status light; AL2: 1000M Ethernet port status light; AL3&4: Network port positioning light; A3, A6, A9, A12: Ground signal.

[0038] Further, refer to Figures 1 to 4 The output end of the PCIE interface 400 is connected to the XDP chipset 500 based on the PCIe4.0x1 interface specification.

[0039] Further, refer to Figure 3 The present invention also provides a server RAS testing device, including the XDP fixture with a network port, and further including: A host computer 600, wherein a test environment is provided on the host computer 600, and the host computer 600 is connected to the input end of the XDP fixture with a network port via a network; The server under test 700, the mainboard of the server under test 700 is connected to the output end of the XDP fixture with a network port through a MIPI60BD cable.

[0040] Further, refer to Figure 4 , further comprising a switch, the host computer 600 and the XDP fixture with a network port are respectively connected to the switch.

[0041] Reference Figure 5 and Figure 6 In the prior art, the host computer 600 is connected to the test environment machine through the network, the test environment machine is connected to the XDP fixture through a USB cable, and the XDP fixture is connected to the mainboard of the tested server 700 through the PCIE interface 400 specification.

[0042] Furthermore, the present invention also provides a server RAS testing method, which is applied to the server RAS testing device, and the server RAS testing method comprises the following steps: S100. If there is a switch, the network interface 100 of the host computer 600 and the server RAS test device is connected to the switch respectively, and the PCIE interface 400 of the XDP fixture with a network port is connected to the mainboard of the server 700 under test through a MIPI60BD cable. If there is no switch, the network port of the host computer 600 is connected to the network interface 100 of the server RAS test device through a network cable, and the PCIE interface 400 of the XDP fixture with a network port is connected to the mainboard of the server 700 under test through a MIPI60BD cable. S200 , the test environment of the host computer 600 performs a test on the server 700 under test.

[0043] Further, the step S200 includes: S210, the host computer 600 obtains the system resource information of the tested server 700 through the server RAS test device, wherein the system resource information at least includes CPU information, core quantity information, UPI resource information, memory information, memory rank & Bank information, PCIe information, PCIe topology information and channel resource bandwidth information; S220, the host computer 600 obtains error information through the server RAS test device, checks whether there is error information in the resource device registers such as CPU, memory and PCIe of the tested server 700, and modifies the value of the relevant resource register; S230, the host computer 600 performs an error injection test through the server RAS test device, injects errors into the registers of the tested server 700, and checks the reliability of the device through the RAS test. The error injection test at least includes a CPU Err error injection test, a memory error injection test, and a PCIe ieh error injection test.

[0044] Furthermore, before step S210, the following steps are also included: S201, installing a software package on the Windows test environment machine of the host computer 600, and issuing instructions to operate the server 700 under test through the server RAS test device; S202, for the test item, the host computer 600 modifies the BIOS settings of the tested server 700 through the server RAS test device; The step S220 includes: S221, the host computer 600 issues instructions through the server RAS test device to check the stored value of the tested server 700, confirm that the value is correct, and ensure that the environment before the injection error is normal; S222, the host computer 600 sends an error injection instruction through the server RAS test device to modify the value of the register of the tested server 700; S223, the host computer 600 triggers an error by using a command or restarting the machine through the server RAS test device; S224, the host computer 600 reads and collects the test data of the tested server (700) through the server RAS test device, and determines the test result.

[0045] In a specific embodiment, when testing the CPU, some CPU-related options are turned on, and BIOS settings are performed first, specifically: Processor configuration -> Lock Chipset = Disable IIO configuration -> IIO DFX Configuration -> EV DFX Features =Enable IIO configuration -> IIO DFX Configuration -> Disable BIOS Done = [X] Processor configuration -> MSR Lock Control = Disable Uncore Configuration -> Uncore General Configuration -> DirectoryMode Enable = Disable

[0046] The above is only a preferred embodiment of the present invention. The present invention is not limited to the above implementation. As long as the technical effect of the present invention is achieved by the same means, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the scope of protection of the present disclosure. All should belong to the protection scope of the present invention. Within the protection scope of the present invention, its technical scheme and / or implementation method can have various modifications and changes.

Claims

1. An XDP fixture with a network port, characterized in that: include: A network interface (100), the network interface (100) being at least one; A network controller (200), an input end of the network controller (200) being connected to the network interface (100); A data buffer (300), the data buffer (300) being at least one, the input end of the data buffer (300) being connected to the output end of the network controller (200); A PCIE interface (400), wherein an input end of the PCIE interface (400) is connected to an output end of the data buffer (300), and an output end of the PCIE interface (400) is connected to an input of an XDP chipset (500).

2. The XDP fixture with a network port according to claim 1, characterized in that: The number of the data buffers (300) is consistent with the number of the network interfaces (100).

3. The XDP fixture with a network port according to claim 1, characterized in that: The network interface (100) comprises a first network interface (110) and a second network interface (120), the data buffer comprises a first buffer memory (310) and a second buffer memory (320), The first network interface (110) and the second network interface (120) are respectively connected to the input end of the network controller (200), and the output end of the network controller (200) is respectively connected to the input end of the first buffer memory (310) and the second buffer memory (320), The output ends of the first buffer memory (310) and the second buffer memory (320) are respectively connected to the PCIE interface (400), and the PCIE interface (400) is a dual-channel PCIE interface (400).

4. The XDP fixture with a network port according to claim 3, characterized in that: The first network interface (110) and the second network interface (120) are both RJ45 ports.

5. The XDP fixture with a network port according to claim 1, characterized in that: The output end of the PCIE interface (400) is connected to the XDP chipset (500) based on the PCIe 4.0x1 interface specification.

6. A server RAS testing device, comprising an XDP fixture with a network port as claimed in any one of claims 1 to 5, characterized in that: Also includes: A host computer (600), wherein a test environment is provided on the host computer (600), and the host computer (600) is connected to the input end of the XDP fixture with a network port via a network; A server under test (700), wherein the mainboard of the server under test (700) is connected to the output end of the XDP fixture with a network port via a MIPI60BD cable.

7. The server RAS testing device according to claim 6, characterized in that: It also includes a switch, and the host computer (600) and the XDP fixture with a network port are respectively connected to the switch.

8. A server RAS testing method, applied to the server RAS testing device as claimed in any one of claims 6 to 7, characterized in that: The server RAS testing method comprises the following steps: S100, if there is a switch, the network interface (100) of the host computer (600) and the server RAS test device are respectively connected to the switch, and the PCIE interface (400) of the XDP fixture with a network port is connected to the mainboard of the server (700) under test through a MIPI60BD cable; if there is no switch, the network port of the host computer (600) is connected to the network interface (100) of the server RAS test device through a network cable, and the PCIE interface (400) of the XDP fixture with a network port is connected to the mainboard of the server (700) under test through a MIPI60BD cable; S200, the test environment of the host computer (600) performs a test on the server under test (700).

9. The server RAS testing method according to claim 8, characterized in that: The step S200 includes: S210, the host computer (600) obtains system resource information of the tested server (700) through a server RAS test device, wherein the system resource information at least includes CPU information, core quantity information, UPI resource information, memory information, memory rank & bank information, PCIe information, PCIe topology information and channel resource bandwidth information; S220, the host computer (600) obtains error information through the server RAS test device, checks whether the resource device registers such as the CPU, memory and PCIe of the tested server (700) have error information, and modifies the values ​​of the relevant resource registers; S230, the host computer (600) performs an error injection test through a server RAS test device to inject errors into the registers of the tested server (700), and checks the reliability of the device through the RAS test, wherein the error injection test at least includes a CPU Err error injection test, a memory error injection test, and a PCIe ieh error injection test.

10. The server RAS testing method according to claim 9, characterized in that: Before step S210, the method further includes: S201, installing a software package on the Windows test environment machine of the host computer (600), and issuing instructions to operate the server under test (700) through the server RAS test device; S202, for the test item, the host computer (600) modifies the BIOS settings of the tested server (700) through the server RAS test device; The step S220 includes: S221, the host computer (600) sends instructions through the server RAS test device to check the stored value of the tested server (700), confirm that the value is correct, and ensure that the environment before the injection error is normal; S222, the host computer (600) sends an error injection instruction through the server RAS test device to modify the value of the register of the tested server (700); S223, the host computer (600) triggers an error by using a command or restarting the machine through the server RAS test device; S224: The host computer (600) reads and collects test data of the tested server (700) through the server RAS test device, and determines the test result.

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