Memory protection method and system, computer equipment, storage medium and product

By writing the address interval and judging the address legality when preset secure and trusted programs are executed, the problem of poor universality of traditional memory protection methods is solved, and high universality and data security are achieved that adapt to different processor architectures.

CN119293863APending Publication Date: 2025-01-10GUANGDONG HONGJUN MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202411235469.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-04
Publication Date
2025-01-10

AI Technical Summary

Technical Problem

Traditional memory protection methods are limited by the processor privilege level design, and are poor in versatility, making it difficult to adapt to different processor architectures.

Method used

When a preset security and trusted program is detected, the program to be executed is written into the preset address interval, and the legality of the to-access address of the instruction is judged based on the address interval attribute, and data integrity verification is carried out to ensure data access security and legality.

Benefits of technology

It realizes high versatility of memory protection methods, adapts to different processor architectures, and ensures the security and integrity of data through address interval attributes and integrity verification.

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Abstract

The invention discloses a memory protection method and system, computer equipment, a storage medium and a product, and relates to the technical field of data protection, and the memory protection method comprises the steps that when it is detected that a preset safe and trusted program is in an execution state, a to-be-executed program is written into a preset address interval; when each instruction corresponding to the to-be-executed program is executed, judging whether a to-be-accessed address corresponding to each instruction is legal or not based on a preset address interval attribute corresponding to the address interval; if the to-be-accessed address corresponding to each instruction is judged to be legal, performing integrity verification on data in each to-be-accessed address; and if it is detected that the data in each to-be-accessed address passes integrity verification, processing each data based on each instruction. According to the technical scheme, the technical problem of how to improve the universality of the memory protection method is solved.
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Description

Technical Field

[0001] The present application relates to the field of data protection technology, and in particular to a memory protection method, system, computer device, storage medium and product. Background Art

[0002] A memory protection method is a set of strategies designed to provide memory area protection functions through software or firmware. However, in order to achieve this memory protection function, the memory protection method needs to be closely integrated with the privilege level design of the processor. Therefore, the traditional memory protection method is limited by the processor, resulting in poor versatility of the traditional memory protection method.

[0003] Therefore, how to improve the versatility of the memory protection method is a technical problem that needs to be solved by those skilled in the art. Summary of the invention

[0004] The main purpose of this application is to provide a memory protection method, system, computer device, storage medium and product, aiming to solve the technical problem of how to improve the versatility of the memory protection method.

[0005] To achieve the above object, the present application proposes a memory protection method, the method comprising:

[0006] When it is detected that the preset secure and trusted program is in the execution state, the program to be executed is written into the preset address range;

[0007] When executing each instruction corresponding to the program to be executed, judging whether the address to be accessed corresponding to each instruction is legal based on the preset address interval attribute corresponding to the address interval;

[0008] If it is determined that the addresses to be accessed corresponding to the instructions are legal, then integrity checking is performed on the data in the addresses to be accessed;

[0009] If it is detected that the data in each of the to-be-accessed addresses passes the integrity check, the data is processed based on each of the instructions.

[0010] In one embodiment, the step of writing the program to be executed into a preset address range includes:

[0011] Obtaining a preset encryption key corresponding to a preset address range;

[0012] Encrypting the program to be executed based on the encryption key, and writing the encrypted program to be executed into the address interval;

[0013] The step of executing each instruction corresponding to the program to be executed includes:

[0014] Obtaining a preset decryption key corresponding to the address interval;

[0015] The encrypted program to be executed is decrypted based on the decryption key, and each instruction in the decrypted program to be executed is executed.

[0016] In one embodiment, the step of judging whether the to-be-accessed addresses corresponding to the respective instructions are legal based on the preset address interval attribute corresponding to the address interval includes:

[0017] If it is detected that the to-be-accessed address corresponding to each of the instructions matches the preset address interval attribute corresponding to the address interval, then it is determined that the to-be-accessed address corresponding to each of the instructions is legal;

[0018] Otherwise, it is determined that the to-be-accessed addresses corresponding to the respective instructions are illegal.

[0019] In one embodiment, after the step of determining that the to-be-accessed address corresponding to each of the instructions is illegal, the method further includes:

[0020] Access to the to-be-accessed address corresponding to each of the instructions is denied, and illegal access prompt information is output through an interrupt.

[0021] In one embodiment, after the step of performing integrity check on the data in each of the addresses to be accessed, the method further includes:

[0022] If it is detected that the data in each of the to-be-accessed addresses fails the integrity check, data tampering prompt information is outputted through an interrupt.

[0023] In one embodiment, the step of performing integrity check on the data in each of the addresses to be accessed includes:

[0024] Obtaining first hash values ​​corresponding to the addresses to be accessed, and calculating second hash values ​​corresponding to the addresses to be accessed according to data in the addresses to be accessed;

[0025] It is detected whether the first hash value corresponding to each of the to-be-accessed addresses is the same as the second hash value corresponding to each of the to-be-accessed addresses.

[0026] In addition, to achieve the above purpose, the present application also proposes a memory protection system, the memory protection system comprising:

[0027] A program writing module is used to write the program to be executed into a preset address range when it is detected that the preset safe and trusted program is in the execution state;

[0028] An access monitoring module, used for determining whether the to-be-accessed addresses corresponding to the respective instructions are legal based on the preset address interval attributes corresponding to the address intervals when executing the respective instructions corresponding to the to-be-executed program;

[0029] A data verification module, configured to perform integrity verification on the data in each address to be accessed if it is determined that the address to be accessed corresponding to each instruction is legal;

[0030] The data processing module is used to process the data based on the instructions if it is detected that the data in the address to be accessed passes the integrity check.

[0031] In addition, to achieve the above objectives, the present application also proposes a computer device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the memory protection method described above.

[0032] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the memory protection method described above are implemented.

[0033] In addition, to achieve the above-mentioned purpose, the present application also provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the steps of the memory protection method described above are implemented.

[0034] In the present application, the program to be executed can be written by writing the program to be executed into a preset address interval when it is detected that a preset secure and trusted program is in an execution state; then, when executing each instruction corresponding to the program to be executed, whether the address to be accessed corresponding to each instruction is legal is judged based on the preset address interval attribute corresponding to the address interval, so that it can be judged whether the address accessed when executing the program is legal; if it is judged that the address to be accessed corresponding to each instruction is legal, an integrity check is performed on the data in each address to be accessed, and the integrity check can be used to prevent the data in the accessed address from being tampered with; then, if it is detected that the data in each address to be accessed passes the integrity check, each data is processed based on each instruction, and the data processing process required by the program can be performed on each data under the premise that the data access is legal and has not been tampered with.

[0035] The present application closely links the status of the program to be executed with the preset safe and trusted program, ensuring that the program to be executed is deployed to a specific, predefined address range only when the safe and trusted program is executed. Subsequently, during the execution process, the access request of each instruction will be strictly verified for legitimacy based on the specific attributes of the address range. This process not only ensures the security of data access, but also achieves wide adaptability to different processor architectures through the flexible configuration of address range attributes. Moreover, compared with traditional memory protection methods, the present application no longer directly relies on the specific architecture of the processor to achieve memory protection, making the memory protection method proposed in the present application extremely versatile. Thus, the present application solves the technical problem of how to improve the versatility of the memory protection method. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0037] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0038] Figure 1 A flowchart of the first embodiment of the memory protection method of the present application is provided;

[0039] Figure 2 This is a structural diagram of a specific embodiment of the memory protection method of the present application;

[0040] Figure 3 A schematic diagram of an address management unit according to an embodiment of a memory protection method of the present application;

[0041] Figure 4 This is a schematic diagram of the module structure of the memory protection system according to an embodiment of the present application;

[0042] Figure 5 A schematic diagram of the device structure of the hardware operating environment involved in the memory protection method in the embodiment of the present application.

[0043] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0044] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0045] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0046] The main solution of the present application is: when it is detected that a preset secure and trusted program is in an execution state, the program to be executed is written into a preset address interval; when executing each instruction corresponding to the program to be executed, whether the address to be accessed corresponding to each instruction is legal based on the preset address interval attribute corresponding to the address interval; if it is determined that the address to be accessed corresponding to each instruction is legal, the data in each address to be accessed is checked for integrity; if it is detected that the data in each address to be accessed passes the integrity check, the data is processed based on each instruction.

[0047] A memory protection method is a set of strategies designed to provide memory area protection functions through software or firmware. However, in order to achieve this memory protection function, the memory protection method needs to be closely integrated with the privilege level design of the processor. Therefore, the traditional memory protection method is limited by the processor, resulting in poor versatility of the traditional memory protection method.

[0048] Therefore, how to improve the versatility of the memory protection method is a technical problem that needs to be solved by those skilled in the art.

[0049] To solve the above problems, in the present application, by writing the program to be executed into a preset address interval when it is detected that a preset secure and trusted program is in an execution state, the program to be executed can be written; then, when executing each instruction corresponding to the program to be executed, based on the address interval corresponding to the preset address interval attribute, it is judged whether the address to be accessed corresponding to each of the instructions is legal, so that it can be judged whether the address accessed when executing the program is legal; if it is judged that the address to be accessed corresponding to each of the instructions is legal, an integrity check is performed on the data in each of the addresses to be accessed, and the integrity check can be used to prevent the data in the accessed address from being tampered with; then, if it is detected that the data in each of the addresses to be accessed passes the integrity check, each of the data is processed based on the instructions, and the data processing process required by the program can be performed on each of the data on the premise that the data access is legal and has not been tampered with.

[0050] The present application closely links the status of the program to be executed with the preset safe and trusted program, ensuring that the program to be executed is deployed to a specific, predefined address range only when the safe and trusted program is executed. Subsequently, during the execution process, the access request of each instruction will be strictly verified for legitimacy based on the specific attributes of the address range. This process not only ensures the security of data access, but also achieves wide adaptability to different processor architectures through the flexible configuration of address range attributes. Moreover, compared with traditional memory protection methods, the present application no longer directly relies on the specific architecture of the processor to achieve memory protection, making the memory protection method proposed in the present application extremely versatile. Thus, the present application solves the technical problem of how to improve the versatility of the memory protection method.

[0051] It should be noted that the computer device that executes the memory protection method of the present application can be a terminal device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc. The following takes a computer as an example to illustrate various embodiments of the memory protection method of the present application.

[0052] Based on this, the present application provides a memory protection method, referring to Figure 1 , Figure 1 This is a flowchart of the first embodiment of the memory protection method of the present application.

[0053] In this embodiment, the memory protection method includes steps S10 to S40:

[0054] Step S10, when it is detected that the preset secure and trusted program is in the execution state, the program to be executed is written into the preset address interval;

[0055] It should be noted that the secure and trusted program refers to the program in the root of trust, where the root of trust refers to an unmodifiable memory such as ROM. In addition, the address interval refers to the interval of storage addresses in the system memory or a memory other than the root of trust. For example, for the system memory, the system memory can be divided into multiple address intervals, for example, address interval 1 can be 0x0000 to 0x0FFF, address interval 2 can be 0x1000 to 0x1 FFF, and address interval 3 can be 0x2000 to 0x2FFF.

[0056] In this embodiment, the program to be executed can be written into a preset address interval. For example, the program to be executed can be written into the above-mentioned address interval 1, or the program to be executed can be written into the above-mentioned address interval 2. This application does not limit the specific address interval where the program to be executed is written.

[0057] In a feasible implementation manner, the above step S10 includes:

[0058] Step S101, obtaining a preset encryption key corresponding to a preset address range;

[0059] It should be noted that, in order to further improve the security of data, different encryption keys may be set for different address intervals, where the encryption key refers to a key used to encrypt data.

[0060] Step S102, encrypting the program to be executed based on the encryption key, and writing the encrypted program to be executed into the address interval;

[0061] In this embodiment, the encrypted program to be executed will be written into the address range.

[0062] Step S20, when executing each instruction corresponding to the program to be executed, judging whether the to-be-accessed address corresponding to each instruction is legal based on the preset address interval attribute corresponding to the address interval;

[0063] It is understandable that when the written data is encrypted data, the above step S20 further includes:

[0064] Step S201, obtaining a preset decryption key corresponding to the address interval;

[0065] It is understandable that, under the premise that each address interval corresponds to an encryption key, a decryption key can also be set for each address interval.

[0066] Step S202: decrypt the encrypted program to be executed based on the decryption key, and execute each instruction in the decrypted program to be executed.

[0067] When executing each instruction, it is necessary to access different addresses to obtain data in different addresses. However, different address intervals can correspond to the same or different permissions. Therefore, when executing instructions of a program to be executed that has been written to a certain address interval, it is necessary to judge the legitimacy of the address accessed by the program to avoid unauthorized access, thereby improving data security. Among them, instructions refer to commands to operate on data.

[0068] Specifically, the above-mentioned address interval attributes may include five types: safe executable, executable, read-only, readable and writable, and inaccessible. Among them, the permissions corresponding to each address interval attribute are as follows:

[0069] The secure executable interval has the highest authority and can access any address space; the executable interval can only access the address interval assigned to the program code; the readable and writable interval can only be accessed by the preset corresponding address interval; the read-only interval can also only be accessed by the preset corresponding address interval; no program code can access the inaccessible interval.

[0070] In a feasible implementation manner, the above step S20 further includes:

[0071] Step S203, if it is detected that the to-be-accessed addresses corresponding to the respective instructions match the preset address interval attribute corresponding to the address interval, then it is determined that the to-be-accessed addresses corresponding to the respective instructions are legal;

[0072] Step S204: otherwise, it is determined that the to-be-accessed addresses corresponding to each of the instructions are illegal.

[0073] It should be noted that the matching of the address to be accessed and the address interval attribute means that the address to be accessed belongs to the permission corresponding to the address interval attribute. For example, if the program to be executed is stored in the secure executable interval, and the permission of the secure executable interval is to access any address space, then the address to be accessed and the address interval attribute are matched. If the address interval attribute of the program to be executed can only access address interval 1, it is necessary to determine whether the address to be accessed matches the address interval attribute by determining whether the address to be accessed belongs to address interval 1.

[0074] Step S30, if it is determined that the address to be accessed corresponding to each of the instructions is legal, then integrity check is performed on the data in each of the addresses to be accessed;

[0075] It is understandable that, under the premise that the address to be accessed is legal, it is also necessary to determine the integrity of the data in each address to be accessed, so as to facilitate determining whether the data in the address to be accessed has been tampered with.

[0076] In addition, when it is determined that the address to be accessed is illegal, access to the address to be accessed corresponding to each instruction can be denied, and illegal access prompt information can be output through interruption. The illegal access address information is used to prompt the user program that there is an illegal access phenomenon.

[0077] In a feasible implementation manner, the above step S30 further includes:

[0078] Step S301, obtaining first hash values ​​corresponding to the addresses to be accessed, and calculating second hash values ​​corresponding to the addresses to be accessed according to data in the addresses to be accessed;

[0079] It should be noted that the first hash value refers to the hash value calculated based on the stored data when storing the data. For example, when writing data A to a certain address, data A can be input into the hash function to obtain the first hash value corresponding to the address. When the address needs to be accessed, the address is the address to be accessed. Since the stored data may be tampered with, in order to identify whether the stored data has been tampered with, it is also necessary to calculate the hash value again based on the accessed data when accessing the data at the address, thereby obtaining the second hash value.

[0080] Step S302: Detect whether the first hash value corresponding to each of the to-be-accessed addresses is the same as the second hash value corresponding to each of the to-be-accessed addresses.

[0081] It is understandable that for the first hash value and the second hash value corresponding to the same address to be accessed, it is possible to determine whether the data in the address to be accessed has been tampered with by comparing whether the first hash value and the second hash value are the same. Specifically, if the first hash value and the second hash value are the same, it indicates that the data in the address to be accessed has not been tampered with; if the first hash value and the second hash value are different, it indicates that the data in the address to be accessed has been tampered with.

[0082] It can be understood that if it is detected that the data in the address to be accessed has not been tampered with, it indicates that the integrity check has passed, and if it is detected that the data in the address to be accessed has been tampered with, it indicates that the integrity check has failed.

[0083] In addition, in a feasible implementation, if it is detected that the data in each address to be accessed fails the integrity check, data tampering prompt information is output through interruption. The data tampering prompt information is used to prompt the user that the stored data has been tampered with, which poses a security risk.

[0084] Step S40: If it is detected that the data in each of the to-be-accessed addresses passes the integrity check, the data is processed based on each of the instructions.

[0085] It is understandable that when it is detected that all addresses to be accessed by the program to be executed match the address range attributes and no tampering has occurred, the data in each address can be processed according to each instruction in the program to be executed.

[0086] Therefore, during data storage and data access, the present application ensures the security of memory protection through address range attributes and integrity verification, and avoids the confidentiality and integrity of data from being damaged.

[0087] In a feasible implementation, the above memory protection method can also be encapsulated as a memory protection unit. Figure 2 , Figure 2A structural schematic diagram of a specific embodiment of the memory protection method of the present application is shown.

[0088] exist Figure 2 In the system, the processor accesses the instructions and data stored in the system memory through the bus interface and configures the memory protection unit through the peripheral configuration interface. The memory protection unit consists of an access control unit and a verification unit.

[0089] The access control unit is mainly used to arbitrate and monitor access requests from the verification unit and external processor, and to encrypt and decrypt the read and write data of the system memory. The functions of each sub-unit are described as follows:

[0090] The data encryption and decryption unit is used to encrypt and store data in the system memory. The encryption and decryption key used by the data encryption and decryption unit is determined by the properties of the current address range. Different address ranges use different encryption and decryption keys. When the processor accesses the address range, the data reading and writing of the system memory will also be encrypted and decrypted using the corresponding key.

[0091] The access monitoring unit is used to check whether the processor's access to the specified address range meets the requirements of the address range attributes. Access that does not meet the requirements will be rejected and reported to the processor for processing through an interrupt. At the same time, the processor's access to the safe executable range will trigger the data verification unit to automatically verify the data integrity within the address range.

[0092] The access arbitration unit is used to arbitrate access requests from the check unit and the external processor.

[0093] The verification unit is used to perform integrity verification on the data in the specified address range, and can actively identify potential physical attacks to improve the security of system memory data. The functions of each sub-unit in the verification unit are described as follows:

[0094] The address management unit is used to manage the address interval attributes of the system memory. The address interval attributes are divided into five types: safe executable, executable, read-only, readable and writable, and inaccessible. The processor program code needs to be stored in the safe executable or executable interval. The program in the safe executable address interval has the highest access rights. The modification of the address attribute definition can only be performed when the processor executes the program code in the safe executable address interval. The address interval attributes cannot be modified after being defined as safe executable unless the system is reset. This mechanism can protect against potential software attacks.

[0095] The data verification unit is used to perform integrity checks on the data in the specified address range actively or under the control of the processor to prevent tampered programs from being executed. When the processor starts to access a new address range, the data verification unit will automatically perform integrity checks on the data in the address range. If the check fails, the exception will be reported to the processor for processing through an interrupt signal. In addition, the processor needs to update the hash value corresponding to the address area in the key management unit in a timely manner to prevent integrity check failures.

[0096] The key management unit is used to store the keys or hash values ​​required for encryption, decryption and data verification. Each secure executable or executable address range occupies a set of dedicated keys or hash values, and the processor can only access the key management unit when executing the program in the secure executable range.

[0097] Furthermore, the schematic diagram of the address management unit in the memory protection method of the present application is as follows: Figure 3 shown. Figure 3 The address interval attributes, accessible interval id, hash value and key id corresponding to different address intervals are shown in FIG. Figure 3 In the , address interval attributes are divided into five types: secure executable, executable, read-only, readable and writable, and inaccessible. Programs in the secure executable interval have the highest authority and can access any address space. The address management unit and the key management unit can be configured. The processor can specify the encryption and decryption keys and the hash value for integrity verification through the hash value ID and key ID of the address interval. An ID of 0 means that encryption and decryption and integrity verification are not enabled. The secure executable interval is generally used to store program code for operating system-related tasks; the executable interval can only access the address interval assigned to the program code. The processor can specify the encryption and decryption keys and the hash value for integrity verification through the hash value ID and key ID of the address interval. The executable interval is generally used to store program code for multi-user related tasks; the readable and writable interval is used to store data used in the program running process. The processor can access the address interval through the accessible interval I D sets access rights. Only the program code with the corresponding ID can access the address interval. An ID of 0 indicates that any program code can access the interval. The processor can specify the encryption and decryption key and the hash value for integrity verification through the hash value ID and key ID of the address interval. The read-only interval is used to store read-only data. The processor can set access rights through the accessible interval ID of the address interval. An ID of 0 indicates that any program code can access the interval. The processor can specify the hash value for integrity verification through the hash value ID of the address interval. Write operations to this interval will be blocked by the access monitoring unit and processed by the interrupt reporting processor. No program code can access the inaccessible interval. Read and write operations to this interval will be blocked by the access monitoring unit and processed by the interrupt reporting processor. For example, Figure 3The accessible interval ID of address interval 1 in is x, which indicates that address interval 1 can access any address interval, and the accessible interval ID is 0, which means that any program code can access this interval. If the key ID is 2, it indicates that the second set of keys (encryption and decryption keys) are used. The hash value is related to the data stored in the address interval and is not limited here. For example, the hash value ID in address interval 1 is 1, which indicates that the hash value of the data stored in address interval 1 is 1.

[0098] In addition, the key management unit is used to store the hash value and secret key specified in the address interval. Only the program code in the high-security executable interval can access the key management unit. When the processor starts a new address interval, the data verification unit will automatically perform integrity verification on the data in the address interval. The processor needs to update the hash value corresponding to the interval in the key management unit in a timely manner. For readable and writable intervals, the processor needs to complete the integrity verification in the data verification unit before writing to the interval or set the ID to 0 to turn off the automatic verification of the data verification unit.

[0099] In the above specific embodiments, the present application extends security from a trust root such as a ROM to a memory protection unit based on a trust chain, so that the processor executes a secure and trusted program by default before initializing the memory protection unit, and is in a secure and trusted state. Then, by specifying a secure executable interval, the security attribute can be passed to the program in the corresponding address interval through the trust chain, thereby improving the security of memory protection. In addition, the memory protection method proposed in the present application is not limited to the processor because it is only related to the storage address in the storage area and not to the processor. Thus, processors of any architecture can be adapted to the memory protection method proposed in the present application, thereby improving the versatility of the memory protection method of the present application.

[0100] In the present application, the program to be executed can be written by writing the program to be executed into a preset address interval when it is detected that a preset secure and trusted program is in an execution state; then, when executing each instruction corresponding to the program to be executed, whether the address to be accessed corresponding to each instruction is legal is judged based on the preset address interval attribute corresponding to the address interval, so that it can be judged whether the address accessed when executing the program is legal; if it is judged that the address to be accessed corresponding to each instruction is legal, an integrity check is performed on the data in each address to be accessed, and the integrity check can be used to prevent the data in the accessed address from being tampered with; then, if it is detected that the data in each address to be accessed passes the integrity check, each data is processed based on each instruction, and the data processing process required by the program can be performed on each data under the premise that the data access is legal and has not been tampered with.

[0101] The present application closely links the status of the program to be executed with the preset safe and trusted program, ensuring that the program to be executed is deployed to a specific, predefined address range only when the safe and trusted program is executed. Subsequently, during the execution process, the access request of each instruction will be strictly verified for legitimacy based on the specific attributes of the address range. This process not only ensures the security of data access, but also achieves wide adaptability to different processor architectures through the flexible configuration of address range attributes. Moreover, compared with traditional memory protection methods, the present application no longer directly relies on the specific architecture of the processor to achieve memory protection, making the memory protection method proposed in the present application extremely versatile. Thus, the present application solves the technical problem of how to improve the versatility of the memory protection method.

[0102] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the memory protection method of the present application. More simple transformations based on this technical concept are all within the protection scope of the present application.

[0103] This application also provides a memory protection system, please refer to Figure 4 , the memory protection system comprises:

[0104] The program writing module 10 is used to write the program to be executed into a preset address range when it is detected that the preset secure and trusted program is in the execution state;

[0105] The access monitoring module 20 is used to determine whether the to-be-accessed addresses corresponding to the respective instructions are legal based on the preset address interval attributes corresponding to the address intervals when executing the respective instructions corresponding to the to-be-executed program;

[0106] The data verification module 30 is used to perform integrity verification on the data in each address to be accessed if it is determined that the address to be accessed corresponding to each instruction is legal;

[0107] The data processing module 40 is configured to process the data based on the instructions if it is detected that the data in the to-be-accessed addresses pass the integrity check.

[0108] In one embodiment, the program writing module 10 is further used for:

[0109] Obtaining a preset encryption key corresponding to a preset address range;

[0110] Encrypting the program to be executed based on the encryption key, and writing the encrypted program to be executed into the address interval;

[0111] The access monitoring module 20 is also used for:

[0112] Obtaining a preset decryption key corresponding to the address interval;

[0113] The encrypted program to be executed is decrypted based on the decryption key, and each instruction in the decrypted program to be executed is executed.

[0114] In one embodiment, the access monitoring module 20 is further configured to:

[0115] If it is detected that the to-be-accessed address corresponding to each of the instructions matches the preset address interval attribute corresponding to the address interval, then it is determined that the to-be-accessed address corresponding to each of the instructions is legal;

[0116] Otherwise, it is determined that the to-be-accessed addresses corresponding to the respective instructions are illegal.

[0117] In one embodiment, the memory protection system further includes:

[0118] The illegal access prompt module is used to deny access to the address to be accessed corresponding to each of the instructions, and output illegal access prompt information through interruption.

[0119] In one embodiment, the memory protection system further includes:

[0120] The tampering prompt module is used to output data tampering prompt information through interruption if it is detected that the data in each of the to-be-accessed addresses fails the integrity check.

[0121] In one embodiment, the data verification module 30 is further used to:

[0122] Obtaining first hash values ​​corresponding to the addresses to be accessed, and calculating second hash values ​​corresponding to the addresses to be accessed according to data in the addresses to be accessed;

[0123] It is detected whether the first hash value corresponding to each of the to-be-accessed addresses is the same as the second hash value corresponding to each of the to-be-accessed addresses.

[0124] The memory protection system provided by the present application adopts the memory protection method in the above embodiment, which can solve the technical problem of how to improve the versatility of the memory protection method. Compared with the prior art, the beneficial effects of the memory protection system provided by the present application are the same as the beneficial effects of the memory protection method provided by the above embodiment, and other technical features in the memory protection system are the same as the features disclosed in the above embodiment method, which will not be repeated here.

[0125] The present application provides a computer device, which includes: at least one processor; and a memory that is communicatively connected to the at least one processor; wherein the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the memory protection method in the above-mentioned embodiment 1.

[0126] Reference below Figure 5 , which shows a schematic diagram of the structure of a computer device suitable for implementing an embodiment of the present application. Figure 5 The computer device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0127] like Figure 5 As shown, the computer device may include a processing device 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read On ly Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. Various programs and data required for the operation of the computer device are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems may be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touchpad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 1003 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 1009. The communication device 1009 may allow the computer device to communicate with other devices wirelessly or by wire to exchange data. Although the figure shows a computer device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented or have instead.

[0128] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0129] The computer device provided by the present application adopts the memory protection method in the above embodiment, which can solve the technical problem of how to improve the versatility of the memory protection method. Compared with the prior art, the beneficial effects of the computer device provided by the present application are the same as the beneficial effects of the memory protection method provided by the above embodiment, and the other technical features in the computer device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0130] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0131] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0132] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the memory protection method in the above-mentioned embodiment.

[0133] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM: Random Access Memory), a read-only memory (ROM: Read On ly Memory), an erasable programmable read-only memory (EPROM: Erasable Programmab le Read On ly Memory or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM: CD-Read On ly Memory), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency: Radio Frequency), etc., or any suitable combination of the above.

[0134] The computer-readable storage medium may be included in the computer device; or may exist independently without being installed in the computer device.

[0135] The above-mentioned computer-readable storage medium carries one or more programs. When the above-mentioned one or more programs are executed by a computer device, the computer device: when detecting that a preset secure and trusted program is in an execution state, writes the program to be executed into a preset address interval; when executing each instruction corresponding to the program to be executed, determines whether the address to be accessed corresponding to each instruction is legal based on the preset address interval attribute corresponding to the address interval; if it is determined that the address to be accessed corresponding to each instruction is legal, then performs an integrity check on the data in each address to be accessed; if it is detected that the data in each address to be accessed passes the integrity check, then processes each data based on each instruction.

[0136] The computer program code for performing the operation of the present application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (for example, using an Internet service provider to connect through the Internet).

[0137] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0138] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0139] The readable storage medium provided in the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned memory protection method, and can solve the technical problem of how to improve the versatility of the memory protection method. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in the present application are the same as the beneficial effects of the memory protection method provided in the above-mentioned embodiment, and will not be elaborated here.

[0140] The present application also provides a computer program product, including a computer program, which implements the steps of the above-mentioned memory protection method when executed by a processor.

[0141] The computer program product provided by the present application can solve the technical problem of how to improve the versatility of the memory protection method. Compared with the prior art, the beneficial effects of the computer program product provided by the present application are the same as the beneficial effects of the memory protection method provided by the above embodiment, which will not be repeated here.

[0142] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A memory protection method, characterized in that: The memory protection method comprises: When it is detected that the preset secure and trusted program is in the execution state, the program to be executed is written into the preset address range; When executing each instruction corresponding to the program to be executed, judging whether the address to be accessed corresponding to each instruction is legal based on the preset address interval attribute corresponding to the address interval; If it is determined that the addresses to be accessed corresponding to the instructions are legal, then integrity checking is performed on the data in the addresses to be accessed; If it is detected that the data in each of the to-be-accessed addresses passes the integrity check, the data is processed based on each of the instructions.

2. The memory protection method according to claim 1, characterized in that: The step of writing the program to be executed into a preset address range includes: Obtaining a preset encryption key corresponding to a preset address range; Encrypting the program to be executed based on the encryption key, and writing the encrypted program to be executed into the address interval; The step of executing each instruction corresponding to the program to be executed includes: Obtaining a preset decryption key corresponding to the address interval; The encrypted program to be executed is decrypted based on the decryption key, and each instruction in the decrypted program to be executed is executed.

3. The memory protection method according to claim 1, characterized in that: The step of judging whether the to-be-accessed addresses corresponding to the respective instructions are legal based on the preset address interval attribute corresponding to the address interval includes: If it is detected that the to-be-accessed address corresponding to each of the instructions matches the preset address interval attribute corresponding to the address interval, then it is determined that the to-be-accessed address corresponding to each of the instructions is legal; Otherwise, it is determined that the to-be-accessed addresses corresponding to the respective instructions are illegal.

4. The memory protection method according to claim 3, characterized in that: After the step of determining that the to-be-accessed addresses corresponding to the respective instructions are illegal, the method further comprises: Access to the to-be-accessed address corresponding to each of the instructions is denied, and illegal access prompt information is output through an interrupt.

5. The memory protection method according to claim 1, wherein: After the step of performing integrity check on the data in each of the addresses to be accessed, the method further includes: If it is detected that the data in each of the to-be-accessed addresses fails the integrity check, data tampering prompt information is outputted through an interrupt.

6. The memory protection method according to claim 1, wherein: The step of performing integrity check on the data in each of the addresses to be accessed comprises: Obtaining first hash values ​​corresponding to the addresses to be accessed, and calculating second hash values ​​corresponding to the addresses to be accessed according to data in the addresses to be accessed; It is detected whether the first hash value corresponding to each of the to-be-accessed addresses is the same as the second hash value corresponding to each of the to-be-accessed addresses.

7. A memory protection system, characterized in that: The memory protection system comprises: A program writing module is used to write the program to be executed into a preset address range when it is detected that the preset safe and trusted program is in the execution state; An access monitoring module, used for determining whether the to-be-accessed addresses corresponding to the respective instructions are legal based on the preset address interval attributes corresponding to the address intervals when executing the respective instructions corresponding to the to-be-executed program; A data verification module, configured to perform integrity verification on the data in each address to be accessed if it is determined that the address to be accessed corresponding to each instruction is legal; The data processing module is used to process the data based on the instructions if it is detected that the data in the address to be accessed passes the integrity check.

8. A computer device, characterized in that: The computer device comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the memory protection method according to any one of claims 1 to 6.

9. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the memory protection method according to any one of claims 1 to 6 are implemented.

10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the steps of the memory protection method according to any one of claims 1 to 6 are implemented.

Citation Information

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