Power supply circuit and AMOLED display device

Abstract

The invention provides a power supply circuit and an AMOLED display device. The power supply voltage comprises a power level module, the power level module comprises a plurality of switching tubes and an inductor, the first end of the inductor is connected with a first switching node, the second end of the inductor is connected with a second switching node, and the switching tubes are arranged between a power supply input end and a plurality of power supply output ends; and the logic control module is used for controlling the plurality of switch tubes to charge or discharge the inductor so as to provide an independent output voltage at each of the plurality of power supply output ends, and at least one of the output voltages of the plurality of power supply output ends is a negative voltage. The power supply circuit adopts a single power inductor and a plurality of switch tubes to generate the positive power supply voltage and the negative power supply voltage required by the driving circuit, and a negative voltage charge pump does not need to be used in the circuit, so that the working efficiency of the power supply can be further improved, the number of the switch tubes can be reduced, and the power supply circuit has extremely high practicability and wide output voltage range compatibility.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply circuits, and in particular to a power supply circuit and an AMOLED display device. Background Art

[0002] Power supply is an important component of electronic products. Using fewer power supplies in electronic products to simplify power supply requirements is the current technological trend. However, in some special electronic applications, multiple power supplies are required, especially in some applications, positive and negative power supplies must be used at the same time.

[0003] Electronic applications that use both positive and negative power supplies include: the local interface circuit of traditional telephones, liquid crystal display, OLED (Organic Light-Emitting Diode) display, CCD (Charge Coupled Device) bias, power amplifier circuits, and the front-end part of analog input of instruments and meters. Except for the front-end analog part of instruments and meters, the others are large-scale power supply applications, and a large number of specialized mature commercial products have appeared. Due to the special requirements of the test for the front-end analog part of instruments and meters, a combination of discrete power supply circuits is generally used to realize positive and negative power supplies.

[0004] Compared with traditional LCD panels, active matrix organic light-emitting diode (AMOLED) display panels have the characteristics of faster response speed, higher contrast, and wider viewing angle. They have been widely used in smart bracelets, smart watches, smart phones, tablets, laptops, etc.

[0005] In the application of smart bracelets, smart watches or smart phones, the power circuit of the AMOLED display panel generally needs to provide at least three power supplies, namely ELVDD, ELVSS and AVDD. ELVDD and ELVSS are the LED power supplies in the AMOLED display panel, and AVDD is the analog power supply provided to the display driver chip. The display driver chip converts AVDD into the gate drive power supply VGH and VGL of the transistor (TFT) in the AMOLED display panel.

[0006] Most existing power chips or power circuits (such as AMOLED power) use independent boost power converters to provide power AVDD. The typical application is to boost a single lithium battery to around 7.3V. In smart bracelets or smart watches, 2.8V to 3.3V is used as the system power supply. The AVDD power supply is generally directly taken from the lithium battery voltage and output after being stabilized by LDO (Low Dropout Regulator), or taken from the common high-voltage power supply of power AVDD, ELVDD and ELVSS and then output after being stabilized by LDO. Both methods have certain disadvantages.

[0007] For the first solution, the circuit efficiency is very low when the battery discharge voltage is high (for example, 4.4V). However, for batteries such as silicon negative electrode batteries with a discharge voltage of 2V to 2.5V, it is far from meeting the requirement of 2.8V to 3.3V and has great limitations.

[0008] For the second option, Figure 1 As shown, in the existing power supply circuit 100 for AMOLED display panel, the (boost type or buck-boost type) DC-DC converter 110 based on the inductor structure multiplies or bucks the voltage connected to the power input terminal VIN to near the required voltage, and generates an intermediate node voltage VOP whose absolute voltage is slightly higher than the output positive voltage and the output negative voltage. The intermediate node voltage VOP generates positive voltage power supplies ELVDD and AVDD after passing through LDO 120 and 130, and uses a negative voltage charge pump ((Negative Voltage Charge Pump)) 140 and LDO 150 to generate an output negative voltage power supply ELVSS. The main disadvantage of this solution is that the power supply is taken from the one with the highest absolute value voltage among AVDD, ELVDD and ELVSS. If the absolute values ​​of these three voltages are greatly different, the efficiency of the lower power rail will be reduced. Summary of the invention

[0009] In order to solve the above technical problems, the present invention provides a power supply circuit and an AMOLED display device, which can further improve the working efficiency of the power supply and reduce the number of switching tubes, and have extremely high practicality and compatibility with a wide output voltage range.

[0010] According to one aspect of the present invention, there is provided a power supply circuit, which is applied to an AMOLED display device, and includes: a power stage module, which includes a plurality of switch tubes and an inductor, wherein a first end of the inductor is connected to a first switching node, a second end of the inductor is connected to a second switching node, and the plurality of switch tubes are arranged between a power input terminal and a plurality of power output terminals; and a logic control module, which is used to control the plurality of switch tubes so that the inductor is charged or discharged to provide an independent output voltage at each of the plurality of power output terminals, wherein at least one of the output voltages of the plurality of power output terminals is a negative voltage.

[0011] Optionally, the multiple switch tubes include first to sixth switch tubes, the control ends of the first to sixth switch tubes are connected to the logic control module, the first end of the first switch tube is connected to the power input end, the second end of the first switch tube is connected to the first switching node, the first end of the second switch tube is connected to the first switching node, the second end of the second switch tube is connected to a reference ground, the first end of the third switch tube is connected to the second switching node, the second end of the third switch tube is connected to the reference ground, the first end of the fourth switch tube is connected to the first power output end, and the second end of the fourth switch tube is connected to the second switching node; the first end of the fifth switch tube is connected to the second power output end, and the second end of the fifth switch tube is connected to the second switching node; the first end of the sixth switch tube is connected to the third power output end, and the second end of the sixth switch tube is connected to the first switching node.

[0012] Optionally, the power stage module provides output voltages of the multiple power output terminals based on time division multiplexing.

[0013] Optionally, the logic control module is used to divide the entire switching cycle into multiple time slices, and control the on and off of a number of switch tubes among the multiple switch tubes in corresponding time slices to provide an independent output voltage at each of the multiple power supply output terminals.

[0014] Optionally, the multiple time slices include first to third time slices, and the logic control module is used to control the first switch tube, the second switch tube, the third switch tube and the fourth switch tube to be turned on and off in the first time slice to form a first buck-boost converter, the logic control module is used to control the first switch tube, the second switch tube, the third switch tube and the fifth switch tube to be turned on and off in the second time slice to form a second buck-boost converter, and the logic control module is used to control the first switch tube, the third switch tube and the sixth switch tube to be turned on and off in the third time slice to form a third buck-boost converter.

[0015] Optionally, the time lengths of the multiple time slices are set by the size of the load connected to the corresponding power supply output terminal.

[0016] Optionally, the logic control module includes: a feedback compensation unit, used to compare the output voltages of the multiple power supply output terminals with corresponding reference voltages to generate multiple error signals; a time-sharing control unit, used to provide switch control signals to the multiple switch tubes through logic control according to the multiple error signals; and a driving unit, used to provide drive signals to the multiple switch tubes according to the switch control signals.

[0017] Optionally, the power supply circuit further includes: a plurality of low voltage difference linear regulators arranged between the outputs of the first buck-boost converter to the third buck-boost converter and the plurality of power supply output terminals.

[0018] Optionally, the first switch tube, the fourth switch tube and the fifth switch tube are PMOS transistors or NMOS transistors, and the second switch tube, the third switch tube and the sixth switch tube are NMOS transistors.

[0019] Optionally, it also includes: a plurality of voltage stabilizing capacitors, wherein the plurality of voltage stabilizing capacitors are connected to the outputs of the first buck-boost converter to the third buck-boost converter or the plurality of power supply output terminals.

[0020] According to another aspect of the present invention, an AMOLED display device is provided, comprising: an AMOLED display panel; a driving circuit for driving light-emitting elements on the AMOLED display panel; and the above-mentioned power supply circuit, wherein the power supply circuit is used to provide multiple output voltages to the driving circuit.

[0021] In summary, the power supply circuit for an AMOLED display device provided by an embodiment of the present invention uses a single power inductor and multiple switching tubes to generate the positive power supply voltage and the negative power supply voltage required by the driving circuit, reducing the number of inductors and other related components, thereby significantly reducing the bill of materials (BOM) cost of the circuit.

[0022] In addition, the power circuit of the embodiment of the present invention does not need to use a negative voltage charge pump to generate a negative power supply voltage, and therefore does not limit the minimum discharge voltage of the battery, which can greatly improve the compatibility of the AMOLED display device using the power circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0024] Figure 1A schematic structural diagram of a power supply circuit for an AMOLED display device according to the prior art is shown.

[0025] Figure 2 A schematic structural diagram of a power supply circuit for an AMOLED display device according to a first embodiment of the present invention is shown.

[0026] Figure 3 A schematic structural diagram of a power supply circuit for an AMOLED display device according to a second embodiment of the present invention is shown.

[0027] Figure 4 A schematic diagram of the chip structure of a power supply circuit according to an embodiment of the present invention is shown.

[0028] Figure 5 A schematic structural diagram of a power supply control system applied to an AMOLED display device according to an embodiment of the present invention is shown.

[0029] Figure 6 Show Figure 5 Schematic diagram of the driving circuit in . DETAILED DESCRIPTION

[0030] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are given in the drawings. However, the present invention can be implemented in different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the content of the present invention more thorough and comprehensive.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The present invention is described in detail below with reference to the accompanying drawings.

[0032] In all embodiments of the present invention, since the source and drain of a metal oxide semiconductor (MOS) transistor are symmetrical, and the conduction current directions between the source and drain of an N-type transistor and a P-type transistor are opposite, in the embodiments of the present invention, the controlled middle electrode of the MOS transistor is referred to as a control terminal, and the other two ends of the MOS transistor are referred to as a first terminal and a second terminal, respectively. For the convenience of unified description, in the context, the source, drain, and gate of a PMOS transistor are referred to as a first terminal, a second terminal, and a control terminal, respectively, and the drain, source, and gate of an NMOS transistor are referred to as a first terminal, a second terminal, and a control terminal, respectively.

[0033] Figure 2FIG. 2 is a schematic diagram showing a structure of a power supply circuit for an AMOLED display device according to a first embodiment of the present invention. Figure 2 As shown, the power supply circuit 200 includes a power stage module 210 and a logic control module 220. Among them, the power stage module 210 includes a plurality of switch tubes (for example, switch tubes FET1 to FET3, FETA, FETP and FETN) and an inductor L1. The first end of the inductor L1 is connected to the first switching node SW1, and the second end of the inductor L1 is connected to the second switching node SW2. The plurality of switch tubes are arranged between the power input terminal VIN and the plurality of power output terminals (for example, the power output terminals AVDD, ELVDD and ELVSS). The logic control module 220 is used to control the plurality of switch tubes so that the inductor L1 is charged or discharged, thereby providing an independent output voltage at each of the plurality of power output terminals. Among them, at least one of the output voltages of the plurality of power output terminals is a negative voltage. For example, the output voltages of the power output terminals AVDD and ELVDD are positive voltages, and the output voltage of the power output terminal ELVSS is a negative voltage.

[0034] Further, the switch tube FET1 is, for example, a PMOS transistor, a first end of which is connected to the power input terminal VIN, and a second end of which is connected to the first switching node SW1. The switch tube FET2 is, for example, an NMOS transistor, a first end of which is connected to the first switching node SW1, and a second end of which is connected to the reference ground PGND. The switch tube FET3 is, for example, an NMOS transistor, a second end of which is connected to the reference ground PGND, and a first end of which is connected to the second switching node SW2. The switch tube FETA is, for example, a PMOS transistor, a second end of which is connected to the second switching node SW2, and a first end of which is connected to the power output terminal AVDD. The switch tube FETP is, for example, a PMOS transistor, a second end of which is connected to the second switching node SW2, and a first end of which is connected to the power output terminal ELVDD. The switch tube FETN is, for example, an NMOS transistor, a second end of which is connected to the first switching node SW1, and a first end of which is connected to the power output terminal ELVSS. In some other embodiments, the switch tubes FET1, FETA and FETP can also be implemented by using NMOS transistors and cooperating with a charge pump boost drive circuit integrated in the drive circuit part.

[0035] Furthermore, the power stage module 210 turns on a portion of the plurality of switch tubes in a time division multiplexing manner, thereby providing output voltages at the plurality of power output terminals AVDD, ELVDD and ELVSS.

[0036] Furthermore, the control ends of the multiple switch tubes in the power stage module 210 are all connected to the logic control module 220, and the logic control module 220 is used to divide the entire switching cycle into multiple time slices, and control the conduction and shutdown of a number of the multiple switch tubes within the corresponding time slices to provide an independent output voltage at each of the multiple power supply output ends.

[0037] Further, the logic control module 220 divides the entire switching cycle into the first to third time slices. The logic control module 220 is used to control the switch tubes FETP and FETN to be in the off state in the first time slice, and then control the switch tubes FET1, FET2, FET3 and FETA to be turned on and off, and generate the output voltage at the power output terminal AVDD by controlling the first buck-boost converter composed of the switch tubes FET1, FET2, FET3 and FETA and the inductor L1. The logic control module 220 is used to control the switch tubes FETA and FETN to be in the off state in the second time slice, and then control the switch tubes FET1, FET2, FET3 and FETP to be turned on and off, and generate the output voltage at the power output terminal ELVDD by controlling the second buck-boost converter composed of the switch tubes FET1, FET2, FET3 and FETP and the inductor L1. The logic control module 220 is also used to control the switch tubes FET2, FETA and FETP to be in the off state, control the switch tube FET3 to be in the on state, and then control the on and off of the switch tubes FET1 and FETN in the third time slice, and generate the output voltage at the power output terminal ELVSS through the negative voltage step-up and step-down (inverting Buck-Boost) converter composed of the switch tubes FET1 and FETN and the inductor L1. It should be noted that the output sequence of the multiple power output terminals in the above embodiment is only exemplary, and the output sequence of the multiple power output terminals in the present invention is not limited to the above embodiment.

[0038] Furthermore, the time length of each of the first to third time slices in this embodiment can be set by the logic control module 220 according to the size of the load connected to the corresponding power output terminal.

[0039] Furthermore, the logic control module 220 includes a feedback compensation unit 221 , a time-sharing control unit 222 and a driving unit 223 .

[0040] The feedback compensation unit 221 is used to compare the output voltages of the multiple power supply output terminals with the corresponding reference voltages to generate multiple error signals. For example, the feedback compensation unit 221 may include multiple error amplifiers EA1 to EA3, each error amplifier is used to compare the output voltage of the corresponding power supply output terminal with the corresponding reference voltage to generate an error signal. For example, the error amplifier EA1 compares the output voltage AVDD with the reference voltage V REFA The error amplifier EA2 compares the output voltage ELVDD with the reference voltage V REFP The error amplifier EA3 compares the output voltage ELVSS with the reference voltage V REFN The time-sharing control unit 222 is used to generate a plurality of switch control signals S1 to SN according to the plurality of error signals Vea1 to Vea3 and the set control logic. The driving unit 223 is used to control the on and off of the plurality of switch tubes in the power stage module 210 according to the plurality of switch control signals S1 to SN, so as to adjust the output voltages AVDD, ELVDD and ELVSS to the set voltage values.

[0041] Figure 3 A schematic diagram of the structure of a power supply circuit for an AMOLED display device according to a second embodiment of the present invention is shown. In some applications, the ripple requirements for the output voltages AVDD, ELVDD, and ELVSS are relatively high, or the area of ​​the voltage-stabilizing capacitor outside the power supply circuit is required to be relatively small. Therefore, in these applications, a low-dropout linear regulator (LDO) is required to be provided inside the power supply circuit to suppress the ripple voltage of the output voltage. It is known that the low-dropout linear regulator has low cost, low noise, and low quiescent current, which are its outstanding advantages, and it requires few external components and has low losses. Figure 3 As shown, the power supply circuit 300 includes a plurality of intermediate node voltage terminals VOA, VOP and VON, which are the output voltages of the first buck-boost converter, the second buck-boost converter and the negative voltage buck-boost converter, respectively. In addition, the power supply circuit 300 also includes a plurality of LDOs 331 to 333, wherein the LDOs 331 to 333 are respectively arranged between the intermediate node voltage terminals VOA, VOP and VON and the power output terminals AVDD, ELVDD and ELVSS. In addition, the power stage module 310 and the logic control module 320 of this embodiment are exactly the same as those of the first embodiment, and are not described in detail here.

[0042] Figure 4 FIG. 2 shows a schematic diagram of a chip structure of a power supply circuit according to an embodiment of the present invention. Figure 3Taking the power supply circuit 300 in FIG. 1 as an example, the power supply circuit of the embodiment of the present invention integrates the power stage module 310 and the logic control module 320 in the same chip, and integrates the inductor L1 outside the chip. The chip includes a power input pin VIN, a first switching pin SW1, a second switching pin SW2, a ground pin PGND, an intermediate node pin VOA, VOP and VON, and power output pins AVDD, ELVDD and ELVSS. Among them, the power input pin VIN is used to connect to the battery voltage V BAT The power supply circuit of this embodiment further includes an input capacitor Cin connected between the power input pin VIN and the ground, an inductor L1 is connected outside the chip and connected to the first switching pin SW1 and the second switching pin SW2, a ground pin PGND is used to connect to the reference ground, and intermediate node pins VOA, VOP and VON are respectively used to connect to the voltage stabilizing capacitor C outside the chip. OA , C OP and C ON The power output pins AVDD, ELVDD and ELVSS are respectively used to connect to the voltage stabilizing capacitors Cout1, Cout2 and Cout3 outside the chip.

[0043] It can be understood that in some other embodiments, in the chip for the power supply circuit 200, the intermediate node pins VOA, VOP and VON and the voltage stabilizing capacitors C connected thereto can be OA , C OP and C ON The present invention does not limit this.

[0044] According to the above description, the power supply circuit of the embodiment of the present invention only needs to connect a power inductor outside the chip to achieve the output of multiple independent voltages, which can greatly reduce the area and cost of the circuit and can be suitable for relatively compact applications such as smart bracelets and smart watches.

[0045] Figure 5 FIG. 2 is a schematic diagram showing a structure of a power supply control system applied to an AMOLED display device according to an embodiment of the present invention. Figure 5As shown, the power supply control system 10 includes a power supply circuit 400 and a driving circuit 500. The power supply circuit 400 can be implemented by the power supply circuits 200 and 300 of the above embodiments, and provides voltage signals AVDD, ELVDD and ELVSS to the driving circuit 500. The driving circuit 500 generates a scan signal SCAN (not shown in the figure) of the AMOLED display panel based on the voltage signal AVDD, and the voltage obtained by the driving circuit 500 based on the voltage signal ELVDD is the positive voltage of the organic light-emitting component of the AMOLED display panel, and the voltage obtained by the driving circuit 500 based on the voltage signal ELVSS is the negative voltage of the organic light-emitting component of the AMOLED display panel.

[0046] Figure 6 Show Figure 5 Schematic diagram of the driving circuit in . Figure 6 The driving circuit 500 is a relatively mature circuit product in the prior art, and is described here for comprehension, for example, including: a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5 and a transistor T6, as well as a storage capacitor Cst and a light-emitting element DLE.

[0047] The first end of the transistor T1 is connected to the data signal DATA, and the second end is connected to the transistor T2. Figure 4 The power output terminal ELVDD of the power circuit 400 is connected to the control terminal of the (n)th level scan signal SCAN[n]. It can be understood that the (n)th level scan signal SCAN[n] can be generated by the voltage signal AVDD through the charge pump boost circuit.

[0048] The transistor T3, the transistor T4 and the light emitting element DLE are connected in series between the connection node of the transistor T1 and the transistor T2 and the power output terminal ELVSS of the power circuit 400, and the control terminal of the transistor T4 and the control terminal of the transistor T2 are commonly connected to the (n)th stage enable signal EM[n];

[0049] The storage capacitor Cst and the transistor T5 are connected in series, and the positive electrode of the storage capacitor Cst is connected to the power output terminal ELVDD of the power circuit 400, and the negative electrode is connected to the first end of the transistor T5. The control end of the transistor T5 is connected to the (n-1)th level scan signal SCAN[n-1], and the second end receives the low level Vint;

[0050] The first end of the transistor T6 is connected to the control end of the transistor T3 , the second end is connected to the second end of the transistor T3 , and the control end is connected to the control end of the transistor T1 .

[0051] Furthermore, the aforementioned display panel is an active matrix organic light emitting diode panel (AMOLED), and the aforementioned light emitting element DLE is a light emitting diode.

[0052] Furthermore, the aforementioned transistors T1, T2, T3, T4, T5 and T6 are all PMOS thin film transistors. Specifically, transistor T3 is a driver thin film transistor (Driver TFT), and transistor T1 is a switch thin film transistor (Switch TFT). The remaining transistor combinations are used as compensation circuits to compensate for the change in the driving current of the driving light-emitting element DLE caused by the drift of the threshold voltage of the driving thin film transistor T3 on the one hand, and to stabilize the potential of the gate of the driving thin film transistor T3 on the other hand, thereby stabilizing the driving current of the driving element DLE generated by the driving circuit 500. The stability of the driving current of the light-emitting element DLE will not affect the luminous brightness of the light-emitting element DLE, thereby improving the image quality of the display panel to which the driving circuit 500 is applied.

[0053] In summary, the power supply circuit for an AMOLED display device provided by an embodiment of the present invention uses a single power inductor and multiple switching tubes to generate the positive power supply voltage and the negative power supply voltage required by the driving circuit, reducing the number of inductors and other related components, thereby significantly reducing the bill of materials (BOM) cost of the circuit.

[0054] In addition, the power circuit of the embodiment of the present invention does not need to use a negative voltage charge pump to generate a negative power supply voltage, and therefore does not limit the minimum discharge voltage of the battery, which can greatly improve the compatibility of the AMOLED display device using the power circuit.

[0055] In addition, the power supply circuit of the embodiment of the present invention generates multiple output voltages by sharing an inductor, thereby reducing the loss in the energy conversion process and improving the overall power conversion efficiency.

[0056] In addition, the power supply circuit of the present invention can reduce the number of peripheral components of the power supply chip, thereby reducing the potential failure points of the circuit accordingly, and improving the reliability of the overall system.

[0057] Therefore, the power supply circuit provided by each embodiment of the present invention and the display panel and display device having the power supply circuit have extremely high practicality and compatibility, and are suitable for popularization and application.

[0058] It should be noted that it will be understood by those skilled in the art that the words "during", "when" and "when..." used in this article in connection with the operation of the circuit are not strict terms indicating an action that occurs immediately when the start-up action begins, but that there may be some small but reasonable delay or delays between it and the reaction action initiated by the start-up action, such as various transmission delays, etc. The words "approximately" or "substantially" used in this article mean that the element value has a parameter that is expected to be close to the declared value or position. However, as is well known in the art, there are always slight deviations that make it difficult for the value or position to be strictly the declared value. It has been properly determined in the art that a deviation of at least ten percent (10%) (for semiconductor doping concentrations, at least twenty percent (20%)) is a reasonable deviation from the accurate ideal target described. When used in conjunction with a signal state, the actual voltage value or logic state (e.g., "1" or "0") of the signal depends on whether positive logic or negative logic is used.

[0059] In addition, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0060] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A power supply circuit, applied to an AMOLED display device, comprising: A power stage module, comprising a plurality of switch tubes and an inductor, wherein a first end of the inductor is connected to a first switching node, a second end of the inductor is connected to a second switching node, and the plurality of switch tubes are arranged between a power input terminal and a plurality of power output terminals; as well as a logic control module, configured to control the plurality of switch tubes so as to charge or discharge the inductor, so as to provide an independent output voltage at each of the plurality of power supply output terminals; Wherein, at least one of the output voltages of the multiple power output terminals is a negative voltage.

2. The power supply circuit according to claim 1, wherein: The plurality of switch tubes include first to sixth switch tubes, and control ends of the first to sixth switch tubes are connected to the logic control module. A first end of the first switch tube is connected to the power input end, and a second end of the first switch tube is connected to the first switching node. A first end of the second switch tube is connected to the first switching node, and a second end of the second switch tube is connected to the reference ground. A first end of the third switch tube is connected to the second switch node, and a second end of the third switch tube is connected to the reference ground. A first end of the fourth switch tube is connected to the first power supply output end, and a second end of the fourth switch tube is connected to the second switching node; A first end of the fifth switch tube is connected to the second power supply output end, and a second end of the fifth switch tube is connected to the second switching node; A first end of the sixth switch tube is connected to the third power supply output end, and a second end of the sixth switch tube is connected to the first switching node.

3. The power supply circuit according to claim 2, wherein: The power stage module provides output voltages of the plurality of power output terminals based on a time division multiplexing method.

4. The power supply circuit according to claim 3, wherein: The logic control module is used to divide the entire switching cycle into multiple time slices, and control the on and off of a number of switch tubes among the multiple switch tubes in corresponding time slices to provide an independent output voltage at each of the multiple power supply output terminals.

5. The power supply circuit according to claim 4, wherein: The multiple time slices include first to third time slices, The logic control module is used to control the first switch tube, the second switch tube, the third switch tube and the fourth switch tube to be turned on and off in a first time slice to form a first buck-boost converter. The logic control module is used to control the first switch tube, the second switch tube, the third switch tube and the fifth switch tube to be turned on and off in the second time slice to form a second buck-boost converter. The logic control module is used to control the first switch tube, the third switch tube and the sixth switch tube to be turned on and off in a third time slice to form a third buck-boost converter.

6. The power supply circuit according to claim 4, wherein: The time lengths of the multiple time slices are set by the size of the load connected to the corresponding power supply output terminal.

7. The power supply circuit according to claim 4, wherein: The logic control module comprises: A feedback compensation unit, used for comparing the output voltages of the plurality of power supply output terminals with corresponding reference voltages, thereby generating a plurality of error signals; A time-sharing control unit, configured to provide switch control signals for the plurality of switch tubes through logic control according to the plurality of error signals; and A driving unit is used to provide a driving signal to the plurality of switch tubes according to the switch control signal.

8. The power supply circuit according to claim 5, wherein: Also includes: A plurality of low voltage drop linear regulators are arranged between the outputs of the first buck-boost converter to the third buck-boost converter and the plurality of power supply output terminals.

9. The power supply circuit according to claim 2, wherein: The first switch tube, the fourth switch tube and the fifth switch tube are PMOS transistors or NMOS transistors, The second switch tube, the third switch tube and the sixth switch tube are NMOS transistors.

10. The power supply circuit according to claim 8, wherein: Also includes: A plurality of voltage stabilizing capacitors are connected to the outputs of the first buck-boost converter to the third buck-boost converter or the plurality of power supply output terminals.

11. An AMOLED display device, comprising: AMOLED display panel; A driving circuit, used to drive the light-emitting elements on the AMOLED display panel; as well as The power supply circuit according to any one of claims 1 to 10, wherein the power supply circuit is used to provide a plurality of output voltages to the drive circuit.

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