PFC circuit zero voltage delay time estimation method, module, medium, product, system and power supply

By adjusting the duty cycle according to the input and output voltages in the PFC circuit, and calculating the zero voltage delay time in combination with the voltage and duty cycle adjustment coefficient, the problem of inaccurate estimation in the prior art is solved, and a more accurate delay time estimation is achieved. Lower switching losses.

CN119298649APending Publication Date: 2025-01-10SHENZHEN KEXIN COMM TECH
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Patent Information

Application Number
CN202411417232.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-11
Publication Date
2025-01-10

AI Technical Summary

Technical Problem

The zero voltage delay time estimate of the switching devices in existing PFC circuits is inaccurate, resulting in the inability to implement soft switching, which increases the loss and life of the switching devices.

Method used

By outputting control signals based on the initial duty cycle, obtaining the input instantaneous voltage and output instantaneous voltage, adjusting the duty cycle, and using the voltage adjustment coefficient, duty cycle adjustment coefficient and offset to calculate the zero voltage delay time, and using the proportional integral control algorithm, the proportional integral control algorithm Adjust duty cycle to improve estimation accuracy.

Benefits of technology

It improves the accuracy of estimation of zero voltage delay time in PFC circuit, reduces switching losses of switching devices during on and off, and extends device life.

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Abstract

The invention discloses a PFC circuit zero voltage delay time estimation method and module, a medium, a product, a system and a power supply, and the PFC circuit zero voltage delay time estimation method comprises the steps: outputting a first control signal to a PFC circuit according to an initial duty ratio; obtaining an input instantaneous voltage and an output instantaneous voltage of the PFC circuit; according to the output instantaneous voltage, the initial duty ratio is adjusted, and the current duty ratio of the first control signal is obtained; and calculating zero voltage delay time of the PFC circuit according to the input instantaneous voltage, the current duty ratio and a preset adjustment coefficient. According to the technical scheme, the zero voltage delay time under the current input instantaneous voltage and the current duty ratio is accurately estimated according to the adjusted current duty ratio, the input instantaneous voltage and the preset adjustment coefficient, so that the accuracy of estimating the zero voltage delay time is improved.
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Description

Technical Field

[0001] The present invention relates to the field of power supply technology, and in particular to a method, module, medium, product, system and power supply for estimating zero voltage delay time of a PFC circuit. Background Art

[0002] Soft switching technology is a technology that reduces or eliminates the switching losses generated by switching devices during the opening and closing process. Soft switching technology can be achieved by extending the rise or fall time of the voltage or current of the device during the switching process, which can avoid the simultaneous existence of high current and high voltage when the switching state of the switching device is changed, thereby reducing the loss of the switching device and increasing the life of the switching device. The zero voltage delay time refers to the time that the switching device needs to wait before triggering the opening. This time is to ensure that the switching device can be turned on under zero voltage or zero current conditions, thereby achieving soft switching.

[0003] However, the existing zero voltage delay time estimation for switching devices in PFC (Power Factor Correction, PFC for short) circuits generally uses a relationship curve between the delayed turn-on time and the sinusoidal angle of the PFC circuit input voltage for matching. However, using this curve to match the zero voltage delay time of the entire cycle and working state leads to inaccurate zero voltage delay time estimation, which in turn makes it impossible to achieve soft switching. Summary of the invention

[0004] Embodiments of the present invention provide a method, module, medium, product, system and power supply for estimating zero voltage delay time of a PFC circuit, so as to solve the problem of inaccurate zero voltage delay time estimation of existing switching devices.

[0005] A method for estimating zero voltage delay time of a PFC circuit, comprising: outputting a first control signal to the PFC circuit according to an initial duty cycle; Obtaining an input instantaneous voltage and an output instantaneous voltage of the PFC circuit; According to the output instantaneous voltage, adjusting the initial duty cycle to obtain a current duty cycle of the first control signal; The zero voltage delay time of the PFC circuit is calculated according to the input instantaneous voltage, the current duty cycle and a preset adjustment coefficient.

[0006] Further, the preset adjustment coefficient includes a voltage adjustment coefficient, a duty cycle adjustment coefficient and an offset; The calculating the zero voltage delay time of the PFC circuit according to the input instantaneous voltage, the current duty cycle and a preset calculation coefficient includes: Determining a voltage delay value according to the input instantaneous voltage and a voltage adjustment coefficient corresponding to the input instantaneous voltage; Determining a duty cycle delay value according to the current duty cycle and a duty cycle adjustment coefficient corresponding to the current duty cycle; The zero voltage delay time of the PFC circuit is calculated according to the voltage delay value, the duty cycle delay value and the offset corresponding to the input instantaneous voltage.

[0007] Further, before calculating the zero voltage delay time of the PFC circuit according to the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient, the method includes: Obtain a soft switching curve, and obtain a measured instantaneous voltage and a measured duty cycle corresponding to a measured delay time according to the soft switching curve; According to the measured delay time, the measured instantaneous voltage and the measured duty cycle, obtaining, in different preset duty cycle intervals, voltage adjustment coefficients, duty cycle adjustment coefficients and offsets corresponding to different preset instantaneous voltage intervals in each of the preset duty cycle intervals; The voltage adjustment coefficient, the duty cycle adjustment coefficient and the offset are determined as the preset adjustment coefficient.

[0008] Further, adjusting the initial duty cycle according to the output instantaneous voltage to obtain the current duty cycle of the first control signal includes: Obtaining a voltage difference between the output instantaneous voltage and a preset voltage; The initial duty cycle is adjusted according to the voltage difference to obtain a current duty cycle of the first control signal.

[0009] Further, adjusting the initial duty cycle according to the voltage difference to obtain the current duty cycle of the first control signal includes: According to the voltage difference, a proportional-integral control algorithm is adopted to adjust the initial duty cycle to obtain a current duty cycle of the first control signal.

[0010] A control module comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the above-mentioned PFC circuit zero voltage delay time estimation method when executing the computer program.

[0011] A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for estimating zero voltage delay time of a PFC circuit is implemented.

[0012] A computer program product comprises a computer program, wherein when the computer program is executed by a processor, the method for estimating zero voltage delay time of a PFC circuit is implemented.

[0013] A PFC control system comprises a PFC circuit and the above-mentioned control module; the control module is connected to the PFC circuit.

[0014] A switching power supply comprises a voltage conversion circuit and the above-mentioned PFC control system; the input end of the voltage conversion circuit is connected to a power supply end through the PFC circuit, and the output end of the voltage conversion circuit is used to connect a load.

[0015] The above-mentioned PFC circuit zero voltage delay time estimation method, module, medium, product, system and power supply output a first control signal to the PFC circuit according to the initial duty cycle, obtain the input instantaneous voltage of the PFC circuit, adjust the initial duty cycle according to the output instantaneous voltage, obtain the current duty cycle of the first control signal, and calculate the zero voltage delay time of the PFC circuit according to the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient, so as to accurately estimate the current input instantaneous voltage and the zero voltage delay time under the current duty cycle according to the adjusted current duty cycle, the input instantaneous voltage and the preset adjustment coefficient, thereby improving the accuracy of estimating the zero voltage delay time. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0017] Figure 1 is a flow chart of a method for estimating zero voltage delay time of a PFC circuit in one embodiment of the present invention; Figure 2 is another flow chart of a method for estimating zero voltage delay time of a PFC circuit in one embodiment of the present invention; Figure 3 is another flow chart of a method for estimating zero voltage delay time of a PFC circuit in one embodiment of the present invention; Figure 4 is another flow chart of a method for estimating zero voltage delay time of a PFC circuit in one embodiment of the present invention; Figure 5 is a schematic diagram of a control module in an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] The present embodiment provides a method for estimating zero voltage delay time of a PFC circuit, which is applied to a PFC control system. Exemplarily, the PFC control system includes a PFC circuit and a control module, which is connected to the PFC circuit and is used to estimate the zero voltage turn-on delay time of a switch device in the PFC circuit. As an example, the PFC circuit is a triangle current mode control (TCM) bridgeless PFC circuit.

[0020] This embodiment provides a method for estimating zero voltage delay time of a PFC circuit. Figure 1 As shown, it is applied to the above control module, including: S101: Outputting a first control signal to a PFC circuit according to an initial duty cycle.

[0021] S102: Obtaining an input instantaneous voltage and an output instantaneous voltage of the PFC circuit.

[0022] S103: adjusting the initial duty cycle according to the output instantaneous voltage to obtain the current duty cycle of the first control signal.

[0023] S104: Calculate the zero voltage delay time of the PFC circuit according to the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient.

[0024] As an example, in step S101, according to the initial duty cycle, a first control signal is output to the PFC circuit. The initial duty cycle is a preset duty cycle. The initial duty cycle can be set according to actual experience. The first control signal is a control signal for controlling the switch device in the PFC circuit to turn on or off. Exemplarily, the control module generates the first control signal according to the initial duty cycle to control the switch device in the PFC circuit to turn on or off.

[0025] As an example, in step S102, the input instantaneous voltage of the PFC circuit is obtained. Exemplarily, the control module is connected to the input end of the PFC circuit through a voltage acquisition circuit, so as to obtain the input instantaneous voltage of the PFC circuit through the voltage acquisition circuit.

[0026] As an example, in step S103, the initial duty cycle is adjusted according to the output instantaneous voltage, and the current duty cycle of the first control signal is obtained. In this embodiment, since the change of the input instantaneous voltage will cause the change of the zero voltage delay time, the larger the input instantaneous voltage, the longer the zero voltage delay time, and the lower the input instantaneous voltage, the shorter the zero voltage delay time. Therefore, according to the output instantaneous voltage, the initial duty cycle is adjusted, and the current duty cycle of the first control signal is obtained, so as to timely adjust the current duty cycle according to the change of the input instantaneous voltage, so as to accurately estimate the zero voltage delay time according to the adjusted current duty cycle.

[0027] As an example, in step S104, the zero voltage delay time of the PFC circuit is calculated according to the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient. Exemplarily, the zero voltage delay time of the PFC circuit is calculated according to the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient using a preset delay calculation strategy. Wherein, the preset delay calculation strategy is a preset calculation strategy for calculating the zero voltage delay time. Exemplarily, the preset delay calculation strategy can be to use the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient as calculation parameters for calculation, so as to calculate the zero voltage delay time. Since the input instantaneous voltage and the current duty cycle can affect the zero voltage delay time, for example, the larger the input instantaneous voltage, the longer the zero voltage delay time, and the larger the current duty cycle, the longer the zero voltage delay time. Therefore, by using the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient, the zero voltage delay time of the PFC circuit can be calculated to estimate the zero voltage delay time more accurately. It can be understood that after calculating the zero voltage delay time of the PFC circuit, the control module further adjusts the duty cycle of the first control signal according to the zero voltage delay time to reduce or eliminate the switching loss generated by the switch device in the PFC circuit during the opening and closing process.

[0028] In this embodiment, according to the initial duty cycle, a first control signal is output to the PFC circuit, an input instantaneous voltage of the PFC circuit is obtained, and according to the output instantaneous voltage, the initial duty cycle is adjusted to obtain a current duty cycle of the first control signal, and according to the input instantaneous voltage, the current duty cycle and a preset adjustment coefficient, a zero voltage delay time of the PFC circuit is calculated, so that according to the adjusted current duty cycle, the input instantaneous voltage and the preset adjustment coefficient, the current input instantaneous voltage and the zero voltage delay time under the current duty cycle are accurately estimated, thereby improving the accuracy of estimating the zero voltage delay time.

[0029] In one embodiment, the preset adjustment coefficient includes a voltage adjustment coefficient, a duty cycle adjustment coefficient and an offset; Figure 2 As shown, in step S104, the zero voltage delay time of the PFC circuit is calculated according to the input instantaneous voltage, the current duty cycle and the preset calculation coefficient, including: S201: Determine a voltage delay value according to an input instantaneous voltage and a voltage adjustment coefficient corresponding to the input instantaneous voltage.

[0030] S202: Determine a duty cycle delay value according to the current duty cycle and a duty cycle adjustment coefficient corresponding to the current duty cycle.

[0031] S203: Calculate the zero voltage delay time of the PFC circuit according to the voltage delay value, the duty cycle delay value and the offset corresponding to the input instantaneous voltage.

[0032] As an example, in step S201, the voltage adjustment coefficient is a coefficient used to determine the voltage delay value. The voltage delay value is determined according to the input instantaneous voltage and the voltage adjustment coefficient corresponding to the input instantaneous voltage to determine the delay time of the input instantaneous voltage. For example, the voltage delay value is determined according to the product between the input instantaneous voltage and the voltage adjustment coefficient corresponding to the input instantaneous voltage.

[0033] As an example, in step S202, the duty cycle adjustment coefficient is used to determine the coefficient of the duty cycle delay value. The duty cycle delay value is determined according to the current duty cycle and the duty cycle adjustment coefficient corresponding to the current duty cycle to determine the delay time of the duty cycle of the first control signal. For example, the duty cycle delay value is determined according to the product between the current duty cycle and the duty cycle adjustment coefficient corresponding to the current duty cycle.

[0034] As an example, in step S203, the zero voltage delay time of the PFC circuit is calculated according to the voltage delay value, the duty cycle delay value, and the offset corresponding to the input instantaneous voltage. In this implementation, the zero voltage delay time of the PFC circuit is comprehensively estimated according to the three dimensions of the voltage delay value, the duty cycle delay value, and the offset corresponding to the input instantaneous voltage to ensure the accuracy of the zero voltage delay time of the PFC circuit. Exemplarily, the voltage delay value, the duty cycle delay value, and the offset corresponding to the input instantaneous voltage are summed to calculate the zero voltage delay time of the PFC circuit.

[0035] In this embodiment, the voltage delay value is determined according to the input instantaneous voltage and the voltage adjustment coefficient corresponding to the input instantaneous voltage, the duty cycle delay value is determined according to the current duty cycle and the duty cycle adjustment coefficient corresponding to the current duty cycle, and the zero voltage delay time of the PFC circuit is calculated according to the voltage delay value, the duty cycle delay value and the offset corresponding to the input instantaneous voltage, so as to estimate the zero voltage delay time of the PFC circuit from multiple dimensions, thereby improving the accuracy of estimating the zero voltage delay time of the PFC circuit.

[0036] In one embodiment, if Figure 3 As shown, before step S104, before calculating the zero voltage delay time of the PFC circuit according to the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient, it includes: S301: Obtain a soft switching curve, and obtain a measured instantaneous voltage and a measured duty cycle corresponding to a measured delay time according to the soft switching curve.

[0037] S302: According to the measured delay time, the measured instantaneous voltage and the measured duty cycle, obtain the voltage adjustment coefficient, the duty cycle adjustment coefficient and the offset corresponding to different preset instantaneous voltage intervals in each preset duty cycle interval in different preset duty cycle intervals.

[0038] S303: Determine the voltage adjustment coefficient, the duty cycle adjustment coefficient and the offset as the preset adjustment coefficients.

[0039] Among them, the soft switching curve is the measured delay time, measured instantaneous voltage and measured duty cycle curve of the actual test.

[0040] As an example, in step S301, a soft switching curve is obtained, and the measured instantaneous voltage and the measured duty cycle corresponding to the measured delay time are obtained according to the soft switching curve. Exemplarily, the measured delay time of the PCF circuit under different measured instantaneous voltages and measured duty cycles is measured in advance by an oscilloscope to form a soft switching curve, so that the control module can obtain the measured instantaneous voltage and the measured duty cycle corresponding to the measured delay time according to the soft switching curve.

[0041] As an example, in steps S302 and S303, different preset duty cycle intervals include less than 194, 194 to 262, 262 to 349, 349 to 431, 431 to 509, and 509 to 589. Different preset instantaneous voltage intervals within each preset duty cycle interval, for example, different preset instantaneous voltage intervals include less than 324V, 324V to 366V, and greater than 366V. Exemplarily, at least three measured instantaneous voltages are selected in each preset instantaneous interval, as well as the measured delay time and the measured duty cycle corresponding to each measured instantaneous voltage. Let the voltage adjustment coefficient be the unknown number Y, the duty cycle adjustment coefficient be the unknown number X, and the offset be the unknown number Z. Assume that the three measured instantaneous voltages are ACS_A\ACS_B\ACS_C, the corresponding measured delay times are SC_A\SC_B\SC_C, and the corresponding measured duty cycles are ZK_A\ZK_B\ZK_C, then construct the equation group: SC_A=ACS_A*Y+ZK_A*X+Z; SC_B=ACS_B*Y+ZK_B*X+Z; SC_C=ACS_C*Y+ZK_C*X+Z; Therefore, according to the above equation group, the voltage adjustment coefficient, duty cycle adjustment coefficient and offset corresponding to different preset instantaneous voltage intervals in each preset duty cycle interval in different preset duty cycle intervals are obtained, and the voltage adjustment coefficient, duty cycle adjustment coefficient and offset are determined as preset adjustment coefficients, so that the subsequent control module matches the corresponding preset adjustment coefficient according to the input instantaneous voltage and the current duty cycle, thereby improving the accuracy of estimating the zero voltage delay time of the PFC circuit.

[0042] Exemplarily, if the current duty cycle is less than 190 and the input instantaneous voltage is 330V, the voltage adjustment coefficient, duty cycle adjustment coefficient and offset of the preset instantaneous voltage interval of 324V to 366V are determined from the preset duty cycle interval less than 194, and the zero voltage delay time of the PFC circuit is calculated based on the voltage adjustment coefficient, duty cycle adjustment coefficient, offset, input instantaneous voltage and current duty cycle.

[0043] In this embodiment, a soft switching curve is obtained, and based on the soft switching curve, the measured instantaneous voltage and the measured duty cycle corresponding to the measured delay time are obtained. Based on the measured delay time, the measured instantaneous voltage and the measured duty cycle, the voltage adjustment coefficient, the duty cycle adjustment coefficient and the offset corresponding to the different preset instantaneous voltage intervals in each preset duty cycle interval in different preset duty cycle intervals are obtained, and the voltage adjustment coefficient, the duty cycle adjustment coefficient and the offset are determined as the preset adjustment coefficients, thereby improving the accuracy and reliability of the preset adjustment coefficients.

[0044] In one embodiment, if Figure 4 As shown, in step S103, the initial duty cycle is adjusted according to the output instantaneous voltage to obtain the current duty cycle of the first control signal, including: S401: Obtaining a voltage difference between an output instantaneous voltage and a preset voltage.

[0045] S402: Adjust the initial duty cycle according to the voltage difference to obtain the current duty cycle of the first control signal.

[0046] The preset voltage is a custom-set voltage.

[0047] As an example, in step S401, a voltage difference between the output instantaneous voltage and the preset voltage is obtained so as to determine whether the output instantaneous voltage deviates from the target value based on the preset voltage, so as to ensure that the PFC circuit outputs a normal output instantaneous voltage by adjusting the current duty cycle.

[0048] As an example, in step S402, the initial duty cycle is adjusted in real time according to the voltage difference using a proportional-integral control algorithm to obtain the current duty cycle of the first control signal, thereby ensuring the accuracy of the current duty cycle.

[0049] In this embodiment, the voltage difference between the output instantaneous voltage and the preset voltage is obtained, the initial duty cycle is adjusted according to the voltage difference, the current duty cycle of the first control signal is obtained, and the initial duty cycle is adjusted in time to ensure the accuracy of the current duty cycle.

[0050] In one embodiment, adjusting the initial duty cycle according to the voltage difference to obtain the current duty cycle of the first control signal includes: adjusting the initial duty cycle according to the voltage difference using a proportional-integral control algorithm to obtain the current duty cycle of the first control signal.

[0051] Exemplarily, the difference between the actual voltage and the target voltage is measured, the voltage difference e(t) = target voltage Vset-measured actual voltage Vactual, and the voltage difference e(t) is amplified by the proportional gain Kp to obtain the proportional control component: P=Kp*e(t). The voltage difference e(t) is integrated to obtain the integral control component. The integral action can eliminate the steady-state error, and the integral control component is: I=Ki*∫e(t)dt, where Ki is the integral gain. The sum of the proportional control component and the integral control component is used as the output of the PI controller, that is, U(t)=P+I. According to the output U(t) of the PI controller, the initial duty cycle Dinitial of the switching device in the PFC circuit is adjusted. The current duty cycle Dnew can be adjusted by the following formula: Dnew=Dinitial+U(t).

[0052] In this embodiment, a proportional-integral control algorithm is used according to the voltage difference to adjust the initial duty cycle and obtain the current duty cycle of the first control signal, so as to ensure the accuracy of the current duty cycle of the first control signal.

[0053] It should be understood that the order of execution of the steps in the above embodiment does not necessarily mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present invention.

[0054] In one embodiment, a control module is provided. The control module may be a server, and its internal structure diagram may be as follows: Figure 5As shown. The control module includes a processor, a memory, a network interface and a database connected through a system bus. Among them, the processor of the control module is used to provide computing and control capabilities. The memory of the control module includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the control module is used to store data of the processor executing the PFC circuit zero voltage delay time estimation method. The network interface of the control module is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a PFC circuit zero voltage delay time estimation method is implemented.

[0055] In one embodiment, a control module is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the method for estimating the zero voltage delay time of the PFC circuit in the above embodiment is implemented. To avoid repetition, it will not be described here.

[0056] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the method for estimating the zero voltage delay time of the PFC circuit in the above embodiment is implemented. To avoid repetition, it is not described again here.

[0057] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0058] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0059] This embodiment provides a computer program product, including a computer program. When the computer program is executed by a processor, the above-mentioned PFC circuit zero voltage delay time estimation method is implemented.

[0060] This embodiment provides a PFC control system, including a PFC circuit and the above-mentioned control module; the control module is connected to the PFC circuit.

[0061] This embodiment provides a switching power supply, including a voltage conversion circuit and the above-mentioned PFC control system; the input end of the voltage conversion circuit is connected to the power supply end through the PFC circuit, and the output end of the voltage conversion circuit is used to connect to the load.

[0062] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A method for estimating zero voltage delay time of a PFC circuit, characterized in that: include: outputting a first control signal to the PFC circuit according to an initial duty cycle; Obtaining an input instantaneous voltage and an output instantaneous voltage of the PFC circuit; According to the output instantaneous voltage, adjusting the initial duty cycle to obtain a current duty cycle of the first control signal; The zero voltage delay time of the PFC circuit is calculated according to the input instantaneous voltage, the current duty cycle and a preset adjustment coefficient.

2. The method for estimating zero voltage delay time of a PFC circuit according to claim 1, characterized in that: The preset adjustment coefficients include a voltage adjustment coefficient, a duty cycle adjustment coefficient and an offset; The calculating the zero voltage delay time of the PFC circuit according to the input instantaneous voltage, the current duty cycle and a preset calculation coefficient includes: Determining a voltage delay value according to the input instantaneous voltage and a voltage adjustment coefficient corresponding to the input instantaneous voltage; Determining a duty cycle delay value according to the current duty cycle and a duty cycle adjustment coefficient corresponding to the current duty cycle; The zero voltage delay time of the PFC circuit is calculated according to the voltage delay value, the duty cycle delay value and the offset corresponding to the input instantaneous voltage.

3. The method for estimating zero voltage delay time of a PFC circuit according to claim 2, characterized in that: Before calculating the zero voltage delay time of the PFC circuit according to the input instantaneous voltage, the current duty cycle and the preset adjustment coefficient, the method includes: Obtain a soft switching curve, and obtain a measured instantaneous voltage and a measured duty cycle corresponding to a measured delay time according to the soft switching curve; According to the measured delay time, the measured instantaneous voltage and the measured duty cycle, obtaining, in different preset duty cycle intervals, voltage adjustment coefficients, duty cycle adjustment coefficients and offsets corresponding to different preset instantaneous voltage intervals in each of the preset duty cycle intervals; The voltage adjustment coefficient, the duty cycle adjustment coefficient and the offset are determined as the preset adjustment coefficient.

4. The method for estimating zero voltage delay time of a PFC circuit according to claim 1, wherein: The adjusting the initial duty cycle according to the output instantaneous voltage to obtain the current duty cycle of the first control signal includes: Obtaining a voltage difference between the output instantaneous voltage and a preset voltage; The initial duty cycle is adjusted according to the voltage difference to obtain a current duty cycle of the first control signal.

5. The method for estimating zero voltage delay time of a PFC circuit according to claim 1, characterized in that: The adjusting the initial duty cycle according to the voltage difference to obtain the current duty cycle of the first control signal includes: According to the voltage difference, a proportional-integral control algorithm is adopted to adjust the initial duty cycle to obtain a current duty cycle of the first control signal.

6. A control module, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the method for estimating zero voltage delay time of a PFC circuit according to any one of claims 1 to 5 is implemented.

7. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method for estimating zero voltage delay time of a PFC circuit according to any one of claims 1 to 5 is implemented.

8. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method for estimating zero voltage delay time of a PFC circuit according to any one of claims 1 to 5 is implemented.

9. A PFC control system, characterized in that: It comprises a PFC circuit and the control module as claimed in claim 6; the control module is connected to the PFC circuit.

10. A switching power supply, characterized in that: It comprises a voltage conversion circuit and the PFC control system as claimed in claim 8; the input end of the voltage conversion circuit is connected to the power supply end through the PFC circuit, and the output end of the voltage conversion circuit is used to connect to a load.