Motor controller and vehicle with same
Through the combination of hardware logic protection module and software protection module, the problems of high cost and long production cycle of motor controller hardware protection circuit are solved, and more efficient production and higher safety levels are achieved.
Patent Information
- Application Number
- CN202411277920.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-12
- Publication Date
- 2025-01-10
AI Technical Summary
The existing motor controller hardware protection circuit has high cost and a long production cycle, resulting in low production efficiency.
The hardware logic protection module is adopted, and the hardware logic circuit is replaced by the CPLD chip. The safety protection of the motor controller is achieved through components such as gate circuits and diodes, and combined with the software protection module, double safety logic protection is achieved.
Reduces the cost of hardware logic protection modules, simplifies production processes, shortens production cycles, improves production efficiency, and improves the safety level of the motor controller through dual safety logic protection.
Smart Images
Figure CN119298780A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of automobile technology, and in particular to a motor controller and a vehicle having the same. Background Art
[0002] The motor controller of an electric vehicle inverts the DC power of the battery into three-phase AC power to drive the motor to rotate. When the motor rotates, it drives the wheels to rotate synchronously to make the vehicle run. The safety level of the motor controller has a significant impact on the safety level of the entire vehicle. When the motor controller fails during the operation of the vehicle, the vehicle cannot run according to the instructions of the motor controller, and the vehicle may stop suddenly or cannot be controlled to run correctly. Therefore, the design of the safety protection circuit for the motor controller is crucial.
[0003] With the continuous development of motor controllers, safety control technology is constantly updated and iterated, and software control, hardware control and other solutions have emerged. The current hardware control solution mainly relies on complex programmable logic devices (CPLDs) to implement logic functions through hardware programming. However, CPLDs are expensive, and all functions will fail once the chip is damaged. In addition, when producing safety protection circuits based on CPLDs, the logic program needs to be downloaded separately, which slows down the production cycle and reduces production efficiency. Summary of the invention
[0004] The purpose of the embodiments of the present application is to provide a motor controller and a vehicle having the same, so as to solve the problem that the hardware protection circuit of the existing motor controller has high cost and long production cycle.
[0005] In a first aspect, the present application provides a motor controller, comprising: a power module for connecting a motor; a drive module connected to the power module, for driving the motor to work by controlling the power module, and changing the state of an output first fault signal when an upper bridge arm fault and / or a lower bridge arm fault occurs in the power module; a control module connected to the drive module, for controlling the drive module through an output PWM signal, and changing the state of an output enable signal based on the fault signal, wherein the fault signal includes the first fault signal, and the enable signal is used to enable the drive module to perform an active short circuit when the upper bridge arm fault and / or the lower bridge arm fault occurs; a hardware logic protection module, connected to the drive module and the control module, for performing hardware logic protection on the motor controller and the motor based on the enable signal and the fault signal.
[0006] In the above scheme, the hardware logic protection module is implemented by a hardware logic circuit. The hardware logic circuit is used instead of the CPLD chip to perform safety protection on the motor controller and the motor, which is simpler and more stable. In addition, the cost of the gate circuit in the hardware logic circuit is low and the production is simple, which shortens the production cycle of the entire motor controller and is more efficient.
[0007] As an optional manner, the first fault signal includes an upper bridge arm signal and a lower bridge arm signal, the PWM signal includes an upper bridge PWM signal and a lower bridge PWM signal, and the hardware logic protection module includes: a first AND gate, a second AND gate, a first diode and a second diode; one input end of the first AND gate is connected to the driving module for inputting the upper bridge arm signal, the other input end of the first AND gate is connected to the control module for inputting the enable signal, and the output end of the first AND gate is connected to the anode of the first diode for controlling the conduction or cutoff of the first diode; the output end of the first diode is connected to the driving input end of the driving module for changing the state of the upper bridge PWM signal when the first diode is turned on; one input end of the second AND gate is connected to the driving module for inputting the lower bridge arm signal, the other input end of the second AND gate is connected to the control module for inputting the enable signal, and the output end of the second AND gate is connected to the anode of the second diode for controlling the conduction or cutoff of the second diode; the output end of the second diode is connected to the driving input end of the driving module for changing the state of the lower bridge PWM signal when the second diode is turned on.
[0008] In the above scheme, the first fault signal output by the driving module controls the first AND gate and the second AND gate to realize the conduction or disconnection of the upper bridge or lower bridge switching elements in the power module, so that when a bridge arm fault occurs, the faulty bridge arm can be actively short-circuited in time to protect the safety of the motor controller and the motor.
[0009] As an optional method, the hardware logic protection module also includes: a buffer and a third AND gate; the buffer is connected to the control module and the driving module, and is used to buffer the PWM signal output by the control module and input it into the driving module; the input end of the third AND gate is connected to the driving module for inputting the fault signal, and the output end of the third AND gate is connected to the output enable pin of the buffer for controlling the output state of the buffer.
[0010] In the above scheme, the third AND gate is controlled according to the fault signal to change the output state of the buffer, so that when a fault occurs, the buffer can quickly cut off the PWM signal output by the control module to protect the safety of the motor controller and the motor.
[0011] As an optional method, the control module is also used to: change the state of the output PWM signal based on the fault signal to protect the motor controller and the motor with software logic. In the above scheme, software control is added on the basis of the hardware logic protection module. Software protection and hardware protection can independently protect the motor controller and the motor at the same time. When the two work at the same time, they will not grab hardware resources and complement each other. When the software protection path fails, the hardware protection path can continue to work. When the hardware protection path fails, the software protection path can also continue to work, thereby realizing dual safety logic protection and improving the safety level.
[0012] As an optional method, the fault signal also includes a second fault signal, and the motor controller also includes: a fault detection module, connected to the control module and the hardware logic protection module, for detecting whether the motor has an overcurrent fault and / or an overvoltage fault, and changing the state of the output second fault signal when a fault is detected in the motor.
[0013] In the above scheme, the fault detection module can monitor whether there is an over-current fault and an over-voltage fault, and feed back to the hardware logic protection module and the control module, so as to realize double safety protection of the motor controller and the motor.
[0014] As an optional method, the fault detection module includes: a sampling unit for collecting electrical signals from the motor controller, wherein the electrical signals include voltage signals and / or current information; a fault detection unit connected to the sampling unit, for determining whether the motor controller has an overcurrent fault and / or an overvoltage fault based on the electrical signals. In the above scheme, the sampling unit collects electrical signals, and the fault detection unit determines overcurrent and overvoltage faults, which facilitates fault troubleshooting and maintenance, and improves the sensitivity and accuracy of fault detection.
[0015] As an optional method, the enable signal maintains a low level when the motor controller has no upper bridge arm fault and lower bridge arm fault, and is a high level when an upper bridge arm fault or a lower bridge arm fault exists. In the above scheme, the level state of the enable signal cooperates with the hardware logic protection module to perform safety protection on the motor controller and the motor.
[0016] As an optional method, the fault signal maintains a high level when there is no corresponding fault in the motor controller, and a low level when there is a corresponding fault. In the above scheme, the level state of the fault signal cooperates with the hardware logic protection module and the control module to perform safety protection on the motor controller and the motor.
[0017] As an optional method, the motor controller further includes: a power supply unit, which is used to supply power to the motor controller and stop supplying power when the motor controller fails. In the above scheme, when a fault is detected in the motor controller, the power supply can be shut off in time to protect the motor controller and the motor, which has the highest safety protection priority.
[0018] In a second aspect, the present application also provides a vehicle, comprising the motor controller described in the first aspect.
[0019] Other features and advantages of the present application will be described in the subsequent description, and in part will become apparent from the description, or will be understood by implementing the embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0021] Figure 1 A structural block diagram of a motor controller provided in an embodiment of the present application;
[0022] Figure 2 A circuit connection diagram of a motor controller provided in an embodiment of the present application;
[0023] Figure numerals: 10 - power module, 20 - drive module, 30 - control module, 40 - hardware logic protection module, 401 - first AND gate, 402 - second AND gate, 403 - first diode, 404 - second diode, 405 - buffer, 406 - third AND gate, 50 - fault detection module, 60 - power supply unit. DETAILED DESCRIPTION
[0024] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.
[0025] It should be noted that all technical and scientific terms used in this document have the same meanings as those generally understood by technicians in the technical field to which this application belongs; the terms used in this document are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.
[0026] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.
[0027] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0028] Please refer to Figure 1 , Figure 1 A structural block diagram of a motor controller provided for an embodiment of the present application includes: a power module 10, used to connect the motor; a drive module 20, connected to the power module 10, used to drive the motor to work by controlling the power module 10, and changing the state of an output first fault signal when an upper bridge arm fault and / or a lower bridge arm fault occurs in the power module 10; a control module 30, connected to the drive module 20, used to control the drive module 20 through an output PWM signal, and, based on the fault signal, change the state of an output enable signal, wherein the fault signal includes a first fault signal, and the enable signal is used to enable the drive module 20 to perform an active short circuit when an upper bridge arm fault and / or a lower bridge arm fault occurs; a hardware logic protection module 40, connected to the drive module 20 and the control module 30, and used to perform hardware logic protection on the motor controller and the motor based on the enable signal and the fault signal.
[0029] The power module 10 includes a plurality of switch tube elements, and these switch tube elements form a bridge circuit, which converts direct current into alternating current to drive the motor. As an implementation mode, the power module 10 includes six switch tube elements, which are divided into two groups, an upper bridge arm and a lower bridge arm. A fault occurring in the upper bridge arm is an upper bridge arm fault, and a fault occurring in the lower bridge arm is a lower bridge arm fault. The upper bridge arm fault and the lower bridge arm fault are monitored by the driving module 20.
[0030] The driving module 20 receives the PWM signal from the control module 30, and controls the on or off of the switch tube element in the power module 10 based on the received PWM signal. When the power module 10 has an upper bridge arm fault and / or a lower bridge arm fault, the driving module 20 changes the state of the first fault signal to allow the power supply controller to identify and process the fault. The upper bridge arm fault and / or the lower bridge arm fault here include three situations: only the upper bridge arm fault occurs, only the lower bridge arm fault occurs, and the upper bridge arm fault and the lower bridge arm fault occur at the same time.
[0031] The control module 30 achieves precise control of the motor by receiving instructions, implementing control algorithms, processing sensor signals, implementing protection measures, and communicating with the upper control system. The control module 30 controls the drive module 20 by outputting PWM signals. All fault signals are fed back to the control module 30, which dispatches and processes them uniformly and sends fault processing signals to other modules, including outputting an enable signal when the control module 30 receives an upper arm fault and / or a lower arm fault. The enable signal can enable the drive module 20 to perform an active short circuit.
[0032] The hardware logic protection module 40 receives the fault signal and the enable signal. The fault signal and the enable signal are operated through the logic level of the hardware logic protection module 40. The output level signal controls other modules to handle the corresponding fault and protect the motor controller and the motor in time.
[0033] In the above scheme, the hardware logic protection module 40 is implemented by a hardware logic circuit, and the hardware logic circuit is used instead of the CPLD chip to perform safety protection on the motor controller and the motor, which is simpler and more stable. In addition, the cost of the gate circuit in the hardware logic circuit is low, the production is simple, the production cycle of the entire motor controller is shortened, and the efficiency is higher.
[0034] In some embodiments, the first fault signal includes an upper bridge arm signal and a lower bridge arm signal, and the PWM signal includes an upper bridge PWM signal and a lower bridge PWM signal. Figure 2 , Figure 2 A circuit connection diagram of a motor controller provided in an embodiment of the present application. Figure 2 In the embodiment shown, the hardware logic protection module 40 includes: a first AND gate 401, a second AND gate 402, a first diode 403 and a second diode 404; one input end of the first AND gate 401 is connected to the driving module 20 for inputting the upper bridge arm signal, the other input end of the first AND gate 401 is connected to the control module 30 for inputting the enable signal, the output end of the first AND gate 401 is connected to the anode of the first diode 403 for controlling the conduction or cutoff of the first diode 403; the output end of the first diode 403 is connected to the driving input end of the driving module 20 , used to change the state of the upper bridge PWM signal when the first diode 403 is turned on; one input end of the second AND gate 402 is connected to the driving module 20, used to input the lower bridge arm signal, the other input end of the second AND gate 402 is connected to the control module 30, used to input the enable signal, the output end of the second AND gate 402 is connected to the anode of the second diode 404, used to control the conduction or cutoff of the second diode 404; the output end of the second diode 404 is connected to the driving input end of the driving module 20, used to change the state of the lower bridge PWM signal when the second diode 404 is turned on.
[0035] The upper bridge arm signal monitors whether the upper bridge arm has a fault, which can be represented by Fault_T. The lower bridge arm signal monitors whether the lower bridge arm has a fault, which can be represented by Fault_B. The upper bridge PWM signal controls the on or off of the switch tube element in the upper bridge arm, and the lower bridge PWM signal controls the on or off of the switch tube element in the lower bridge arm. Figure 2 In the illustrated embodiment, the control module 30 outputs a six-phase PWM signal to control the driving module 20, and the six-phase PWM signals correspond to the six switching tube elements in the power module 10 respectively, and each phase PWM signal controls one switching tube element, wherein the upper three-bridge PWM signal controls the three switching tube elements in the upper bridge arm, which can be expressed as PWM_UT, PWM_VT, and PWM_WT, and the lower three-bridge PWM signal controls the three switching tube elements in the lower bridge arm, which can be expressed as PWM_UB, PWM_VB, and PWM_WB.
[0036] When there is an upper bridge arm fault, the control unit outputs an enable signal, which can be represented by ASC_EN. After the upper bridge arm signal and the enable signal are logically operated by the first AND gate 401, the first AND gate 401 outputs a low level, the second AND gate 402 maintains the original high level output, the first diode 403 connected to the first AND gate 401 is turned off, the second diode 404 connected to the second AND gate 402 is turned on, the upper three-bridge PWM signal is a low level, and the lower three-bridge PWM signal is a high level, and the lower bridge arm is actively short-circuited at this time; when there is a lower bridge arm fault, the control unit outputs an enable signal, and after the lower bridge arm signal and the enable signal are logically operated by the second AND gate 402, the second AND gate 402 outputs a low level, the first AND gate 401 maintains the original high level output, the second diode 404 connected to the second AND gate 402 is turned off, the first diode 403 connected to the first AND gate 401 is turned on, the upper three-bridge PWM signal is a high level, and the lower three-bridge PWM signal is a low level, and the upper bridge arm is actively short-circuited at this time. It should be noted that the first diode 403 can be either a single diode or a collection of multiple diodes. When the first diode 403 is a single diode, three signal lines are drawn from the cathode of the first diode 403 and are respectively connected to the three-bridge PWM signals. When the first diode 403 is multiple diodes, for example, there can be three diodes, and the three diodes are respectively arranged between each bridge PWM signal and the output port of the first AND gate 401. The second diode 404 is similar.
[0037] In the above scheme, the first fault signal output by the driving module 20 controls the first AND gate 401 and the second AND gate 402 to realize the conduction or disconnection of the upper bridge or lower bridge switching elements in the power module 10, so that when a bridge arm fault occurs, the faulty bridge arm can be actively short-circuited in time to protect the safety of the motor controller and the motor.
[0038] In some embodiments, the hardware logic protection module 40 also includes: a buffer 405 and a third AND gate 406; the buffer 405 is connected to the control module 30 and the driving module 20, and is used to buffer the PWM signal output by the control module 30 and input it to the driving module 20; the input end of the third AND gate 406 is connected to the driving module 20 for inputting a fault signal, and the output end of the third AND gate 406 is connected to the output enable pin of the buffer 405 for controlling the output state of the buffer 405.
[0039] The buffer 405 can isolate the control signal from the control module 30 from the driving module 20, prevent high voltage or high current from being fed back from the power stage to the control circuit, and transmit the control signal to the driving module 30. Figure 2 In the illustrated embodiment, the buffer 405 buffers the six-phase PWM signal output by the control module 30 and then inputs the buffer to the drive module 20 .
[0040] Fault signals can all be connected to the input end of the third AND gate 406. In addition to the first fault signal, fault signals can also include overcurrent fault, overvoltage fault, communication fault, control module fault, etc. When any fault occurs, the fault signal passes through the logic operation of the third AND gate 406, and the third AND gate 406 outputs a low level, and the low level passes through the output enable pin of the buffer 405 to become a high level, so that the buffer 405 presents a high impedance state, and the six-phase PWM signal output by the control module 30 is blocked and cannot be output, achieving a safe shutdown. When there is no fault, the fault signal passes through the logic operation of the third AND gate 406, and the third AND gate 406 outputs a high level, and the high level passes through the output enable pin of the buffer 405 to become a low level, and the buffer follows the control unit to output the PWM signal, and the motor controller works normally. Figure 2 In the embodiment shown, the output enable pin of buffer 405 is used express.
[0041] In the above scheme, the third AND gate 406 is controlled according to the fault signal to change the output state of the buffer 405, so that when a fault occurs, the buffer 405 can quickly cut off the PWM signal output by the control module 30 to protect the safety of the motor controller and the motor.
[0042] In some embodiments, the control module 30 is further configured to: change the state of the output PWM signal based on the fault signal to protect the motor controller and the motor through software logic.
[0043] When the fault signal reflects the existence of a fault, in addition to the hardware logic protection module 40 taking prompt action to make corresponding processing, the control module 30 also changes the state of the output PWM signal based on the fault signal to perform software logic protection on the motor controller and the motor. For example, Figure 2In the illustrated embodiment, when there is an overcurrent fault and / or an overvoltage fault, the control module 30 directly shuts off the output of the six-phase PWM signal; when there is an upper bridge arm fault, the control module 30 outputs a low-level upper three-bridge PWM signal and a high-level lower three-bridge PWM signal, so that the drive module 20 performs an active short circuit of the lower bridge arm; when there is a lower bridge arm fault, the control module 30 outputs a high-level upper three-bridge PWM signal and a low-level lower three-bridge PWM signal, so that the drive module 20 performs an active short circuit of the upper bridge arm.
[0044] In the above scheme, software control is added on the basis of the hardware logic protection module 40. Software protection and hardware protection can independently protect the motor controller and the motor at the same time. When the two work at the same time, they will not grab hardware resources and complement each other. When the software protection path fails, the hardware protection path can continue to work. When the hardware protection path fails, the software protection path can also continue to work, thereby realizing double safety logic protection and improving the safety level.
[0045] In some embodiments, the fault signal also includes a second fault signal, and the motor controller also includes: a fault detection module 50, which is connected to the control module 30 and the hardware logic protection module 40, and is used to detect whether the motor has an overcurrent fault and / or an overvoltage fault, and change the state of the output second fault signal when a fault is detected in the motor.
[0046] exist Figure 2 In the illustrated embodiment, an overcurrent fault is represented by OC, and an overvoltage fault is represented by OV. Both the overcurrent fault and the overvoltage fault are connected to the control module 30 and the hardware logic protection module 40 .
[0047] In the above scheme, the fault detection module 50 can monitor whether there is an overcurrent fault and an overvoltage fault, and feed back to the hardware logic protection module 40 and the control module 30, so as to achieve dual safety protection for the motor controller and the motor.
[0048] In some embodiments, the fault detection module 50 includes: a sampling unit, used to collect electrical signals from the motor controller, wherein the electrical signals include voltage signals and / or current information; a fault detection unit, connected to the sampling unit, used to determine whether the motor controller has an overcurrent fault and / or an overvoltage fault based on the electrical signals.
[0049] exist Figure 2 In the embodiment shown, the sampling unit includes a bus voltage sampling unit and a current sampling unit, wherein the bus voltage sampling unit is used to detect overvoltage faults and the current sampling unit is used to detect overcurrent faults.
[0050] In the above scheme, the sampling unit collects electrical signals, and the fault detection unit determines overcurrent and overvoltage faults, which facilitates fault troubleshooting and maintenance and improves the sensitivity and accuracy of fault detection.
[0051] In some embodiments, the enable signal maintains a low level when the motor controller has no upper bridge arm fault and lower bridge arm fault, and is a high level when an upper bridge arm fault or a lower bridge arm fault occurs.
[0052] exist Figure 2 In the illustrated embodiment, the enable signal ASC_EN maintains a low level when the motor controller has no upper bridge arm fault and lower bridge arm fault, and is a high level when an upper bridge arm fault or a lower bridge arm fault occurs.
[0053] In the above solution, the level state of the enable signal cooperates with the hardware logic protection module 40 to perform safety protection on the motor controller and the motor.
[0054] In some embodiments, the fault signal maintains a high level when there is no corresponding fault in the motor controller, and is a low level when there is a corresponding fault.
[0055] exist Figure 2 In the embodiment shown, the fault signals OC, OV, Fault_T, and Fault_B maintain a high level when there is no corresponding fault in the motor controller, and are low level when there is a corresponding fault. Specifically, when there is no fault, OC is high level, and when there is an overcurrent fault, OC is low level, and the same is true for other fault signals.
[0056] In the above solution, the level state of the fault signal cooperates with the hardware logic protection module 40 and the control module 30 to provide safety protection for the motor controller and the motor.
[0057] In some embodiments, the motor controller further includes: a power supply unit 60, which is used to supply power to the motor controller and stop supplying power when a failure occurs in the motor controller.
[0058] The power supply unit 60 supplies power to the entire motor controller and communicates with the control module 30 at the same time. The communication method is not limited, for example, it can be SPI communication, I2C communication, CAN communication, etc.
[0059] In the above scheme, when a fault is detected in the motor controller, the power supply can be shut down in time to protect the motor controller and the motor, which has the highest safety protection priority.
[0060] The present application also provides a vehicle, the vehicle comprising the motor controller described in any of the above embodiments.
[0061] The above description is only an embodiment of the present application and is not intended to limit the protection scope of the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A motor controller, characterized in that: include: Power module, used to connect the motor; a driving module connected to the power module, configured to drive the motor to work by controlling the power module, and to change a state of a first fault signal outputted when an upper bridge arm fault and / or a lower bridge arm fault occurs in the power module; a control module connected to the driving module, configured to control the driving module through an output PWM signal, and to change a state of an output enable signal based on a fault signal, wherein the fault signal includes the first fault signal, and the enable signal is configured to enable the driving module to perform an active short circuit when an upper bridge arm fault and / or a lower bridge arm fault occurs; A hardware logic protection module is connected to the driving module and the control module, and is used to perform hardware logic protection on the motor controller and the motor based on the enable signal and the fault signal.
2. The motor controller according to claim 1, characterized in that: The first fault signal includes an upper bridge arm signal and a lower bridge arm signal, the PWM signal includes an upper bridge PWM signal and a lower bridge PWM signal, and the hardware logic protection module includes: a first AND gate, a second AND gate, a first diode and a second diode; One input end of the first AND gate is connected to the driving module for inputting the upper bridge arm signal, another input end of the first AND gate is connected to the control module for inputting the enable signal, and an output end of the first AND gate is connected to the anode of the first diode for controlling the conduction or cutoff of the first diode; The output end of the first diode is connected to the driving input end of the driving module, and is used to change the state of the upper bridge PWM signal when the first diode is turned on; One input end of the second AND gate is connected to the driving module for inputting the lower bridge arm signal, another input end of the second AND gate is connected to the control module for inputting the enable signal, and an output end of the second AND gate is connected to the anode of the second diode for controlling the conduction or cutoff of the second diode; The output end of the second diode is connected to the driving input end of the driving module, and is used to change the state of the lower bridge PWM signal when the second diode is turned on.
3. The motor controller according to claim 2, characterized in that: The hardware logic protection module further includes: a buffer, a third AND gate; The buffer is connected to the control module and the driving module, and is used for buffering the PWM signal output by the control module and then inputting it into the driving module; The input end of the third AND gate is connected to the driving module for inputting the fault signal, and the output end of the third AND gate is connected to the output enable pin of the buffer for controlling the output state of the buffer.
4. The motor controller according to any one of claims 1 to 3, characterized in that: The control module is also used for: The state of the output PWM signal is changed based on the fault signal to protect the motor controller and the motor through software logic.
5. The motor controller according to any one of claims 1 to 3, characterized in that: The fault signal further includes a second fault signal, and the motor controller further includes: The fault detection module is connected to the control module and the hardware logic protection module, and is used to detect whether the motor has an overcurrent fault and / or an overvoltage fault, and to change the state of the output second fault signal when a fault is detected in the motor.
6. The motor controller according to claim 5, characterized in that: The fault detection module comprises: A sampling unit, used for collecting an electrical signal of the motor controller, wherein the electrical signal includes a voltage signal and / or current information; A fault detection unit is connected to the sampling unit and is used to determine whether the motor controller has an overcurrent fault and / or an overvoltage fault based on the electrical signal.
7. The motor controller according to claim 5, characterized in that: The enable signal maintains a low level when there is no upper bridge arm fault and a lower bridge arm fault in the motor controller, and is a high level when there is an upper bridge arm fault or a lower bridge arm fault.
8. The motor controller according to claim 7, characterized in that: The fault signal maintains a high level when there is no corresponding fault in the motor controller, and is a low level when there is a corresponding fault.
9. The motor controller according to claim 1, characterized in that: The motor controller further comprises: A power supply unit is used to supply power to the motor controller and stop supplying power when a fault occurs in the motor controller.
10. A vehicle, characterized in that: Comprising a motor controller as described in any one of claims 1-9.