Articles relating to integrated circuit modules and smart cards
By adopting a combination structure of non-conductive substrate, through-hole, conductive pad and solder pad in smart cards, the direct attachment and contactless connection of the integrated circuit chip to the antenna are achieved, and the contactless and contactless connection in the prior art are solved. The interface layout problem improves the reliability and production efficiency of smart cards.
Patent Information
- Application Number
- CN202380044235.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-03-22
- Filing Date
- 2023-09-27
- Publication Date
- 2025-01-10
AI Technical Summary
The manufacturing methods and structures of existing dual-interface smart cards have problems with the layout of contact and non-contact interfaces, making it difficult to achieve efficient and reliable electrical signal transmission and heat transmission, and the cost is high.
Using a combination structure of a non-conductive substrate, multiple through holes, conductive pads, conductive traces and solder pads, the direct attachment and contactless connection of the integrated circuit chip to the antenna is realized through conductive coupling and inductive coupling technology. , combined with the design of surface-mounted solder pads and solder resist layer, optimize the circuit layout and connection method of smart cards.
It improves the reliability and life of smart cards, reduces production costs, realizes efficient electrical signal transmission and heat transmission, and enhances the reliability and production efficiency of smart cards.
Smart Images

Figure CN119301603A_ABST
Abstract
Description
Field of the Invention
[0001] Embodiments of the present invention relate to integrated circuit (IC) modules with direct chip attachment, smart cards or devices including such IC modules, carriers for manufacturing such modules; and methods for manufacturing such carriers, IC modules, and smart cards or devices. Background Art
[0002] The dual-interface smart card includes an IC module that provides a direct contact interface and a contactless interface (hereinafter referred to as a "dual-interface integrated circuit module"). Although there are various arrangements of dual-interface IC modules and dual-interface smart cards and methods of manufacturing the same, it is desirable to provide options that can be used in the art and address known issues with existing arrangements. Summary of the invention
[0003] According to a first aspect, an article comprises:
[0004] a non-conductive substrate having a front side and a back side and a plurality of through holes extending from the front side to the back side;
[0005] a smart card contact area, which is arranged on the front side of the substrate and has a plurality of conductive pads, the plurality of conductive pads are insulated from each other and close the front side ends of the plurality of through holes;
[0006] a plurality of through-hole pads and a plurality of conductive traces arranged on the back side of the substrate, wherein the plurality of through-hole pads are arranged at back-side ends of the plurality of through-holes, wherein the plurality of conductive traces are conductively coupled to the plurality of through-hole pads, respectively; and
[0007] A solder resist layer at least partially covers the plurality of conductive traces.
[0008] In an embodiment of the first aspect, the article further includes: a first solder arranged in a first subset of the plurality of through vias and on a first subset of the plurality of through via pads, and configured to conductively couple the first subset of the plurality of conductive pads to the first subset of the plurality of conductive traces.
[0009] In an embodiment of the first aspect, the article of the first embodiment further comprises: an integrated circuit chip conductively coupled to the first subset of the plurality of conductive traces by direct chip attach, thereby conductively coupling the integrated circuit chip to the first subset of the plurality of conductive pads.
[0010] In an embodiment of the first aspect, the article further comprises:
[0011] an underfill material interposed between the integrated circuit chip and the back side of the substrate and / or an encapsulant provided on the integrated circuit chip,
[0012] The rear end portions of the plurality of through holes are substantially free of the underfill material, the solder resist layer and / or the encapsulant.
[0013] In an embodiment of the first aspect, the article further comprises:
[0014] a second solder material disposed in a second subset of the plurality of through vias and on a second subset of the plurality of through via pads, wherein the second subset of the plurality of pads and the second solder material are capable of cooperating to provide a plurality of antenna connection pads,
[0015] wherein the integrated circuit chip is conductively coupled to the second subset of the plurality of via pads via the second subset of the plurality of conductive traces, the article further comprising:
[0016] An antenna is conductively coupled to the plurality of antenna connection pads, thereby conductively coupling the antenna to the integrated circuit chip.
[0017] In an embodiment of the first aspect, the article further comprises:
[0018] a biometric identification circuit conductively coupled to the integrated circuit chip; and / or
[0019] A light emitting diode circuit includes at least one light emitting diode module and a second antenna conductively coupled to the at least one light emitting diode module, wherein the second antenna is configured to be inductively coupled to a contactless reader to operate the at least one light emitting diode module.
[0020] In an embodiment of the first aspect, the article further comprises:
[0021] a plurality of surface mount pads disposed on the back side of the substrate and conductively coupled to the first subset of the plurality of through-hole pads through the first subset of the plurality of conductive traces; and
[0022] The integrated circuit chip is disposed below the smart card contact area and conductively coupled to the plurality of surface mount pads.
[0023] In an embodiment of the first aspect, the second subset of the plurality of through vias is non-directly opposed relative to the integrated circuit chip.
[0024] In an embodiment of the first aspect, at least some of the plurality of conductive pads are arranged in an array of rows and columns, wherein the second subset of the plurality of through holes are arranged in different rows and columns.
[0025] In an embodiment of the first aspect, one of the second subset of the plurality of through-vias is arranged at a C6 pin position according to ISO 7816.
[0026] In an embodiment of the first aspect, the integrated circuit chip is arranged offset relative to the smart card contact area.
[0027] In an embodiment of the first aspect, the size of the substrate is set according to ISO 7810 and according to the size of ID-1, half the size of ID-1 or one quarter the size of ID-1.
[0028] In an embodiment of the first aspect, the substrate, the smart card contact areas, the plurality of through-hole pads, the plurality of conductive traces, the solder resist layer, the first solder and the second solder are provided as a printed circuit board.
[0029] In an embodiment of the first aspect, the plurality of conductive traces comprises a module antenna at least partially surrounding the plurality of through-via pads.
[0030] According to a second aspect, a smart card comprises:
[0031] A laminate core comprising a plurality of laminate layers, wherein one of the laminate layers comprises the article of any described embodiment.
[0032] According to a third aspect, a method for manufacturing an integrated circuit module, the method comprising:
[0033] conductively coupling an integrated circuit chip to the first subset of the plurality of conductive traces of the article of any described embodiment, thereby conductively coupling the integrated circuit chip to a plurality of contact pins; and
[0034] An underfill material is provided between the integrated circuit chip and the substrate, and an encapsulant is provided on the integrated circuit chip, including leaving the backside ends of the plurality of through holes substantially free of the underfill material, the solder resist layer and / or the encapsulant.
[0035] According to a fourth aspect, a method for manufacturing a smart card comprises:
[0036] An antenna is conductively coupled to the plurality of antenna connection pads of any described embodiment, thereby conductively coupling the antenna to the integrated circuit chip.
[0037] According to a fifth aspect, a method for manufacturing an article comprises:
[0038] perforating a non-conductive substrate to create a plurality of through holes extending from a front side to a back side of the substrate;
[0039] Plating a smart card contact area on the front side of the substrate, the smart card contact area having a plurality of conductive pads, the plurality of conductive pads being insulated from each other and closing the front end portions of the plurality of through holes;
[0040] plating a plurality of through-hole pads on the rear side of the substrate, wherein the plurality of through-hole pads are arranged at the rear end side of the plurality of through-holes;
[0041] plating a plurality of conductive traces on the back side of the substrate, wherein the plurality of conductive traces are conductively coupled to the plurality of through-hole pads; and
[0042] A solder resist layer is applied at least partially covering the plurality of conductive traces.
[0043] In an embodiment of the fifth aspect, the method further comprises:
[0044] A first solder is deposited in a first subset of the plurality of vias and on a first subset of the plurality of via pads, wherein the first solder is configured to conductively couple the first subset of the plurality of conductive pads to a first subset of the plurality of conductive traces through the first subset of the plurality of via pads.
[0045] In an embodiment of the fifth aspect, the method further comprises:
[0046] depositing a second solder in a second subset of the plurality of vias and on a second subset of the plurality of pads, thereby allowing the second subset of the plurality of via pads and the second solder to cooperatively provide a plurality of antenna connection pads;
[0047] depositing a third solder on a plurality of surface mount pads at ends of the plurality of conductive traces distal from the plurality of through-hole pads;
[0048] placing an integrated circuit chip on the back side of the substrate; and
[0049] Reflow at least the first solder, the second solder, and the third solder, thereby conductively coupling the integrated circuit chip to the first subset of the plurality of conductive pads through the first subset of the plurality of conductive traces, and conductively coupling the integrated circuit chip to the second subset of the plurality of through-hole pads.
[0050] In an embodiment of the fifth aspect, the method further comprises:
[0051] providing an underfill material interposed between the integrated circuit chip and the substrate;
[0052] providing an encapsulant on the integrated circuit chip;
[0053] The backside ends of the plurality of through-holes are kept substantially free of the underfill material, the solder resist layer and / or the encapsulant.
[0054] In an embodiment of the fifth aspect, the integrated circuit chip is conductively coupled to the second subset of the plurality of pads through the second subset of the plurality of conductive traces, and the method further comprises:
[0055] An antenna is conductively coupled to the plurality of antenna connection pads, thereby conductively coupling the antenna to the integrated circuit chip.
[0056] According to a sixth aspect, an integrated circuit module for a smart card having a contact interface and a contactless interface is provided. The integrated circuit module comprises:
[0057] a non-conductive substrate having a plurality of through-holes extending from a front side to a back side of the substrate, wherein the plurality of through-holes comprises a first subset, a second subset, and a third subset of the plurality of through-holes;
[0058] a smart card contact area arranged on the front side of the substrate and having a plurality of conductive pads, the plurality of conductive pads comprising a first subset of the plurality of conductive pads and a second subset of the plurality of conductive pads, the first subset of the plurality of conductive pads being arranged to respectively close the first subset of the plurality of through holes, the second subset of the plurality of conductive pads being arranged to close the second subset and the third subset of the plurality of through holes;
[0059] an integrated circuit chip disposed on the back side of the substrate;
[0060] a plurality of conductive elements that traverse the first subset and the third subset of the plurality of vias and conductively couple the first subset and the second subset of the plurality of conductive pads to the integrated circuit chip; and
[0061] an encapsulant deposited in the first subset and the third subset of the plurality of through-vias, wherein the encapsulant is further deposited on the integrated circuit chip and the plurality of conductive elements,
[0062] wherein the second subset of the plurality of through-vias is separated from the third set of the plurality of through-vias by the substrate,
[0063] The second subset of the plurality of through vias is non-directly opposed relative to the integrated circuit chip.
[0064] In an embodiment of the sixth aspect, at least some of the plurality of conductive pads are arranged in an array of rows and columns, wherein the second subset of the plurality of through holes are arranged in different rows and columns.
[0065] In an embodiment of the sixth aspect, one of the second subset of the plurality of conductive pads comprises a region that traverses more than one row and column.
[0066] In an embodiment of the sixth aspect, the encapsulant is further deposited in at least one of the second subset of the plurality of through-holes.
[0067] In an embodiment of the sixth aspect, at least one of the second subset of the plurality of through holes is adapted to receive the enclosure.
[0068] In an embodiment of the sixth aspect, one of the second subset of the plurality of conductive pads is arranged at a C6 pin position in accordance with ISO 7816.
[0069] According to a seventh aspect, a smart card having a contact interface and a contactless interface is provided. The smart card comprises:
[0070] a card body having an opening and an antenna; and
[0071] The integrated circuit module of any described embodiment disposed in the opening;
[0072] A pair of antenna connection elements are disposed in the second subset of the plurality of vias and conductively couple the antenna to the second subset of the plurality of conductive pads.
[0073] In an embodiment of the seventh aspect, each of the antenna connection elements comprises a rigid conductive or solder bump, a conductive pad, a flexible conductive bump comprising a conductive adhesive, or a portion of the antenna.
[0074] In an embodiment of the seventh aspect, each of the second subset of the plurality of through holes is adapted to receive at most one conductive element.
[0075] According to an eighth aspect, a single-sided plated integrated circuit carrier tape suitable for a smart card having a contact interface and a contactless interface is provided. The integrated circuit carrier tape comprises:
[0076] a non-conductive substrate having a plurality of through-holes extending from a front side to a back side of the substrate, wherein the back side of the substrate is adapted to have an integrated circuit chip disposed thereon, wherein the plurality of through-holes comprises a first subset, a second subset, and a third subset of the plurality of through-holes;
[0077] a smart card contact area arranged on the front side of the substrate and having a plurality of conductive pads, the plurality of conductive pads comprising a first subset of the plurality of conductive pads and a second subset of the plurality of conductive pads, the first subset of the plurality of conductive pads being arranged to respectively close the first subset of the plurality of through holes, the second subset of the plurality of conductive pads being arranged to close the second subset and the third subset of the plurality of through holes;
[0078] wherein the first subset and the third subset of the plurality of through-holes are adapted to receive a plurality of conductive elements to conductively couple the first subset and the second subset of the plurality of conductive pads to the integrated circuit chip; and
[0079] wherein the first and third subsets of the plurality of through-holes, the integrated circuit chip, and the plurality of conductive elements are adapted to receive an encapsulant,
[0080] wherein the second subset of the plurality of through-vias is separated from the third set of the plurality of through-vias by the substrate,
[0081] The second subset of the plurality of through vias is non-directly opposed relative to the integrated circuit chip.
[0082] In an embodiment of the eighth aspect, the plurality of conductive pads are arranged in an array of rows and columns, wherein the second subset of the plurality of through holes is provided at some of the plurality of conductive pads, and the second subset of the plurality of through holes is arranged in different rows and columns.
[0083] In an embodiment of the eighth aspect, an area of one of the second subset of the plurality of conductive pads traverses more than one row and column.
[0084] In an embodiment of the eighth aspect, at least one of the second subset of the plurality of through holes is adapted to receive the enclosure.
[0085] In an embodiment of the eighth aspect, one of the second subset of the plurality of conductive pads is arranged at a C6 pin position in accordance with ISO 7816. BRIEF DESCRIPTION OF THE DRAWINGS
[0086] Figure 1A showing a front view of a carrier tape or IC module according to an embodiment;
[0087] Figure 1B exhibit Figure 1A A rear view of the carrier tape;
[0088] Figure 1C exhibit Figure 1A Rear view of the IC module;
[0089] Figure 1Dproviding a cross-sectional view along line 1D-1D;
[0090] Figure 1E Another rear view of the IC module is provided;
[0091] Figure 1F A cross-sectional view along line 1F-1F is provided;
[0092] Figure 1G A rear view of a carrier tape with a module antenna according to an embodiment is shown;
[0093] Figure 2A A card structure with a stacked die arrangement is shown, wherein only the IC module is shown and other components are omitted to avoid confusion;
[0094] Figure 2B showing a circuit board inlay removed from a card structure according to an embodiment;
[0095] Figure 2C exhibit Figure 2B A side view of a circuit board inlay;
[0096] Figure 2D showing a circuit board inlay removed from a card structure according to another embodiment;
[0097] Figure 2E showing a circuit board inlay removed from a card structure according to another embodiment;
[0098] Figure 2F showing a circuit board inlay removed from a card structure according to another embodiment;
[0099] Figure 2G exhibit Figure 2F A perspective rear view of a circuit board inlay;
[0100] Figure 3A An example of an exploded view showing a smart card provided in the size of ID-1;
[0101] Figure 3B An example of an exploded view showing a smart card provided at half the size of ID-1;
[0102] Figure 3C An example of an exploded view showing a smart card provided in a quarter of the size of an ID-1;
[0103] Figure 4A and 4B The PCB substrates provided in half the size of ID-1 and one quarter the size of ID-1 are shown respectively;
[0104] Figure 5A showing a front view of a carrier tape or IC module according to an embodiment;
[0105] Figure 5B exhibit Figure 5A A rear view of the carrier tape;
[0106] Figure 5C exhibit Figure 5A Rear view of the IC module;
[0107] Fig. 6A Providing a process sequence for manufacturing IC modules;
[0108] Figure 6B Provide a process sequence for manufacturing smart cards;
[0109] Fig. 7A showing a front view of a carrier tape or IC module according to an embodiment;
[0110] Figure 7B Demonstrating the Fig. 7A A perspective view of the front side of the IC module; and
[0111] Figure 7C Demonstrating the Fig. 7A A perspective view of the front side of the IC module is obtained. DETAILED DESCRIPTION
[0112] In the following description, many specific details are set forth in order to provide a thorough understanding of various illustrative embodiments of the present invention. However, it will be appreciated by those of ordinary skill in the art that embodiments of the present invention may be practiced without some or all of these specific details. It should be understood that the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the scope of the present invention. In the drawings, all of the several figures refer to the same or similar functions or features with the same reference numerals or numbers.
[0113] Embodiments described in the context of one of an apparatus or method are similarly valid for the other apparatus or method. Similarly, embodiments described in the context of an apparatus are similarly valid for the method, and vice versa.
[0114] Features described in the context of an embodiment may be correspondingly applicable to the same or similar features in other embodiments. Features described in the context of an embodiment may be correspondingly applicable to other embodiments, even if not explicitly described in these other embodiments. In addition, additions and / or combinations and / or alternatives described for features in the context of an embodiment may be correspondingly applicable to the same or similar features in other embodiments.
[0115] It should be understood that the articles "one" and "said" used with respect to features or elements include references to one or more of the features or elements. The term "and / or" includes any and all combinations of one or more of the associated features or elements. The terms "include", "include" and "have" are intended to be open and mean that there may be additional features or elements in addition to the listed features or elements. For example, identifiers such as "first", "second", and "third" are only used as labels, and do not wish to impose numerical requirements on their objects, nor are they interpreted in a manner that imposes any relative position or time sequence between restrictions. In addition, the terms such as "front", "back", "top", "bottom", "side", "below", "above", "on", "to ..." used herein are only for ease of description, and may refer to the orientation of features or elements as shown in the figure. It should be understood that any orientation of the features described herein is within the scope of the present invention.
[0116] The phrase "conductively coupled" and related phrases include reference to transferring power or current between elements through physical contact or a conductive medium. The phrase "inductively coupled" and related phrases include reference to transferring power or current between elements through electromagnetic induction or a co-varying magnetic field, i.e., without physical contact between the elements.
[0117] The phrase "printed circuit board" may refer to a non-conductive board base having conductive traces and / or circuits arranged therein and / or thereon to provide a path for electrical current. Electronic components are soldered to the board, specifically, to conductive pads that are connected to the board circuitry.
[0118] According to some aspects of the present invention, an article is provided, namely a carrier tape for an IC module. Figure 1A and 1B Non-limiting examples of carrier tapes are provided as described below.
[0119] Figure 1A and 1B A front view and a rear view are shown, respectively, of a carrier tape 10 that may be provided as a printed circuit board (PCB).
[0120] The carrier tape 10 comprises: a non-conductive substrate 11 having a front side or contact side (which may be referred to as a first side) and a back side or bonding side (which may be referred to as a second side); a plurality of through holes 13, 14 extending through the substrate 11, for example from the front side to the back side; and conductive layers, such as conductive pads, conductive traces and solder pads, which are arranged on the front side and the back side, for example by plating and / or etching.
[0121] The through holes 13, 14 include a first subset 13 and a second subset 14 of the through holes. Each through hole 13, 14 has opposite openings or ends, such as a front end and a rear end located at the front and rear sides of the non-conductive substrate 11, respectively. The through holes 13, 14 may have different sizes and / or shapes. In some non-limiting examples, the second subset 14 of through holes has a larger size or area than the first subset 13 of through holes. For example, the diameter of the first subset 13 of through holes may be about 0.6 mm to about 0.9 mm, while the diameter of the second subset 14 of through holes may be about 2.0 mm. However, in other non-limiting examples, the second subset 14 of through holes may have a similar size or area relative to the first subset 13 of through holes. In other other non-limiting examples, some through holes may have similar sizes or areas, while some other through holes may have different sizes or areas. The first subset 13 and / or the second subset 14 of through holes may adopt one or more shapes, such as regular shapes, irregular shapes. Non-limiting examples include circles, rounded rectangles, L-shapes, ovals, polygons, combinations of interconnected or overlapping regular shapes.The shapes of the first subset 13 and / or second subset 14 of through-holes may be similar and / or different.
[0122] The first subset of through-holes 13 may be referred to as chip bonding holes configured to receive a conductive element, such as solder, configured to be conductively coupled to the IC chip 31. The second subset of through-holes 14 may be referred to as heat transfer holes configured to receive a heat transfer medium, such as solder.
[0123] The smart card contact area 16 is arranged on the front side of the substrate 11 and closes the front ends of the through holes 13 and 14. The smart card contact area 16 includes a plurality of conductive pads 17 and 18, at least some of which are conductively insulated from each other. The conductive pads 17 and 18 can be sized, shaped and arranged according to the International Organization for Standardization (ISO) standard for manufacturing smart cards. According to the ISO 7810 standard, the size of the smart card contact area 16 can be about 85.60 mm×53.98 mm. The conductive pads 17 and 18 can be made of metal, such as copper, nickel. The conductive pads 17 and 18 include a first subset 17 and a second subset 18 of the conductive pads. Each conductive pad 17 in the first subset 17 includes an outer side and an inner side, so that in operation, the outer side is in electrical contact with a contact-type smart card reader or electronic terminal to allow signal transmission between the card reader and an IC chip electrically connected to the smart card contact area 16, while the inner side is accessible through a corresponding through hole to allow a conductive element such as solder to be placed therein to establish an electrical connection with the conductive pad. However, each conductive pad 18 in the second subset 18 of conductive pads may not be in electrical contact with a contact-type smart card reader or electronic terminal.
[0124] For example, the first subset 17 of conductive pads may be arranged according to the C1, C2, C3, C5, C6, C7 pin locations of ISO 7816, and thus they may be referred to as contact pads. The second subset 18 of conductive pads may be arranged between C1 and C5, between C3 and C7, and / or other locations. Alternatively, in some other embodiments (not shown), the second subset 18 of conductive pads may be arranged according to the C4 and C8 pin locations of ISO 7816. The second subset 18 of conductive pads may be referred to as heat transfer pads.
[0125] On the back side of the non-conductive substrate 11, a plurality of pads 21, 22, 23, 24, a plurality of conductive traces 25, 26 and a solder resist ink 27 are arranged thereon. The pads 21, 22, 23, 24 include through-hole pads 21, 22 (e.g., Figure 1B ), and surface mount pads 23, 24 (e.g., as shown in Figure 1B Specifically, the through-hole pads 21, 22 are arranged at the rear ends of the through-holes 13, 14, respectively, for example, adjacent to the rear ends. The through-hole pads 21, 22 include a first subset 21 of through-hole pads and a second subset 22 of through-hole pads, the first subset 21 of through-hole pads being arranged at the rear ends of the first subset 13 of through-holes, and the second subset 22 of through-hole pads being arranged at the rear ends of the second subset 14 of through-holes. The surface-mount pads 23, 24 include a first subset 23 and a second subset 24 of surface-mount pads.
[0126] Conductive traces 25, 26 conductively couple the through-hole pads 21, 22 to the surface mount pads 23, 24, respectively. Conductive traces 25, 26 include a first subset of conductive traces 25 conductively coupled between the first subset of through-hole pads 21 and the first subset of surface mount pads 23, and a second subset of conductive traces 26 conductively coupled between the second subset of through-hole pads 22 and the second subset of surface mount pads 24.
[0127] The solder resist ink 27 is deposited on the back side of the substrate 11 to define a solder-free area and / or a solder area. Specifically, the solder resist ink 27 may be at least partially deposited on or cover the conductive traces 25, 26, and / or at least partially deposited on or cover the solder pads 21, 22, 23, 24. Therefore, the solder pads 21, 22, 23, 24 are at least partially or mostly free of solder resist ink.
[0128] In preparation for manufacturing the IC module 30 , the carrier tape 10 may be provided with the first solder 33 , the second solder 34 , and the third solder 35 .
[0129] The first solder 33 may be disposed (eg, deposited) in the first subset of vias 13 and on the first subset of via pads 21 and configured to conductively couple the first subset of conductive pads 17 to the first subset of conductive traces 25 after reflow.
[0130] A second solder 34 may be arranged (eg, deposited) in the second subset of vias 14 and on the second subset of via pads 22. The second subset of pads 22 and the second solder 34 may cooperate to provide a plurality of antenna connection pads (collectively 22, 34).
[0131] The third solder may be arranged (eg, deposited) on the surface mount pads 23 , 24 .
[0132] According to some aspects of the invention, articles of manufacture are provided, such as IC modules with direct die attach. Figures 1C to 1F Provided by Figure 1A and 1B A non-limiting example of an IC module 30 on a carrier tape 10 .
[0133] Figure 1A and 1C The front view and the back view of the IC module 30 are shown respectively. Figure 1D Provide along Figure 1C A cross-sectional view along line 1D-1D. Figure 1E Another rear view of IC module 30 is shown. Figure 1F Provide along Figure 1E A cross-sectional view along line 1F-1F.
[0134] On the back side of the carrier tape 10, an IC chip 31 is mounted to the carrier tape 10 by direct chip attach. The IC chip 31 is conductively coupled to a first subset 17 of conductive pads, such as C1, C2, C3, C5, and C7. Specifically, the IC chip 31 is conductively coupled to a first subset 23 of surface mount pads through a third reflow solder 35 thereon, the first subset 23 of surface mount pads is conductively coupled to a first subset 26 of conductive traces, the first subset 26 of conductive traces is conductively coupled to a first subset 21 of through hole pads, the first subset 21 of through hole pads is conductively coupled to a first subset 17 of conductive pads through a reflow first solder 33 arranged in a first subset 13 of through holes. In other words, a current path is provided between the IC chip 31 and each of the first subset 17 of conductive pads, so that when the smart card conductive area 16 is arranged in electrical contact with a reader, the IC module 30 can be operated, such as performing a card transaction.
[0135] In addition, the IC chip 31 is conductively coupled to the second subset 24 of surface mount pads through the third reflow solder 35 thereon, the second subset 24 of surface mount pads is conductively coupled to the second subset 18 of conductive traces, and the second subset 18 of conductive traces is conductively coupled to the second subset 22 of through-hole pads.
[0136] The antenna connection pads 22, 34 are opposite to the second subset 18 of conductive pads (heat transfer pads). The antenna connection pads 22, 34 may be larger than the other pads to provide a relatively large area to accommodate enough solder for connecting the antenna. At each antenna connection pad, the reflowed second solder 34 in the second subset 14 of through holes may be arranged to contact the heat transfer pad 18 located on the front side of the substrate 11. The function of this heat transfer pad 18 is to improve the heat transfer during the reflow process of connecting the antenna to the antenna connection pads 22, 34, but it is not meant to provide a current path from the IC chip 31 to the antenna 41.
[0137] In the IC module 30, the bottom filling material 37 may be provided in the gap between the first side of the IC chip 31 and the back side of the carrier tape 10. The bottom filling material 37 is used to prevent chip damage caused by mechanical stress. The encapsulant 28 may be deposited on the IC chip 31, for example, on the second side of the IC chip 31 opposite to its first side. The area covered by the bottom filling material 37, the solder mask 27 and / or the encapsulant 28 may not extend to or cover the through holes 13, 14, their reflow solder 33, 34 or the through hole pads 21, 22. In other words, the through holes 13, 14, their reflow solder 33, 34, the through hole pads 21, 22 are substantially free of the bottom filling material 37, the solder mask 27 and / or the encapsulant 28. It should be understood that in some non-limiting examples, the bottom filling material 37, the solder mask 27 and / or the encapsulant 28 may not be deposited on the IC chip 31.
[0138] According to some aspects of the present invention, the IC module 30 is included in an article (e.g., a smart card or device 40). Such an IC module may be provided by the IC module 30 described above or other IC modules not described herein. Figures 1C to 1F The IC module 30 depicts a non-limiting embodiment of a smart card or device 40 .
[0139] In the smart card or device 40, each antenna connection pad 22, 34 of the IC module 30 is conductively coupled to the antenna 41 (e.g., card antenna, metal coil) through an antenna connection element (e.g., reflow second solder 22) provided at the antenna connection pads 22, 34. After this conductive coupling, the antenna 41 is conductively coupled to the IC chip 31 through the antenna connection pads 22, 34 and the second subset 26 of the conductive traces (see the cross-sectional view along line 1F-1F). Specifically, the IC chip 31 is conductively coupled to the second subset 24 of the surface mounting pads through the reflow third solder 35 thereon, the second subset 24 of the surface mounting pads is conductively coupled to the second subset 26 of the conductive traces, and the second subset 26 of the conductive traces is conductively coupled to the antenna connection pads 22, 34. In other words, a current path is provided between the antenna 41 and the IC chip 31, wherein this path does not include the second subset 18 of the conductive pads (heat transfer pads). Although there may be contact between the reflowed second solder 34 arranged in the second subset of through holes 14 and the second subset of conductive pads (heat transfer pads) 18 due to the heat transfer function described above, there is substantially no current between the antenna 41 and the second subset of conductive pads (heat transfer pads) 18 due to the difference in conductivity between the second subset of conductive traces 26 and the reflowed second solder 34 in the second subset of through holes 14, and due to the open circuit at the second subset of conductive pads (heat transfer pads) 18. Therefore, the current to be induced in the antenna 41 will flow in the following order as expected: from the antenna 41 to the antenna connection pads 22, 34, then to the second subset of conductive traces 26, then to the corresponding one of the second subset of surface mount pads 24, and to the IC chip 31.
[0140] It should be appreciated that the carrier tape and IC module described above may be modified to include an antenna. Figure 1G A non-limiting embodiment of a carrier tape 101 is provided, which is largely similar to Figures 1B to 1F, however, at least a portion of the two antenna connection pads and their associated conductive traces are replaced by an antenna 81 (hereinafter referred to as a "module antenna"). The module antenna 81 can be formed similarly to the conductive traces. The module antenna 81 can completely surround (as shown) or partially surround (not shown) the through-hole pads 21, 22, the surface mount pads 23, 24 and / or the conductive traces 25, 26 that interconnect the through-hole pads 21, 22 with the surface mount pads 23, 24. The module antenna 81 includes a first end portion having a surface mount pad 24, which is conductively coupled to an IC chip (not shown) when the IC chip is appropriately placed on the carrier tape 101 and reflowed to produce an IC module. The module antenna 81 includes a second end portion having a through-hole pad 22, wherein the second end portion 22 is conductively coupled to provide the module antenna as an antenna loop. This conductive coupling can be provided by a conductive trace (not shown) arranged below the back side of the substrate 11 or embedded in the substrate 11. A solder resist layer (not shown) may be deposited on the back side of the substrate 11 to at least partially cover the conductive traces 25, 26, and / or at least partially cover the through hole pads 21, 22 and the surface mount pads 23. It should be understood that the solder resist layer may be similar to that described with respect to Figures 1B to 1F The solder resist layer 27 is provided in the embodiment.
[0141] Reference Figures 2A to 2G A non-limiting embodiment of a smart card or device 40 is described.
[0142] Figure 2A A card structure is shown having a laminated core arrangement 40. The laminated core 40 may include a plurality of stacked laminate layers, which may include a top cover 1, a first substrate 2 (e.g., polyvinyl chloride (PVC) material), a circuit board inlay 3 or a second substrate (e.g., PCB), a third substrate 4 (e.g., PVC material), a fourth substrate 5 (e.g., polyethylene terephthalate glycol (PETG) material), a fifth substrate 6 (e.g., PVC material), and a bottom cover 7. The laminated core 40 includes at least one IC module 31 (as shown) and other components (not shown), the at least one IC module being accommodated in a cavity of the laminated core.
[0143] It should be appreciated that the card structure may include fewer or more layers, or that the layers described above may be interchanged or modified.
[0144] Figure 2B The circuit board inlay 3 or second substrate, such as a PCB as described above, is shown removed from the card structure. Figure 2C exhibit Figure 2BSchematic side view of PCB 3. PCB 3 includes a card circuit 42 for performing card transactions and data communication operations, and the card circuit is arranged on PCB substrate 11. Card circuit 42 includes a conductor pattern 43, such as a smart card contact area, conductive traces, and the conductor pattern 43 can be formed by dry etching a metallization layer (such as aluminum) plated on substrate 11. Card circuit 42 includes at least one IC chip 31, smart card contact area 16, a plurality of conductive traces conductively coupling smart card contact area 16 to IC chip 31, and an antenna 41 (or a first antenna) conductively coupled to IC chip 31. Since IC chip 31 is arranged below smart card contacts 16, as shown in FIG. Figure 1D and 1F As shown in Figure 2B and 2C The first antenna 41 may be disposed on / under the substrate 11 or on / under other layers, and / or the first antenna 41 may be provided in different form factors and / or locations. The card circuit 42 may further include at least one central processing unit (CPU) chip 43 and a capacitor 44, such as Figure 2B and 2C As shown in , for the operation of the card circuit and the biometric circuit.
[0145] At least some of the conductive pads 17 of the smart card contact area 16 are used to provide contact-based signal transmission for a contact-based card reader, while the first antenna 41 is used to provide contactless signal transmission for a contactless card reader. The smart card contact area 16 may have a size and layout according to ISO or other industry standards. The smart card contact area 16 may be provided as a regular shape, such as a rectangle, a square; or a modified regular shape, such as a round rectangle, a round square; or an irregular or customized shape, such as a logo, a trademark, a logo, a symbol, a character, as long as the lead-out line position of the smart card contact area 16 complies with ISO or other industry standards. The irregular or customized shape may be a pattern including a regular shape and / or a modified regular shape, a representation of a known or imaginary object.
[0146] The PCB 3 may include a light emitting diode (LED) circuit 52, which may be at least partially formed on the front or back side of the PCB substrate 11 and is configured to illuminate the LED module 53, for example, when the card 40 is brought within a specified proximity of a contactless card reader to implement contactless signal transmission.
[0147] The LED circuit 52 may include an inductive circuit disposed or formed on the front side or the back side of the PCB substrate 11. The inductive circuit may include a conductor pattern, such as a conductive trace, an antenna, which may be formed by dry etching a metallization layer plated on the PCB substrate 11. The inductive circuit includes at least one LED module 53 and a second antenna 51 conductively coupled to the at least one LED module, the second antenna 51 may be a metal or an inductor coil. In operation, when the smart card 40 is brought into a prescribed proximity of a contactless card reader to implement contactless signal transmission, the second antenna 51 is inductively coupled to the oscillating magnetic field of the card reader and may be inductively coupled to the first antenna 41 of the card circuit 42. This inductive coupling generates a current in the inductive circuit to operate the LED module 53. At the same time, the first antenna 41 is inductively coupled to the oscillating magnetic field of the card reader to generate a current in the card circuit 42 to operate the IC chip 31 and any other components included in the card circuit 42.
[0148] The PCB substrate 11 may include a biometric circuit 62, which may be at least partially disposed or formed on the front side or the back side of the PCB substrate 11, and conductively coupled to the IC chip 31 through conductive traces disposed or formed on the PCB substrate 11, and configured to detect (e.g., read or receive) biometric data and provide the detected biometric data to the card reader and / or the IC chip of the card circuit 42. The biometric circuit 62 includes a conductor pattern, such as a conductive trace, which may be formed on the PCB substrate 11 by dry etching a metallization layer (e.g., aluminum) plated on the PCB substrate 11. The biometric circuit 62 includes: at least one biometric IC chip 63 (e.g., a fingerprint sensor controller chip); a biometric data sensor 64 (e.g., a fingerprint sensor), which is conductively coupled to the biometric IC chip 63; a plurality of conductive traces, which have at least one conductive trace that conductively couples the biometric sensor to the biometric IC chip; and optionally at least one capacitor.
[0149] refer to Figure 2A and 3A 3C, the cover 1 and the first substrate 2 may be provided with at least one opening to accommodate the smart card contact area 16 and / or the biometric sensor 64. Specifically, when the stacked layers are laminated, the smart card contact area 16 and / or the biometric sensor 64 protrude through one or more openings. The smart card contact area 16 and / or the biometric sensor 64 and a portion of the PCB substrate 11 may substantially fill the openings in the cover 1 and the first substrate 2. The smart card contact area 16 and / or the biometric sensor 64 may be substantially flush with the cover 1 (i.e., the outer surface of the laminate core 40). The first substrate 2 and / or one or more other substrates in the laminate core 40 may be provided with at least one opening or cavity to accommodate the LED module 53.
[0150] exist Figure 2B and 2C In the embodiment, the PCB 3 includes the card circuit 43, the LED circuit 52 and the biometric identification circuit 62, and thus the PCB substrate 11 may be substantially larger than the smart card contact area 10 or approximate the size of the final smart card or device, for example, Figures 3A to 3C In some other examples, the smart card may include a card circuit and an LED circuit or a biometric circuit. In still other examples, the PCB 3 may include a card circuit, such as Figure 2D and 2E As shown in .
[0151] exist Figure 2B and 2C In the embodiment, the card circuit 42, the first antenna 41, the LED circuit 52 and / or the biometric circuit 62 are arranged on the same side of the same PCB substrate 11. In some other examples, at least one of them or part of any circuit may be arranged on different sides of the PCB substrate 11 or on at least one different substrate.
[0152] exist Figures 2B to 2C In the embodiment, the IC chips 31, 43, 63 do not have an encapsulant. In some other examples, at least one of the IC chips may have an encapsulant.
[0153] exist Figures 2B to 2C In some other examples, the PCB 3 may include one or more IC chips.
[0154] exist Figure 2B to Figure 2C In the embodiment, the IC chips 31, 43, 63 are disposed on the same side of the same PCB substrate 11. In some other examples, at least one of the IC chips may be disposed on a different side of the PCB substrate 11 or on at least one different substrate.
[0155] exist Figures 2B to 2C In the embodiment, the first antenna 41 is basically arranged along the periphery of the smart card or device and encloses the remaining circuit. In some other examples, the first antenna 41 can be provided in other sizes or size specifications.
[0156] exist Figures 2B to 2D In the embodiment, the IC chip 31 is arranged on the rear side of the smart card contact area 16, that is, directly below the smart card contact area 16. In some other embodiments, the IC chip 31 may be arranged offset relative to the smart card contact area 16, such as Figure 2E As shown in Figure 2EIn the PCB, the IC chip 31 is not arranged directly at or on the rear side of the smart card contact area 16. Instead, the IC chip 31 is spaced apart from the smart card contact area 16 and does not overlap with the smart card contact area 16. Specifically, the IC chip 31 may be directly attached to a soldering pad, which is also spaced apart from and does not overlap with the smart card contact area 16; the soldering pad is in turn conductively coupled to the smart card contact area 16 by a conductive trace disposed on the PCB substrate 11, wherein the conductive trace is partially directly below the smart card contact area 16 and partially offset relative to the smart card contact area 16. The offset arrangement of the smart card contact area 16 relative to the IC chip 31 provides a non-aligned and non-overlapping relationship. In other words, in Figure 2E In the embodiment, the areas on the PCB substrate 11 defined by the smart card contact area 16 and the IC chip 31, respectively, are not aligned and do not overlap in a direction across the planar surface defined by the edge of the PCB substrate 11. This offset arrangement of the smart card contact area 16 relative to the IC chip 31 allows the smart card contact area 16 to take any shape, including geometric and non-geometric shapes, and reduces the risk of damaging the IC chip 31 even when the smart card contact area 16 is repeatedly used by interfacing with a contact reader.
[0157] Figure 2E The embodiment has conductive traces formed on the PCB substrate 11 that conductively couple the IC chip 31 to the antenna 41, Figure 2E Examples and Figures 1B to 1F The embodiments may differ in that, Figure 2E The antenna connection pads below the smart card contact area 16 may not be included. In other words, Figure 2E A second subset of vias, a second subset of via pads, a second subset of conductive traces, and a second subset of surface mount pads may not be included. Figure 2E In some other examples, the PCB 3 may further include an LED and / or a biometric identification circuit.
[0158] Figure 2F Provides much like Figure 2D PCB 3, however, Figure 2F The IC module 301 includes Figure 1G The carrier tape 101 is configured to be inductively coupled to the card antenna 41 during operation, that is, the card antenna 41 is arranged to be inductively close to the module antenna 81. In other words, in the case of Figure 2FIn the smart card or device of the PCB 3, the module antenna 81 is not conductively or physically coupled to the card antenna 41. In operation, when the smart card is brought into the prescribed proximity of the contactless card reader to implement contactless signal transmission, the module antenna 81 is inductively coupled with the oscillating magnetic field of the card reader and with the card antenna 41. This inductive coupling generates current to operate the IC chip of the IC module 301. Figure 2F The front view of PCB 3 is shown, and Figure 2G exhibit Figure 2F A perspective rear view of PCB 3.
[0159] Figure 3A An example of a smart card provided in the size of an ID-1 is shown, for example 85.60 mm x 53.98 mm according to the ISO 7810 standard or thereabouts.
[0160] Figure 3B An example of a smart card provided in half the size of ID- 1 is shown. Thus, the size of ID- 1 can include two smart cards.
[0161] Figure 3C An example of a smart card provided in a quarter of the size of ID- 1 is shown. Thus, the size of ID- 1 can include four smart cards.
[0162] therefore, Figures 3A to 3C The size of the PCB substrate 11 of the example shown in can be set according to the size of ID-1, half the size of ID-1, or one-quarter the size of ID-1.
[0163] The smart card may have other sizes or form factors. For example, the smart card or device may be configured as a plug-in subscriber identity module (SIM) device, SIM card.
[0164] It should be understood that the smart card or device described above can be provided or included in various application scenarios, including but not limited to banking, finance, payment, identification, health, telecommunications, communication, and storage.
[0165] Figure 4A and 4B A large sheet of multiple PCBs 3 having half the size of ID-1 and a quarter the size of ID-1 is shown. Multiple PCBs 3 can provide Figure 2E The circuit board inlay 3 or the second substrate is to be stacked between other layers, laminated to provide a plurality of laminated cores, and divided to provide a plurality of smart cards or devices.
[0166] In some embodiments, a carrier tape and IC module may be provided with antenna connection pads that are non-diametrically opposite or located on a proximal side of the IC chip or smart card contact areas with respect to the IC chip.
[0167] Figures 5A to 5C Provides much like Figures 1B to 1F In a non-limiting embodiment of the example, however, one of the antenna connection pads is arranged at the C6 pin position according to ISO 7816, for example below the C6 pin position.
[0168] Figure 5A A front view showing the carrier tape 10 or the IC module 30; Figure 5B exhibit Figure 5A A rear view of the carrier tape 10; Figure 5C Display made in Figure 5B FIG. 1 is a rear view of the IC module 30 on the carrier tape 10. For comparison purposes, it should be understood that Figure 1B The carrier tape and Figure 1C In the IC module of FIG. 1 , the antenna connection pads 22 and 34 are arranged below the second subset 18 of conductive pads, including a conductive pad between the C1 pin position and the C5 pin position, and another conductive pad between the C3 position and the C7 position. Figure 5A and 5B of the carrier tape 10 and in Figure 5A and 5C In the IC module 30 of the embodiment of the present invention, the antenna connection pads 22, 34 will be arranged under the second subset 18 of conductive pads, the conductive pads including one conductive pad between the C3 pin position and the C7 pin position or between the C1 position and the C5 position (not shown), and another conductive pad at the C6 pin position. Alternatively, in some other embodiments (not shown), at least one of the second subset 18 of conductive pads may be arranged according to the C4 or C8 pin position of ISO 7816.
[0169] It will be appreciated that the sizes of the holes in the second subset of through holes 14 may be substantially different from each other (in Figure 5B and 5C ) or substantially similar (not shown).
[0170] It will be appreciated that the conductive pads 17 , 18 may be arranged in an array of rows and columns, wherein the second subset of vias 14 is provided at some of the conductive pads arranged in different rows and columns.
[0171] According to some aspects of the present invention, methods for fabricating an IC module with direct die attach are provided. Fig. 6A Provides the ability to generate Figure 1A and 1BA non-limiting method flow chart of a carrier tape.
[0172] In block 601, an IC chip is provided or produced. This block may include processes known to those of ordinary skill in the art for producing chip redistribution layers (RDLs) and bump wafers for the IC chip.
[0173] In block 602, a process such as Figure 1A and 1B The features of the carrier tape or PCB as described above apply here and will not be repeated.
[0174] Specifically, frame 602 includes: perforating a non-conductive substrate to produce a through hole extending from the front side of the substrate to the back side; plating a smart card contact area on the front side of the substrate, wherein the smart card contact area has a plurality of conductive pads, and the plurality of conductive pads are insulated from each other and close the front end of the through hole; plating a through hole pad on the back side of the substrate, wherein the through hole pad is arranged at the rear end side of the through hole; plating a plurality of conductive traces on the back side of the substrate, wherein the conductive traces are conductively coupled to the through hole pads; and applying a solder resist layer that at least partially covers the conductive traces.
[0175] In block 603, solder is applied to the carrier tape, for example by solder paste printing. Thus, at each carrier tape, a first solder is deposited into a first subset of through holes and a first subset of through hole pads; a second solder is deposited into a second subset of through holes and a second subset of through hole pads; and a third solder is deposited on the surface mount pads.
[0176] The IC chips are arranged or placed on the carrier tapes in block 604. Specifically, at each carrier tape, the IC chips are placed on the solder on the surface mount pads.
[0177] In block 605, the solder deposited in block 603 is reflowed, thereby conductively coupling (e.g., bonding or attaching) the IC chip to the surface mount pads at each carrier tape. After reflowing, the through-holes are at least substantially filled with the reflow solder, and the through-hole pads are provided with the reflow solder.
[0178] In block 606, the IC chips are underfilled, such as with an epoxy material, to close the gap between each IC chip and the back side of each PCB, and the underfill material is cured, such as by thermal curing. A direct chip attach IC module is thereby produced. An encapsulant may be disposed or deposited on the IC chips.
[0179] In block 607 , a plasma clean of the IC module is performed to remove contaminants from the PCB.
[0180] In block 608, the sheet containing the IC modules described above is cut or punched into desired sizes, such as strips.
[0181] In block 609, the strips are connected to create an elongated carrier tape strip.
[0182] In block 610, the IC module is tested.
[0183] In block 611 , the IC module is visually inspected.
[0184] In block 612, the elongated or connected strips are packaged, for example, into a reel.
[0185] It should be understood that the methods described above may include fewer or more steps, or that the steps described above may be interchanged, omitted, modified and / or combined.
[0186] According to some aspects of the present invention, a method for manufacturing a circuit board inlay is provided, such as Figure 2B , 2D and the circuit inlay 3 shown in 2E. Based on Figure 2B and 2D The circuit inlay 3 may not have an IC module 13, which is conductively coupled to the circuit inlay in a later step, and based on Figure 2E The circuit inlay 3 can be manufactured using an IC module 31. Non-limiting methods include reference Fig. 6A or a portion thereof. Specifically, Fig. 6A The size of the non-conductive substrate provided in the method may be similar to the size of the smart card contact area according to ISO 7816, or may be a multiple of the size of the smart card contact area, for example, about the size of the final card or device, the size of the ID-1. Other conductive layers, such as traces, pads, may be provided and / or formed on the front and / or back side of the circuit board inlay to provide card circuits, LED circuits and / or biometric circuits. Thus, in such examples, the circuit board inlay may be equivalent to a carrier tape.
[0187] According to some aspects of the present invention, a method for manufacturing a smart card or a smart device is provided. Figure 6B Provided by Figure 1A , 1C The process sequence of a non-limiting method of producing a smart card from IC modules 1F, 5A and 5C is described as follows:
[0188] In block 613, the circuit board inlay (without the IC module) may be inserted between other substrate layers and / or cover layers and arranged in a stacked arrangement and laminated as known to those of ordinary skill in the art to produce a laminated core. The laminated core may be ground to provide a first cavity to receive the IC module. At the cavity, the laminated core may be further ground to provide a plurality of second cavities that are smaller than the first cavity to expose antenna portions or ends of antennas, such as card antennas embedded in the laminated core.
[0189] In block 614, the exposed antenna portion or end is placed on or near the second solder on the antenna connection pad.
[0190] In block 615, the second solder is reflowed, thereby conductively coupling the antenna to the antenna connection pad. Specifically, heat is applied to a second subset of conductive pads (heat transfer pads) opposite the antenna connection pad. The applied heat is transferred by the reflow solder in the second subset of conductive pads (heat transfer pads) and the second subset of vias to the reflow solder at the antenna connection pad.
[0191] When the reflow solder at the antenna connection pad melts, the molten solder is coupled or attached to a portion of the antenna that is arranged to be in contact with the molten solder. When the molten solder cools, the antenna connection pad is conductively coupled (e.g., firmly attached) to the antenna, thereby conductively coupling the antenna to the IC chip. In other words, an electrical path from the antenna to the IC chip is provided through the antenna connection pad, the second subset of conductive traces, and the second subset of surface mount pads. Heat and / or pressure can be applied to the laminated core to embed the IC module in the laminated core, particularly in a circuit board inlay, to provide a smart card or device.
[0192] According to some aspects of the present invention, other embodiments of carrier tapes and IC modules are provided having antenna connection pads that are non-directly opposite or arranged on a proximal side of the IC chip or smart card contact areas relative to the IC chip. Figures 7A to 7C A non-limiting embodiment is provided in which one of the antenna connection pads is arranged at the C6 pin position.
[0193] Fig. 7A Shown is a perspective front view taken from the contact side of a single-sided plated IC carrier tape 710 having a smart card contact area 716 including a plurality of conductive pads 717, 718, such as six ISO-specified contact pads. Figure 7B Demonstrating that according to one embodiment includes Fig. 7A FIG. 7 is a perspective front view of an IC module 730 on carrier tape 710 . Figure 7C According to another embodiment, a Fig. 7A A perspective front view of the IC module 730 of the carrier tape 710. Figures 7A to 7C In FIG. 7 , dashed lines / arrows indicate components that are only visible from a rear view, which is taken from the bonding side of carrier tape 710 .
[0194] The carrier tape 710 includes: a non-conductive substrate 711 having a front side or contact side (which may be referred to as a first side) and a back side or bonding side (which may be referred to as a second side); a plurality of through holes extending through the substrate 711, for example, from the front side to the back side; and conductive pads 717, 718, which are arranged on the front side and the back side, for example by plating and / or etching.
[0195] The through holes 713, 714, 715 include a first subset 713, a second subset 714, and a third subset 715 of the through holes. Each through hole 713, 714, 715 has opposite openings or ends, such as a front end and a rear end located at the front side and the rear side of the non-conductive substrate 711, respectively. The through holes 713, 714, 715 may have different sizes and / or shapes. In some non-limiting embodiments, the second subset 714 of through holes has a larger size or area than the first subset 713 of through holes. For example, the diameter of the first subset 713 of through holes may be about 0.6 mm to about 0.9 mm, while the diameter of the second subset 714 of through holes may be about 2.0 mm. However, in other non-limiting examples, the second subset 714 of through holes may have a similar size or area relative to the first subset 713 of through holes. In other non-limiting examples, some through holes may have similar sizes or areas, while some other through holes may have different sizes or areas. The first subset 713, the second subset 714, and / or the third subset 715 of through holes may adopt one or more shapes, such as regular shapes, irregular shapes. Non-limiting examples include a combination of circular, rounded rectangular, L-shaped, elliptical, polygonal, interconnected or overlapping regular shapes. The shapes of the first subset 713, the second subset 714, and / or the third subset 715 of through holes may be similar and / or different.
[0196] The first subset 713 of through holes at the C1, C2, C3, C5, and C7 pin locations may be referred to as chip bonding holes, wherein each hole 713 is configured to receive a conductive element 738, such as a wire bond, that is conductively coupled to the IC chip. The second subset 714 of through holes may be referred to as antenna bonding holes, wherein each hole 714 is configured to receive an antenna lead / terminal or an antenna connection element that is conductively coupled to the antenna lead / terminal. The third subset 715 of through holes may be referred to as chip-antenna connection pad bonding holes, wherein each hole 715 is configured to receive a conductive element 739, such as a wire bond, that is used to conductively couple the IC chip to the antenna connection pad 722. The second subset 714 of through holes is separated from the third subset 715 of through holes by a non-conductive substrate 711.
[0197] The smart card contact area 716 is arranged on the front side of the substrate 711 and closes the front end of the through holes 713, 714, 715. The smart card contact area 716 includes a plurality of conductive pads 717, 718, at least some of which are conductively insulated from each other. The conductive pads 717, 718 can be sized, shaped and arranged according to the International Organization for Standardization (ISO) standard for manufacturing smart cards. According to the ISO 7816 standard, the size of the smart card contact area 716 can be about 85.60 mm×53.98 mm. The conductive pads 717, 718 can be made of metal, such as copper, nickel. The conductive pads 717, 718 include a first subset 717 and a second subset 718 of the conductive pads. Each conductive pad 717 of the first subset 717 includes an outer side and an inner side, so that in operation, the outer side is in electrical contact with a contact-type smart card reader or electronic terminal to allow signal transmission between the card reader and an IC chip electrically connected to the smart card contact area 716, while the inner side is accessible through a corresponding through hole to allow a conductive element 738 such as a lead to be placed therein to establish an electrical connection with the conductive pad 717. However, each conductive pad 718 in the second subset 718 may not be in electrical contact with a contact-type smart card reader or electronic terminal. Figures 1A to 1F The second subset of conductive pads 18 provide heat transfer pads, with Figures 1A to 1F Different in Figures 7A to 7C A second subset 718 of conductive pads may not be used for heat transfer but instead may be used as electrical conductors.
[0198] The first subset 717 of conductive pads may be arranged according to the C1, C2, C3, C5, C7 pin positions of ISO 7816. The second subset 718 includes a conductive pad between the C3 pin position and the C7 pin position or between the C1 position and the C5 position (not shown), and another conductive pad at the C6 pin position. Alternatively, in some other embodiments (not shown), at least one of the second subset 718 of conductive pads may be arranged according to ISO 7816 and according to the C4 or C8 pin position.
[0199] exist Figures 7A to 7C In the embodiment of the present invention, the conductive pads 717, 718 can be arranged in an array of rows and columns, wherein the second subset 714 of through holes is provided at some of the conductive pads arranged in different rows and columns. As shown, the area of one of the second subset 718 of conductive pads crosses more than one row and column.
[0200] Specifically, the front side of the carrier tape 710 or the IC module 730 provides C1, C2, C3, C5, C6, and C7, which are six ISO-specified contact (conductive) pads. The first antenna connection pad 718 is provided by one of the plurality of conductive pads located between C1 and C5, while the second antenna connection pad 718 may be provided by a combination of a conventionally unused ISO-specified contact pad (i.e., C6 pin position) and another conductive pad located between C3 and C7. In other words, the plurality of conductive pads providing the second antenna connection pad are conductively coupled.
[0201] like Figure 7B and 7C As shown in FIG. 1 , the first subset 717 of conductive pads closes the front ends of the first subset 713 of through holes, while the second subset 718 of conductive pads closes the front ends of the second and third subsets 714 and 715 of through holes.
[0202] like Figure 7B and 7C As shown in , the encapsulant 728 is disposed or deposited on the back side or bonding side of the substrate 711. Specifically, the encapsulant 728 is deposited in the first subset 713 and the third subset 715 of the through holes, and is further deposited on the IC chip 731 and the conductive elements, such as the wire bonds (see the dotted lines 738, 739 from the IC chip 731 to the holes 713, 715, respectively), which traverse the first subset 713 and the third subset 715 of the through holes. However, the encapsulation area may vary in different embodiments, as the encapsulant 728 may or may not be deposited in the second subset 714 of the through holes.
[0203] exist Figure 7B In the IC module 730 of FIG. 7 , the encapsulant 728 is deposited into the second subset 714 of through holes (i.e., the two antenna bond holes 714) so that each hole 714 is partially encapsulated and partially unencapsulated. Thus, the connection with the antenna 741 in the card body (not shown) will traverse the partially unencapsulated portion of the antenna bond hole 714.
[0204] exist Figure 7C In the IC module 730 of FIG. 7 , the encapsulant 728 is deposited into one of the second subset 714 of through holes, i.e., only one antenna bonding hole 714, so that this hole 714 is partially encapsulated and partially unencapsulated. Therefore, the connection with the antenna 741 in the card body (not shown) will traverse the partially unencapsulated portion of this antenna bonding hole 714. Another one of the second subset of through holes, i.e., another antenna bonding hole, does not contain an encapsulation, i.e., is not encapsulated. Therefore, another connection with the antenna 741 in the card body (not shown) will traverse the completely unencapsulated antenna bonding hole 714.
[0205] In another embodiment of the IC module (not shown), the encapsulant is deposited on the back side of the substrate, but not into any of the second subset of through-holes 714. In other words, both antenna bond holes 714 are free of encapsulation, ie, are not encapsulated.
[0206] exist Figure 7B and 7C , at each antenna connection or bonding pad 718, the antenna bonding hole 714 and the third subset 715 of through holes (e.g., L-shaped, elongated and / or other appropriately shaped bonding holes) terminate at the antenna connection or pad 718. The antenna 741 in the card body will be conductively coupled to the IC chip 731 through the antenna connection elements arranged in the antenna bonding holes and through the conductive elements 739 arranged in the third subset 715 of through holes. Each antenna connection element may include a rigid conductive or solder bump, a conductive pad, a flexible conductive bump including a conductive adhesive, or a portion of the antenna 741.
[0207] Therefore, each antenna bonding hole 714 is configured to allow at most one conductive element, such as a single lead or connecting element, to connect the antenna 741 to the antenna connection pad 718. At each antenna bonding hole 714, there is no lead or other electrical connection for connecting the IC chip 731 to the antenna connection pad 718.
[0208] According to some aspects of the present invention, there is provided a device having a contact interface and a contactless interface and comprising Figure 7B or other embodiments of the smart card of the IC module of 7C. The smart card comprises: a card body having an opening and an antenna 741; and Figure 7B or IC module 730 of 7C, which is disposed in the opening; an antenna connection element, which is arranged in the antenna bonding hole 714 of the IC module 730 and conductively couples the antenna 741 to the antenna connection pad 718. The card body may include a laminated core of multiple substrate layers, wherein the antenna may be inserted between the multiple substrate layers, for example, arranged on one of the layers.
[0209] Embodiments of the present invention provide several advantages, including but not limited to the following:
[0210] Figures 1A to 1F The embodiment provides an alternative to existing smart card substrates, carrier tapes and IC modules. The embodiment also provides an alternative to the manufacturing process, which combines surface mounting technology on a high-density substrate to improve productivity.
[0211] Figure 1G , 2F The embodiments of 2G and 3G provide an alternative solution that eliminates the conductive coupling by physically connecting the IC chip to the card antenna, thereby increasing the reliability and life of the smart card.
[0212] Figures 2A to 2E Embodiments of the present invention provide an alternative to smart card contact area connection designs.
[0213] Figures 5A to 5C The embodiments provide an alternative to antenna connection design that utilizes the bonding holes of unused pins, and the implementation also provides an alternative to the embedding process to integrate the IC module into the card body construction.
[0214] Figures 7A to 7C Embodiments provide an alternative antenna connection design that utilizes the bonding holes of unused pins and also allows the use of single-sided plated carrier tape during assembly, thereby achieving cost reduction due to the significant reduction in raw materials used for bonding directional designs.
[0215] It should be understood that the embodiments and features described above should be considered as exemplary and non-restrictive. A number of other embodiments will be apparent to those skilled in the art based on consideration of this specification and practice of the invention. In addition, certain terms are used for the purpose of describing clarity, and these terms do not limit the disclosed embodiments of the present invention.
Claims
1. A product, characterized in that: The product comprises: a non-conductive substrate having a front side and a back side and a plurality of through holes extending from the front side to the back side; a smart card contact area, which is arranged on the front side of the substrate and has a plurality of conductive pads, the plurality of conductive pads are insulated from each other and close the front side ends of the plurality of through holes; a plurality of through-hole pads and a plurality of conductive traces arranged on the back side of the substrate, wherein the plurality of through-hole pads are arranged at back-side ends of the plurality of through-holes, wherein the plurality of conductive traces are conductively coupled to the plurality of through-hole pads, respectively; and A solder resist layer at least partially covers the plurality of conductive traces.
2. The product according to claim 1, characterized in that The article further comprises: A first solder is disposed in a first subset of the plurality of vias and on a first subset of the plurality of via pads and is configured to conductively couple the first subset of the plurality of conductive pads to the first subset of the plurality of conductive traces.
3. The product according to claim 2, characterized in that The article further comprises: An integrated circuit chip is conductively coupled to the first subset of the plurality of conductive traces by direct chip attach, thereby conductively coupling the integrated circuit chip to the first subset of the plurality of conductive pads.
4. The product according to claim 3, characterized in that The article further comprises: an underfill material interposed between the integrated circuit chip and the back side of the substrate and / or an encapsulant provided on the integrated circuit chip, The rear end portions of the plurality of through holes are substantially free of the underfill material, the solder resist layer and / or the encapsulant.
5. The product according to claim 4, characterized in that The article further comprises: a second solder material disposed in a second subset of the plurality of through vias and on a second subset of the plurality of through via pads, wherein the second subset of the plurality of pads and the second solder material are capable of cooperating to provide a plurality of antenna connection pads, wherein the integrated circuit chip is conductively coupled to the second subset of the plurality of via pads via the second subset of the plurality of conductive traces, the article further comprising: An antenna is conductively coupled to the plurality of antenna connection pads, thereby conductively coupling the antenna to the integrated circuit chip.
6. The product according to claim 5, characterized in that The article further comprises: a biometric identification circuit conductively coupled to the integrated circuit chip; and / or A light emitting diode circuit includes at least one light emitting diode module and a second antenna conductively coupled to the at least one light emitting diode module, wherein the second antenna is configured to be inductively coupled to a contactless reader to operate the at least one light emitting diode module.
7. The product according to any one of claims 3 to 6, characterized in that The article further comprises: a plurality of surface mount pads disposed on the back side of the substrate and conductively coupled to the first subset of the plurality of through-hole pads through the first subset of the plurality of conductive traces; The integrated circuit chip is disposed below the smart card contact area and conductively coupled to the plurality of surface mount pads.
8. The product according to any one of claims 3 to 7, characterized in that The second subset of the plurality of through vias is non-directly opposed relative to the integrated circuit chip.
9. The product according to any one of claims 3 to 7, characterized in that At least some of the plurality of conductive pads are arranged in an array of rows and columns, wherein the second subset of the plurality of through-holes are arranged in different rows and columns.
10. The product according to any one of claims 3 to 8, characterized in that One of the second subset of the plurality of through-vias is arranged at a C6 pin location in accordance with ISO 7816.
11. The product according to claim 3, characterized in that The integrated circuit chip is arranged offset relative to the smart card contact area.
12. The product according to any one of claims 3 to 11, characterized in that The size of the substrate is set according to ISO 7810 and according to the size of ID-1, half the size of ID-1 or one quarter the size of ID-1.
13. The product according to any one of claims 1 to 12, characterized in that The substrate, the smart card contact areas, the plurality of through-hole pads, the plurality of conductive traces, the solder resist layer, the first solder, and the second solder are provided as a printed circuit board.
14. The product according to claim 1 or claim 2, characterized in that The plurality of conductive traces comprises a module antenna at least partially surrounding the plurality of through-via pads.
15. A smart card, characterized in that: The smart card comprises: A laminate core comprising a plurality of laminate layers, wherein one of the plurality of laminate layers comprises the article according to any one of claims 3 to 14.
16. A method for manufacturing an integrated circuit module, characterized in that: The method comprises: conductively coupling an integrated circuit chip to the first subset of the plurality of conductive traces of the article of claim 1 or claim 2, thereby conductively coupling the integrated circuit chip to a plurality of contact pins; and An underfill material is provided between the integrated circuit chip and the substrate, and an encapsulant is provided on the integrated circuit chip, including leaving the backside ends of the plurality of through holes substantially free of the underfill material, the solder resist layer and / or the encapsulant.
17. A method for manufacturing a smart card, characterized in that The method comprises: An antenna is conductively coupled to a plurality of antenna connection pads according to any one of claims 5 to 13, thereby conductively coupling the antenna to the integrated circuit chip.
18. A method for manufacturing an article, characterized in that The method comprises: perforating a non-conductive substrate to create a plurality of through holes extending from a front side to a back side of the substrate; Plating a smart card contact area on the front side of the substrate, the smart card contact area having a plurality of conductive pads, the plurality of conductive pads being insulated from each other and closing the front end portions of the plurality of through holes; plating a plurality of through-hole pads on the rear side of the substrate, wherein the plurality of through-hole pads are arranged at the rear end side of the plurality of through-holes; plating a plurality of conductive traces on the back side of the substrate, wherein the plurality of conductive traces are conductively coupled to the plurality of through-hole pads; and A solder resist layer is applied at least partially covering the plurality of conductive traces.
19. The method according to claim 18, characterized in that The method further comprises: A first solder is deposited in a first subset of the plurality of vias and on a first subset of the plurality of via pads, wherein the first solder is configured to conductively couple the first subset of the plurality of conductive pads to a first subset of the plurality of conductive traces through the first subset of the plurality of via pads.
20. The method according to claim 18, characterized in that The method further comprises: depositing a second solder in a second subset of the plurality of vias and on a second subset of the plurality of pads, thereby allowing the second subset of the plurality of via pads and the second solder to cooperatively provide a plurality of antenna connection pads; depositing a third solder on a plurality of surface mount pads at ends of the plurality of conductive traces distal from the plurality of through-hole pads; placing an integrated circuit chip on the back side of the substrate; and At least the first solder, the second solder, and the third solder are reflowed, thereby conductively coupling the integrated circuit chip to the first subset of the plurality of conductive pads through the first subset of the plurality of conductive traces, and conductively coupling the integrated circuit chip to the second subset of the plurality of through-hole pads.
21. The method according to claim 20, characterized in that The method further comprises: providing an underfill material interposed between the integrated circuit chip and the substrate; providing an encapsulant on the integrated circuit chip; The backside ends of the plurality of through-holes are kept substantially free of the underfill material, the solder resist layer and / or the encapsulant.
22. The method according to claim 21, characterized in that The integrated circuit chip is conductively coupled to the second subset of the plurality of pads via the second subset of the plurality of conductive traces, the method further comprising: An antenna is conductively coupled to the plurality of antenna connection pads, thereby conductively coupling the antenna to the integrated circuit chip.
23. An integrated circuit module for a smart card having a contact interface and a contactless interface, characterized in that: The integrated circuit module comprises: a non-conductive substrate having a plurality of through-holes extending from a front side to a back side of the substrate, wherein the plurality of through-holes comprises a first subset, a second subset, and a third subset of the plurality of through-holes; a smart card contact area arranged on the front side of the substrate and having a plurality of conductive pads, the plurality of conductive pads comprising a first subset of the plurality of conductive pads and a second subset of the plurality of conductive pads, the first subset of the plurality of conductive pads being arranged to respectively close the first subset of the plurality of through holes, the second subset of the plurality of conductive pads being arranged to close the second subset and the third subset of the plurality of through holes; an integrated circuit chip disposed on the back side of the substrate; a plurality of conductive elements that traverse the first subset and the third subset of the plurality of vias and conductively couple the first subset and the second subset of the plurality of conductive pads to the integrated circuit chip; and an encapsulant deposited in the first subset and the third subset of the plurality of through-vias, wherein the encapsulant is also deposited on the integrated circuit chip and the plurality of conductive elements, wherein the second subset of the plurality of through-vias is separated from the third set of the plurality of through-vias by the substrate, The second subset of the plurality of through vias is non-directly opposed relative to the integrated circuit chip.
24. The integrated circuit module according to claim 23, characterized in that: At least some of the plurality of conductive pads are arranged in an array of rows and columns, wherein the second subset of the plurality of through-holes are arranged in different rows and columns.
25. The integrated circuit module according to claim 23, characterized in that: One of the second subset of the plurality of conductive pads includes a region that traverses more than one row and column.
26. The integrated circuit module according to any one of claims 23 to 25, characterized in that: The encapsulant is also deposited in at least one of the second subset of the plurality of through-vias.
27. The integrated circuit module according to any one of claims 23 to 26, characterized in that: At least one of the second subset of the plurality of through-holes is adapted to receive the encapsulant.
28. The integrated circuit module according to any one of claims 23 to 27, characterized in that: One of the second subset of the plurality of conductive pads is arranged at a C6 pin location in accordance with ISO 7816.
29. A smart card having a contact interface and a contactless interface, characterized in that: The smart card comprises: a card body having an opening and an antenna; and An integrated circuit module according to any one of claims 23 to 28, which is disposed in the opening; A pair of antenna connection elements are disposed in the second subset of the plurality of vias and conductively couple the antenna to the second subset of the plurality of conductive pads.
30. The smart card according to claim 29, characterized in that Each of the antenna connection elements includes a rigid conductive or solder bump, a conductive pad, a flexible conductive bump including a conductive adhesive, or a portion of the antenna.
31. The smart card according to any one of claims 23 to 27, characterized in that: Each of the second subset of the plurality of through-holes is adapted to receive at most one conductive element.
32. A single-sided plated integrated circuit carrier tape suitable for a smart card with a contact interface and a contactless interface, characterized in that: The integrated circuit carrier tape comprises: a non-conductive substrate having a plurality of through-holes extending from a front side to a back side of the substrate, wherein the back side of the substrate is adapted to have an integrated circuit chip disposed thereon, wherein the plurality of through-holes comprises a first subset, a second subset, and a third subset of the plurality of through-holes; a smart card contact area arranged on the front side of the substrate and having a plurality of conductive pads, the plurality of conductive pads comprising a first subset of the plurality of conductive pads and a second subset of the plurality of conductive pads, the first subset of the plurality of conductive pads being arranged to respectively close the first subset of the plurality of through holes, the second subset of the plurality of conductive pads being arranged to close the second subset and the third subset of the plurality of through holes; wherein the first subset and the third subset of the plurality of through-holes are adapted to receive a plurality of conductive elements to conductively couple the first subset and the second subset of the plurality of conductive pads to the integrated circuit chip; and wherein the first and third subsets of the plurality of through-holes, the integrated circuit chip, and the plurality of conductive elements are adapted to receive an encapsulant, wherein the second subset of the plurality of through-vias is separated from the third set of the plurality of through-vias by the substrate, The second subset of the plurality of through vias is non-directly opposed relative to the integrated circuit chip.
33. The carrier tape according to claim 32, characterized in that The plurality of conductive pads are arranged in an array of rows and columns, wherein the second subset of the plurality of through holes are provided at some of the plurality of conductive pads, the second subset of the plurality of through holes being arranged in different rows and columns.
34. The carrier tape according to claim 33, characterized in that An area of one of the second subset of the plurality of conductive pads traverses more than one row and column.
35. The carrier tape according to any one of claims 32 to 34, characterized in that: At least one of the second subset of the plurality of through-holes is adapted to receive the encapsulant.
36. The carrier tape according to any one of claims 32 to 35, characterized in that: One of the second subset of the plurality of conductive pads is arranged at a C6 pin location in accordance with ISO 7816.
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