Ridge waveguide preparation method, ridge waveguide and laser

Abstract

The present application provides a ridge waveguide preparation method, a ridge waveguide and a laser, belonging to the field of semiconductor device preparation technology, the method comprising: depositing an insulating layer on the surface of the ridge waveguide, and coating a photoresist on the insulating layer, wherein the ridge waveguide comprises at least two ridge waveguide segments; determining the boundary line of the ridge waveguide, and determining the etching area according to the boundary line; etching the photoresist and the insulating layer in the etching area respectively to obtain an electrode window on the ridge waveguide. The present application can effectively solve the problem of inconsistent etching rate caused by the change of ridge width of the ridge waveguide in the traditional etching process, ensure the uniformity of the etching process, thereby reducing the risk of electrochemical corrosion and avoiding the effect of void drilling.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor device preparation, and in particular to a ridge waveguide preparation method, a ridge waveguide and a laser. Background Art

[0002] 980nm single-mode high-power semiconductor lasers are widely used in the field of optical fiber communications due to their excellent optical properties and reliability. By pumping erbium-doped optical fibers with a 980nm laser pump source, 1550nm signals based on wavelength division multiplexing technology can be realized, thereby achieving large-capacity and long-distance optical signal transmission. Applications in this field have strict requirements on the power, single-mode characteristics and reliability of lasers. The traditional ridge waveguide design with consistent dimensions and vertical ridge waveguide structure cannot meet these requirements. Therefore, the multi-segment ridge waveguide size and overall longitudinal structure are designed to meet the application requirements of no high-order mode lasing (single-mode, wide strips that suppress high-order modes), high power (narrow strips that output high power), high reliability and no COD (Catastrophic Optical Damage) and other failure modes.

[0003] The traditional ridge waveguide etching process is to complete the etching of the entire ridge waveguide in one step. In the process of etching a multi-segment ridge waveguide using the traditional ridge waveguide etching process, due to the different thickness of the photoresist in the narrow head and the wide head, there is a difference in the etching rate of the two ends. The etching rate of the narrow head is faster, while the etching rate of the wide head is slower. This uneven etching rate will cause the narrow head end to be over-etched and the wide head end to be under-etched. This situation will cause electrochemical corrosion in the subsequent process (usually the abnormality will be discovered after the metal layer is covered, resulting in cost waste), forming defects such as void drilling, thereby affecting the appearance and performance of the device.

[0004] Therefore, there is currently a lack of etching processes for multi-segment ridge waveguides, which will lead to uneven etching of the multi-segment ridge waveguide during the etching process, thereby affecting the performance and reliability of the device. Summary of the invention

[0005] The purpose of this application is to provide a ridge waveguide preparation method, a ridge waveguide and a laser to solve the above problems.

[0006] To achieve the above objectives, in a first aspect, the present application proposes a ridge waveguide preparation method, the method comprising:

[0007] Depositing an insulating layer on the surface of a ridge waveguide and coating a photoresist on the insulating layer, wherein the ridge waveguide includes at least two ridge waveguide segments;

[0008] Determining a boundary line of the ridge waveguide, and determining an etching area according to the boundary line;

[0009] The photoresist and the insulating layer in the etching area are etched respectively to obtain an electrode window on the ridge waveguide.

[0010] In some embodiments, determining the boundary line of the ridge waveguide comprises:

[0011] Determining a ridge width gradient changing region of the ridge waveguide based on a changing trend of the ridge width of the ridge waveguide;

[0012] Determine the median value of the ridge width of the ridge width gradient region, and determine the boundary region based on the median value of the ridge width of the ridge width gradient region, wherein the number of the median values ​​of the ridge width is at least one;

[0013] A boundary line is determined in the boundary area, and the boundary line is used to divide the etching area of ​​the ridge waveguide. The number of the etching areas is at least two.

[0014] In some embodiments, etching the photoresist and the insulating layer in the etching area respectively to obtain an electrode window on the ridge waveguide includes:

[0015] Calculating a preset etching time according to the etching depth and etching rate of the insulating layer in the etching area;

[0016] The insulating layer in the etching area is etched according to the preset etching time to obtain an electrode window on the ridge waveguide.

[0017] In some embodiments, coating a photoresist on the insulating layer comprises:

[0018] Coating an inverse photoresist on the insulating layer, wherein an upper surface of the inverse photoresist is higher than a top surface of the ridge waveguide;

[0019] Exposing the reverse photoresist to light, so that the reverse photoresist is converted into a negative photoresist;

[0020] A positive photoresist is spin-coated on the negative photoresist.

[0021] In some embodiments, etching the photoresist and the insulating layer in the etching area respectively includes:

[0022] Exposing and developing the positive photoresist in any of the etching areas to form a plurality of etching windows;

[0023] The negative photoresist is etched based on the etching window.

[0024] In some embodiments, the width of the exposure and development of the positive photoresist in the etching region is greater than the etching width of the etching region.

[0025] In some embodiments, the method further comprises:

[0026] An intermediate region is formed between any two adjacent etching windows, and a width of the intermediate region is greater than or equal to a precision error of a photolithography device, and the photolithography device is used to etch the photoresist and the insulating layer in the etching region.

[0027] In some embodiments, etching the negative photoresist for a reference time period based on the etching window;

[0028] Monitoring whether the color representation of the negative photoresist exists on the insulating layer to determine whether the negative photoresist is etched cleanly;

[0029] If the negative photoresist is not completely etched, the negative photoresist is supplementally etched according to a preset time unit until there is no color representation of the negative photoresist on the insulating layer.

[0030] In some embodiments, the insulating layer is deposited to a thickness greater than 100 nanometers.

[0031] In a second aspect, the present application also proposes a ridge waveguide, which is manufactured based on the ridge waveguide preparation method described above.

[0032] In a third aspect, the present application also proposes a laser, wherein the laser comprises the ridge waveguide as described above.

[0033] Compared with the prior art, the beneficial effects of this application include:

[0034] On the one hand, the ridge waveguide is divided into at least two etching areas by a dividing line, and different etching areas are etched step by step. This step-by-step etching method can effectively solve the problem of inconsistent etching rate caused by the change of ridge width of the ridge waveguide in the traditional etching process, ensure the uniformity of the etching process, and then reduce the risk of electrochemical corrosion and avoid the effect of void drilling. This not only improves the appearance quality and performance stability of the semiconductor laser, but also enhances the single-mode characteristics and high-power output, meeting the strict requirements of the field of optical fiber communication. In addition, by controlling the etching process in the early stage, the cost waste and rework caused by etching problems in the subsequent process are reduced, thereby reducing the overall production cost. In summary, the present application significantly improves the performance and reliability of semiconductor lasers, while optimizing the manufacturing process, and has important practical value.

[0035] On the second aspect, in order to reduce the impact of photoresist thickness changes on ridge waveguide etching, the prior art proposes a self-alignment process using a single layer of glue, that is, etching the ridge waveguide using a single layer of positive glue plus high-temperature reflow. However, this method still does not take into account the gradual change in the size of the ridge waveguide, and ignores the polygonal structure of the ridge waveguide cross-section. When the reflow process parameters and the reflow distance are the same, there are also situations where the window sizes of different etching areas are different. In addition, the traditional positioning method of yellow light plus a single layer of positive glue is prone to positioning deviation and misalignment. The present application, based on the self-alignment process of a double layer of glue (a layer of positive photoresist plus a layer of negative photoresist), achieves the beneficial effect of changing the window width of the ridge waveguide with the change of the ridge width of the ridge waveguide. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope of the present application.

[0037] Figure 1 A schematic diagram of the void drilling effect caused by uneven ridge waveguide etching in the prior art;

[0038] Figure 2 A schematic diagram of a process of an embodiment of a ridge waveguide preparation method of the present application;

[0039] Figure 3 A schematic diagram of a ridge waveguide high-angle view structure of an embodiment of a ridge waveguide preparation method of the present application;

[0040] Figure 4 A schematic diagram of the functional area of ​​a ridge waveguide according to an embodiment of the ridge waveguide preparation method of the present application;

[0041] Figure 5 A schematic diagram of a ridge waveguide cross-sectional structure of an embodiment of a ridge waveguide preparation method of the present application;

[0042] Figure 6 A schematic diagram of an etching area of ​​an embodiment of a ridge waveguide preparation method of the present application;

[0043] Figure 7 This is a schematic diagram of the photoresist coating process in one embodiment of the ridge waveguide preparation method of the present application;

[0044] Figure 8 A schematic diagram of an etching window of an embodiment of a ridge waveguide preparation method of the present application;

[0045] Fig. 9 A schematic diagram of etching a negative photoresist according to an embodiment of the ridge waveguide fabrication method of the present application;

[0046] Fig.10 A schematic diagram of insufficient width of exposure and development of an embodiment of a ridge waveguide fabrication method of the present application;

[0047] Fig.11 A schematic diagram of a middle region of an embodiment of a ridge waveguide fabrication method of the present application;

[0048] Fig.12 This is a schematic diagram of the etching process of a negative photoresist in one embodiment of the ridge waveguide preparation method of the present application;

[0049] Fig.13 This is a schematic diagram showing the color of a negative photoresist in one embodiment of the ridge waveguide preparation method of the present application;

[0050] Fig.14 Schematic diagram of the insulating layer etching effect of an embodiment of the ridge waveguide preparation method of the present application.

[0051] Explanation of the accompanying drawings: 100-ridge waveguide; 10-narrow head; 11-first etching area; 20-wide head; 21-second etching area; 30-first ridge waveguide segment; 31-second ridge waveguide segment; 32-third ridge waveguide segment; 40-insulating layer; 50-photoresist; 51-negative photoresist; 52-positive photoresist; 60-first etching window. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0053] All terms (including technical and scientific terms) used in this application have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used here should be interpreted as having a meaning consistent with the context of this specification, and should not be interpreted in an idealized or overly rigid manner.

[0054] For example, the terms "first", "second", etc. used in this application may be used in this article to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first etching region may be referred to as a second etching region, and similarly, a second etching duration may be referred to as a first etching duration. Both the first etching duration and the second etching duration are etching durations, but they are not the same etching duration.

[0055] For another example, the terms “include”, “comprising”, etc. used in this application indicate the existence of features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0056] As mentioned above, the traditional ridge waveguide etching process is to complete the etching of the entire ridge waveguide in one step. In the process of etching the multi-segment ridge waveguide using the traditional ridge waveguide etching process, due to the different photoresist thicknesses of the narrow head and the wide head, there is a difference in the etching rate of the two ends. The etching rate of the narrow head is faster, while the etching rate of the wide head is slower. This uneven etching rate will cause the narrow head end to be over-etched and the wide head end to be under-etched. This situation will cause electrochemical corrosion in the subsequent process (usually the abnormality will be discovered after the metal layer is covered, resulting in cost waste), forming the following Figure 1 The effect of void drilling shown here affects the appearance and performance of the device.

[0057] To this end, the present application proposes a ridge waveguide preparation method, a ridge waveguide and a laser, which can effectively solve the problem of inconsistent etching rate caused by the change of ridge width of the ridge waveguide in the traditional etching process, ensure the uniformity of the etching process, thereby reducing the risk of electrochemical corrosion and avoiding the effect of void drilling.

[0058] In one embodiment, Figure 2 As shown, the ridge waveguide preparation method of this embodiment includes the following steps:

[0059] Step S10 , depositing an insulating layer 40 on the surface of the ridge waveguide 100 , and coating a photoresist 50 on the insulating layer 40 , wherein the ridge waveguide 100 includes at least two ridge waveguide segments.

[0060] In this embodiment, it is possible to use : : O=1:1:10 solution, ridge waveguide 100 is etched at room temperature. If the controlled etching time is 5min, the depth of the ridge waveguide etched is 1.5um.

[0061] In some embodiments, the ridge waveguide 100 includes a first ridge waveguide segment 30, a second ridge waveguide segment 31, and a third ridge waveguide segment 32 connected in sequence, the first ridge waveguide segment 30 and the third ridge waveguide segment 32 are rectangular, the second ridge waveguide segment 31 is connected between the first ridge waveguide segment 30 and the third ridge waveguide segment 32, and the second ridge waveguide segment 31 is trapezoidal.

[0062] As Figure 3 and Figure 4Taking the ridge waveguide 100 shown as an example, one end of the ridge waveguide 100 is a narrow head 10, d1=3-4μm, and the other end is a wide head 20, d2=7-8μm. The narrow head 10 forms a first ridge waveguide segment 30, the wide head 20 forms a third ridge waveguide segment 32, the second ridge waveguide segment 31 is connected between the first ridge waveguide segment 30 and the third ridge waveguide segment 32, and the ridge width of the second ridge waveguide segment 31 gradually increases from the narrow head 10 to the wide head 20. Among them, the first ridge waveguide segment 30 is a signal output area, which is used to output a stable single transverse mode (d1 is less than or equal to 4μm to output a single transverse mode). The second ridge waveguide segment 31 is a signal amplification area, which is an intermediate transition section formed for signal amplification. The third ridge waveguide segment 32 is a current injection area, which is to increase the current injection area to obtain higher gain (signal amplification) and better reliability.

[0063] It should be understood that, in actual application scenarios, the ridge waveguide 100 may be trapezoidal in shape as a whole; the ridge waveguide 100 may be divided into a number of ridge waveguide segments according to changes in the widths of various parts of the ridge waveguide 100 .

[0064] like Figure 5 As shown, an insulating layer 40 is deposited on the upper surface of the ridge waveguide 100. The insulating layer 40 may be a SiNx (silicon nitride) film, and the deposition thickness of the SiNx film may be controlled to be 130 nm, with a refractive index of 2.0 and a stress between 150 and 200 MPa. A photoresist is coated on the insulating layer 40 for window positioning.

[0065] Step S20, determining a boundary line of the ridge waveguide 100, and determining an etching area according to the boundary line.

[0066] In this embodiment, the dividing line is determined according to the variation trend of the ridge width of the ridge waveguide 100, and the dividing line is used to divide the ridge waveguide 100 into a plurality of etching regions, so as to control the etching rates of different etching regions respectively.

[0067] In some embodiments, step S20 includes: determining a ridge width gradient region of the ridge waveguide 100 based on a change trend of the ridge width of the ridge waveguide 100; determining a median value of the ridge width in the ridge width gradient region, and determining a boundary region based on the median value of the ridge width in the ridge width gradient region, wherein the number of median values ​​of the ridge width is at least one; determining a boundary line in the boundary region, wherein the boundary line is used to divide the etching region of the ridge waveguide, and the number of the etching regions is at least two.

[0068] In this embodiment, the ridge width in the ridge width gradient region may be uniform or non-uniform. A boundary region is defined around the location of the median of the ridge width, and the boundary region may be a strip region, and the width may be adjusted according to actual needs.

[0069] In some embodiments, the second ridge waveguide segment 31 corresponds to the ridge width gradient region, the median value of the ridge width of the second ridge waveguide segment 31 is determined, and the boundary region is determined based on the median value of the ridge width of the second ridge waveguide segment 31; a boundary line is determined in the boundary region, and the boundary line is used to divide the ridge waveguide 100 into Figure 6 The first etching region 11 and the second etching region 21 are shown.

[0070] In this embodiment, the ridge width in the second ridge waveguide segment 31 varies uniformly, that is, the position where the median of the ridge width of the second ridge waveguide segment 31 is located coincides with the central axis of the second ridge waveguide segment 31 .

[0071] Exemplarily, the median of the ridge width of the second ridge waveguide segment 31 is located at 50% of the length of the second ridge waveguide segment 31 (at the central axis), so the boundary area can be positioned in the interval of 45%-55% of the length of the second ridge waveguide segment 31, and the boundary line can be at any position within this interval and can be set according to actual needs.

[0072] After the boundary line is determined in the boundary area, the position of the boundary line can be marked with a marking material to facilitate subsequent etching operations.

[0073] It is particularly important to note that the boundary line may coincide with the location of the median ridge width of the ridge width gradient region (the central axis of the second ridge waveguide segment 31). When the boundary line is located at the location of the median ridge width of the ridge width gradient region (the central axis of the second ridge waveguide segment 31), the ridge width of the ridge waveguide in the etched region on both sides of the boundary line changes more uniformly, which can improve the quality and consistency of etching.

[0074] In step S30 , the photoresist 50 and the insulating layer 40 in the etching area are etched respectively to obtain an electrode window on the ridge waveguide 100 .

[0075] In this embodiment, the etching order of different etching regions is not limited. After etching the photoresist and the insulating layer in any etching region, the photoresist and the insulating layer in any other etching region may be etched.

[0076] Exemplarily, the present embodiment does not limit the etching order of the first etching area 11 and the second etching area 21. Taking the first etching area 11 being etched first as an example, the photoresist in the first etching area 11 is etched; after it is determined that the photoresist in the first etching area 11 is etched clean, the insulating layer 40 in the first etching area 11 is etched; the remaining photoresist in the first etching area 11 is removed; the photoresist in the second etching area 21 is etched; after it is determined that the photoresist in the second etching area 21 is etched clean, the insulating layer 40 in the second etching area 21 is etched; and the remaining photoresist in the second etching area 21 is removed.

[0077] In this embodiment, the ridge waveguide 100 is divided into a first etching area 11 and a second etching area 21 by a dividing line, and the two areas are etched step by step. This step-by-step etching method can effectively solve the problem of inconsistent etching rates of the narrow head and the wide head parts in the traditional etching process, ensure the uniformity of the etching process, avoid excessive etching of the narrow head part and insufficient etching of the wide head part, thereby reducing the risk of electrochemical corrosion and avoiding the effect of void drilling. This not only improves the appearance quality and performance stability of the semiconductor laser, but also enhances the single-mode characteristics and high-power output, meeting the strict requirements of the field of optical fiber communication. In addition, by controlling the etching process in the early stage, the cost waste and rework caused by etching problems in the subsequent process are reduced, thereby reducing the overall production cost. In summary, the present application significantly improves the performance and reliability of semiconductor lasers, while optimizing the manufacturing process, and has important practical value.

[0078] In one embodiment, Figure 7 As shown, the step of coating the photoresist 50 on the insulating layer 40 in step S10 includes:

[0079] Step A10 , coating a reverse photoresist on the insulating layer 40 , wherein the upper surface of the reverse photoresist is higher than the top surface of the ridge waveguide 100 .

[0080] In this embodiment, the reverse photoresist is a positive and negative dual-purpose photoresist, and the specific properties depend on the exposure and processing steps.

[0081] Exemplarily, the reverse photoresist is spin-coated on the insulating layer 40 at a rotation speed of 3000 pm, a thickness of 1.1-1.2 um, and a spin-coating time of 50 s.

[0082] Step A20 , exposing the reverse photoresist to transform the reverse photoresist into negative photoresist 51 .

[0083] In this embodiment, the reverse photoresist is fully exposed for a preset time by a photolithography device, and full exposure refers to the process of uniformly applying ultraviolet light to the entire surface of the reverse photoresist. The reverse photoresist after exposure is baked, and this step is also called Post-Exposure Bake (PEB), which can promote the chemical reaction of the exposed part of the reverse photoresist, making it more stable, so that it is easier to remove or retain in the subsequent development process.

[0084] Exemplarily, a photolithography device is used for exposure, flood-E (flood exposure) for 3.5 seconds, followed by film frying at 150° C. for 120 seconds; then, a photolithography device is used for flood-E for 24 seconds to change the properties of the reverse photoresist from positive photoresist to negative photoresist.

[0085] Step A30 , spin coating a positive photoresist 52 on the negative photoresist 51 .

[0086] Exemplarily, a positive photoresist is then spin-coated on the negative photoresist at a rotation speed of 3500 rpm, a photoresist thickness of 3.3 um, and a spin-coating time of 1 min.

[0087] It should be noted that, in this embodiment, the above steps of coating the photoresist may be performed in the first etching area 11 and the second etching area 21 respectively, or without partitioning.

[0088] In one embodiment, the step of etching the photoresist in any etching area in step S30 includes: exposing and developing the positive photoresist in any etching area to form a plurality of etching windows; and etching the negative photoresist based on the etching windows.

[0089] Taking etching of the photoresist in the first etching area 11 as an example, the positive photoresist 52 in the first etching area 11 is exposed and developed to form a Figure 8 The first etching window 60 shown is shown. Specifically, a photolithography device can be used to perform exposure in a soft mode of 60±3 mJ, and the first etching window 60 can be formed after development. Based on the first etching window 60, the negative photoresist 51 in the first etching region 11 is etched.

[0090] For example, Fig. 9 As shown, RIE (Reactive Ion Etching, carbon tetrafluoride reactive ion etcher) is used to etch the negative photoresist 51 in the first etching area 11. The oxygen flow rate is 20 standard cubic centimeters per minute (sccm), the chamber pressure is 40 millitorr (mT), the radio frequency power is 120 watts (W), and the etching time is 7 to 8 minutes.

[0091] Taking etching the photoresist in the second etching area 21 as an example, the positive photoresist 52 in the second etching area 21 is exposed and developed to form a second etching window; and the negative photoresist 51 in the second etching area 21 is etched based on the second etching window.

[0092] The specific implementation process of this embodiment is consistent with the implementation process of etching the negative photoresist 51 in the first etching area 11 based on the first etching window 60 in the above embodiment, and the only difference is that the etching time of RIE is changed to 11min-12.5min.

[0093] In some embodiments, the width of the positive photoresist in the etching area is greater than the etching width of the etching area, and the etching width refers to the width of the widest part of the ridge waveguide in the etching area. For example, the width of the positive photoresist 52 in the first etching area 11 is greater than the etching width of the first etching area 11, and the width of the positive photoresist 52 in the second etching area 21 is greater than the etching width of the second etching area 21. This embodiment is to avoid the first etching window or the second etching window being formed due to the projection error of the photolithography equipment. Fig.10 The alignment deviation shown causes the insulating layer 40 on the ridge waveguide 100 to be over-etched on one side and under-etched on the other side.

[0094] In one embodiment, in view of the process precision error of the projection of the lithography equipment, in order to avoid overlap of any two adjacent etching windows, an intermediate area is formed between any two adjacent etching windows, and the width of the intermediate area is greater than or equal to the precision error of the lithography equipment. The lithography equipment is used to etch the photoresist and the insulating layer in the etching area.

[0095] like Fig.11 As shown, an intermediate area is formed between the first etching window and the second etching window, and a width d3 of the intermediate area is greater than or equal to the precision error of the lithography equipment.

[0096] In some embodiments, before forming the etching windows (such as the first etching window 60 and the second etching window), an intermediate area is reserved.

[0097] In some embodiments, after the etching of the first etching region 11 is completed and before the second etching window is formed, an intermediate region is reserved.

[0098] In some embodiments, after the etching of the second etching region 21 is completed and before the first etching window is formed, an intermediate region is reserved.

[0099] For example, since the process accuracy of Huang Guang is ±1.5um, an intermediate area with d5≥1.5um is formed between the first etching window 60 and the second etching window. Although the existence of the intermediate area will lead to the existence of SiNx residues with a size greater than or equal to 1.5um, the size of the residual area is much smaller than the chip size and will not affect the current injection area, thereby ensuring that the electrical characteristics and reliability of the product will not change.

[0100] In one embodiment, Fig.12 As shown, etching the negative photoresist 51 based on the etching window includes:

[0101] Step B10, etching the negative photoresist 51 for a reference time based on the etching window.

[0102] In this embodiment, the first-piece operation is adopted to etch the negative photoresist 51, and according to the first-piece etching time, the benchmark etching time of the semiconductor ridge waveguides in the same batch for the negative photoresist 51 is determined. For example, if the first piece is etched to be clean for 13 minutes, the negative photoresist of this batch is etched according to the benchmark time of 12.5 minutes, and then the etching is supplemented in the preset time unit.

[0103] For example, during the etching process of the second etching area 21 of the first wafer, 11 minutes is used as the reference time.

[0104] Step B20, monitoring the color representation of whether there is negative photoresist 51 on the insulating layer 40 to determine whether the negative photoresist 51 is etched cleanly.

[0105] In this embodiment, the thickness of the insulating layer 40 is greater than 100 nm, and may be 130 nm SiNx, and the color is light, and the difference from the negative photoresist 51 can be clearly seen, and thus the color of the negative photoresist 51 is used to represent, for example Fig.13 The framed portion shown can be used to determine whether the negative photoresist 51 is etched cleanly.

[0106] Step B30 , if the negative photoresist 51 is not completely etched, then the negative photoresist 51 is supplementally etched according to a preset time unit until there is no color representation of the negative photoresist 51 on the insulating layer 40 .

[0107] Exemplarily, the preset time unit is 1 minute. After performing supplementary etching for 1 minute (preset time unit), step B20 is performed again to observe whether the negative photoresist 51 is etched cleanly. If it is not etched cleanly, supplementary etching is performed for 1 minute (preset time unit) and step B20 is performed again until there is no color representation of the negative photoresist 51 on the insulating layer 40.

[0108] In some embodiments, step B30 further includes:

[0109] Step B40, etching the insulating layer 40.

[0110] Exemplarily, an ICP (Inductively Coupled Plasma, inductively coupled plasma etcher) is used to etch the SiNx film (insulating layer 40), the chamber pressure is 4 mT, the inductively coupled plasma power is 100 watts (W), the radio frequency power is 40 watts (W), the trifluoromethane (CHF3) flow rate is 18 standard cubic centimeters per minute (sccm), and the time is 3min05s.

[0111] In some embodiments, a preset etching time is calculated based on the etching depth and etching rate of the insulating layer 40 in the etching area; the insulating layer 40 in the etching area is etched according to the preset etching time to obtain an electrode window on the ridge waveguide 100 .

[0112] In some embodiments, Fig.14 As shown, the cross-sectional structure of the ridge waveguide 100 is a polygon, which includes an upper trapezoid and a lower trapezoid, and the etching depth of the insulating layer 40 is in the middle of the upper trapezoid. If the shape of the ridge waveguide 100 is a rectangle, a trapezoid, etc., the etching depth can still be determined by the position to be etched.

[0113] It should be noted that when etching SiNx, ICP will first perform cleaning to remove residues in the etching chamber to ensure that the inside of the chamber is clean. Use 2 dummy wafers to preheat the etching equipment. Among them, the dummy wafers are non-production samples used to test and calibrate the equipment. Use dummy wafers to perform etching tests and measure the etching rate. According to the formula: expected etching time = etching depth of insulating layer 40 / test machine rate, the etching depth of insulating layer 40 can be equal to the thickness of insulating layer 40 * 1.1.

[0114] It should be noted that the silicon nitride etching stop position is in the middle of the upper and lower edges of the small trapezoid, and cannot be flush with the upper and lower edges. If it is flush with the upper edge, due to the accuracy of the photolithography equipment, a part of the silicon nitride will remain on the upper edge, affecting the stability of the device in the later stage; if it is flush with the lower edge, in the cleaning step before making the electrode after etching, the cleaning material will corrode the sharp corners of the large trapezoid below, and the material of the ridge waveguide is a high-aluminum material, which will affect the device.

[0115] Step B50 , removing the remaining photoresist on the insulating layer 40 .

[0116] For example, in the SKM (Solvent Kinetic Module) chamber, NMP (N-Methyl-2-pyrrolidone) was soaked for 20 minutes. In the SCH (Spray Cleaning Head) chamber, NMP was used for high-pressure and normal-pressure cleaning, and in the CCH (Chemical Cleaning Head) chamber, acetone + IPA (Isopropyl Alcohol) was used for normal-pressure cleaning, and finally dried.

[0117] In this embodiment, by designing the mask size of the secondary exposure process and combining the overetching amount of the negative photoresist 51 by RIE (reactive ion etching), the problem of too large difference in window depth and width caused by the original process that does not consider the change in the ridge width of the ridge waveguide 100 is avoided, thereby obtaining SiNx (narrow head 10, wide head 20) with the same height from the top, thereby optimizing the electrical performance and reliability of the device. It is achieved that the electrical performance and reliability requirements of single-mode high-power products are met while retaining the double-layer glue process, without the need to introduce other equipment, and reducing production costs.

[0118] In addition, the present embodiment also provides a ridge waveguide, which is prepared based on the aforementioned ridge waveguide preparation method. Benefiting from the aforementioned ridge waveguide preparation method, the ridge waveguide provided in the present embodiment is not affected by the change in ridge width, has the same SiNx height from the top, reduces the risk of electrochemical corrosion, and avoids the effect of void drilling. At the same time, the cost waste and rework caused by etching problems in subsequent processes are reduced, thereby reducing the overall production cost. In addition, the present embodiment also provides a laser, which includes the aforementioned ridge waveguide 100. Benefiting from the ridge waveguide 100 prepared according to the above-mentioned ridge waveguide preparation method, the laser provided in the present embodiment has good appearance quality and performance stability, and also enhances single-mode characteristics and high-power output, meeting the strict requirements in the field of optical fiber communication. In addition, by controlling the etching process in the early stage, the cost waste and rework caused by etching problems in subsequent processes are reduced, thereby reducing the overall production cost. In summary, the present embodiment significantly improves the performance and reliability of semiconductor lasers, while optimizing the manufacturing process, and has important practical value.

[0119] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

[0120] In addition, those skilled in the art will appreciate that, although some embodiments herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the above claims, any one of the claimed embodiments may be used in any combination. The information disclosed in this background technology section is intended only to deepen the understanding of the overall background technology of the present application and should not be regarded as an admission or in any form of implication that the information constitutes prior art known to those skilled in the art.

Claims

1. A method for preparing a ridge waveguide, characterized in that: The method comprises: Depositing an insulating layer on the surface of a ridge waveguide and coating a photoresist on the insulating layer, wherein the ridge waveguide includes at least two ridge waveguide segments; Determining a ridge width gradient changing region of the ridge waveguide based on a changing trend of the ridge width of the ridge waveguide; Determine the median value of the ridge width of the ridge width gradient region, and determine the boundary region based on the median value of the ridge width of the ridge width gradient region, wherein the number of the median values ​​of the ridge width is at least one; Determine a boundary line in the boundary area, wherein the boundary line is used to divide the etching area of ​​the ridge waveguide, and the number of the etching areas is at least two; Determine an etching area according to the dividing line; The photoresist and the insulating layer in the etching area are etched respectively to form an electrode window on the ridge waveguide.

2. The method for preparing a ridge waveguide according to claim 1, characterized in that: The etching of the photoresist and the insulating layer in the etching area respectively to obtain an electrode window on the ridge waveguide includes: Calculating a preset etching time according to the etching depth and etching rate of the insulating layer in the etching area; The insulating layer in the etching area is etched according to the preset etching time to obtain an electrode window on the ridge waveguide.

3. The method for preparing a ridge waveguide according to any one of claims 1 to 2, characterized in that: The step of coating photoresist on the insulating layer comprises: Coating an inverse photoresist on the insulating layer, wherein an upper surface of the inverse photoresist is higher than a top surface of the ridge waveguide; Exposing the reverse photoresist to light, so that the reverse photoresist is converted into a negative photoresist; A positive photoresist is spin-coated on the negative photoresist.

4. The method for preparing a ridge waveguide according to claim 3, characterized in that: The etching of the photoresist and the insulating layer in the etching area respectively comprises: Exposing and developing the positive photoresist in any of the etching areas to form a plurality of etching windows; The negative photoresist is etched based on the etching window.

5. The method for preparing a ridge waveguide according to claim 4, characterized in that: The width of the positive photoresist in the etching area for exposure and development is greater than the etching width of the etching area.

6. The method for preparing a ridge waveguide according to claim 4, characterized in that: The method further comprises: An intermediate region is formed between any two adjacent etching windows, and a width of the intermediate region is greater than or equal to a precision error of a photolithography device, and the photolithography device is used to etch the photoresist and the insulating layer in the etching region.

7. The method for preparing a ridge waveguide according to claim 4, characterized in that: The etching of the negative photoresist based on the etching window comprises: Etching the negative photoresist for a reference time based on the etching window; Monitoring whether the color representation of the negative photoresist exists on the insulating layer to determine whether the negative photoresist is etched cleanly; If the negative photoresist is not completely etched, the negative photoresist is supplementally etched according to a preset time unit until there is no color representation of the negative photoresist on the insulating layer.

8. The method for preparing a ridge waveguide according to claim 7, characterized in that: The deposition thickness of the insulating layer is greater than 100 nanometers.

9. A ridge waveguide, characterized in that: The ridge waveguide is manufactured based on the ridge waveguide manufacturing method according to any one of claims 1 to 8.

10. A laser, characterized in that: The laser comprises a ridge waveguide as claimed in claim 9.

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