Test method and system of high-speed counter, storage medium and computer program product
By conducting tests in the finished product stage of high-speed counters, the cooperation of execution controller and communication coupler is used to solve the problem of low test accuracy in the PCBA stage, achieving higher test accuracy and production efficiency.
Patent Information
- Application Number
- CN202411270538.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-11
- Publication Date
- 2025-01-14
AI Technical Summary
In the PCBA stage, high-speed counters are susceptible to factors such as electromagnetic interference, mechanical vibration and temperature changes, resulting in low test accuracy.
During the finished product stage, the control signal is sent to the product equipped with the high-speed counter by executing the controller, obtaining the test results, and determining the test results of the high-speed counter based on these results. The rationality of the test data is determined using the communication coupler and preset standards. If the test data is passed Then the database is processed. If it is not passed, locate and fix the exception.
It improves the accuracy of high-speed counter testing, reduces errors and fault points in subsequent links, and achieves higher test accuracy and production efficiency.
Smart Images
Figure CN119311488A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of product testing, and in particular to a testing method for a high-speed counter, a testing system for a high-speed counter, a storage medium, and a computer program product. Background Art
[0002] At present, factories conduct board testing on high-speed counters during the PCBA (Printed Circuit Board Assembly) stage. In the subsequent links, a large number of interference factors will be introduced, such as electromagnetic interference, mechanical vibration, temperature changes, etc., resulting in low accuracy of high-speed counter testing.
[0003] The above contents are only used to assist in understanding the technical solution of the present application and do not constitute an admission that the above contents are prior art. Summary of the invention
[0004] The main purpose of the present application is to provide a high-speed counter testing method, a high-speed counter testing system, a storage medium and a computer program product, aiming to solve the technical problem of low accuracy in high-speed counter testing.
[0005] To achieve the above object, the present application proposes a high-speed counter testing method, the method comprising:
[0006] In a test system equipped with a finished high-speed counter product, obtain the control code of the execution controller;
[0007] Starting the execution controller according to the control code;
[0008] The execution controller sends a control signal to a product equipped with a high-speed counter, obtains a first test result of the product responding to the control signal, and determines a second test result of the high-speed counter based on the first test result.
[0009] In one embodiment, the method further comprises:
[0010] Reading the configuration between the communication coupler and the high-speed counter, wherein the communication coupler is combined and connected with the high-speed counter;
[0011] If the communication coupler fails to communicate, and / or the communication coupler is incorrectly configured, an alarm is issued.
[0012] In one embodiment, the step of obtaining a first test result of the product responding to the control signal includes:
[0013] Obtaining test data of the high-speed counter through a communication coupler;
[0014] According to the preset standard, determining whether the test data meets the preset expected value under the preset standard;
[0015] If the preset expected value is met, the first test result is that the test passes;
[0016] If the preset expected value is not met, the first test result is that the test fails.
[0017] In one embodiment, historical test data and historical test results of the high-speed counter are obtained, wherein the historical test data includes the frequency of the high-speed pulse signal received by the high-speed counter, the number of the high-speed pulse signals, and the time interval between adjacent high-speed pulse signals;
[0018] According to the historical test data and historical test results, a prediction model is trained;
[0019] The type of test data that affects the test result is selected from the historical test data through the prediction model.
[0020] In one embodiment, after the step of determining the second test result of the high-speed counter based on the first test result, the following steps are included:
[0021] If the second test result is that the test is passed, the product equipped with the high-speed counter is put into storage;
[0022] If the second test result is that the test fails, the abnormality in the test is located and repaired.
[0023] In one embodiment, the step of sending a control signal to a product equipped with a high-speed counter by the execution controller includes:
[0024] Read the configuration of the communication coupler;
[0025] If the communication coupler communicates successfully and / or the communication coupler is configured correctly, the test program of the execution controller is started according to the test code, so that the execution controller sends a control signal to the product.
[0026] In addition, to achieve the above-mentioned purpose, the present application also proposes a high-speed counter testing system, which includes: an industrial computer, an execution controller, a communication coupler and a high-speed counter, and the testing system is configured to implement the steps of the high-speed counter testing method as described above.
[0027] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the high-speed counter testing method described above are implemented.
[0028] In addition, to achieve the above-mentioned purpose, the present application also provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the steps of the high-speed counter testing method described above are implemented.
[0029] Compared with the traditional board test of the high-speed counter at the PCBA stage, a large number of interference factors will be introduced in the subsequent links, resulting in low accuracy of the high-speed counter test; while in the finished product stage, the present application sends a control signal to the product equipped with the finished high-speed counter by executing the controller to obtain a first test result of the product, and obtains a second test result of the high-speed counter based on the first test result; the product equipped with the finished high-speed counter is tested, which changes the traditional board test method of the high-speed counter test, obtains the second test result of the high-speed counter based on the first test result, and indirectly obtains the test result of the high-speed counter according to the test result of the product, thereby eliminating the introduction of additional errors or fault points in the subsequent links of the board test method, and achieving a technical effect of high accuracy in testing the high-speed counter. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0031] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0032] Figure 1 A flowchart diagram of a first embodiment of a method for testing a high-speed counter of the present application;
[0033] Figure 2 A flowchart diagram of a second embodiment of a method for testing a high-speed counter of the present application;
[0034] Figure 3 A brief flowchart diagram of the third embodiment of the test method of the high-speed counter of the present application;
[0035] Figure 4 This is a brief flow chart of the test system of the high-speed counter of this application;
[0036] Figure 5 This is a schematic diagram of the device structure of the hardware operating environment involved in the testing method of the high-speed counter of this application.
[0037] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0038] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.
[0039] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.
[0040] It should be noted that the execution subject of this embodiment may be an industrial computer, or a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device, a processor, etc. capable of realizing the above functions. The following takes an industrial computer as an example to illustrate this embodiment and the following embodiments.
[0041] Based on this, the present application embodiment provides a high-speed counter testing method, referring to Figure 1 , Figure 1 This is a flow chart of a first embodiment of a testing method for a high-speed counter of the present application.
[0042] In this embodiment, the high-speed counter testing method includes steps S10 to S30:
[0043] Step S10, obtaining a control code of an execution controller in a test system equipped with a high-speed counter finished product;
[0044] It should be noted that a high-speed counter is an electronic device that can process high-speed pulse signals and is used to measure the speed and position of high-speed rotating or moving objects. In the field of industrial automation, it is used in motor control, packaging machinery, printing equipment, etc. High-speed counters can capture and count high-speed pulses for real-time monitoring and control of mechanical movement. This application is to test products equipped with high-speed counters at the finished product stage. The finished product stage is the last stage of the product production process, and the product has completed all manufacturing and assembly processes at this stage.
[0045] The execution controller is responsible for receiving and processing signals from the industrial computer, and sending high-speed pulse signals to the high-speed counter according to the signals from the industrial computer. The control code is a set of instructions in the industrial computer used to control the behavior of the device, which is used to control the execution controller to respond to various input signals and perform specific actions.
[0046] Step S20, starting the execution controller according to the control code;
[0047] It should be noted that in the test system of the high-speed counter, the industrial computer activates the execution controller according to the control logic pre-set in the control code.
[0048] Step S30, sending a control signal to a product equipped with a high-speed counter by executing the controller, obtaining a first test result of the product responding to the control signal, and determining a second test result of the high-speed counter based on the first test result.
[0049] It should be noted that the control signal is a series of high-speed pulse signals sent by the execution controller, which is used to test the product equipped with the high-speed counter; the product response refers to the actual operation of the product after receiving the control signal. By monitoring the product response, it can be ensured whether the product is operating normally. In this process, the execution controller tests the product by sending the control signal and determines the test result of the high-speed counter based on the product response.
[0050] Determining the second test result of the high-speed counter based on the first test result means that if all the functional test results related to the high-speed counter on the product pass, the test result of the high-speed counter passes.
[0051] In one embodiment, after step S30, steps A10 to A20 are included:
[0052] Step A10, reading the configuration of the communication coupler;
[0053] It should be noted that the operator writes the code for configuring the communication protocol in the industrial computer, connects the industrial computer and the communication coupler, and reads the configuration of the communication coupler after the connection; wherein the communication coupler is an interface device used to connect different networks or devices, which allows data to be transmitted between different communication protocols or physical layers. Configuration refers to the process of configuring the parameters of the hardware device to ensure that the industrial computer can correctly communicate and interact with the product equipped with the high-speed counter.
[0054] Step A20: If the communication coupler communicates successfully and / or the communication coupler is configured correctly, the test program of the execution controller is started according to the test code, so that the execution controller sends a control signal to the product.
[0055] It should be noted that, in the communication coupler, correct configuration ensures that the communication coupler can establish an effective communication connection with the industrial computer and the product equipped with the high-speed counter, ensuring smooth and accurate data transmission.
[0056] The test code is a set of programming instructions for automated testing, which is used to test products equipped with finished high-speed counters. The test code guides the test program of the execution controller to ensure that the execution controller can correctly respond and send control signals to the product, and test the function and responsiveness of the product equipped with the finished high-speed counter.
[0057] In this embodiment, automated testing of product functions is achieved by reading the configuration of the communication coupler, starting the test program according to the conditions, and sending a control signal by the execution controller, thereby ensuring smooth communication between the industrial computer and the product, correct configuration, and functional accuracy, improving test efficiency, reducing the risk of potential failures, and improving product quality and the overall stability and reliability of the system.
[0058] The present embodiment provides a method for testing a high-speed counter. At the finished product stage, a control signal is sent to a product equipped with the finished high-speed counter by executing a controller to obtain a first test result of the product, and a second test result of the high-speed counter is obtained based on the first test result. The product equipped with the finished high-speed counter is tested, which changes the traditional board test method of the high-speed counter test, and the second test result of the high-speed counter is obtained based on the first test result, and the test result of the high-speed counter is indirectly obtained according to the test result of the product. The test at the finished product stage is closer to the application function and application scenario of the product. The current board test method is a test on the underlying logic, not a full-function test. The method for testing the high-speed counter provided by the present embodiment helps to eliminate the need for professional operators to introduce additional errors or fault points in the board test method, thereby achieving the technical effect of reducing the cost of testing high-speed counters.
[0059] In one embodiment, the high-speed counter testing method includes steps B10 to B20:
[0060] Step B10, reading the configuration between the communication coupler and the high-speed counter, wherein the communication coupler and the high-speed counter are combined and connected;
[0061] It should be noted that the combined connection means that the communication coupler and the high-speed counter are connected together in a logical manner to form a communication unit to facilitate data transmission and processing. The combined connection ensures that the industrial computer can receive the test feedback information of the high-speed counter through the communication coupler.
[0062] Step B20: If the communication coupler fails to communicate and / or the communication coupler is incorrectly configured, an alarm is issued.
[0063] It should be noted that if the communication coupler fails to communicate, it means that an interruption or error occurs during the feedback data transmission process, resulting in the feedback data being unable to reach the industrial computer within the expected time.
[0064] When the industrial computer detects an abnormal state, the alarm will promptly remind the operator on the operation interface that the communication coupler has a communication failure or configuration error, so that quick measures can be taken to prevent test failures or feedback data loss.
[0065] In this embodiment, in the automated test, the configuration information between the communication coupler and the high-speed counter is read to verify whether the connection between them is established according to the predetermined parameters and standards, to ensure that the test is correctly executed, and possible configuration errors or connection problems can be discovered and solved by reading. When a communication failure or configuration error of the communication coupler is detected, an alarm is triggered, indicating that there is a problem with the connection or configuration, which requires immediate attention and repair to ensure the stable operation of the test system and the accuracy of data transmission.
[0066] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the first embodiment can refer to the above introduction, and will not be repeated in the following. Figure 2 , step S30, the high-speed counter testing method further includes steps D10 to D40:
[0067] Step D10, obtaining the test data of the high-speed counter through the communication coupler;
[0068] It should be noted that the industrial computer obtains the test data of the high-speed counter through the communication coupler, which means using the communication coupler as an interface to read the test data from the high-speed counter, including the frequency of the high-speed pulse signal, the number of high-speed pulse signals, the time interval between adjacent pulse signals, the input type of the high-speed pulse signal, the response time of the high-speed pulse signal, and the calculation and processing response rate of the high-speed pulse signal, etc., to evaluate whether the function of the high-speed counter is normal.
[0069] Step D20, judging whether the test data meets the preset expected value under the preset standard according to the preset standard;
[0070] It should be noted that the preset standard refers to the pre-set standard during the test process, which is used to evaluate the actual test data; the preset expected value refers to the value that the test data is expected to achieve in the preset standard, which can be a specific value or a range, used to determine whether the test data meets the expected functional requirements.
[0071] Step D30, if the preset expected value is met, the first test result is the test passed;
[0072] It should be noted that if the test data is consistent with the preset expected value, the first test result will be judged as "test passed". When the test data meets the preset expected value, it indicates that the product equipped with the high-speed counter performs normally under the current test conditions and meets the established functional requirements.
[0073] Exemplarily, when the first test result is passed, it means that the finished product equipped with the high-speed counter has passed the test, and when testing the product, the part related to the high-speed counter is tested, indicating that the second test result of the high-speed counter has passed.
[0074] Step D40: If the preset expected value is not met, the first test result is that the test fails.
[0075] It should be noted that if the test data fails to reach the preset expected value, the first test result is "test failed". When the test data fails to meet the preset expected value, it indicates that the product equipped with the high-speed counter finished product fails to meet the established functional requirements under the current test conditions, indicating that the product equipped with the high-speed counter finished product has a fault and needs to be adjusted and optimized.
[0076] Exemplarily, when the first test result is a test failure, it means that the product equipped with the high-speed counter has failed the test, and when the product is tested, the part related to the high-speed counter is tested, which means that the second test result of the high-speed counter is a test failure and the high-speed counter module is faulty.
[0077] In this embodiment, by acquiring the test data of the high-speed counter in real time and comparing it with the preset standard, abnormal changes in equipment performance can be discovered in time, thereby performing early warning and maintenance, avoiding the impact of product failures equipped with high-speed counters on production efficiency and product quality, ensuring that products equipped with high-speed counters are in the best operating state, reducing maintenance costs, and thus improving production efficiency.
[0078] In one embodiment, after step S30, the high-speed counter testing method further includes steps E10 to E20:
[0079] Step E10, if the second test result is that the test is passed, the product equipped with the high-speed counter finished product is put into storage;
[0080] It should be noted that the second test result refers to a result related to the first test result, and passing the second test result means that the high-speed counter meets the preset functional requirements. Then, the product with the integrated high-speed counter component is tested or operated in the next step, such as warehousing or after-sales maintenance.
[0081] Step E20: If the second test result is that the test fails, locate and repair the abnormality in the test.
[0082] It should be noted that in the automated testing process, test failure means that the product fails to meet the predetermined functional requirements during the test, indicating that the product is defective or does not meet specifications and requires further debugging or repair; in product testing, positioning refers to determining the specific location or cause of the anomaly or failure; repair refers to taking measures to resolve the anomaly after discovering and locating the problem, so that the product or its components can be restored to the predetermined state.
[0083] In this embodiment, if the second test result is a pass, it indicates that the high-speed counter or related components have passed the preliminary functional test. Next, the product equipped with the high-speed counter will be put into storage or after-sales maintenance; when the second test result is a fail, it indicates that the product or its components performed abnormally or did not meet the requirements during the test. At this time, it is necessary to locate the abnormality in the test, find out the root cause of the problem, and then repair it to ensure that the product can meet the expected standards and functional requirements, ensure product quality control, find and solve problems in time during the testing stage, save major problems in subsequent production that affect production, and reduce the production cost of high-speed counters.
[0084] Based on the first embodiment of the present application, in the third embodiment of the present application, the same or similar contents as those in the first embodiment can refer to the above introduction, and will not be repeated later. Figure 3 The high-speed counter testing method further includes steps T10 to T30:
[0085] Step T10, obtaining historical test data and historical test results of the high-speed counter, wherein the historical test data includes the frequency of the high-speed pulse signal received by the high-speed counter, the number of the high-speed pulse signals, and the time interval between adjacent high-speed pulse signals;
[0086] It should be noted that historical test data refers to the set of measurement data recorded by the high-speed counter in the previous test cycle. These data include various properties of high-speed pulse signals.
[0087] The frequency of a high-speed pulse signal refers to the number of times a pulse signal appears per unit time; the number of high-speed pulse signals refers to the total number of pulse signals received by a high-speed counter within a specific time period; the time interval between adjacent high-speed pulse signals refers to the time difference between two consecutive pulse signals arriving at the high-speed counter, wherein historical test data includes but is not limited to the frequency of a high-speed pulse signal, the number of high-speed pulse signals and the time interval between adjacent high-speed pulse signals.
[0088] Step T20, training a prediction model based on historical test data and historical test results;
[0089] It should be noted that historical test results refer to the conclusions drawn after analyzing historical test data, including two situations: pass and fail. Training a prediction model refers to using machine learning to take historical test data and historical test results as input; the specific training process is the same as conventional means and will not be repeated here.
[0090] Step T30, selecting the type of test data that affects the test result from the historical test data through the prediction model.
[0091] It should be noted that the types of test data refer to different types of measurement data (such as pulse frequency, number of pulses, and pulse interval, etc.), as well as their degree of influence on the test results. For example, there are 30 types of test data, but 10 types of test data actually affect the test results. The historical test data and historical test results are used as input to train the prediction model, and the 10 types of test data that affect the test results are obtained. In subsequent tests, only 10 types of test data need to be tested.
[0092] In this embodiment, the types of test data that affect the test results are selected from historical test data through a predictive model, which means using a predictive model to identify which test data features have the greatest impact on the test results, which helps to more accurately select key test data and optimize the test strategy.
[0093] The present application provides a high-speed counter test system, which includes: an industrial computer, an execution controller, a communication coupler and a high-speed counter. The test system can execute the high-speed counter test method in the first embodiment.
[0094] In one embodiment, the industrial computer is connected to the execution controller via a communication data link; the industrial computer is connected to the communication coupler via a communication data link;
[0095] The communication coupler is connected to the high-speed counter via a communication data link;
[0096] The execution controller is connected to the high-speed counter via a command data link.
[0097] For example, please refer to Figure 4 , Figure 4 A brief flow diagram of a high-speed counter test system is provided, specifically: after configuring a communication protocol, an industrial computer is electrically connected to an execution controller through a communication data link, and the execution controller is started by a control code of the industrial computer; the execution controller is connected to a product equipped with a finished high-speed counter through a communication data link, and the execution controller sends a control signal (i.e., a high-speed pulse signal) to the product equipped with the finished high-speed counter, and the product equipped with the finished high-speed counter transmits the count value data of the high-speed counter to a communication coupler in real time; the product equipped with the finished high-speed counter is combinedly connected with a communication coupler through a communication data link, and the communication coupler feeds back the count value data of the high-speed counter to the industrial computer according to the configured communication protocol, and the industrial computer obtains a first test result of the product equipped with the finished high-speed counter, and obtains a second test result of the high-speed counter according to the first test result.
[0098] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the test method of the high-speed counter of the present application. More simple transformations based on this technical concept are all within the protection scope of the present application.
[0099] In one embodiment, the present application provides a test device for a high-speed counter, and the test device for the high-speed counter includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the test method for the high-speed counter in the above-mentioned first embodiment.
[0100] Reference below Figure 5 , which shows a schematic diagram of the structure of a test device for a high-speed counter suitable for implementing an embodiment of the present application. The test device for a high-speed counter in an embodiment of the present application may include, but is not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 5 The test device of the high-speed counter shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.
[0101] like Figure 5As shown, the test equipment of the high-speed counter may include a processing device 1001 (such as a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. In RAM1004, various programs and data required for the operation of the test equipment of the high-speed counter are also stored. The processing device 1001, ROM1002 and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: an input device 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD: Liquid Crystal Display), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the high-speed counter test device to communicate with other devices wirelessly or by wire to exchange data. Although the figure shows a high-speed counter test device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems can be implemented or have alternatively.
[0102] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.
[0103] The high-speed counter test device provided by the present application adopts the high-speed counter test method in the above embodiment, which can solve the technical problem of low accuracy of high-speed counter test. Compared with the prior art, the beneficial effect of the high-speed counter test device provided by the present application is the same as the beneficial effect of the high-speed counter test method provided by the above embodiment, and other technical features in the high-speed counter test device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.
[0104] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.
[0105] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
[0106] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the test method of the high-speed counter in the above-mentioned embodiment.
[0107] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM: Random Access Memory), a read-only memory (ROM: Read Only Memory), an erasable programmable read-only memory (EPROM: Erasable Programmable Read Only Memory or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM: CD-Read Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency: Radio Frequency), etc., or any suitable combination of the above.
[0108] The computer-readable storage medium may be included in the test device of the high-speed counter; or may exist independently without being assembled into the test device of the high-speed counter.
[0109] The above-mentioned computer-readable storage medium carries one or more programs. When the above-mentioned one or more programs are executed by the test equipment of the high-speed counter, the test equipment of the high-speed counter: obtains the control code of the execution controller in the test system equipped with the finished product of the high-speed counter; starts the execution controller according to the control code; sends a control signal to the product equipped with the finished product of the high-speed counter through the execution controller, obtains a first test result of the product responding to the control signal, and determines a second test result of the high-speed counter based on the first test result.
[0110] Computer program code for performing the operations of the present application may be written in one or more programming languages or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0111] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.
[0112] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.
[0113] The readable storage medium provided by the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned high-speed counter test method, and can solve the technical problem of low accuracy of high-speed counter testing. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided by the present application are the same as the beneficial effects of the high-speed counter test method provided by the above-mentioned embodiment, and will not be repeated here.
[0114] The present application also provides a computer program product, including a computer program, wherein when the computer program is executed by a processor, the steps of the high-speed counter testing method as described above are implemented.
[0115] The computer program product provided by the present application can solve the technical problem of low accuracy of high-speed counter testing. Compared with the prior art, the beneficial effects of the computer program product provided by the present application are the same as the beneficial effects of the high-speed counter testing method provided by the above embodiment, which will not be repeated here.
[0116] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present application.
Claims
1. A method for testing a high-speed counter, characterized in that: The testing method of the high-speed counter comprises: In a test system equipped with a finished high-speed counter product, obtain the control code of the execution controller; Starting the execution controller according to the control code; The execution controller sends a control signal to a product equipped with a high-speed counter, obtains a first test result of the product responding to the control signal, and determines a second test result of the high-speed counter based on the first test result.
2. The method for testing a high-speed counter as claimed in claim 1, characterized in that: The method further comprises: Reading the configuration between the communication coupler and the high-speed counter, wherein the communication coupler is combined and connected with the high-speed counter; If the communication coupler fails to communicate, and / or the communication coupler is incorrectly configured, an alarm is issued.
3. The method for testing a high-speed counter as claimed in claim 1, characterized in that: The step of obtaining a first test result of the product responding to the control signal comprises: Obtaining test data of the high-speed counter through a communication coupler; According to the preset standard, determining whether the test data meets the preset expected value under the preset standard; If the preset expected value is met, the first test result is that the test passes; If the preset expected value is not met, the first test result is that the test fails.
4. The method for testing a high-speed counter as claimed in claim 1, characterized in that: The control signal comprises a high-speed pulse signal, and the method comprises: Acquire historical test data and historical test results of the high-speed counter, wherein the historical test data includes the frequency of the high-speed pulse signal received by the high-speed counter, the number of the high-speed pulse signals, and the time interval between adjacent high-speed pulse signals; According to the historical test data and the historical test results, a prediction model is trained; The type of test data that affects the test result is selected from the historical test data through the prediction model.
5. The method for testing a high-speed counter as claimed in claim 1, characterized in that: After the step of determining the second test result of the high-speed counter based on the first test result, the method further comprises: If the second test result is that the test is passed, the product equipped with the high-speed counter is put into storage; If the second test result is that the test fails, the abnormality in the test is located and repaired.
6. The high-speed counter testing method as claimed in claim 1, characterized in that: The step of sending a control signal to a product equipped with a high-speed counter finished product through the execution controller includes: Read the configuration of the communication coupler; If the communication coupler communicates successfully and / or the communication coupler is configured correctly, the test program of the execution controller is started according to the test code, so that the execution controller sends a control signal to the product.
7. A high-speed counter test system, characterized in that: The test system comprises: an industrial computer, an execution controller, a communication coupler and a high-speed counter. The system is configured to implement the steps of the high-speed counter test method as claimed in any one of claims 1 to 6.
8. The high-speed counter test system as claimed in claim 7, characterized in that: The industrial computer is connected to the execution controller via a communication data link; The industrial computer is connected to the communication coupler via a communication data link; The communication coupler is connected to the high-speed counter via a communication data link; The execution controller is connected to the high-speed counter via a command data link.
9. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the high-speed counter test method according to any one of claims 1 to 6 are implemented.
10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the steps of the high-speed counter testing method according to any one of claims 1 to 6 are implemented.