Line speed flow test method and device of switch, switch and medium

Abstract

The invention relates to a line speed flow test method and device of a switch, the switch and a medium, and the method comprises the steps: constructing a test message through employing a central processing unit; a plurality of test messages are respectively sent to head ports of the to-be-tested port groups by using the central processing unit, and the plurality of test messages are sequentially and circularly forwarded at a plurality of to-be-tested ports in the to-be-tested port groups, so that the forwarding flow reaches the line speed of each to-be-tested port, and corresponding test data streams are formed; according to the invention, each test data stream is used to carry out a line speed flow test on the to-be-tested ports in each to-be-tested port group, so that the use of a tester is avoided, the test cost is reduced, the test networking is simplified, and the test success rate and efficiency are improved.

Description

Technical Field

[0001] The present application relates to the field of network application technology, and in particular to a line-speed flow testing method, device, switch and medium for a switch. Background Art

[0002] With the rise of big data and cloud computing, the requirements for data center network throughput are getting higher and higher, and the bandwidth of network switches is also getting larger and larger. Currently, the single-port width of mainstream network switches is basically 400G, 200G, and 100G. Usually, after the factory processes the complete machine, it is necessary to perform traffic line speed testing to verify whether the switch chip and hardware design meet the established specifications.

[0003] The traditional test method is to connect the device under test and the tester in series through a cable, and then use the tester to import 100% line speed traffic to the device under test for verification. The specific message forwarding line is as follows: Figure 1 As shown. However, at present, testers with a single port rate greater than 100G are very expensive. For example, the price of a 400G tester is as high as hundreds of thousands, which leads to very high production and processing costs, seriously hindering the expansion of production batches. In addition, when connecting the tester with a cable, the aging of the cable will cause packet loss and error during the transmission process, thus causing test failures and greatly reducing the pass rate of the test. Therefore, how to find a way to replace the tester to meet the switch traffic test needs has become an urgent problem to be solved. Summary of the invention

[0004] Based on this, it is necessary to provide a line speed flow test method, device, switch and medium for a switch to address the above technical problems.

[0005] In a first aspect, an embodiment of the present application provides a line speed flow test method of a switch, wherein the switch includes a central processing unit and a switching chip, wherein the central processing unit is communicatively connected to the switching chip, wherein the switching chip includes at least one port group to be tested, each of the port groups to be tested includes a plurality of ports to be tested, and the plurality of ports to be tested are connected in series, wherein the method includes:

[0006] constructing a test message using the central processing unit;

[0007] The central processor is used to send a plurality of test messages to the first port of each of the port groups to be tested respectively, and the plurality of test messages are cyclically forwarded in turn at the plurality of ports to be tested in each of the port groups to be tested, so that the forwarding flow reaches the line speed of each of the ports to be tested, thereby forming a corresponding test data stream;

[0008] Each of the test data streams is used to perform a line speed flow test on the ports to be tested in each of the ports to be tested groups.

[0009] In one embodiment, each of the ports to be tested includes a traffic statistics interface, and making the forwarded traffic reach the line speed of each of the ports to be tested includes:

[0010] The forwarding rate of the ports to be tested is displayed in real time based on the traffic statistics interface to determine whether the forwarding traffic reaches the line speed of each port to be tested.

[0011] In one embodiment, the method further comprises:

[0012] Determine the initial number of the test messages sent to the first port of each of the port groups to be tested according to the line speed of the port to be tested in each of the port groups to be tested and the number of the ports to be tested;

[0013] In the process of sending the initial number of test messages, the forwarding rate of the port to be tested is displayed in real time based on the traffic statistics interface;

[0014] If the real-time forwarding rate does not meet the line speed of the port to be tested, the number of test messages sent is increased until the forwarding flow reaches the line speed of each port to be tested.

[0015] In one embodiment, the using of the central processor to send a plurality of test messages to the first port of each of the port groups to be tested respectively, and the plurality of test messages being cyclically forwarded in sequence at the plurality of ports to be tested in each of the port groups to be tested comprises:

[0016] Configuring a virtual local area network VLAN for each of the port groups to be tested;

[0017] Configure static MAC address entries;

[0018] Based on the static MAC address table and the virtual local area network VLAN configuration, the multiple test messages are sent to the first port of the port group to be tested; the multiple test messages are forwarded sequentially among the multiple ports to be tested in each of the port groups to be tested to form a cycle.

[0019] In one embodiment, the testing of the ports to be tested in each of the ports to be tested groups by using each of the test data streams includes:

[0020] After the test data streams are cyclically forwarded in turn at the multiple ports to be tested in each port group to be tested for a preset time, the virtual local area network between the terminal port and the first port in each port group to be tested is disconnected.

[0021] In one embodiment, each of the ports to be tested includes a test result statistics interface, and after disconnecting the virtual local area network between the end port and the first port in each of the port groups to be tested, the method includes:

[0022] Based on the test result statistics interface, the test data of each port to be tested is obtained, and the test data includes at least one of the following: the number of sent and received packets, and whether there is an error packet;

[0023] The test result of each of the ports to be tested is determined according to the test data.

[0024] In one embodiment, after the forwarding traffic reaches the line speed of each port to be tested to form a corresponding test data stream, the method further includes:

[0025] The test data stream is introduced into the first port group to be tested in the first switch from the terminal port of the port group to be tested through the virtual local area network, and a line speed flow test is performed on the ports to be tested in the first port group to be tested.

[0026] In a second aspect, an embodiment of the present application further provides a line rate flow test device for a switch, the device comprising:

[0027] A construction module, used for constructing a test message using a central processing unit of the switch;

[0028] A forwarding module, used for using the central processor to send a plurality of test messages to the first port of each port group to be tested respectively, wherein the plurality of test messages are cyclically forwarded in turn at the plurality of ports to be tested in each port group to be tested, so that the forwarding flow reaches the line speed of each port to be tested, thereby forming a corresponding test data stream;

[0029] The testing module is used to perform a line speed flow test on each port to be tested in each port group to be tested by using each test data stream.

[0030] In a third aspect, an embodiment of the present application further provides a switch, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the method as described in the first aspect above.

[0031] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, wherein the storage medium stores a computer program, wherein when the computer program is executed by a processor, the method described in the first aspect above is implemented.

[0032] The line-speed flow test method, device, switch and medium of the switch described above construct test messages by using the central processor; use the central processor to send multiple test messages to the head port of each of the port groups to be tested respectively, and the multiple test messages are cyclically forwarded in turn at the multiple ports to be tested in each of the port groups to be tested, so that the forwarding flow reaches the line speed of each port to be tested, forming a corresponding test data stream; use each of the test data streams to perform line-speed flow test on the ports to be tested in each of the port groups to be tested, thereby eliminating the use of a tester, reducing the test cost, simplifying the test networking, and improving the success rate and efficiency of the test. The flow line-speed test can be performed on ports of different rates at the same time, and can be managed separately. This feature allows the upstream port and the downstream port of the switch to be tested at the same time, further improving the test efficiency.

[0033] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0035] Figure 1 It is a schematic diagram of the message forwarding path for the switch line speed flow test using the tester;

[0036] Figure 2 is a schematic diagram of an application environment of a line-speed flow testing method for a switch in an embodiment;

[0037] Figure 3 is a schematic flow chart of a line speed flow testing method of a switch in an embodiment;

[0038] Figure 4 is a flowchart of specific steps for achieving the line speed of the port to be tested in an embodiment;

[0039] Figure 5 is a schematic diagram of a line-speed flow test application of a switch in an embodiment;

[0040] Figure 6 The structure block diagram of a line speed flow testing device of a switch in an embodiment. DETAILED DESCRIPTION

[0041] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. Based on the embodiments provided in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0042] Unless otherwise defined, the technical terms or scientific terms involved in this application should be understood by people with ordinary skills in the technical field to which this application belongs. The words "one", "a", "a", "the" and the like involved in this application do not indicate a quantitative limitation, and may represent the singular or plural. The terms "include", "comprise", "have" and any of their variations involved in this application are intended to cover non-exclusive inclusions; for example, a process, method, system, product or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units that are not listed, or may also include other steps or units inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The "multiple" involved in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three relationships, for example, "A and / or B" can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific ordering of the objects.

[0043] The switch line speed flow test method provided in this application can be applied to Figure 2 In the application environment shown. Figure 2The application environment shown includes a switch to be tested, and the switch to be tested is installed with a LINUX standard system. The switch includes a central processing unit (CPU) 10 and a switching chip (MAC chip) 20. The CPU, as the core processing unit of the computer system, has the ability to perform complex logical operations. The switching chip can provide standard interfaces for receiving and sending packets, traffic statistics, and traffic forwarding settings. The CPU and the switching chip are connected via a hardware-designed BUS channel (PCIE, MII, etc.). Among them, the switching chip includes at least one port group to be tested, and each port group to be tested has different line speed requirements. Each of the port groups to be tested includes multiple ports to be tested, wherein multiple ports to be tested are connected in series in sequence through physical lines to form a test path. All ports in each of the port groups to be tested can use self-loop heads or module docking. For example, Figure 2 As shown, the switching chip includes a tested port group with a line speed requirement of 100G and a tested port group with a line speed requirement of 400G. It should be noted that the number of tested port groups in the switch and the number of ports in each tested port group can be set according to actual needs, and this application does not limit it.

[0044] In one embodiment, Figure 3 As shown, a method for testing the line speed flow of a switch is provided, and the method is applied to Figure 2 The application environment in the example is used to illustrate the following steps:

[0045] Step 202, constructing a test message using the central processing unit;

[0046] Specifically, the switch CPU is used to construct a test message for performing a line-speed flow test on each port group to be tested, and the content and length of the test message can be constructed as required.

[0047] Step 204, using the central processor to send multiple test messages to the first port of each of the port groups to be tested, respectively, and the multiple test messages are cyclically forwarded in turn at the multiple ports to be tested in each of the port groups to be tested, so that the forwarding traffic reaches the line speed of each of the ports to be tested, forming a corresponding test data stream;

[0048] Specifically, after the switch CPU constructs the test message, the switch CPU injects multiple test messages into the first port of one or more port groups to be tested of the switch chip through the hardware-designed BUS channel (PCIE, MII, etc.). The faster the BUS channel rate, the faster the line speed is reached. For example, this embodiment uses the PCIE3.0 (8G) bus to connect the switch CPU to the switch chip for communication. Each test message stream is forwarded sequentially between all ports in the specified port group to be tested according to the configuration and the connection status in the port to form a loop. When the switch CPU injects enough test messages, multiple test messages are superimposed and the final forwarding traffic can reach the line speed of the port in the port group to be tested, forming a corresponding test data stream. In addition, the content and length of the injected test message can be customized and modified. At the same time, by configuring mirroring on the switch or through network traffic monitoring (sflow sampling) and other functions, the content of the forwarded test message can be checked and confirmed.

[0049] Continue to see Figure 2 For example, the switch CPU sends a test message to the 100G-1 first port of the 100G port group to be tested through the BUS channel. After receiving the test message, the 100G-1 first port forwards the test message to the 100G-2 port. After receiving the test message, the 100G-2 port forwards the test message to the 100G-3 port. After receiving the test message, the 100G-3 port forwards the test message to the 100G-4 port. After receiving the test message, the 100G-4 port forwards the test message to the 100G-1 first port. Each test message flow is forwarded sequentially among all ports of the port group to be tested according to the above forwarding path to form a loop. When the switch CPU injects a certain number of test message flows, multiple test messages are superimposed and the final forwarding traffic can reach the port line speed of 100G to form a test data flow.

[0050] Step 206: Perform line-speed flow test on each port to be tested in each port group to be tested by using each test data stream.

[0051] The line-speed flow test method of the switch described above constructs a test message by using the central processor; uses the central processor to send multiple test messages to the head port of each of the port groups to be tested respectively, and the multiple test messages are cyclically forwarded in turn at the multiple ports to be tested in each of the port groups to be tested, so that the forwarding flow reaches the line speed of each port to be tested, forming a corresponding test data stream; uses each of the test data streams to test the ports to be tested in each of the port groups to be tested, thereby eliminating the use of a tester, reducing the test cost, simplifying the test networking, and improving the success rate and efficiency of the test. The flow line-speed test can be performed on ports of different rates at the same time, and can be managed separately. This feature allows the upstream port and the downstream port of the switch to be tested at the same time, further improving the test efficiency.

[0052] In one embodiment, each of the ports to be tested includes a traffic statistics interface, and making the forwarding traffic reach the line speed of each of the ports to be tested includes: displaying the forwarding rate of the port to be tested in real time based on the traffic statistics interface to determine whether the forwarding traffic reaches the line speed of each of the ports to be tested.

[0053] In this embodiment, each port to be tested in each port group to be tested in the switching chip provides a traffic statistics interface. The traffic statistics function provided by the traffic statistics interface can display the port forwarding rate in real time to determine whether the forwarding traffic reaches the line speed of each port to be tested, and this function is very convenient for calculating the specific number of test messages required to achieve the established line speed.

[0054] It should be noted that the number of test messages required to achieve the port's established line speed is related to the port's established line speed. The higher the port's established line speed, the more test messages are required. For example, the number of test messages required for the 400G port group to be tested is more than the number of test messages for the 100G port group to be tested. In addition, the number of test messages required to achieve the port's established line speed is also related to the total number of ports in the port group to be tested. The more ports to be tested in the port group to be tested, the longer the transmission distance, the longer the time required for the same traffic to rotate once, and the fewer port statistics messages per unit time, so more test messages need to be sent for superposition to achieve the line speed.

[0055] In one embodiment, when performing line-speed flow test on the ports to be tested in the plurality of port groups to be tested, in order to make the forwarding flows in the different port groups to be tested reach the line speed of the ports to be tested, such as Figure 4 As shown, the method provided by the present application also includes the following steps:

[0056] Step 302, determining the initial number of the test messages sent to the first port of each of the port groups to be tested according to the line speed of the port to be tested in each of the port groups to be tested and the number of the ports to be tested;

[0057] Step 304, in the process of sending the initial number of test messages, the forwarding rate of the port to be tested is displayed in real time based on the traffic statistics interface;

[0058] Step 306: If the real-time forwarding rate does not meet the line speed of the port to be tested, increase the number of test messages sent until the forwarding flow reaches the line speed of each port to be tested.

[0059] Specifically, when the present application utilizes the central processor to send multiple test messages to the first port of each of the port groups to be tested, the initial number of test messages to be sent to the first port of each of the port groups to be tested is first determined based on the established line speed of the port to be tested in each of the port groups to be tested and the number of the ports to be tested. For example only, 100 test messages are sent to the first port of the 100G port group to be tested, and 400 test messages are sent to the first port of the 400G port group to be tested. Then the switch CPU sends a corresponding number of test messages to the first port of each of the port groups to be tested, and displays the forwarding rate of the port to be tested in real time based on the traffic statistics interface provided by each port. If the real-time forwarding rate does not meet the line speed of the port to be tested, the number of corresponding test messages sent continues to increase until the forwarding traffic reaches the line speed of each of the ports to be tested.

[0060] In one embodiment, the using of the central processor to send a plurality of test messages to the first port of each of the port groups to be tested respectively, and the plurality of test messages being cyclically forwarded in turn at the plurality of ports to be tested in each of the port groups to be tested comprises the following steps:

[0061] Step 402, configuring the virtual local area network VLAN of each of the port groups to be tested;

[0062] Step 404, configure a static MAC address entry;

[0063] Step 406: Send the multiple test messages to the first port of the port group to be tested based on the static MAC address table and the virtual local area network VLAN configuration; the multiple test messages are forwarded sequentially among the multiple ports to be tested in each of the port groups to be tested to form a loop.

[0064] In this embodiment, the switch CPU is used to send multiple test messages to the first port of each of the port groups to be tested respectively. Before the multiple test messages are forwarded in a loop in sequence at the multiple ports to be tested in each of the port groups to be tested, it is necessary to configure the virtual LAN and static MAC address on the switch chip to control the forwarding behavior of the test message in the switch chip, and then construct a specific test message and send the test message to the first port of the port group to be tested. The test message will be forwarded in sequence between the multiple ports to be tested in each of the port groups to be tested to form a loop. Specifically, the test message constructed by the switch CPU is a known unicast. After the known unicast is injected, the L2 static table entry (binding MAC address / VLAN / port) needs to be configured at the same time, otherwise the traffic cannot be forwarded normally. The rotation in sequence can be achieved by modifying the virtual LAN VLAN between different ports. Through the pre-configured static MAC address table entries, the switch CPU sends multiple test messages to the first port of the port group to be tested, and then forwards the multiple test messages in sequence among the multiple ports to be tested in each of the port groups to be tested according to the virtual LAN connection between the multiple ports to be tested in the port group to be tested, forming a cycle, and finally returns to the first port, and continues to rotate until a stop command is issued, at which time the rotation is terminated.

[0065] In one of the embodiments, the testing of the ports to be tested in each of the port groups to be tested using each of the test data streams includes the following: after cyclically forwarding each of the test data streams at multiple ports to be tested in each of the port groups to be tested for a preset time, disconnecting the virtual local area network between the end port and the first port in each of the port groups to be tested.

[0066] In this embodiment, when the multiple test messages are cyclically forwarded in sequence at the multiple ports to be tested in each of the port groups to be tested, so that the forwarding traffic reaches the line speed of each of the ports to be tested and a corresponding test data stream is formed, the test data stream is used to cyclically forward the multiple ports to be tested in the port group to be tested for a period of time. After a certain period of time, to stop the traffic, it is only necessary to disconnect the VLAN of the last port and the first port in the port group to be tested, so that all test messages sent by the first port will finally stop at the last port, ensuring that the total number of test messages sent and received by all ports is the same.

[0067] In one of the embodiments, each of the ports to be tested includes a test result statistics interface. After disconnecting the virtual local area network between the end port and the first port in each of the port groups to be tested, the following contents are also included: based on the test result statistics interface, the test data of each of the ports to be tested is obtained, and the test data includes at least one of the following: the number of packets sent and received, and whether there are error packets; based on the test data, the test results of each of the ports to be tested are determined.

[0068] Specifically, each tested port in each tested port group in the switching chip not only provides standard interfaces for receiving and sending packets, traffic statistics, and traffic forwarding settings, but also provides a test result statistics interface. Through the test result statistics interface, test information such as the number of received and sent packets of the corresponding interface and whether there are error packets can be obtained. According to the test information obtained by the interface, the line speed flow test result of the corresponding tested port can be determined. When injecting test packets, the switch CPU of the present application can construct the content, length, and number of test messages as needed; and during the injection flow process, the rate and whether there are error packets can be queried without stopping the flow. This feature can fully meet the test requirements of different scenarios.

[0069] In one of the embodiments, after making the forwarding traffic reach the line speed of each of the ports to be tested and forming a corresponding test data stream, it also includes introducing the test data stream into the first port group to be tested in the first switch from the end port of the port group to be tested through a virtual local area network, and performing a line speed traffic test on the ports to be tested in the first port group to be tested.

[0070] The switch under test in this embodiment uses the central processor to send multiple test messages to the first port of each port group under test respectively. The multiple test messages are cyclically forwarded in turn at the multiple ports under test in each port group under test, so that the forwarding traffic reaches the line speed of each port under test. After the corresponding test data stream is formed, the switch under test can function as a simple flow tester externally. The basic principle is that on the basis of the CPU injection flow test networking of the switch under test, the traffic of the last port in the port group under test is introduced into the port group under test of the docking switch through the virtual local area network (vlan), and the ports in the port group under test are tested. Line speed flow test is performed on the ports.

[0071] In an example embodiment, Figure 5 As shown, in this embodiment, the traffic of the last 100G-4 port in the 100G port group to be tested is introduced into the 100G port group to be tested of the docking switch device through the virtual LAN VLAN, so as to inject 100G line speed traffic into the port in the 100G port group to be tested of the docking switch device; in addition, the traffic of the last port in the port group to be tested can also be introduced into the port of the tester through the virtual LAN VLAN, for example, the 400G flow with a packet length of 1514 bytes injected into the CPU of the switch to be tested is led out through port 3 to the standard 400G tester, and the rate at which the tester receives valid data is 394.81G, which fully meets the line speed requirements of 98% of production.

[0072] In a second aspect, the present application also provides a switch line speed flow test device, such as Figure 6 As shown, the device includes a construction module 100, a forwarding module 200, and a testing module 300, wherein:

[0073] The construction module 100 is used to construct a test message using the central processing unit of the switch.

[0074] The forwarding module 200 is used to use the central processor to send multiple test messages to the first port of each port group to be tested respectively. The multiple test messages are cyclically forwarded in turn at the multiple ports to be tested in each port group to be tested, so that the forwarding traffic reaches the line speed of each port to be tested, forming a corresponding test data stream.

[0075] The testing module 300 is used to perform a line speed flow test on each port to be tested in each port group to be tested by using each test data stream.

[0076] In one embodiment, each of the ports to be tested includes a traffic statistics interface, and the forwarding module 200 is further used to: display the forwarding rate of the port to be tested in real time based on the traffic statistics interface to determine whether the forwarding traffic reaches the line speed of each port to be tested.

[0077] In one of the embodiments, the forwarding module 200 is also used to: determine the initial number of test messages sent to the first port of each port group to be tested based on the line speed of the port to be tested in each port group to be tested and the number of the ports to be tested; in the process of sending the initial number of test messages, display the forwarding rate of the port to be tested in real time based on the traffic statistics interface; if the real-time forwarding rate does not meet the line speed of the port to be tested, increase the number of test messages sent until the forwarding traffic reaches the line speed of each port to be tested.

[0078] In one of the embodiments, the device also includes a configuration module 400, which is used to: configure the virtual local area network VLAN of each of the port groups to be tested; configure the static MAC address table entries; based on the static MAC address table entries and the virtual local area network VLAN configuration, send the multiple test messages to the first port of the port group to be tested; the multiple test messages are forwarded sequentially among the multiple ports to be tested in each of the port groups to be tested to form a loop.

[0079] In one embodiment, the test module 300 is further used to: disconnect the virtual local area network between the end port and the first port in each of the tested port groups after the test data streams are cyclically forwarded in sequence at multiple tested ports in each of the tested port groups for a preset time.

[0080] In one embodiment, each of the ports to be tested includes a test result statistics interface. After disconnecting the virtual local area network between the end port and the first port in each of the port groups to be tested, the test module 300 is also used to: obtain test data of each of the ports to be tested based on the test result statistics interface, and the test data includes at least one of the following: the number of packets sent and received, and whether there are error packets; determine the test results of each of the ports to be tested based on the test data.

[0081] In one of the embodiments, after the forwarding traffic is made to reach the line speed of each of the ports to be tested and a corresponding test data stream is formed, the test module 300 is also used to: introduce the test data stream into the first port group to be tested in the first switch from the end port of the port group to be tested through a virtual local area network, and perform a line speed traffic test on the ports to be tested in the first port group to be tested.

[0082] In one of the embodiments, the embodiment of the present application further provides a switch, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps in any of the above-mentioned embodiments of the line speed flow testing method for the switch are implemented.

[0083] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in any of the above-mentioned embodiments of the line-speed flow test method for a switch are implemented.

[0084] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory or optical memory, etc. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0085] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0086] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A method for testing the line speed flow of a switch, wherein the switch comprises a central processing unit and a switching chip, wherein the central processing unit is connected to the switching chip, wherein the switching chip comprises at least one port group to be tested, wherein each port group to be tested comprises a plurality of ports to be tested, and wherein the plurality of ports to be tested are connected in series, wherein: The method comprises: constructing a test message using the central processing unit; The central processor is used to send a plurality of test messages to the first port of each of the port groups to be tested respectively, and the plurality of test messages are cyclically forwarded in turn at the plurality of ports to be tested in each of the port groups to be tested, so that the forwarding flow reaches the line speed of each of the ports to be tested, thereby forming a corresponding test data stream; Each of the test data streams is used to perform a line speed flow test on the ports to be tested in each of the ports to be tested groups.

2. The method according to claim 1, characterized in that Each of the ports to be tested includes a traffic statistics interface, and making the forwarded traffic reach the line speed of each of the ports to be tested includes: The forwarding rate of the ports to be tested is displayed in real time based on the traffic statistics interface to determine whether the forwarding traffic reaches the line speed of each port to be tested.

3. The method according to claim 2, characterized in that The method further comprises: Determine the initial number of the test messages sent to the first port of each of the port groups to be tested according to the line speed of the port to be tested in each of the port groups to be tested and the number of the ports to be tested; In the process of sending the initial number of test messages, the forwarding rate of the port to be tested is displayed in real time based on the traffic statistics interface; If the real-time forwarding rate does not meet the line speed of the port to be tested, the number of test messages sent is increased until the forwarding flow reaches the line speed of each port to be tested.

4. The method according to claim 1, characterized in that: The using the central processor to send a plurality of test messages to the first port of each of the port groups to be tested respectively, and the plurality of test messages are cyclically forwarded in sequence at the plurality of ports to be tested in each of the port groups to be tested, comprises: Configuring a virtual local area network VLAN for each of the port groups to be tested; Configure static MAC address entries; Based on the static MAC address table and the virtual local area network VLAN configuration, the multiple test messages are sent to the first port of the port group to be tested; the multiple test messages are forwarded sequentially among the multiple ports to be tested in each of the port groups to be tested to form a cycle.

5. The method according to claim 1, characterized in that The testing of the ports to be tested in each of the ports to be tested groups by using each of the test data streams comprises: After the test data streams are cyclically forwarded in turn at the multiple ports to be tested in each port group to be tested for a preset time, the virtual local area network between the terminal port and the first port in each port group to be tested is disconnected.

6. The method according to claim 5, characterized in that Each of the ports to be tested includes a test result statistics interface. After disconnecting the virtual local area network between the end port and the first port in each of the port groups to be tested, the method includes: Based on the test result statistics interface, the test data of each port to be tested is obtained, and the test data includes at least one of the following: the number of sent and received packets, and whether there is an error packet; The test result of each of the ports to be tested is determined according to the test data.

7. The method according to claim 1, characterized in that After the forwarding traffic is made to reach the line speed of each port to be tested to form a corresponding test data stream, the method further includes: The test data stream is introduced into the first port group to be tested in the first switch from the terminal port of the port group to be tested through the virtual local area network, and a line speed flow test is performed on the ports to be tested in the first port group to be tested.

8. A switch line speed flow test device, characterized in that: The device comprises: A construction module, used for constructing a test message using a central processing unit of the switch; A forwarding module, used for using the central processor to send a plurality of test messages to the first port of each port group to be tested respectively, wherein the plurality of test messages are cyclically forwarded in turn at the plurality of ports to be tested in each port group to be tested, so that the forwarding flow reaches the line speed of each port to be tested, thereby forming a corresponding test data stream; The testing module is used to perform a line speed flow test on each port to be tested in each port group to be tested by using each test data stream.

9. A switch, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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