Accurate alignment and assembly method of silicon wafer in system on chip
By opening notch feet and positioning coarse adjustment holes on the silicon wafer, and setting sinking grooves and raised structures on the components to be assembled, combining positioning pins and installation holes, the accuracy of the silicon wafer and heat dissipation components or support plates is solved. The alignment and assembly issues achieve reliable assembly of the crystal system.
Patent Information
- Application Number
- CN202411302164.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-18
- Publication Date
- 2025-01-17
- Estimated Expiration
- 2044-09-18
AI Technical Summary
When building a crystal-on-crystal system, it is difficult to accurately align and assemble with the heat dissipation components or support plates, mainly because the silicon wafer is hard and brittle and difficult to position and install mounting holes on the substrate.
Open notch foot and positioning coarse adjustment hole at the edge of the silicon wafer, set up sinking grooves and raised structures on the components to be assembled, and accurately align and assemble the silicon wafer through positioning pins and mounting holes to ensure the silicon wafer to ensure the silicon wafer Accurately embedded in the sinker groove and locked by the raised structure.
Accurate alignment and reliable assembly of silicon wafers and system-on-crystal heat dissipation components or support plates is achieved, ensuring the stability and reliability of the entire system.
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Figure CN119324178A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuits, and in particular to a precise alignment and assembly method of a silicon wafer in an on-wafer system. Background Art
[0002] The system on chip aims to achieve a new path for the intelligent integration of chips and systems through system engineering theory and complex network methods. It uses the complete wafer substrate as the interconnection base for each module within the system, and defines the connection between modules and the functions of the modules themselves through software, thus breaking through the limitations of traditional processes on improving chip integration, while providing extremely strong flexibility and scalability.
[0003] The Dojo system is a multi-chip integrated computing system based on wafer level. It adopts wafer level packaging interconnection technology. The wafers and structural parts of the Dojo system are assembled in the vertical direction. The connection method between the wafer and other components in the Dojo system is to open positioning and mounting holes on the wafer to screw and fix with other components, wherein the fixing bolts are used to position and lock the wafer and the heat dissipation component through the positioning and mounting holes on the wafer and the heat dissipation component, or the fixing bolts are used to position and lock the wafer and the support plate through the positioning and mounting holes on the wafer and the support plate. The wafer used in the Dojo system is not a silicon wafer, but a wafer prepared by TSMC's INFO_SOW process. Its essence is a wafer that uses organic materials as the dielectric layer for wiring and reconstruction, not a silicon wafer. Therefore, the positioning and assembly method of the Dojo system wafer and other components can be to drill various positioning holes and mounting holes on the wafer to achieve the positioning and assembly of the Dojo system wafer and other components.
[0004] However, when using silicon wafers to build a wafer-on-wafer system, since the silicon wafer itself is relatively hard and brittle, and the silicon substrate needs to be thinned during preparation, the silicon wafer cannot have a large number of positioning and mounting holes like the wafers in the Dojo system. Therefore, when the prior art uses silicon wafers to build a wafer-on-wafer system, there is a problem that the silicon wafer cannot be accurately aligned and assembled with the heat dissipation component or the support plate. Summary of the invention
[0005] In order to solve the problem in the prior art of constructing an on-wafer system for silicon wafers, that the silicon wafer cannot be accurately aligned and assembled with a heat dissipation component or a support plate, the present invention provides a method for accurately aligning and assembling the silicon wafer in an on-wafer system, by which the accurate alignment and assembly of the silicon wafer and the heat dissipation component or the support plate of the on-wafer system are effectively achieved, the silicon wafer can be accurately assembled on the heat dissipation component or the support plate of the on-wafer system, and reliable assembly of the entire on-wafer system can be achieved.
[0006] In order to achieve the above object, the technical solution of the present invention is: a method for accurately aligning and assembling silicon wafers in a wafer-on-wafer system, comprising the following steps: Step 1: a plurality of notch feet are evenly opened on the edge of the silicon wafer to be assembled, and a positioning coarse adjustment hole is opened in the non-wafer pattern area of the silicon wafer to be assembled.
[0007] Step 2: A sinking groove matching the silicon wafer is opened on the surface of the component to be assembled with the silicon wafer, and a plurality of protruding structures matching the notch feet are arranged inside the sinking groove to lock the silicon wafer.
[0008] Step 3: Arrange positioning pins corresponding to the positioning coarse adjustment holes in the area where the component to be assembled corresponds to the silicon wafer, and open multiple positioning holes and mounting holes in the area where the component to be assembled does not correspond to the silicon wafer.
[0009] Step 4: Assemble the silicon wafer and the components to be assembled, align the coarse positioning holes on the silicon wafer with the locating pins on the components to be assembled, and then adjust the silicon wafer through the coarse positioning holes to align the notch feet on the silicon wafer with the raised structures in the sinking grooves of the components to be assembled, embed the silicon wafer into the sinking grooves, and match the raised structures on the components to be assembled with the notch feet on the silicon wafer to clamp and lock the silicon wafer, thus completing the positioning and assembly of the silicon wafer and the components to be assembled.
[0010] Furthermore, in step 1, the number of notch feet is three, the angle between two adjacent notch feet is 120°, and the notch feet are in an arc-shaped structure.
[0011] Furthermore, in step 1, two positioning coarse adjustment holes are symmetrically opened in the non-wafer pattern area of the silicon wafer to be assembled.
[0012] Furthermore, in the step 1, a punch mark is made on the non-wafer pattern area of the silicon wafer, and a positioning coarse adjustment hole is drilled at the punch mark of the silicon wafer by laser drilling.
[0013] Furthermore, in step 2, the sinking groove is opened in the area where the component to be assembled contacts the silicon wafer, the diameter of the sinking groove is the same as the diameter of the silicon wafer, and the depth of the sinking groove is the same as the thickness of the silicon wafer.
[0014] Furthermore, in step 2, the component to be assembled is a heat dissipation component or a support plate, and the number of the protruding structures is also three. The protruding structures are arc-shaped and match the notch feet.
[0015] Furthermore, in step 3, the number of positioning pins is two, and the position of the silicon wafer assembly is roughly adjusted and positioned by the cooperation of the positioning pins on the components to be assembled and the positioning coarse adjustment holes.
[0016] Through the above technical solution, the beneficial effects of the present invention are: 1. The present invention provides a precise positioning and assembly method for silicon wafers in an on-wafer system, which effectively realizes the precise alignment and assembly of the silicon wafer and the on-wafer system heat dissipation component or support plate, can accurately assemble the silicon wafer on the on-wafer system heat dissipation component or support plate, and can realize reliable assembly of the entire on-wafer system.
[0017] 2. The precise alignment method of the silicon wafer and the components to be assembled of the present invention realizes precise alignment of the silicon wafer and the components to be assembled by coordinating the coarse positioning holes in the non-wafer graphic area of the silicon wafer with the positioning pins on the heat dissipation component or the support plate. The positioning pins are passed through the coarse positioning holes on the silicon wafer to perform coarse adjustment and positioning of the silicon wafer assembly position, thereby ensuring that the silicon wafer is accurately assembled on the on-wafer system heat dissipation component or the support plate.
[0018] 3. The reliable assembly method of the silicon wafer and the components to be assembled of the present invention is achieved by embedding the silicon wafer in the sink groove on the heat dissipation component or the support plate, and by cooperating the protruding structure on the heat dissipation component or the support plate with the notch foot on the silicon wafer, and clamping and locking the silicon wafer under the action of the protruding structure, thereby realizing reliable assembly of the silicon wafer and the heat dissipation component or the support plate.
[0019] 4. The present invention uses positioning holes and mounting holes opened in areas of the components to be assembled that do not correspond to the silicon wafer, and can complete the positioning and assembly of other components of the on-wafer system through bolts, thereby achieving the effect of reliable assembly of the entire on-wafer system. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 It is a schematic diagram of the structure of the silicon wafer of the present invention.
[0021] The numbers in the accompanying drawings are: 1 is a silicon wafer, 101 is a positioning coarse adjustment hole, and 102 is a notch foot. DETAILED DESCRIPTION
[0022] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments: like Figure 1 As shown, a method for accurately aligning and assembling silicon wafers in a wafer-on-wafer system includes the following steps: Step 1: a plurality of notch feet 102 are evenly opened on the edge of the silicon wafer 1 to be assembled, the number of notch feet 102 is three, the angle between two adjacent notch feet 102 is 120°, the notch feet 102 are in an arc-shaped structure, and a positioning coarse adjustment hole 101 is opened in the non-wafer graphic area of the silicon wafer 1 to be assembled, a punching mark is made in the non-wafer graphic area of the silicon wafer 1, and a positioning coarse adjustment hole 101 is punched at the punching mark of the silicon wafer 1 by laser drilling. Two positioning coarse adjustment holes 101 are symmetrically opened in the non-wafer graphic area of the silicon wafer 1 to be assembled, and the positioning coarse adjustment holes 101 can be circular or square.
[0023] Step 2: A sinking groove matching the silicon wafer 1 is opened on the surface of the component to be assembled with the silicon wafer 1, and a plurality of protruding structures matching the notch feet 102 are arranged inside the sinking groove to lock the silicon wafer 1; the component to be assembled is a heat dissipation component or a support plate, and the number of the protruding structures is also three. The protruding structures are arc-shaped and match the notch feet 102. The sinking groove is opened in the area where the component to be assembled contacts the silicon wafer 1. The diameter of the sinking groove is the same as the diameter of the silicon wafer 1, and the depth of the sinking groove is the same as the thickness of the silicon wafer 1. The purpose is to enable the silicon wafer 1 to be completely embedded in the sinking groove.
[0024] Step 3: Set positioning pins corresponding to the coarse positioning holes 101 in the area corresponding to the component to be assembled and the silicon wafer 1. There are two positioning pins. With the cooperation of the positioning pins on the component to be assembled and the coarse positioning holes 101, the assembly position of the silicon wafer 1 is coarsely adjusted and positioned, and multiple positioning holes and mounting holes are opened in the area where the component to be assembled does not correspond to the silicon wafer 1. Through the cooperation of the positioning holes and mounting holes with the fixing bolts, the assembly of other components in the on-wafer system is completed step by step, thereby forming an on-wafer system, such as a system configuration board.
[0025] Step 4: Assemble the silicon wafer 1 and the component to be assembled, and make the coarse positioning hole 101 on the silicon wafer 1 correspond to the positioning pin on the component to be assembled. The two coarse positioning holes 101 on the silicon wafer 1 correspond to the two positioning pins respectively. The two positioning pins are respectively inserted into the two coarse positioning holes 101 on the silicon wafer 1, and then adjust the silicon wafer 101 through the coarse positioning holes 101 so that the notch feet 102 on the silicon wafer 1 are aligned with the raised structures in the sinking groove of the component to be assembled. The three raised structures correspond to the three notch feet 102 respectively, and then embed the silicon wafer 1 into the sinking groove. The three raised structures are respectively embedded in the three notch feet 102. The raised structure on the component to be assembled cooperates with the notch feet 102 on the silicon wafer 1 to clamp and lock the silicon wafer 1. At this point, the positioning and assembly of the silicon wafer 1 and the component to be assembled are completed.
[0026] It should be noted that, according to the structure of the on-wafer system, it is selected whether the silicon wafer 1 is assembled with the heat dissipation component or with the support plate. When the on-wafer system has low power and does not require a heat dissipation component, the component to be assembled is the support plate, and the silicon wafer 1 and the support plate are precisely positioned and assembled; when the on-wafer system has high power and requires a heat dissipation component, the component to be assembled is the heat dissipation component, and the silicon wafer 1 and the heat dissipation component are precisely positioned and assembled.
[0027] Based on a precise alignment and assembly method of silicon wafers in an on-wafer system, when building an on-wafer system with silicon wafers, the warping of the silicon wafer and the characteristics of the silicon wafer itself are comprehensively considered to achieve precise alignment and reliable assembly of the silicon wafer and other components of the on-wafer system; and it is suitable for the positioning and assembly of wafers of various materials and shapes and other components of the on-wafer system when building the on-wafer system.
[0028] The embodiments described above are only preferred embodiments of the invention and are not intended to limit the scope of implementation of the invention. Therefore, any equivalent changes or modifications made according to the technical solutions described in the patent scope of the present invention should be included in the scope of the patent application of the present invention.
Claims
1. A method for accurately aligning and assembling silicon wafers in a wafer-on-wafer system, characterized in that: The following steps are involved: Step 1: a plurality of notch feet (102) are evenly formed on the edge of the silicon wafer (1) to be assembled, and a positioning coarse adjustment hole (101) is formed in a non-wafer pattern area of the silicon wafer (1) to be assembled; Step 2: a sinking groove matching the silicon wafer (1) is provided on the surface of the component to be assembled with the silicon wafer (1), and a plurality of protruding structures matching the notch feet (102) are provided inside the sinking groove to lock the silicon wafer (1); Step 3: arranging positioning pins corresponding to the positioning coarse adjustment holes (101) in the area where the component to be assembled corresponds to the silicon wafer (1), and opening a plurality of positioning holes and mounting holes in the area where the component to be assembled does not correspond to the silicon wafer (1); Step 4: Assemble the silicon wafer (1) and the component to be assembled, align the coarse positioning hole (101) on the silicon wafer (1) with the positioning pin on the component to be assembled, and then adjust the silicon wafer (101) through the coarse positioning hole (101) so that the notch foot (102) on the silicon wafer (1) is aligned with the raised structure in the sinking groove of the component to be assembled, and embed the silicon wafer (1) into the sinking groove. The raised structure on the component to be assembled cooperates with the notch foot (102) on the silicon wafer (1) to clamp and lock the silicon wafer (1), thereby completing the positioning assembly of the silicon wafer (1) and the component to be assembled.
2. The method for accurately aligning and assembling silicon wafers in a wafer-on-wafer system according to claim 1, characterized in that: In step 1, the number of notch feet (102) is three, the angle between two adjacent notch feet (102) is 120°, and the notch feet (102) are in an arc-shaped structure.
3. The method for accurately aligning and assembling silicon wafers in a wafer-on-wafer system according to claim 1, characterized in that: In the step 1, two positioning coarse adjustment holes (101) are symmetrically opened in the non-wafer pattern area of the silicon wafer (1) to be assembled.
4. A method for accurately aligning and assembling silicon wafers in a wafer-on-wafer system according to claim 3, characterized in that: In the step 1, a punch mark is made on the non-wafer pattern area of the silicon wafer (1), and a positioning coarse adjustment hole (101) is drilled at the punch mark of the silicon wafer (1) by laser drilling.
5. The method for accurately aligning and assembling silicon wafers in a wafer-on-wafer system according to claim 1, characterized in that: In step 2, the sinking groove is opened in the area where the component to be assembled contacts the silicon wafer (1), the diameter of the sinking groove is the same as the diameter of the silicon wafer (1), and the depth of the sinking groove is the same as the thickness of the silicon wafer (1).
6. The method for precise alignment and assembly of silicon wafers in a wafer-on-wafer system according to claim 1, characterized in that: In step 2, the component to be assembled is a heat dissipation component or a support plate, and the number of the protruding structures is also three. The protruding structures are arc-shaped structures and match the notch feet (102).
7. The method for accurately aligning and assembling silicon wafers in an on-wafer system according to claim 1, characterized in that: In step 3, the number of positioning pins is two, and the assembly position of the silicon wafer (1) is roughly adjusted and positioned by the cooperation of the positioning pins on the components to be assembled and the positioning coarse adjustment holes (101).
Citation Information
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