Linear limiting amplifier circuit

Abstract

The invention relates to the technical field of analog integrated circuits, and provides a linear limiting amplifier circuit which comprises a fixed reference current generation circuit module, a current-to-voltage module and a variable current generation module. When the input voltage is lower than the lower threshold voltage, the output voltage is maintained at a low level, when the input voltage is higher than the lower threshold voltage, the output voltage is maintained at a high level, and when the input voltage is between the upper threshold voltage and the lower threshold voltage, the output voltage linearly changes along with the input voltage. According to the circuit scheme of the linear limiting amplifier based on the addition of the fixed current and the variable current, the problems of simple structure, high power consumption, poor linearity and the like in the existing technical scheme are solved, and the linear limiting amplifier can be widely applied to power supply management circuits for motor driving, LED driving and the like; and the method can also be used in a linear amplification circuit for a specific signal amplitude range of an expected signal in a signal conditioning circuit.

Description

Technical Field

[0001] The invention relates to the technical field of analog integrated circuits, and in particular to a linear limiting amplifier circuit. Background Art

[0002] In the field of analog integrated circuits, it is often necessary to linearly amplify various analog signals or voltage levels. In different applications, the input level of the analog signal has a range of values. It is expected that the signal within the range will be linearly amplified, and the level beyond the range will be processed as the maximum value. This is the main function of the linear limiting amplifier circuit. Linear limiting amplifiers are often used in motor drive, LED drive and DC-DC power management circuits to limit the current and voltage of the output power tube to prevent abnormal conditions such as overvoltage, overcurrent and overtemperature.

[0003] Existing linear limiting amplifier circuit solutions are generally based on threshold point comparison of input signals and cascade connection of linear amplifiers. This solution has disadvantages such as complex structure, high power consumption, and poor linearity, which is not conducive to implementation in power management integrated circuits. Summary of the invention

[0004] In order to achieve the above object, the present invention provides the following technical solutions:

[0005] The present invention provides a linear limiting amplifier circuit, comprising a fixed reference current generating circuit module, a current-to-voltage conversion module and a variable current generating module;

[0006] The fixed reference current generating circuit module includes a first PMOS tube and a second PMOS tube, the current-to-voltage module includes a third PMOS tube, a fourth PMOS tube and a second resistor, the third PMOS tube / the fourth PMOS tube and the first PMOS tube / the second PMOS tube form a current mirror, and the mirror current forms an input lower threshold voltage at the connection end of the second resistor and the fourth PMOS tube;

[0007] The variable current generating module includes a second operational amplifier unit and a third operational amplifier unit, wherein the positive input terminal of the second operational amplifier unit is connected to one end of the second resistor connected to the fourth PMOS tube, and the positive input terminal of the third operational amplifier unit is connected to the other end of the second resistor, forming an input upper threshold voltage

[0008] When the input voltage is lower than the lower threshold voltage, the output voltage is maintained at a low level. When the input voltage is higher than the lower threshold voltage, the output voltage is maintained at a high level. When the input voltage is between the upper and lower threshold voltages, the output voltage changes linearly with the input voltage.

[0009] Furthermore, the fixed reference current generating circuit module also includes a first operational amplifier unit, a first resistor and a first NMOS tube, the first operational amplifier unit is connected to the first NMOS tube, and the first PMOS tube, the second PMOS tube, the first NMOS tube and the first resistor constitute a circuit branch from the power supply to the ground.

[0010] Furthermore, the output end of the first operational amplifier unit is connected to the gate of the first NMOS tube, the drain of the first NMOS tube is connected to the drain and gate of the second PMOS tube, the source of the second PMOS tube is connected to the drain and gate of the first PMOS tube, and the gates of the first PMOS tube and the second PMOS tube are also respectively connected to the resistance current-to-voltage module; the source of the first NMOS tube is connected to the first resistor, and the first resistor is grounded.

[0011] Furthermore, the fixed reference current I generated by the fixed reference current generating circuit REF1 for:

[0012] I REF1 =VRA / R1;

[0013] Among them, VRA is the first reference voltage

[0014] R1 is the resistance value of the first resistor.

[0015] Furthermore, the current-to-voltage module also includes a third resistor and a fourth resistor, the drain of the third PMOS tube is connected to the source of the fourth PMOS tube, and the drain of the fourth PMOS tube is sequentially connected to the second resistor, the third resistor and the fourth resistor.

[0016] Furthermore, the mirror current I REF2 for:

[0017]

[0018] The input lower threshold voltage VL formed by the mirror current at the connection end of the second resistor and the fourth PMOS tube is:

[0019]

[0020] Wherein, the size ratio of the first PMOS tube / the second PMOS tube to the third PMOS tube / the fourth PMOS tube is K:1;

[0021] VRA is the first reference voltage;

[0022] R1, R2, R3 and R4 are the resistance values ​​of the first resistor, the second resistor, the third resistor and the fourth resistor respectively.

[0023] Furthermore, the negative input terminal of the second operational amplifier unit is connected to the input voltage, and the negative input terminal of the third operational amplifier unit is connected to the second reference voltage; the positive input terminal of the second operational amplifier unit is connected to one end of the connection between the second resistor and the fourth PMOS tube; and the positive input terminal of the third operational amplifier unit is connected to the other connection end of the second resistor.

[0024] Furthermore, the variable current generating module also includes a fifth PMOS tube and a sixth PMOS tube, the gate of the sixth PMOS tube is connected to the output end of the third operational amplifier unit, the drain of the sixth PMOS tube is connected to the source of the fifth PMOS tube, the gate of the fifth PMOS tube is connected to the output end of the second operational amplifier unit, and the drain of the fifth PMOS tube is connected to the other connection end of the second resistor.

[0025] Furthermore, when the input voltage value is lower than the input lower threshold voltage, the second operational amplifier unit outputs a high voltage and turns off the fifth PMOS tube. At this time, the variable current flowing through the fifth PMOS tube / sixth PMOS tube is 0, and the output voltage is maintained at a low voltage VOL of:

[0026]

[0027] As the input voltage increases, when the input voltage is greater than the input lower threshold voltage, the fifth PMOS tube is turned on, and the variable current flowing through the fifth PMOS tube / sixth PMOS tube increases linearly with the increase of the input voltage. At the same time, the voltage connected to the positive input terminal of the third operational amplifier unit also increases with the increase of the variable current. When the node voltage is higher than or close to the second reference voltage, the current of the sixth PMOS tube reaches saturation and no longer increases. At this time, the output voltage reaches the maximum value. The output voltage VOH is:

[0028]

[0029] The corresponding upper threshold voltage VH of the input voltage is:

[0030]

[0031] The present invention has the following beneficial effects:

[0032] The present invention is based on a circuit solution of a linear limiting amplifier that adds a fixed current and a variable current, which solves the problems of simple structure, high power consumption, poor linearity, etc. in the prior art solution. The present invention can be widely used in power management circuits such as motor drive and LED drive, and can also be used in linear amplification circuits for a specific signal amplitude range of a desired signal in a signal conditioning circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a schematic diagram of the present invention.

[0034] Figure 2 It is a functional diagram of the present invention.

[0035] Figure 3 2 is a transmission characteristic relationship diagram of the present invention. DETAILED DESCRIPTION

[0036] The specific implementation methods of the present invention are described in detail below in conjunction with the accompanying drawings. It should be pointed out that the embodiments are only specific explanations of the invention and should not be regarded as limitations of the invention. The purpose of the embodiments is to enable those skilled in the art to better understand and reproduce the technical solutions of the present invention. The protection scope of the present invention shall still be based on the scope defined by the claims.

[0037] like Figure 1-3 As shown, the present invention provides a linear limiting amplifier circuit, including a fixed reference current generating circuit module, a current-to-voltage module and a variable current generating module;

[0038] The fixed reference current generating circuit module includes a first PMOS tube M0 and a second PMOS tube M1, and the fixed reference current generating circuit module also includes a first operational amplifier unit, a first resistor R1 and a first NMOS tube M2, the first operational amplifier unit is connected to the first NMOS tube M2, and the first PMOS tube M0, the second PMOS tube M1, the first NMOS tube M2 and the first resistor R1 constitute a circuit branch from power supply to ground. The output end of the first operational amplifier unit is connected to the gate of the first NMOS tube M2, the drain of the first NMOS tube M2 is connected to the drain and gate of the second PMOS tube M1, the source of the second PMOS tube M1 is connected to the drain and gate of the first PMOS tube M0, and the gates of the first PMOS tube M0 and the second PMOS tube M1 are also connected to the resistance current to voltage module respectively; the source of the first NMOS tube M2 is connected to the first resistor R1, and the first resistor R1 is grounded.

[0039] The fixed reference current I generated by the fixed reference current generating circuit REF1 for:

[0040] I REF1 =VRA / R1;

[0041] Wherein, VRA is the first reference voltage.

[0042] The current-to-voltage module includes a third PMOS tube M3, a fourth PMOS tube M4 and a second resistor R2. The third PMOS tube M3 / the fourth PMOS tube M4 and the first PMOS tube M0 / the second PMOS tube M1 form a current mirror, and the mirror current forms an input lower threshold voltage VL at the connection end of the second resistor R2 and the fourth PMOS tube M4; the current-to-voltage module also includes a third resistor R3 and a fourth resistor R4, the drain of the third PMOS tube M3 is connected to the source of the fourth PMOS tube M4, and the drain of the fourth PMOS tube M4 is connected to the second resistor R2, the third resistor R3 and the fourth resistor R4 in sequence, wherein one end of the fourth resistor R4 is connected to the third resistor R3, and the output voltage is connected at this point at the same time, the other connection end of the fourth resistor R4 is grounded, and the fourth resistor R4 is also connected in parallel with a capacitor C1.

[0043] The mirror current I REF2 for:

[0044]

[0045] The input lower threshold voltage VL formed by the mirror current at the connection end of the second resistor R2 and the fourth PMOS tube M4 is:

[0046]

[0047] The size ratio of the first PMOS tube M0 / the second PMOS tube M1 to the third PMOS tube M3 / the fourth PMOS tube M4 is K:1;

[0048] VRA is a first reference voltage.

[0049] The variable current generating module includes a second operational amplifier unit opa2 and a third operational amplifier unit opa3, wherein the positive input terminal of the second operational amplifier unit opa2 is connected to one end of the second resistor R2 and the fourth PMOS tube M4, and the positive input terminal of the third operational amplifier unit opa3 is connected to the other end of the second resistor R2, forming an input upper threshold voltage VH; the variable current generating module also includes a fifth PMOS tube M5 and a sixth PMOS tube M6, wherein the gate of the sixth PMOS tube M6 is connected to the output terminal of the third operational amplifier unit opa3, the drain of the sixth PMOS tube M6 is connected to the source of the fifth PMOS tube M5, the gate of the fifth PMOS tube M5 is connected to the output terminal of the second operational amplifier unit opa2, and the drain of the fifth PMOS tube M5 is connected to the other connection terminal of the second resistor R2. The negative input terminal of the second operational amplifier unit opa2 is connected to the input voltage VIN, and the negative input terminal of the third operational amplifier unit opa3 is connected to the second reference voltage VRB; the positive input terminal of the second operational amplifier unit opa2 is connected to one end of the connection between the second resistor R2 and the fourth PMOS tube M4; the positive input terminal of the third operational amplifier unit opa3 is connected to the other connection end of the second resistor R2.

[0050] The source of the first PMOS tube M0 , the source of the second PMOS tube M1 , the source of the third PMOS tube M3 , the source of the fourth PMOS tube M4 , the source of the fifth PMOS tube M5 and the source of the sixth PMOS tube M6 are all connected to Vdd.

[0051] like Figure 3 As shown, when the input voltage VIN is lower than the lower threshold voltage VL, the output voltage is maintained at a low level VOL, when the input voltage VIN is higher than the lower threshold voltage VH, the output voltage is maintained at a high level VOH, and when the input voltage is between the upper and lower threshold voltages, the output voltage changes linearly with the input voltage. Specifically, when the input voltage value VIN is lower than the input lower threshold voltage VL, the second operational amplifier unit outputs a high voltage and turns off the fifth PMOS tube M5. At this time, the variable current flowing through the fifth PMOS tube M5 / sixth PMOS tube M6 is 0, and the output voltage is maintained at a low voltage VOL as follows:

[0052]

[0053] As the input voltage VIN increases, when the input voltage VIN is greater than the input lower threshold voltage VL, the fifth PMOS tube M5 is turned on, and the variable current flowing through the fifth PMOS tube M5 / sixth PMOS tube M6 increases linearly with the increase of the input voltage VIN. At the same time, the voltage connected to the positive input terminal of the third operational amplifier unit opa3 also increases with the increase of the variable current. When the node voltage is higher than or close to the second reference voltage VRB, the current of the sixth PMOS tube reaches saturation and no longer increases. At this time, the output voltage reaches the maximum value. The output voltage VOH is:

[0054]

[0055] The corresponding upper threshold voltage VH of the input voltage is:

[0056]

[0057] The present invention is based on a circuit solution of a linear limiting amplifier that adds a fixed current and a variable current, which solves the problems of simple structure, high power consumption, poor linearity, etc. in the prior art solution. The present invention can be widely used in power management circuits such as motor drive and LED drive, and can also be used in linear amplification circuits for a specific signal amplitude range of a desired signal in a signal conditioning circuit.

[0058] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0059] It should be noted that the technical features not described in detail in the present invention can be implemented by any existing technology.

Claims

1. A linear limiting amplifier circuit, characterized in that: It includes a fixed reference current generating circuit module, a current-to-voltage conversion module and a variable current generating module; The fixed reference current generating circuit module includes a first PMOS tube and a second PMOS tube, the current-to-voltage module includes a third PMOS tube, a fourth PMOS tube and a second resistor, the third PMOS tube / the fourth PMOS tube and the first PMOS tube / the second PMOS tube form a current mirror, and the mirror current forms an input lower threshold voltage at the connection end of the second resistor and the fourth PMOS tube; The variable current generating module includes a second operational amplifier unit and a third operational amplifier unit, wherein the positive input terminal of the second operational amplifier unit is connected to one end of the second resistor connected to the fourth PMOS tube, and the positive input terminal of the third operational amplifier unit is connected to the other end of the second resistor, forming an input upper threshold voltage When the input voltage is lower than the lower threshold voltage, the output voltage is maintained at a low level. When the input voltage is higher than the lower threshold voltage, the output voltage is maintained at a high level. When the input voltage is between the upper and lower threshold voltages, the output voltage changes linearly with the input voltage.

2. A linear limiting amplifier circuit according to claim 1, characterized in that: The fixed reference current generating circuit module also includes a first operational amplifier unit, a first resistor and a first NMOS tube. The first operational amplifier unit is connected to the first NMOS tube. The first PMOS tube, the second PMOS tube, the first NMOS tube and the first resistor constitute a circuit branch from the power supply to the ground.

3. A linear limiting amplifier circuit according to claim 2, characterized in that: The output end of the first operational amplifier unit is connected to the gate of the first NMOS tube, the drain of the first NMOS tube is connected to the drain and gate of the second PMOS tube, the source of the second PMOS tube is connected to the drain and gate of the first PMOS tube, and the gates of the first PMOS tube and the second PMOS tube are also connected to the resistance current-to-voltage module respectively; the source of the first NMOS tube is connected to the first resistor, and the first resistor is grounded.

4. A linear limiting amplifier circuit according to claim 2, characterized in that: The fixed reference current I generated by the fixed reference current generating circuit REF1 for: IN REF1 =VRA / R1; Among them, VRA is the first reference voltage R1 is the resistance value of the first resistor.

5. A linear limiting amplifier circuit according to claim 1, characterized in that: The current-to-voltage module also includes a third resistor and a fourth resistor, the drain of the third PMOS tube is connected to the source of the fourth PMOS tube, and the drain of the fourth PMOS tube is sequentially connected to the second resistor, the third resistor and the fourth resistor.

6. A linear limiting amplifier circuit according to claim 1, characterized in that: The mirror current I REF2 for: The input lower threshold voltage VL formed by the mirror current at the connection end of the second resistor and the fourth PMOS tube is: Wherein, the size ratio of the first PMOS tube / the second PMOS tube to the third PMOS tube / the fourth PMOS tube is K:1; VRA is the first reference voltage; R1, R2, R3 and R4 are the resistance values ​​of the first resistor, the second resistor, the third resistor and the fourth resistor respectively.

7. The linear limiting amplifier circuit according to claim 1, characterized in that: The negative input terminal of the second operational amplifier unit is connected to the input voltage, and the negative input terminal of the third operational amplifier unit is connected to the second reference voltage; the positive input terminal of the second operational amplifier unit is connected to one end of the connection between the second resistor and the fourth PMOS tube; the positive input terminal of the third operational amplifier unit is connected to the other connection end of the second resistor.

8. A linear limiting amplifier circuit according to claim 7, characterized in that: The variable current generating module also includes a fifth PMOS tube and a sixth PMOS tube, the gate of the sixth PMOS tube is connected to the output end of the third operational amplifier unit, the drain of the sixth PMOS tube is connected to the source of the fifth PMOS tube, the gate of the fifth PMOS tube is connected to the output end of the second operational amplifier unit, and the drain of the fifth PMOS tube is connected to the other connection end of the second resistor.

9. A linear limiting amplifier circuit according to claim 8, characterized in that: When the input voltage value is lower than the input lower threshold voltage, the second operational amplifier unit outputs a high voltage and turns off the fifth PMOS tube. At this time, the variable current flowing through the fifth PMOS tube / sixth PMOS tube is 0, and the output voltage is maintained at a low voltage VOL of: As the input voltage increases, when the input voltage is greater than the input lower threshold voltage, the fifth PMOS tube is turned on, and the variable current flowing through the fifth PMOS tube / sixth PMOS tube increases linearly with the increase of the input voltage. At the same time, the voltage connected to the positive input terminal of the third operational amplifier unit also increases with the increase of the variable current. When the node voltage is higher than or close to the second reference voltage, the current of the sixth PMOS tube reaches saturation and no longer increases. At this time, the output voltage reaches the maximum value. The output voltage VOH is: The corresponding upper threshold voltage VH of the input voltage is:

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