Motor-driven redundant device for electronic parking brake

Abstract

A motor drive redundancy apparatus for an electronic parking brake is provided, the apparatus including a first motor drive module configured to provide a current to a motor; a first driver module configured to control the first motor driving module; a second motor driving module configured to drive a motor; a second driver module configured to control the second motor driving module; the monitoring module is configured to monitor the states of the first motor driving module and the second motor driving module; and a processor configured to control at least one of the first motor driving module and the second motor driving module to drive the motor if the monitoring module detects that the first motor driving module or the second motor driving module fails.

Description

Technical Field

[0001] The present disclosure relates to a motor drive redundancy device for an electronic parking brake. Background Art

[0002] Recently released vehicles are equipped with an electronic parking brake (EPB) which electronically controls activation of the parking brake.

[0003] The EPB automatically activates or deactivates the parking brake according to the control judgment of the electronic control unit (ECU), thereby performing a simple switch operation or overall control without the driver having to manually operate the parking brake.

[0004] The EPB includes an actuator for driving a motor to generate a braking force, and a micro controller unit (MCU) for controlling the actuator.

[0005] The controller of the EPB includes an MCU that determines the situation and issues control commands, a driver IC that outputs actual control signals, and an H-bridge that provides current to drive the motor.

[0006] Since a single H-bridge operates a single motor, there is a problem that if one transistor in the H-bridge circuit fails, the entire system of the electronic parking brake will not function properly due to the single failure.

[0007] The background technology of the present disclosure is disclosed in Korean Unexamined Patent Publication No. 10-2022-0167072 (published on December 20, 2022 and entitled “Electronic Parking Brake Control Apparatus and Method”). Summary of the invention

[0008] Various embodiments are directed to a motor drive redundancy apparatus for an electronic parking brake, which is capable of ensuring reliability of the electronic parking brake by achieving redundancy of current supply to a motor.

[0009] In an embodiment, a motor drive redundancy device for an electronic parking brake is provided, the device comprising: a first motor drive module, which is configured to provide current to the motor; a first driver module, which is configured to control the first motor drive module; a second motor drive module, which is configured to drive the motor; a second driver module, which is configured to control the second motor drive module; a monitoring module, which is configured to monitor the status of the first motor drive module and the second motor drive module; and a processor, which is configured to control at least one of the first motor drive module and the second motor drive module to drive the motor if the monitoring module detects a failure of the first motor drive module or the second motor drive module.

[0010] The first motor drive module may include: first to fourth transistors constituting an H-bridge; a first cut-off switch configured to cut off current applied to the motor from the first transistor and the second transistor; and a second cut-off switch configured to cut off current applied to the motor from the third transistor and the fourth transistor, and the second motor drive module may include: fifth to eighth transistors constituting an H-bridge; a third cut-off switch configured to cut off current applied to the motor from the fifth transistor and the sixth transistor; and a fourth cut-off switch configured to cut off current applied to the motor from the seventh transistor and the eighth transistor.

[0011] The processor may be configured to control the fifth and sixth transistors, and the third and fourth transistors, or control the second motor driving module to drive the motor if at least one of the first and second transistors fails.

[0012] The processor may be configured to control the seventh and eighth transistors, and the first and second transistors, or control the second motor driving module to drive the motor if at least one of the third and fourth transistors fails.

[0013] The monitoring module may include: a first monitoring part configured to monitor the states of the first to fourth transistors; and a second monitoring part configured to monitor the states of the fifth to eighth transistors.

[0014] The first monitoring part may include: a first-1 monitoring part connected to the first power input of the motor through a node between the first transistor and the second transistor; and a first-2 monitoring part connected to the second power input of the motor through a node between the third transistor and the fourth transistor, and the second monitoring part may include: a second-1 monitoring part connected to the first power input of the motor through a node between the fifth transistor and the sixth transistor; and a second-2 monitoring part connected to the second power input of the motor through a node between the seventh transistor and the eighth transistor.

[0015] The processor may be configured to control the first driver module to apply a voltage to one side of the H-bridge circuit of the first motor driver module, and determine a fault of the first motor driver module based on the voltage on the other side of the H-bridge circuit detected by the monitoring module; or, the processor may be configured to control the second driver module to apply a voltage to one side of the H-bridge circuit of the second motor driver module, and determine a fault of the second motor driver module based on the voltage on the other side of the H-bridge circuit detected by the monitoring module.

[0016] The processor may be configured to control the first driver module to connect a pull-up source to one side of an H-bridge circuit of the first motor driver module, and determine a fault of the first motor driver module based on a voltage on the other side of the H-bridge circuit detected by the monitoring module; or the processor may be configured to control the second driver module to connect a pull-up source to one side of an H-bridge circuit of a second motor driver module, and determine a fault of the second motor driver module based on a voltage on the other side of the H-bridge circuit detected by the monitoring module.

[0017] The processor may be configured to control the first driver module to connect a pull-down source to one side of an H-bridge circuit of the first motor driver module, and determine a fault of the first motor driver module based on a voltage on the other side of the H-bridge circuit detected by the monitoring module; or the processor may be configured to control the second driver module to connect a pull-down source to one side of an H-bridge circuit of a second motor driver module, and determine a fault of the second motor driver module based on a voltage on the other side of the H-bridge circuit detected by the monitoring module.

[0018] The processor may be configured to, if the first motor drive module is in a fault state, determine a fault in at least one of the first to fourth transistors after closing at least one of the first cut-off switch and the second cut-off switch; or, if the second motor drive module is in a fault state, determine a fault in at least one of the fifth to eighth transistors after closing at least one of the third cut-off switch and the fourth cut-off switch.

[0019] In the motor driving redundant device of the electronic parking brake according to one aspect of the present disclosure, current supply to the motor is duplicated to ensure stability of the electronic parking brake. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a block diagram illustrating a motor drive redundancy device for an electronic parking brake according to an embodiment of the present disclosure.

[0021] Figure 2 is a block diagram illustrating a first motor driving module and a second motor driving module according to an embodiment of the present disclosure.

[0022] Figure 3A , Figure 3B , Figure 4A , Figure 4B , Figure 5A and Figure 5B is a chart illustrating an exemplary operation of a motor drive redundancy device for an electronic parking brake according to an embodiment of the present disclosure.

[0023] Figure 6 , Figure 7 , Fig. 8A and Figure 8B is a diagram illustrating an example of monitoring a fault of a first motor drive module or a second motor drive module according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] The components described in the exemplary embodiments may be implemented by hardware components, including, for example, at least one digital signal processor (DSP), a processor, a controller, an application-specific integrated circuit (ASIC), a programmable logic element such as a field programmable gate array (FPGA), other electronic devices, or a combination thereof. At least some of the functions or processes described in the exemplary embodiments may be implemented by software, and the software may be recorded on a recording medium. The components, functions, and processes described in the exemplary embodiments may be implemented by a combination of hardware and software.

[0025] The method according to the exemplary embodiment may be embodied as a computer-executable program and may be implemented as various recording media such as a magnetic storage medium, an optical reading medium, and a digital storage medium.

[0026] The various techniques described herein may be implemented as digital electronic circuits, or as computer hardware, firmware, software, or a combination thereof. These techniques may be implemented as a computer program product, i.e., a computer program tangibly embodied in an information carrier (e.g., a machine-readable storage device (e.g., a computer-readable medium)) or in a propagated signal, for processing or controlling the operation of a data processing device by a data processing device, such as a programmable processor, a computer, or multiple computers. Computer programs may be written in any form of programming language (including compiled or interpreted languages) and may be deployed in any form (including stand-alone programs or modules, components, subroutines, or other units suitable for a computing environment). Computer programs may be deployed to execute on a single computer, or on multiple computers at a single site or distributed across multiple sites and interconnected by a communication network.

[0027] Processors suitable for executing computer programs include, for example, general-purpose microprocessors and special-purpose microprocessors, and any one or more processors of any type of digital computer. Typically, the processor receives instructions and data from a read-only memory or a random access memory or both. The elements of a computer may include at least one processor for executing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include one or more mass storage devices or be connected to receive data from one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks), transmit data to one or more mass storage devices, or perform both on one or more mass storage devices to store data. Examples of information carriers suitable for embodying computer program instructions and data include semiconductor memory devices, such as magnetic media, such as hard disks, floppy disks, and magnetic tapes; optical media, such as compact disk readonly memory (CD-ROM), digital video disk (DVD), etc.; and magneto-optical media, such as floppy disks, read only memory (ROM), random access memory (RAM), flash memory, erasable programmable ROM (EPROM) and electrically erasable programmable ROM (EEPROM), and any other known computer-readable medium. The processor and memory may be supplemented by or integrated into special purpose logic circuitry.

[0028] The processor may run an operating system (OS) and one or more software applications running on the OS. The processor device may also access, store, manipulate, process, and create data in response to the execution of the software. For simplicity, the processor device is described using the singular; however, those skilled in the art will appreciate that the processor device may include multiple processing elements and / or multiple types of processing elements. For example, the processor device may include multiple processors or a processor and a controller. In addition, different processing configurations are possible, such as parallel processors.

[0029] Additionally, non-transitory computer readable media can be any available media that can be accessed by a computer and can include both computer storage media and transmission media.

[0030] This specification includes some details of specific implementations, but it should be understood that these details do not limit any invention or what may be claimed in the specification, but rather describe features of specific exemplary embodiments. Features described in the specification in the context of separate exemplary embodiments may be implemented as a combination in a single exemplary embodiment. Conversely, various features described in the specification in the context of a single exemplary embodiment may be implemented in multiple exemplary embodiments individually or in appropriate sub-combinations. In addition, these features may operate in a specific combination and may initially be described as claimed in the combination, but in some cases, one or more features may be excluded from the claimed combination, and the claimed combination may become a sub-combination or a modification of the sub-combination.

[0031] Likewise, even if operations are described in a particular order in the accompanying drawings, it should not be understood that the operations must be performed in a particular order or sequentially to achieve the desired results, or that all operations must be performed. In certain circumstances, multitasking and parallel processing may be advantageous. Furthermore, it should not be understood that separation of the various device components described in the exemplary embodiments described above is required in all exemplary embodiments, and

[0032] The above-mentioned program components and means may be incorporated into a single software product, or may be packaged in multiple software products.

[0033] It should be understood that the exemplary embodiments disclosed herein are merely illustrative and are not intended to limit the scope of the present invention. For those of ordinary skill in the art, it is obvious that various modifications may be made to the exemplary embodiments without departing from the spirit and scope of the technical solutions claimed in the present disclosure and their equivalents.

[0034] Hereinafter, with reference to the accompanying drawings, embodiments of the present disclosure will be described in detail so that those skilled in the art can easily implement the present disclosure. However, the present disclosure can be embodied in many different forms and is not limited to the embodiments described herein.

[0035] In the following description of the embodiments of the present disclosure, when the detailed description of known functions and configurations incorporated herein may make the subject matter of the present disclosure rather unclear, these descriptions will be omitted. In the accompanying drawings, parts irrelevant to the description of the present disclosure are omitted, and similar parts are represented by similar reference numerals.

[0036] In the present disclosure, components that are distinguished from each other are intended to clearly illustrate each feature. However, this does not necessarily mean that these components are separate. That is, multiple components can be integrated into one hardware or software unit, or a single component can be distributed to multiple hardware or software units. Therefore, unless otherwise stated, such integrated or distributed embodiments are also included in the scope of the present disclosure.

[0037] In the present disclosure, the components described in the various embodiments are not necessarily necessary components, and some may be optional components. Therefore, embodiments consisting of a subset of the components described in one embodiment are also included in the scope of the present disclosure. In addition, embodiments that include other components in addition to the components described in the various embodiments are also included in the scope of the present disclosure.

[0038] In the present disclosure, when a component is referred to as being "linked", "coupled" or "connected" to another component, it should be understood that not only a direct connection relationship but also an indirect connection relationship through an intermediate component may be included. In addition, when a component is referred to as "including" or "having" another component, it may mean further including other components rather than excluding other components, unless explicitly described to the contrary.

[0039] In the present disclosure, the terms first, second, etc. are used only for the purpose of distinguishing one component from another component, and do not limit the order or importance of the components, etc., unless otherwise explicitly stated. Therefore, within the scope of the present disclosure, a first component in one exemplary embodiment may be referred to as a second component in another embodiment, and similarly, a second component in one exemplary embodiment may be referred to as a first component.

[0040] Hereinafter, an embodiment of a motor drive redundant device for an electronic parking brake according to the present disclosure will be described with reference to the accompanying drawings. In the description, the thickness of the lines shown in the drawings or the size of the components may be exaggerated for clarity and ease of explanation. In addition, the terms to be described later are terms defined in consideration of the functions in the present disclosure, which may vary according to the intention of the user or operator or the common practice in the art. Therefore, the definitions of these terms should be based on the entire contents of this specification.

[0041] Figure 1 is a block diagram showing a motor drive redundancy device for an electronic parking brake according to an embodiment of the present disclosure; and Figure 2 is a block diagram illustrating a first motor driving module and a second motor driving module according to an embodiment of the present disclosure.

[0042] refer to Figure 1 The motor drive redundant device for an electronic parking brake includes a first motor drive module 100 , a second motor drive module 200 , a monitoring module 300 , a first processor 400 , a first driver module 500 , a second processor 600 , and a second driver module 700 .

[0043] The first motor driving module 100 provides current to a motor 10 of an electronic parking brake (EPB) for driving the EPB motor.

[0044] refer to Figure 2 The first motor driving module 100 includes first to fourth transistors TR1 to TR4, a first cut-off switch SW1 and a second cut-off switch SW2. The first to fourth transistors TR1 to TR4 form an H-bridge circuit.

[0045] In the H-bridge circuit, the first transistor TR1 and the second transistor TR2 are connected in series, and the third transistor TR3 and the fourth transistor TR4 are connected in series.

[0046] A node between the first transistor TR1 and the second transistor TR2 is connected to a first power input of the motor 10 .

[0047] A node between the third transistor TR3 and the fourth transistor TR4 is connected to a second power input of the motor 10 .

[0048] The first to fourth transistors TR1 to TR4 are turned on / off according to a driving signal input from the first processor 400. According to the on / off of the first to fourth transistors TR1 to TR4, the motor 10 is driven by a current input.

[0049] The first cut-off switch SW1 is connected between a node between the first transistor TR1 and the second transistor TR2 and a first power input of the motor 10. The first cut-off switch SW1 cuts off current applied to the motor 10 from the first transistor TR1 and the second transistor TR2.

[0050] The second cut-off switch SW2 is connected between a node between the third transistor TR3 and the fourth transistor TR4 and a second power input of the motor 10. The second cut-off switch SW2 cuts off current applied to the motor 10 from the third transistor TR3 and the fourth transistor TR4.

[0051] The first driver module 500 controls the first motor driving module 100 , ie, the first to fourth transistors TR1 to TR4 , the first cut-off switch SW1 , and the second cut-off switch SW2 , according to the control signal from the first processor 400 .

[0052] The second motor driving module 200 includes fifth to eighth transistors TR5 to TR8, a third cut-off switch SW3, and a fourth cut-off switch SW4. The fifth to eighth transistors TR5 to TR8 constitute an H-bridge circuit.

[0053] In the H-bridge circuit, the fifth transistor TR5 and the sixth transistor TR6 are connected in series, and the seventh transistor TR7 and the eighth transistor TR8 are connected in series.

[0054] A node between the fifth transistor TR5 and the sixth transistor TR6 is connected to a first power input of the motor 10 .

[0055] A node between the seventh transistor TR7 and the eighth transistor TR8 is connected to a second power input of the motor 10 .

[0056] The fifth to eighth transistors TR5 to TR8 are turned on / off according to the driving signal input from the second processor 600. According to the turning on / off of the fifth to eighth transistors TR5 to TR8, the motor 10 is driven by the current input.

[0057] The third cut-off switch SW3 is connected between a node between the fifth transistor TR5 and the sixth transistor TR6 and a first power input of the motor 10. The third cut-off switch SW3 cuts off current applied to the motor 10 from the fifth transistor TR5 and the sixth transistor TR6.

[0058] The fourth cut-off switch SW4 is connected between a node between the seventh transistor TR7 and the eighth transistor TR8 and a second power input of the motor 10. The fourth cut-off switch SW4 cuts off current applied to the motor 10 from the seventh transistor TR7 and the eighth transistor TR8.

[0059] In order to drive the motor, the first motor driving module 100 and the second motor driving module 200 are replicated to stably supply current to the motor 10 .

[0060] The second driver module 700 controls the second motor driving module 200 , ie, the fifth to eighth transistors TR5 to TR8 , the third cut-off switch SW3 , and the fourth cut-off switch SW4 , according to the control signal from the second processor 600 .

[0061] The monitoring module 300 monitors the states of the first motor driving module 100 , the second motor driving module 200 and the motor 10 .

[0062] The monitoring module 300 includes a first monitoring part 310 and a second monitoring part 320 .

[0063] The first monitoring part 310 monitors the states of the first to fourth transistors TR1 to TR4 and the motor 10 .

[0064] The first monitoring section 310 includes a first-1 monitoring section 311 and a first-2 monitoring section 312 .

[0065] The first-1 monitoring part 311 is connected to a node between the first transistor TR1 and the second transistor TR2 and detects a voltage Vmon applied to a node between the first transistor TR1 and the second transistor TR2 to determine whether the first transistor TR1, the second transistor TR2 and the motor 10 are normal.

[0066] The first-2 monitoring part 312 is connected to a node between the third transistor TR3 and the fourth transistor TR4 and detects a voltage Vmon applied to a node between the third transistor TR3 and the fourth transistor TR4 to determine whether the third transistor TR3, the fourth transistor TR4 and the motor 10 are normal.

[0067] The second monitoring part 320 monitors the states of the fifth to eighth transistors TR5 to TR8 and the motor 10 .

[0068] The second monitoring section 320 includes a second-1 monitoring section 321 and a second-2 monitoring section 322 .

[0069] The second-1 monitoring part 321 is connected to a node between the fifth and sixth transistors TR5 and TR6 and detects a voltage Vmon applied to a node between the fifth and sixth transistors TR5 and TR6 to determine whether the fifth and sixth transistors TR5 and TR6 and the motor 10 are normal.

[0070] The second-2 monitoring part 322 is connected to a node between the seventh transistor TR7 and the eighth transistor TR8 and detects a voltage Vmon applied to a node between the seventh transistor TR7 and the eighth transistor TR8 to determine whether the seventh transistor TR7, the eighth transistor TR8 and the motor 10 are normal.

[0071] The first processor 400 and the second processor 600 detect a fault of the first motor driving module 100 or the second motor driving module 200 through the monitoring module 300 .

[0072] The first processor 400 and the second processor 600 share control information with each other.

[0073] The first processor 400 transmits the switching state of the first motor driving module 100 to the second processor 600 through the first driver module 500 .

[0074] The second processor 600 transmits the switching state of the second motor driving module 200 to the first processor 400 through the second driver module 700 .

[0075] Based on the monitoring result of the monitoring module 300 , the first processor 400 controls the first motor driving module 100 to drive the motor 10 , and the second processor 600 controls the second motor driving module 200 to drive the motor 10 .

[0076] Although the present embodiment describes the first processor 400 and the second processor 600 controlling the first driver module 500 and the second driver module 700 by way of example, the technical scope of the present disclosure is not limited thereto.

[0077] For example, a single processor may control both the first driver module 500 and the second driver module 700, that is, the first processor 400 may control both the first driver module 500 and the second driver module 700. In this case, the second processor 600 may perform the operation of the first processor 400 according to whether the first processor 400 fails.

[0078] In addition, the second processor 600 may control both the first driver module 500 and the second driver module 700. In this case, the first processor 400 may perform the operation of the second processor 600 according to whether the second processor 600 fails.

[0079] Furthermore, a single processor (not shown) may control both the first driver module 500 and the second driver module 700 .

[0080] In the present embodiment, the first processor 400 and the second processor 600 are described as controlling the first driver module 500 and the second driver module 700 respectively in conjunction with each other.

[0081] 3 to 5 are diagrams illustrating exemplary operations of a motor drive redundancy device for an electronic parking brake according to an embodiment of the present disclosure.

[0082] exist Figure 3A and 3B , when the first motor driving module 100 is in a normal state (a state irrelevant to whether the second motor driving module 200 is normal), the switching state of the first motor driving module 100 and the second motor driving module 200 is shown.

[0083] refer to Figure 3A and Figure 3BWhen the first motor driving module 100 is in a normal state, the second processor 600 turns off the fifth to eighth transistors TR5 to TR8 of the second motor driving module 200 and turns off the third cut-off switch SW3 and the fourth cut-off switch SW4.

[0084] In this state, the first processor 400 turns on the first and second disconnect switches SW1 and SW2 , and controls the first to fourth transistors TR1 to TR4 of the first motor driving module 100 in the Apply-on and Release-on states to drive the motor 10 .

[0085] The method of driving the motor 10 by current control is obvious to those skilled in the art, so a detailed description thereof will be omitted here.

[0086] Figure 4A and Figure 4B The switching states of the first motor driving module 100 and the second motor driving module 200 are shown when the first motor driving module 100 is in a fault state and the second motor driving module 200 is in a normal state.

[0087] refer to Figure 4A and Figure 4B When the first motor driving module 100 is in a fault state and the second motor driving module 200 is in a normal state, the first processor 400 turns off the first to fourth transistors TR1 to TR4 of the first motor driving module 100 and turns off the first and second disconnect switches SW1 and SW2.

[0088] In this state, the second processor 600 turns on the third and fourth cut-off switches SW3 and SW4 , and controls the fifth to eighth transistors TR5 to TR8 of the second motor driving module 200 to drive the motor 10 in the apply-on and release-on states.

[0089] Figure 5A and Figure 5B The switching states of the first motor driving module 100 and the second motor driving module 200 are shown when at least one of the third transistor TR3 and the fourth transistor TR4 of the first motor driving module 100 fails and at least one of the fifth transistor TR5 and the sixth transistor TR6 of the second motor driving module 200 fails.

[0090] refer to Figure 5A and Figure 5B, when at least one of the third transistor TR3 and the fourth transistor TR4 of the first motor driving module 100 fails and at least one of the fifth transistor TR5 and the sixth transistor TR6 of the second motor driving module 200 fails, the first processor 400 turns off the third transistor TR3 and the fourth transistor TR4 of the first motor driving module 100, and turns off the second cut-off switch SW2. In addition, the second processor 600 turns off the fifth transistor TR5 and the sixth transistor TR6 of the second motor driving module 200, and turns off the third cut-off switch SW3.

[0091] In this state, the first processor 400 and the second processor 600 turn on the first cut-off switch SW1 and the fourth cut-off switch SW4, and in the "apply 1-on" and "release 1-on" states, control the first transistor TR1 and the second transistor TR2 of the first motor drive module 100 and the seventh transistor TR7 and the eighth transistor TR8 of the second motor drive module 200 to drive the motor 10. Therefore, the first transistor TR1 and the second transistor TR2 and the seventh transistor TR7 and the eighth transistor TR8 of the second motor drive module 200 constitute an H-bridge circuit.

[0092] In addition, when at least one of the first transistor TR1 and the second transistor TR2 of the first motor drive module 100 fails, and at least one of the seventh transistor TR7 and the eighth transistor TR8 of the second motor drive module 200 fails, the first processor 400 turns off the first transistor TR1 and the second transistor TR2 of the first motor drive module 100, and turns off the first cut-off switch SW1. The second processor 600 also turns off the seventh transistor TR7 and the eighth transistor TR8 of the second motor drive module 200, and turns off the fourth cut-off switch SW4.

[0093] In this state, the first processor 400 and the second processor 600 turn on the second cut-off switch SW2 and the third cut-off switch SW3, and in the "Apply 2-On" and "Release 2-On" states, control the third transistor TR3 and the fourth transistor TR4 of the first motor drive module 100 and the fifth transistor TR5 and the sixth transistor TR6 of the second motor drive module 200 to drive the motor 10. Therefore, the third transistor TR3 and the fourth transistor TR4 of the first motor drive module 100 and the fifth transistor TR5 and the sixth transistor TR6 of the second motor drive module 200 constitute an H-bridge circuit.

[0094] On the other hand, the first processor 400 and the second processor 600 can monitor the states of the first motor driving module 100, the second motor driving module 200 and the motor 10 in an interconnected manner according to the monitoring result of the monitoring module 300 before operating the electronic parking brake.

[0095] For example, the first driver module 500 or the second driver module 700 may apply a reference voltage to the H-bridge circuit of the first motor driver module 100 or the H-bridge circuit of the second motor driver module 200, respectively. Alternatively, the first driver module 500 or the second driver module 700 may connect a pull-up power supply or a pull-down power supply to the first motor driver module 100 or the second motor driver module 200, respectively. This allows a fault in each of the first motor driver module 100 and the second motor driver module 200 to be detected by a voltage detected on the H-bridge circuit of the first motor driver module 100 or the second motor driver module 200.

[0096] When monitoring the first motor drive module 100, the first processor 400 applies voltage to one side of the H-bridge circuit of the first motor drive module 100 through the first driver module 500, and determines whether the first motor drive module 100 is faulty based on the voltage on the other side of the H-bridge circuit detected by the monitoring module 300.

[0097] In addition, the first processor 400 connects the pull-up source or the pull-down source to one side of the H-bridge circuit of the first motor driving module 100, and determines whether the first motor driving module 100 is faulty according to the voltage on the other side of the H-bridge circuit detected by the monitoring module. At this time, the processor 400 turns on the first disconnect switch SW1 and the second disconnect switch SW2, so that the H-bridge circuit is connected to the motor 10. This can be applied to the second motor driving module 200 in the same manner.

[0098] In addition, when monitoring the first motor drive module 100, the second processor 600 connects the pull-up source or the pull-down source to one side of the H-bridge circuit of the second motor drive module 200 through the second driver module 700, and determines whether the first motor drive module 100 is faulty according to the voltage on the other side of the H-bridge circuit of the first motor drive module 100 detected by the monitoring module 300. At this time, the first processor 400 turns on the second cut-off switch SW2, and the second processor 600 turns on the third cut-off switch SW3, so that the fifth transistor TR5 and the sixth transistor TR6 of the second motor drive module 200 and the third transistor TR3 and the fourth transistor TR4 of the first motor drive module 100 can form an H-bridge circuit. This can be applied to the second motor drive module 200 in the same manner.

[0099] Therefore, if a failure is detected in each of the first motor driving module 100 and the second motor driving module, the first processor 400 and the second processor 600 determine the failure of each transistor in the H-bridge of the first motor driving module 100 and the second motor driving module 200 .

[0100] Below, we will refer to Figure 6 The process of monitoring the failure of the first motor driving module 100 and the second motor driving module 200 is described in detail through FIG. 8 .

[0101] Figure 6 8 are graphs showing examples of monitoring a fault of a first motor drive module or a second motor drive module according to an embodiment of the present disclosure.

[0102] refer to Figure 6 , the first processor 400 turns on the first disconnect switch SW1 and the second disconnect switch SW2.

[0103] The first processor 400 can determine whether the first motor drive module 100 or the motor 10 is in a normal state using the voltage input from the first-1 monitoring part 311 and the voltage output from the first-2 monitoring part 312. In this case, the first processor 400 determines whether at least one of the first transistor TR1 and the second transistor TR2 has a battery short circuit or a ground short circuit fault, or whether the motor 10 has an open-state fault, based on the voltage measured by the first-1 monitoring part 311. In addition, the first processor 400 determines whether at least one of the third transistor TR3 and the fourth transistor TR4 has a battery short circuit or a ground short circuit fault, or whether the motor 10 has an open-state fault, based on the voltage measured by the first-2 monitoring part 312.

[0104] First, the first processor 400 applies a voltage Vref to a node between the first transistor TR1 and the second transistor TR2 of the first motor driving module 100 through the first driver module 500 , and detects a voltage Vmon across the third transistor TR3 and the fourth transistor TR4 through the first-2 monitoring part 312 .

[0105] If the voltage Vmon across the third transistor TR3 and the fourth transistor TR4 detected by the first-2 monitoring part 312 is equal to the voltage Vref applied to the node between the first transistor TR1 and the second transistor TR2, the first processor 400 determines that the first motor driving module 100 is in a normal state.

[0106] If the voltage Vmon across the third transistor TR3 and the fourth transistor TR4 is different from the voltage Vref applied to the node between the first transistor TR1 and the second transistor TR2, the first processor 400 determines a motor open failure, ie, the motor has disconnected current.

[0107] If the voltage Vmon across the third transistor TR3 and the fourth transistor TR4 is the ground voltage, the first processor 400 determines a ground short or a short-circuit failure of the second transistor TR2 and the fourth transistor TR4.

[0108] If the voltage Vmon across the third transistor TR3 and the fourth transistor TR4 is the battery voltage, the first processor 400 determines that the battery is short-circuited or the first transistor TR1 and the third transistor TR3 are short-circuited and failed.

[0109] Therefore, after determining one of the motor open circuit fault, the ground short circuit fault, and the battery short circuit fault, the first processor 400 turns off the first cut-off switch SW1 and the second cut-off switch SW2 through the first driver module 500. Then, the first processor 400 applies a voltage to a node between the first transistor TR1 and the second transistor TR2 through the first driver module 500, and determines whether at least one of the first transistor TR1 and the second transistor TR2 has a battery short circuit or a ground short circuit fault according to the voltage measured by the first-1 monitoring part 311.

[0110] That is, the first processor 400 applies a voltage to a node between the first transistor TR1 and the second transistor TR2 through the first driver module 500 , and detects a voltage actually applied to the node between the first transistor TR1 and the second transistor TR2 through the first-1 monitoring part 311 .

[0111] At this time, if the voltage detected at the node between the first transistor TR1 and the second transistor TR2 is a battery voltage, the first processor 400 determines a battery short circuit fault of the node itself, or a short circuit of the first transistor TR1. Similarly, if the voltage detected at the node between the first transistor TR1 and the second transistor TR2 is a ground voltage, the first processor 400 determines a ground short circuit fault of the node itself, or a short circuit fault of the second transistor TR2.

[0112] This may also apply to the third transistor TR3 and the fourth transistor TR4. That is, the first processor 400 extracts the voltage of the third transistor TR3 and the fourth transistor TR4 based on the situation confirmed after turning on the cut-off transistor and after checking the first transistor TR1 and the second transistor TR2. For example, when the first processor 400 turns on the cut-off transistor and confirms that the first motor drive module 100 has failed, if the first transistor TR1 and the second transistor TR2 have not failed, the first processor 400 determines that the third transistor TR3 or the fourth transistor TR4 has failed. In this case, the first processor 400 determines that at least one of the third transistor TR3 and the fourth transistor TR4 has a battery short circuit or a ground short circuit fault based on the voltage measured by the first-2 monitoring part 312. That is, if the voltage detected at the node between the third transistor TR3 and the fourth transistor TR4 is a battery voltage, the first processor 400 determines a battery short circuit fault of the node itself, or a short circuit fault of the third transistor TR3. If the voltage detected at the node between the third transistor TR3 and the fourth transistor TR4 is the ground voltage, the first processor 400 determines a ground short fault of the node itself, or a short fault of the fourth transistor TR4.

[0113] On the other hand, the method for determining a fault in the first motor driving module 100 as described above is also applicable to the second motor driving module 200 .

[0114] In another embodiment, the pull-up source and the pull-down source may be used to monitor the fault of the second motor driving module 200 .

[0115] refer to Figure 7 , the second processor 600 turns on the third cut-off switch SW3 and the fourth cut-off switch SW4, and turns off the first cut-off switch SW1 and the second cut-off switch SW2 through the second driver module 700. At this time, the pull-up source and the pull-down source may be connected to the node between the fifth transistor TR5 and the sixth transistor TR6, or the pull-up source and the pull-down source may be connected to the node between the seventh transistor TR7 and the eighth transistor TR8.

[0116] The second processor 600 connects the pull-up source and the pull-down source to the node between the fifth transistor TR5 and the sixth transistor TR6 through the second driver module 700 , and detects the voltage at the node between the seventh transistor TR7 and the eighth transistor TR8 through the second-2 monitoring part 322 .

[0117] That is, in the case where the pull-up source is enabled, if the voltage on the node between the seventh transistor TR7 and the eighth transistor TR8 is high, the second processor 600 determines that the second motor drive module 200 is in a normal state. On the other hand, if the voltage on the node between the seventh transistor TR7 and the eighth transistor TR8 is different from the voltage of the pull-up source, the second processor 600 determines that the second motor drive module 200 has a motor open circuit fault. If the voltage on the node between the seventh transistor TR7 and the eighth transistor TR8 is low, the second processor 600 also determines that the second motor drive module 200 has a ground short circuit fault.

[0118] On the other hand, in the case where the pull-down source is enabled, if the voltage on the node between the seventh transistor TR7 and the eighth transistor TR8 is low, the second processor 600 determines that the second motor drive module 200 is in a normal state. On the other hand, if the voltage on the node between the seventh transistor TR7 and the eighth transistor TR8 is different from the voltage of the pull-down source, the second processor 600 determines that the second motor drive module 200 has a motor open circuit fault. If the voltage on the node between the seventh transistor TR7 and the eighth transistor TR8 is high (battery voltage), the second processor 600 also determines that the second motor drive module 200 has a battery short circuit fault. When only the pull-up source is enabled, if the voltage on the node between the seventh transistor TR7 and the eighth transistor TR8 is low, the second processor 600 also determines that the second motor drive module 200 has a ground short circuit.

[0119] This is shown in Table 1 below.

[0120] Table 1

[0121] Source Status normal Motor open circuit GND short circuit BATT short circuit Enable pull-up high high Low high Enable Dropdown Low Low Low high

[0122] If it is determined that the second motor driving module 200 has one of the motor open fault, the ground short fault, and the battery short fault as described above, the second processor 600 turns off the third cut-off switch SW3 and the fourth cut-off switch SW4 through the second driver module 700. Then, the second processor 600 applies a voltage to a node between the fifth transistor TR5 and the sixth transistor TR6 through the second driver module 700, and determines whether at least one of the fifth transistor TR5 and the sixth transistor TR6 has a battery short or ground short fault based on the voltage measured by the second-1 monitoring part 321.

[0123] That is, the second processor 600 applies a voltage to a node between the fifth transistor TR5 and the sixth transistor TR6 through the second driver module 700 , and detects a voltage actually applied to a node between the fifth transistor TR5 and the sixth transistor TR6 through the second-1 monitoring part 321 .

[0124] At this time, if the voltage detected at the node between the fifth transistor TR5 and the sixth transistor TR6 is the battery voltage, the second processor 600 determines a battery short circuit fault of the node itself, or a short circuit of the fifth transistor TR5. Similarly, if the voltage detected at the node between the fifth transistor TR5 and the sixth transistor TR6 is the ground voltage, the second processor 600 determines a ground short circuit fault of the node itself, or a short circuit of the sixth transistor TR6.

[0125] This may be applied to the seventh transistor TR7 and the eighth transistor TR8 in the same manner. That is, the second processor 600 applies a voltage to the node between the seventh transistor TR7 and the eighth transistor TR8 through the second driver module 700, and determines whether at least one of the seventh transistor TR7 and the eighth transistor TR8 has a battery short circuit or a ground short circuit fault according to the voltage measured by the second-2 monitoring part 322. That is, if the voltage detected at the node between the seventh transistor TR7 and the eighth transistor TR8 is a battery voltage, the second processor 600 determines a battery short circuit fault of the node itself, or a short circuit fault of the seventh transistor TR7. In addition, if the voltage detected at the node between the seventh transistor TR7 and the eighth transistor TR8 is a ground voltage, the second processor 600 determines a ground short circuit fault of the node itself or a short circuit fault of the eighth transistor TR8.

[0126] This method of determining a fault in the second motor driving module 200 may also be applied to the first motor driving module 100 .

[0127] In another embodiment, the pull-up power supply and the pull-down power supply may be applied to the first motor driving module 100 and the second motor driving module 200 , respectively, to monitor the failure of the first motor driving module 100 or the second motor driving module 200 .

[0128] Reference Fig. 8A , the first processor 400 turns off the first disconnect switch SW1 and turns on the second disconnect switch SW2 through the first driver module 500. The second processor 600 turns on the third disconnect switch SW3 and turns off the fourth disconnect switch SW4 through the second driver module 700.

[0129] At this time, the pull-up source and the pull-down source may be connected to the fifth transistor TR5 and the sixth transistor TR6 of the second motor driving module 200. In this case, the failure of the first motor driving module 100 may be monitored based on the voltage at the node between the third transistor TR3 and the fourth transistor TR4 of the first motor driving module 100.

[0130] In the case where the pull-up source is enabled, if the voltage at the node between the third transistor TR3 and the fourth transistor TR4 is high, the first processor 400 determines that the first motor drive module 100 is in a normal state. On the other hand, if the voltage at the node between the third transistor TR3 and the fourth transistor TR4 is different from the voltage of the pull-up source, the first processor 400 determines that the first motor drive module 100 has a motor open circuit fault. In addition, if the voltage at the node between the third transistor TR3 and the fourth transistor TR4 is low, the first processor 400 determines that the first motor drive module 100 has a ground short circuit fault.

[0131] On the other hand, in the case where the pull-down source is enabled, if the voltage at the node between the third transistor TR3 and the fourth transistor TR4 is low, the first processor 400 determines that the first motor drive module 100 is in a normal state. On the other hand, if the voltage at the node between the third transistor TR3 and the fourth transistor TR4 is different from the voltage of the pull-down source, the first processor 400 determines that the first motor drive module 100 has a motor open circuit fault. In addition, if the voltage at the node between the third transistor TR3 and the fourth transistor TR4 is high (battery voltage), the first processor 400 determines that the first motor drive module 100 has a battery short circuit fault.

[0132] This is shown in Table 2 below.

[0133] Table 2

[0134] Source Status normal Motor open circuit GND short circuit BATT short circuit Enable pull-up high high Low high Enable Dropdown Low high Low high

[0135] Reference Figure 8B , the first processor 400 turns on the first disconnect switch SW1 and turns off the second disconnect switch SW2 through the first driver module 500. The second processor 600 turns off the third disconnect switch SW3 and turns on the fourth disconnect switch SW4 through the second driver module 700.

[0136] At this time, the pull-up source and the pull-down source may be connected to the seventh transistor TR7 and the eighth transistor TR8 of the second motor driving module 200. In this case, the failure of the first motor driving module 100 may be monitored based on the voltage at the node between the first transistor TR1 and the second transistor TR2 measured by the first-1 monitoring part 311.

[0137] In the case where the pull-up source is enabled, if the voltage at the node between the first transistor TR1 and the second transistor TR2 is high, the second processor 600 determines that the first motor drive module 100 is in a normal state. On the other hand, if the voltage at the node between the first transistor TR1 and the second transistor TR2 is different from the voltage of the pull-up source, the second processor 600 determines that the first motor drive module 100 has a motor open circuit fault. In addition, if the voltage at the node between the first transistor TR1 and the second transistor TR2 is low, the second processor 600 determines that the first motor drive module 100 has a ground short circuit fault.

[0138] On the other hand, in the case where the pull-down source is enabled, if the voltage at the node between the first transistor TR1 and the second transistor TR2 is low, the second processor 600 determines that the first motor drive module 100 is in a normal state. On the other hand, if the voltage at the node between the first transistor TR1 and the second transistor TR2 is different from the voltage of the pull-down source, the second processor 600 determines that the first motor drive module 100 has a motor open circuit fault. In addition, if the voltage at the node between the first transistor TR1 and the second transistor TR2 is high (battery voltage), the second processor 600 determines that the first motor drive module 100 has a battery short circuit fault.

[0139] This is shown in Table 3 below.

[0140] Table 3

[0141] Source Status normal Motor open circuit GND short circuit BATT short circuit Enable pull-up high high Low high Enable Dropdown Low high Low high

[0142] On the other hand, if it is determined that the second motor driving module 200 has one of the motor open circuit fault, the ground short circuit fault and the battery short circuit fault as described above, the second processor 600 turns off the third cut-off switch SW3 and the fourth cut-off switch SW4. Then, the second processor 600 applies a voltage to the node between the fifth transistor TR5 and the sixth transistor TR6, and determines whether at least one of the fifth transistor TR5 and the sixth transistor TR6 has a battery short circuit or a ground short circuit fault according to the voltage measured by the second-1 monitoring part 321.

[0143] That is, the second processor 600 applies a voltage to a node between the fifth transistor TR5 and the sixth transistor TR6 , and detects a voltage actually applied to a node between the fifth transistor TR5 and the sixth transistor TR6 through the second-1 monitoring part 321 .

[0144] At this time, if the voltage detected at the node between the fifth transistor TR5 and the sixth transistor TR6 is a battery voltage, the second processor 600 determines that at least one of the fifth transistor TR5 and the sixth transistor TR6 has a battery short circuit fault. In addition, if the voltage detected at the node between the fifth transistor TR5 and the sixth transistor TR6 is a ground voltage, the second processor 600 determines that at least one of the fifth transistor TR5 and the sixth transistor TR6 has a ground short circuit fault.

[0145] This may be applied to the seventh transistor TR7 and the eighth transistor TR8 in the same manner. That is, the second processor 600 applies a voltage to the node between the seventh transistor TR7 and the eighth transistor TR8, and determines whether at least one of the seventh transistor TR7 and the eighth transistor TR8 has a battery short circuit or a ground short circuit fault according to the voltage measured by the second-2 monitoring part 322. That is, if the voltage detected at the node between the seventh transistor TR7 and the eighth transistor TR8 is a battery voltage, the second processor 600 determines that at least one of the seventh transistor TR7 and the eighth transistor TR8 has a battery short circuit fault. In addition, if the voltage detected at the node between the seventh transistor TR7 and the eighth transistor TR8 is a ground voltage, the second processor 600 determines that at least one of the seventh transistor TR7 and the eighth transistor TR8 has a ground short circuit fault.

[0146] This method of determining a fault in the second motor driving module 200 may also be applied to the first motor driving module 100 .

Claims

1. A motor drive redundancy device for an electronic parking brake, the device comprising: A first motor drive module configured to provide current to the motor; A first driver module configured to control the first motor driving module; A second motor driving module, configured to drive the motor; a second driver module configured to control the second motor driving module; a monitoring module configured to monitor the states of the first motor driving module and the second motor driving module; and A processor is configured to control at least one of the first motor drive module and the second motor drive module to drive the motor if the monitoring module detects that the first motor drive module or the second motor drive module fails.

2. The motor drive redundancy device according to claim 1, wherein the first motor drive module comprises: First to fourth transistors constituting an H-bridge; a first cut-off switch configured to cut off current applied to the motor from the first transistor and the second transistor; and a second cut-off switch configured to cut off current applied to the motor from the third transistor and the fourth transistor, and The second motor drive module includes: fifth to eighth transistors constituting an H-bridge; a third cut-off switch configured to cut off the current applied to the motor from the fifth transistor and the sixth transistor; and a fourth cut-off switch configured to cut off the current applied to the motor from the seventh transistor and the eighth transistor.

3. The motor drive redundancy device according to claim 2, wherein the processor is configured to: control the fifth transistor and the sixth transistor, and the third transistor and the fourth transistor, or control the second motor drive module to drive the motor if at least one of the first transistor and the second transistor fails.

4. The motor drive redundancy device according to claim 2, wherein the processor is configured to: control the seventh transistor and the eighth transistor, and the first transistor and the second transistor, or control the second motor drive module to drive the motor if at least one of the third transistor and the fourth transistor fails.

5. The motor drive redundant device according to claim 2, wherein the monitoring module comprises: a first monitoring section configured to monitor states of the first to fourth transistors; and A second monitoring section is configured to monitor states of the fifth to eighth transistors.

6. The motor drive redundancy device according to claim 5, wherein the first monitoring portion comprises: a first-1 monitoring portion connected to a first power input of the motor through a node between the first transistor and the second transistor; and a first-2 monitoring portion connected to a second power supply input of the motor through a node between the third transistor and the fourth transistor, and The second monitoring portion includes: a second-1 monitoring portion connected to a first power input of the motor through a node between the fifth transistor and the sixth transistor; and a second -2 monitoring portion connected to a second power supply input of the motor through a node between the seventh transistor and the eighth transistor.

7. The motor drive redundancy device according to claim 2, wherein the processor is configured to control the first driver module to apply a voltage to one side of an H-bridge circuit of the first motor drive module, and determine a fault of the first motor drive module according to a voltage on the other side of the H-bridge circuit detected by the monitoring module, or The processor is configured to control the second driver module to apply voltage to one side of the H-bridge circuit of the second motor driving module, and determine a fault of the second motor driving module according to the voltage of the other side of the H-bridge circuit detected by the monitoring module.

8. The motor drive redundancy device according to claim 2, wherein the processor is configured to control the first driver module to connect the pull-up source to one side of the H-bridge circuit of the first motor drive module, and determine the failure of the first motor drive module according to the voltage of the other side of the H-bridge circuit detected by the monitoring module, or The processor is configured to control the second driver module to connect the pull-up source to one side of the H-bridge circuit of the second motor driver module, and determine a fault of the second motor driver module according to a voltage at the other side of the H-bridge circuit detected by the monitoring module.

9. The motor drive redundancy device according to claim 2, wherein the processor is configured to control the first driver module to connect a pull-down source to one side of an H-bridge circuit of the first motor drive module, and determine a fault of the first motor drive module according to a voltage of the other side of the H-bridge circuit detected by the monitoring module, or The processor is configured to control the second driver module to connect a pull-down source to one side of an H-bridge circuit of the second motor driver module, and determine a fault of the second motor driver module according to a voltage at the other side of the H-bridge circuit detected by the monitoring module.

10. The motor drive redundancy device according to claim 7, wherein the processor is configured to: if the first motor drive module is in a faulty state, determine the fault of at least one of the first to fourth transistors after turning off at least one of the first disconnect switch and the second disconnect switch, or the processor is configured to: if the second motor drive module is in a faulty state, determine the fault of at least one of the fifth to eighth transistors after turning off at least one of the third disconnect switch and the fourth disconnect switch.

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