Manufacturing method of silicon oxynitride film layer and semiconductor device

Abstract

The invention relates to a manufacturing method of a silicon oxynitride film layer and a semiconductor device. The method comprises the following steps: step A, carrying out chemical vapor deposition on SiH4 and N2O in a reaction cavity of a deposition machine table to form the silicon oxynitride film layer; and step B, increasing the flow of the N2O, reducing the flow of the SiH4, and increasing the power of the deposition machine table to continue the reaction, so that the thickness of the silicon oxynitride film layer reaches the required thickness. The process for forming the silicon oxynitride film layer is divided into two steps: step 1, carrying out reaction on SiH4 by using small-flow N2O to form an N2O deposition atmosphere; in the second step, high-flow N2O and high power are adopted for surface treatment of the silicon oxynitride film layer, SiH4 and N2O are incompletely reacted, so that Si-H bonds formed on the surface of the silicon oxynitride film layer are converted into relatively stable Si-O bonds, and the bulge defect caused by the fact that the Si-H bonds adsorb small particles can be avoided.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, in particular to a method for manufacturing a silicon oxynitride film layer, and also to a semiconductor device. Background Art

[0002] Dielectric Anti Reflective Coating (DARC) is used to suppress the reflected light generated by the structure under the photoresist during photolithography to prevent the reflected light and the incident light from interfering with each other and forming standing waves, thereby affecting the pattern accuracy of the photoresist after exposure. Silicon oxynitride is a common dielectric anti-reflective coating material. For example, SiH 4 With N 2 O reacts to form silicon oxynitride as a dielectric anti-reflection coating. However, the inventors have found that the dielectric anti-reflection coating in some products will form DARC bulging defects, such as Figure 1 This defect will affect the semiconductor process yield. Summary of the invention

[0003] Based on this, it is necessary to provide a method for manufacturing a silicon oxynitride film layer that can improve bulging defects.

[0004] A method for manufacturing a silicon oxynitride film layer, comprising: 4 With N 2 O reacts to form a silicon oxynitride film layer; and converts Si-H bonds on the surface of the silicon oxynitride film layer into Si-O bonds.

[0005] The above-mentioned method for manufacturing the silicon oxynitride film layer comprises: 4 With N 2 The Si-H bonds formed on the surface of the silicon oxynitride film layer due to incomplete O reaction are converted into relatively stable Si-O bonds, which can avoid the bulging defects caused by the adsorption of tiny particles by Si-H bonds.

[0006] In one embodiment, the SiH 4 With N 2 The steps of forming a silicon oxynitride film layer by reaction of SiH 4 With N 2 O is chemically vapor deposited to form a silicon oxynitride film layer; the step of converting Si-H bonds on the surface of the silicon oxynitride film layer into Si-O bonds comprises step B: increasing the N 2 O flow rate, reduce the SiH 4 The flow rate is set to 0.1°, and the power of the deposition machine is increased to continue the reaction, so that the thickness of the silicon oxynitride film layer reaches the required value.

[0007] In one embodiment, the step B further includes a step of cooling the reaction chamber containing the silicon oxynitride film layer.

[0008] In one embodiment, the SiH introduced into the reaction chamber in step B is 4 Flow rate is less than N 2 1 / 200 of O flow rate.

[0009] In one embodiment, the N introduced into the reaction chamber in step B is 2 O flow rate is 900 to 1500 sccm, SiH 4 The flow rate is 0.

[0010] In one embodiment, the RF power of the deposition machine in step B is greater than 140 watts.

[0011] In one embodiment, the RF power of the deposition machine in step A is 100 to 140 watts.

[0012] In one embodiment, the reaction time of step A is 7 to 13 seconds, and the reaction time of step B is 10 to 20 seconds.

[0013] In one embodiment, the pressure in the reaction chamber in step A and step B is 5 to 6 Torr.

[0014] In one embodiment, the temperature in the reaction chamber in step A and step B is 380 to 420 degrees Celsius.

[0015] In one embodiment, the step A and the step B further include introducing an inert gas, wherein the flow rate of the inert gas introduced into the reaction chamber in the step A is 1800 to 2200 sccm, and the flow rate of the inert gas introduced into the reaction chamber in the step B is 900 to 1500 sccm.

[0016] In one embodiment, the inert gas is helium.

[0017] In one embodiment, step A and step B are to form the silicon nitride oxide film layer covering the upper surface of the wafer, and the silicon nitride oxide film layer serves as a dielectric anti-reflective coating. The wafer includes: a substrate; a first conductive type well region; a second conductive type well region; a first conductive type region located in the second conductive type well region; a second conductive type region located in the first conductive type well region; an isolation structure located between the first conductive type region and the second conductive type region; a gate structure located on the first conductive type well region and the second conductive type well region, including a gate dielectric layer and a gate on the gate dielectric layer; sidewalls located on both sides of the gate; and a metal silicide layer located on the upper surface of the gate, the upper surface of the first conductive type region, and the upper surface of the second conductive type region.

[0018] It is also necessary to provide another method for manufacturing a silicon oxynitride film layer.

[0019] A method for manufacturing a silicon oxynitride film layer comprises: step A, using SiH 4 With N 2 O is subjected to chemical vapor deposition to form a silicon nitride oxide film layer; step B, increasing the N 2 O flow rate, reduce the SiH 4 The flow rate is set to 0.1°, and the power of the deposition machine is increased to continue the reaction, so that the thickness of the silicon oxynitride film layer reaches the required value.

[0020] The above-mentioned method for manufacturing the silicon oxynitride film layer divides the process of forming the silicon oxynitride film layer into two steps. The first step is to use a small flow rate of N 2 O undertakes SiH 4 React to form N 2 O deposition atmosphere; the second step uses a large flow of N 2 O and high power to treat the surface of silicon oxynitride film layer, SiH 4 With N 2 The Si-H bonds formed on the surface of the silicon oxynitride film layer due to the incomplete reaction of O are converted into relatively stable Si-O bonds, which can avoid the bulging defects caused by the adsorption of tiny particles by the Si-H bonds. The above-mentioned method for making the silicon oxynitride film layer does not require the introduction of additional gases or the addition of complicated process steps, and can effectively reduce the bulging defects and obtain a high-quality silicon oxynitride film layer.

[0021] In one embodiment, the step B further includes a step of cooling the reaction chamber containing the silicon oxynitride film layer.

[0022] In one embodiment, the SiH introduced into the reaction chamber in step B is 4 Flow rate is less than N 2 1 / 100 of O flow rate.

[0023] In one embodiment, the N introduced into the reaction chamber in step B is 2 O flow rate is 900 to 1500 sccm, SiH 4 The flow rate is 0.

[0024] In one embodiment, the RF power of the deposition machine in step B is greater than 140 watts.

[0025] In one embodiment, the RF power of the deposition machine in step A is 100 to 140 watts.

[0026] In one embodiment, the reaction time of step A is 7 to 13 seconds, and the reaction time of step B is 10 to 20 seconds.

[0027] In one embodiment, the pressure in the reaction chamber in step A and step B is 5 to 6 Torr.

[0028] In one embodiment, the temperature in the reaction chamber in step A and step B is 380 to 420 degrees Celsius.

[0029] In one embodiment, the flow rate of the helium gas introduced into the reaction chamber in the step A is 1800 to 2200 sccm, and the flow rate of the helium gas introduced into the reaction chamber in the step B is 900 to 1500 sccm.

[0030] In one embodiment, step A and step B are to form the silicon nitride oxide film layer covering the upper surface of the wafer as a dielectric anti-reflective coating, and the wafer includes: a substrate; a first conductive type well region; a second conductive type well region; a first conductive type region, located in the second conductive type well region; a second conductive type region, located in the first conductive type well region; an isolation structure, located between the first conductive type region and the second conductive type region; a gate structure, located on the first conductive type well region and the second conductive type well region, including a gate dielectric layer and a gate on the gate dielectric layer; sidewalls, located on both sides of the gate; a metal silicide layer, located on the upper surface of the gate, the upper surface of the first conductive type region and the upper surface of the second conductive type region.

[0031] There is also a need to protect a semiconductor device manufactured using the method for manufacturing a silicon oxynitride film layer described in any of the aforementioned embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the embodiments and / or examples currently described, and the best modes of these inventions currently understood.

[0033] Figure 1 This is a microscopic photograph of the DARC bulge defect formed on the surface of the dielectric anti-reflection coating;

[0034] Figure 2a is a schematic diagram of the Si-H bonds formed on the surface of the silicon oxynitride film layer 2. Figure 2b It is a schematic diagram of Si-H bond being converted into Si-O bond;

[0035] Figure 3 is a flow chart of a method for manufacturing a silicon oxynitride film layer in one embodiment of the present application;

[0036] Figure 4 is a schematic cross-sectional view of a wafer before a silicon oxynitride film layer is formed;

[0037] Figure 5 is a schematic diagram of a DARC bulge defect 264 formed on the surface of the silicon oxynitride film layer 262 after the silicon oxynitride film layer 262 is formed on the front side of the wafer;

[0038] Figure 6 It is a trend chart of improvement of DARC bulging defects of silicon oxynitride film layers formed by using the embodiments and comparative examples shown in Table 1. DETAILED DESCRIPTION

[0039] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0041] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. "Connection" in this specification should be understood as "electrical connection", "communication connection" and the like if the connected circuits, modules, units, etc. have transmission of electrical signals or data to each other. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

[0042] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0043] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present invention. When used herein, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It is understood that "at least one" refers to one or more, and "multiple" refers to two or more. "At least part of an element" refers to part or all of an element. It should also be understood that the terms "compose" and / or "comprise" when used in this specification determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0044] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the invention. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the invention should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the invention.

[0045] The semiconductor field vocabulary used in this article is technical vocabulary commonly used by technical personnel in this field. For example, for P-type and N-type impurities, in order to distinguish the doping concentration, P+ type represents P-type with heavy doping concentration, P-type represents P-type with medium doping concentration, P-type represents P-type with light doping concentration, N+ type represents N-type with heavy doping concentration, N-type represents N-type with medium doping concentration, and N-type represents N-type with light doping concentration.

[0046] As described in the background art, the dielectric anti-reflection coating will form DARC bulge defects in actual production. The inventor believes that the cause of the DARC bulge defect is that the SiH 4 With N 2 During the process of O reaction to generate silicon oxynitride, Si-H bonds will exist on the surface of the silicon oxynitride film layer due to incomplete reaction. The Si-H bonds will adsorb tiny particles (less than 100 nanometers in size), thereby forming DARC bulge defects. This application proposes a method for manufacturing a silicon oxynitride film layer, referring to Figure 2a and Figure 2b , through SiH 4 With N 2 After the silicon oxynitride film layer 2 is formed by reaction with O, the Si-H bonds on the surface of the silicon oxynitride film layer 2 are converted into Si-O bonds, thereby avoiding the bulging defects caused by the adsorption of tiny particles by the Si-H bonds.

[0047] Figure 3 1 is a flow chart of a method for manufacturing a silicon oxynitride film layer in an embodiment of the present application, comprising the following steps:

[0048] S110, SiH 4 With N 2 A silicon oxynitride film layer is formed by CVD.

[0049] In the reaction chamber of the deposition machine, SiH 4 With N 2O is chemically vapor deposited (CVD) to form a silicon oxynitride film layer on the front side of the wafer.

[0050] S120, increase N 2 O. Reduce SiH 4 flow rate and increase the reaction power.

[0051] Increase the N of the machine 2 O flow, reduce SiH 4 The flow rate is reduced, and the reaction power of the deposition machine is increased to continue the reaction, so that the thickness of the silicon oxynitride film layer reaches the required value.

[0052] The above-mentioned method for manufacturing the silicon oxynitride film layer divides the process of forming the silicon oxynitride film layer into two steps. The first step is to use a small flow rate of N 2 O undertakes SiH 4 React to form N 2 O deposition atmosphere; the second step uses a large flow of N 2 O and high power to treat the surface of silicon oxynitride film layer, SiH 4 With N 2 O reaction is incomplete, so that the Si-H bonds formed on the surface of the silicon oxynitride film are converted into relatively stable Si-O bonds, which can avoid the bulging defects caused by the adsorption of tiny particles by the Si-H bonds.

[0053] In one embodiment of the present application, after step S120, the step of cooling the reaction chamber containing the silicon oxynitride film layer is also included. That is, after the silicon oxynitride film layer is formed on the front side of the wafer in step S120, the wafer is kept in the reaction chamber, and the reaction chamber is cooled, which can achieve a better neutralization (i.e., converting Si-H bonds into Si-O bonds) effect and avoid particles adhering to the surface of the silicon oxynitride film layer in the reaction chamber. In one embodiment of the present application, the RF power of the deposition machine is reduced to 0 during cooling, the bottom plate carrier of the deposition machine stops heating (drops to room temperature), and helium is introduced. In one embodiment of the present application, the flow rate of helium introduced into the reaction chamber of the machine during cooling is 900 to 1500 sccm.

[0054] The purpose of step S120 is to pass a large flow of N 2 O and increase the reaction power to convert the Si-H bonds on the surface of the silicon oxynitride film layer into Si-O bonds. Therefore, step S120 does not need to introduce SiH 4 In one embodiment of the present application, step S120 introduces SiH 4 The flow rate is less than N 2 Further, the SiH 4 The flow rate of N can be 0. In one embodiment of the present application, in step S120, N2 The flow rate of O is 900 to 1500 sccm.

[0055] In one embodiment of the present application, the RF power of the deposition machine in step S110 is 100 to 140 watts. The RF power of the deposition machine in step S120 is greater than 140 watts; further, the RF power of the deposition machine in step S120 is not greater than 160 watts. In one embodiment of the present application, the RF power of the deposition machine in step S120 is 150 watts.

[0056] In one embodiment of the present application, steps S110 and S120 also require the introduction of an inert gas, such as helium, into the reaction chamber of the deposition machine. In one embodiment of the present application, the flow rate of the inert gas introduced into the reaction chamber in step S120 is less than the flow rate of the inert gas introduced into the reaction chamber in step S110.

[0057] In one embodiment of the present application, the reaction time of step S110 is 7 to 13 seconds, and the reaction time of step S120 is 10 to 20 seconds. In one embodiment of the present application, the pressure in the reaction chamber in step S110 and step S120 is 5 to 6 Torr. In one embodiment of the present application, the temperature in the reaction chamber in step S110 and step S120 is 380 to 420 degrees Celsius. In one embodiment of the present application, the flow rate of helium gas introduced into the reaction chamber in step S110 is 1800 to 2200 sccm, and the flow rate of helium gas introduced into the reaction chamber in step S120 is 900 to 1500 sccm.

[0058] In one embodiment of the present application, step S110 is Figure 4 The front side of the wafer shown has a silicon oxynitride film layer formed thereon. Figure 4 The wafer structure includes a substrate 210, a first conductive type well region 222, a second conductive type well region 224, a first conductive type region 228, a second conductive type region 226, an isolation structure 230, a gate structure (including a gate dielectric layer 242 and a gate 244), a sidewall 246, and a metal silicide layer 252. The first conductive type region 228 is located in the second conductive type well region 224, and the second conductive type region 226 is located in the first conductive type well region 222. The isolation structure 230 is located between the first conductive type region 228 and the second conductive type region 226, and the first conductive type region 228 and the second conductive type region 226 are isolated by the isolation structure 230. In one embodiment of the present application, the isolation structure 230 is a shallow trench isolation structure (STI).

[0059] The gate 244 is located on the gate dielectric layer 242, and the sidewalls 246 are located on both sides of the gate 244. The gate structure includes a first gate structure ( Figure 4), and a second gate structure (not shown) located on the second conductivity type well region 224 Figure 4 The second conductive type region 226 is located on both sides below the gate 244 in the first gate structure, and the first conductive type region 228 is located on both sides below the gate 244 in the second gate structure.

[0060] The metal silicide layer 252 is located on the upper surface of the gate 244, the upper surface of the first conductive type region 228, and the upper surface of the second conductive type region 226. Self-aligned metal silicide (salicide) is a relatively simple and convenient contact metallization process. In the manufacturing process of semiconductor devices, some areas require a salicide process, while some areas require a non-self-aligned metal silicide (non-salicide) process. For devices that require a non-salicide process, the characteristics of the above-mentioned salicide are used to cover the areas that require non-salicide with a material that does not react with metal. This material used to cover non-salicide devices is called a self-aligned silicide barrier film (SAB). In one embodiment of the present application, the metal silicide layer 252 is cobalt silicide (Cobalt Silicide, CoSi x In other embodiments, the material of the metal silicide layer 252 may be NiSi x 、PtSi x or a combination of these compounds.

[0061] In one embodiment of the present application, the substrate 210 is a semiconductor substrate, and its material can be undoped single crystal silicon, single crystal silicon doped with impurities, silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), etc., and can also be at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors. Figure 4 In the embodiment shown, the constituent material of the substrate 210 is selected from single crystal silicon. In one embodiment of the present application, the first conductivity type is N type, and the second conductivity type is P type. The first conductivity type region 228 is an N+ region, and the second conductivity type region 226 is a P+ region. In other embodiments of the present application, the first conductivity type may also be P type, and the second conductivity type may be N type.

[0062] In one embodiment of the present application, the gate dielectric layer 242 may include conventional dielectric materials such as oxides, nitrides, and oxynitrides of silicon having a dielectric constant from about 4 to about 20 (measured in a vacuum), or the gate dielectric layer 242 may include a generally higher dielectric constant dielectric material having a dielectric constant from about 20 to at least about 100. Such higher dielectric constant dielectric materials may include, but are not limited to, hafnium oxide, hafnium silicate, titanium oxide, barium strontium titanate (BSTs), and lead zirconate titanate (PZTs).

[0063] In one embodiment of the present application, the gate 244 is made of polysilicon. In other embodiments, metal, metal nitride, metal silicide or similar compounds may be used as the material of the gate 244 .

[0064] Figure 5 FIG. 2 is a schematic diagram showing an exemplary DARC bulge defect 264 formed on the surface of the silicon oxynitride film layer 262 after the silicon oxynitride film layer 262 is formed on the front side of the wafer. Figure 5 In the embodiment shown, the silicon oxynitride film layer 262 serves as a stop layer for dry etching of the contact holes to detect the etching endpoint, and serves as a protective layer for the metal silicide layer 252 and the device to prevent the metal silicide layer 252 from diffusing into the interlayer dielectric layer (ILD) above and affecting the electrical performance of the device. The material of the ILD layer can be borophosphosilicate glass (BPSG).

[0065] In one embodiment of the present application, the deposition machine used is a PECVD (plasma enhanced chemical vapor deposition) machine. The following table shows the process parameters of the menu for forming a silicon oxynitride film layer in one embodiment of the present application:

[0066]

[0067] Table 1

[0068] Figure 6 1 is a trend chart of DARC bulging defect improvement of silicon oxynitride film formed by using the embodiment and comparative example shown in Table 1, and the horizontal axis is the number of the wafer. It can be seen that the present application performs high-power and high-flow N 2 O treatment process. 2The O treatment process converts the incompletely reacted Si-H bonds on the DARC surface into stable Si-O bonds, thereby preventing the adsorption of particles on the surface of the silicon oxynitride film layer, and can control the number of DARC bulging defects on each wafer to less than 3. The above method can be embedded in the DARC process menu without adding additional process steps. In other words, the above method does not require the introduction of additional gases or the addition of complex process steps, and can effectively reduce bulging defects and obtain high-quality silicon oxynitride film layers.

[0069] The present application accordingly provides a semiconductor device, which is manufactured using the method for manufacturing a silicon oxynitride film layer described in any of the aforementioned embodiments.

[0070] It should be understood that, although the various steps in the flowchart of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the present application may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0071] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0072] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0073] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A method for manufacturing a silicon oxynitride film layer, comprising: A silicon oxynitride film layer is formed by reacting SiH4 with N2O; The Si-H bonds on the surface of the silicon oxynitride film layer are converted into Si-O bonds.

2. A method for manufacturing a silicon oxynitride film layer, comprising: Step A, forming a silicon oxynitride film layer by chemical vapor deposition using SiH4 and N2O in a reaction chamber of a deposition machine; Step B, increasing the flow rate of the N2O, reducing the flow rate of the SiH4, and increasing the power of the deposition machine to continue the reaction, so that the thickness of the silicon oxynitride film layer reaches the required value.

3. The method for manufacturing a silicon oxynitride film layer according to claim 2, characterized in that: After step B, the method further includes cooling the reaction chamber containing the silicon oxynitride film layer.

4. The method for manufacturing a silicon oxynitride film layer according to claim 2, characterized in that: In the step B, the flow rate of SiH4 introduced into the reaction chamber is less than 1 / 200 of the flow rate of N2O.

5. The method for manufacturing a silicon oxynitride film layer according to claim 4, characterized in that: In the step B, the flow rate of N2O introduced into the reaction chamber is 900 to 1500 sccm, and the flow rate of SiH4 is 0.

6. The method for manufacturing a silicon oxynitride film layer according to any one of claims 2 to 5, characterized in that: The radio frequency power of the deposition machine in step B is greater than 140 watts.

7. The method for manufacturing a silicon oxynitride film layer according to claim 6, characterized in that: The radio frequency power of the deposition machine in step A is 100 to 140 watts.

8. The method for manufacturing a silicon oxynitride film layer according to any one of claims 2 to 5, characterized in that: The reaction time of step A is 7 to 13 seconds, and the reaction time of step B is 10 to 20 seconds; and / or The pressure in the reaction chamber in step A and step B is 5 to 6 Torr; and / or The temperature in the reaction chamber in step A and step B is 380 to 420 degrees Celsius; and / or The steps A and B also include introducing an inert gas. The flow rate of the inert gas introduced into the reaction chamber in step A is 1800 to 2200 sccm, and the flow rate of the inert gas introduced into the reaction chamber in step B is 900 to 1500 sccm.

9. The method for manufacturing a silicon oxynitride film layer according to claim 2, characterized in that: The steps A and B are to form the silicon oxynitride film layer covering the upper surface of the wafer, the silicon oxynitride film layer serving as a dielectric anti-reflection coating, and the wafer comprises: substrate; a first conductivity type well region; a second conductivity type well region; A first conductive type region, located in the second conductive type well region; A second conductive type region, located in the first conductive type well region; An isolation structure, located between the first conductive type region and the second conductive type region; A gate structure, located on the first conductive type well region and the second conductive type well region, comprising a gate dielectric layer and a gate on the gate dielectric layer; Side walls, located on both sides of the gate; The metal silicide layer is located on the upper surface of the gate, the upper surface of the first conductive type region, and the upper surface of the second conductive type region.

10. A semiconductor device, wherein the semiconductor device is manufactured by using the method for manufacturing a silicon oxynitride film layer according to any one of claims 1 to 9.

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