Module configuration method and device, electronic equipment, storage medium and product

Abstract

The invention provides a module configuration method and device, electronic equipment, a storage medium and a product, and the method comprises the steps: obtaining a first recognition signal of a case through a first identification pin, and determining the case information of the case according to the first recognition signal; determining multiple pieces of target module information corresponding to the multiple target modules according to the case information; acquiring a plurality of second identification signals corresponding to the plurality of target modules through the plurality of second identification pins, and determining a plurality of pieces of target module information corresponding to the plurality of target modules according to the plurality of second identification signals; performing verification processing on the plurality of target modules according to the plurality of pieces of target module information and the plurality of pieces of target module information to obtain a verification result; and if the verification result is that the verification is passed, performing configuration processing on the plurality of target modules. According to the scheme, the module information is automatically recognized through the recognition signals obtained through the pins, configuration processing is automatically executed according to the module information, and compared with a manual mode, the module configuration efficiency is effectively improved.

Description

Technical Field

[0001] The present application relates to the field of server technology, and in particular to a module configuration method, device, electronic device, storage medium and product. Background Art

[0002] Graphics Processing Unit (GPU) servers are used for high-performance computing. GPU servers (hereinafter referred to as servers) are widely used in deep learning, scientific computing, or virtual reality. In order to achieve high-performance computing, multiple modules are installed in the server, and multiple modules work together to realize the computing function of the server.

[0003] The collaborative work of multiple modules brings challenges to the maintenance of the server. In related technologies, multiple modules are configured manually.

[0004] However, manual module configuration is inefficient. Summary of the invention

[0005] The present application provides a module configuration method, device, electronic device, storage medium and product to improve module configuration efficiency.

[0006] In a first aspect, the present application provides a module configuration method, comprising: obtaining a first identification signal of a chassis through a first identification pin, and determining chassis information of the chassis according to the first identification signal; determining multiple target module information corresponding to multiple target modules according to the chassis information; obtaining multiple second identification signals corresponding to the multiple target modules through multiple second identification pins, and determining multiple current module information corresponding to the multiple target modules according to the multiple second identification signals; verifying the multiple target modules according to the multiple target module information and the multiple current module information to obtain a verification result, wherein the verification result includes verification passed or verification failed; if the verification result is verification passed, configuring the multiple target modules.

[0007] In one possible implementation, determining the chassis information of the chassis based on the first identification signal includes: determining a current chassis information list stored in a mainboard; inputting the first identification signal and the current chassis information list into a recognition model to obtain the chassis information, wherein the recognition model is obtained by model training based on historical identification signals and historical chassis information lists.

[0008] In one possible implementation, for any target module; multiple second identification signals corresponding to the target module are obtained through multiple second identification pins, including: determining multiple target identification pins corresponding to the target module from the multiple second identification pins; obtaining multiple level states corresponding to the target module through the multiple target identification pins; and determining the multiple level states as the multiple second identification signals.

[0009] In one possible implementation, the multiple target module information includes topology information; configuring the multiple target modules includes: determining the corresponding target firmware files based on the topology information; updating the firmware of the multiple target modules through the target firmware files; and configuring the multiple target modules separately based on the topology information.

[0010] In a possible implementation, the multiple target modules are configured and processed separately according to the topology information, including: determining multiple module parameters corresponding to the multiple target modules according to the topology information; setting the multiple target modules to corresponding module parameters respectively; and performing functional testing on the multiple target modules to obtain test results.

[0011] In one possible implementation, the chassis information includes a target test method and a target performance indicator; performing a functional test on the multiple target modules to obtain a test result, including: performing the functional test on the multiple target modules according to the target test method to obtain test data; determining the test result based on the test data and the target performance indicator, and the test result includes a test pass or a test fail.

[0012] In a second aspect, the present application provides a module configuration device, comprising: a receiving module, used to obtain a first identification signal of a chassis through a first identification pin, and determine chassis information of the chassis according to the first identification signal; a determining module, used to determine multiple target module information corresponding to multiple target modules according to the chassis information; an acquiring module, used to obtain multiple second identification signals corresponding to the multiple target modules through multiple second identification pins, and determine multiple current module information corresponding to the multiple target modules according to the multiple second identification signals; a verifying module, used to perform verification processing on the multiple target modules according to the multiple target module information and the multiple current module information to obtain a verification result, wherein the verification result includes verification passed or verification failed; a configuring module, used to configure the multiple target modules if the verification result is verification passed.

[0013] In one possible implementation, the receiving module is specifically used to determine a current chassis information list stored in the mainboard; the receiving module is also specifically used to input the first identification signal and the current chassis information list into a recognition model to obtain the chassis information, and the recognition model is obtained by model training based on historical identification signals and historical chassis information lists.

[0014] In one possible implementation, for any target module; the acquisition module is specifically used to determine a plurality of target identification pins corresponding to the target module from the plurality of second identification pins; the acquisition module is specifically also used to acquire a plurality of level states corresponding to the target module through the plurality of target identification pins; the acquisition module is specifically also used to determine the plurality of level states as the plurality of second identification signals.

[0015] In one possible implementation, the multiple target module information includes topology information; the device also includes: an execution module, used to determine the corresponding target firmware file based on the topology information; the execution module is also used to update the firmware of the multiple target modules through the target firmware file; the execution module is also used to configure the multiple target modules separately according to the topology information.

[0016] In one possible implementation, the execution module is specifically used to determine multiple module parameters corresponding to the multiple target modules based on the topology information; the execution module is also specifically used to set the multiple target modules to corresponding module parameters respectively; the execution module is also specifically used to perform functional testing on the multiple target modules to obtain test results.

[0017] In one possible implementation, the chassis information includes a target test method and a target performance indicator; the execution module is specifically used to perform the functional test on the multiple target modules according to the target test method to obtain test data; the execution module is also specifically used to determine the test result based on the test data and the target performance indicator, and the test result includes a test pass or a test fail.

[0018] In a third aspect, the present application provides an electronic device comprising: a processor, and a memory communicatively connected to the processor; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory to implement any method described in the first aspect.

[0019] In a fourth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are executed by a processor as described in any one of the methods in the first aspect.

[0020] In a fifth aspect, the present application provides a computer program product, comprising a computer program, wherein the computer program is executed by a processor as in any one of the methods in the first aspect.

[0021] The module configuration method, device, electronic device, storage medium and product provided by the present application include: obtaining a first identification signal of a chassis through a first identification pin, and determining the chassis information of the chassis according to the first identification signal; determining multiple target module information corresponding to multiple target modules according to the chassis information; obtaining multiple second identification signals corresponding to the multiple target modules through multiple second identification pins, and determining multiple target module information corresponding to the multiple target modules according to the multiple second identification signals; verifying the multiple target modules according to the multiple target module information and the multiple target module information to obtain a verification result, wherein the verification result includes verification passed or verification failed; if the verification result is verification passed, the multiple target modules are configured. The above scheme automatically identifies the module information through the identification signal obtained by the pin, and automatically performs configuration processing according to the module information, which effectively improves the module configuration efficiency compared with the manual method. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0023] Figure 1 A schematic diagram of an application scenario of a module configuration method provided in an embodiment of the present application;

[0024] Figure 2 A flowchart of a module configuration method provided in an embodiment of the present application;

[0025] Figure 3 A flowchart of a module configuration method provided in an embodiment of the present application;

[0026] Figure 4 A schematic diagram of an identification pin provided in an embodiment of the present application;

[0027] Figure 5 A schematic diagram of the level status of the connection topology provided in an embodiment of the present application;

[0028] Figure 6 A schematic diagram of updating firmware provided in an embodiment of the present application;

[0029] Figure 7 A schematic diagram of the structure of a module configuration device provided in an embodiment of the present application;

[0030] Figure 8 A schematic diagram of the structure of a module configuration device provided in an embodiment of the present application;

[0031] Fig. 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0032] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0033] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0034] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use, processing, transmission, provision, disclosure and application of the relevant data comply with the relevant laws, regulations and standards of the relevant countries and regions, take necessary confidentiality measures, do not violate public order and good morals, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0035] It should be noted that the module configuration method, device, electronic device, storage medium and product of the present application can be used in the field of server technology, and can also be used in any field other than servers. The application field of the module configuration method, device, electronic device, storage medium and product of the present application is not limited.

[0036] Figure 1 A schematic diagram of an application scenario of a module configuration method provided in an embodiment of the present application is given as an example in combination with the illustrated scenario: a server includes multiple modules, and the multiple modules are installed in a chassis. The multiple modules installed in the chassis work together to realize the computing function of the server.

[0037] In actual applications, there may be configuration errors in the module, resulting in the server failing to perform computing functions.

[0038] In the related art, multiple modules of a server are configured manually. However, a server includes multiple modules, and configuring multiple modules manually has the problem of low efficiency.

[0039] Exemplarily, module configuration includes, but is not limited to, at least one of the following: updating the firmware version of the module, setting the module identification, setting the module operating mode (e.g., high-performance mode, or energy-saving mode, etc.), the communication parameters of the device module, setting the module address, setting the module performance parameters, or setting the module fault detection mechanism.

[0040] The module configuration method provided in this application is intended to solve the above technical problems in the prior art.

[0041] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0042] Figure 2 A schematic diagram of a module configuration method provided in an embodiment of the present application, the method comprising the following steps:

[0043] S201. Acquire a first identification signal of a chassis through a first identification pin, and determine chassis information of the chassis according to the first identification signal.

[0044] Among them, the execution subject of this application can be the processor of the mainboard.

[0045] Among them, the first identification pin (ID pin) is a pin between the mainboard and the chassis.

[0046] Exemplarily, after the mainboard establishes a connection with the chassis, the mainboard can obtain a first identification signal through a first identification pin, and the processor of the mainboard determines the chassis information of the chassis according to the first identification signal.

[0047] Exemplarily, the chassis information includes chassis parameters and chassis support information.

[0048] Combined with the scenario example, the chassis can be differentiated according to the application scenario, and different chassis have different support information. For example, the support information may include the maximum number of hard disks supported or the maximum size of the supported power supply.

[0049] S202: Determine multiple target module information corresponding to the multiple target modules according to the chassis information.

[0050] The target module is the module supported by the chassis.

[0051] Optionally, the mainboard stores a chassis list, which includes multiple chassis identifiers and support information corresponding to each chassis identifier. The chassis information includes the chassis identifier, and the modules supported by the chassis and the module information of each module are searched from the chassis list according to the chassis identifier.

[0052] Based on the above implementations, the efficiency of module configuration can be improved by automatically acquiring the first identification signal and automatically determining a plurality of target modules and a plurality of target module information.

[0053] Exemplarily, the target module information may include module category, module installation location, module quantity, module connection mode, connection topology, or module firmware, etc.

[0054] S203 , obtaining multiple second identification signals corresponding to multiple target modules through multiple second identification pins, and determining multiple current module information corresponding to the multiple target modules according to the multiple second identification signals.

[0055] Among them, the second identification pin is a pin between the mainboard and the module.

[0056] Among them, the multiple current module information is the real-time module information of multiple target modules.

[0057] Exemplarily, when installing a server, each module of the server is connected to a mainboard in the server, and the mainboard can receive signals from each module.

[0058] Optionally, the multiple target module information includes position information of the multiple target modules, and multiple second identification signals corresponding to the multiple target modules are acquired according to positions corresponding to the position information.

[0059] S204, verifying the multiple target modules according to the multiple target module information and the multiple current module information to obtain a verification result, where the verification result includes verification passed or verification failed.

[0060] The verification process is used to verify whether the multiple target modules are correctly installed.

[0061] Combined with the scenario example, multiple target module information reflects the module installation status required for the normal operation of the server corresponding to the chassis. The verification process verifies whether the current module installation status is the module installation status required for the normal operation of the server.

[0062] Optionally, if the target module information corresponding to each target module is consistent with the current module information corresponding to the target module, the verification result is determined to be passed. If the target module information corresponding to any target module is inconsistent with the current module information, the verification result is determined to be failed.

[0063] Based on the above implementation methods, whether the module is correctly installed can be verified through the information of the chassis, thereby improving verification efficiency.

[0064] S205: If the verification result is that the verification is passed, configuration processing is performed on multiple target modules.

[0065] Exemplarily, multiple target modules are uniformly configured and processed.

[0066] Combined with the scenario example, through unified configuration processing, multiple target modules can share the same configuration method, thereby reducing the complexity of module configuration.

[0067] In the related art, multiple modules are configured and processed separately in a manual manner. The present application performs unified configuration processing on multiple target modules, which can reduce the complexity of module configuration and thus improve the efficiency of module configuration.

[0068] The module configuration method provided in the embodiment of the present application obtains the first identification signal of the chassis through the first identification pin, and determines the chassis information of the chassis according to the first identification signal; determines multiple target module information corresponding to multiple target modules according to the chassis information; obtains multiple second identification signals corresponding to multiple target modules through multiple second identification pins, and determines multiple target module information corresponding to multiple target modules according to the multiple second identification signals; verifies multiple target modules according to the multiple target module information and multiple target module information to obtain verification results, and the verification results include verification passed or verification failed; if the verification result is verification passed, the multiple target modules are configured. The above scheme automatically identifies the module information through the identification signal obtained by the pin, and automatically performs configuration processing according to the module information, which effectively improves the module configuration efficiency compared to the manual method.

[0069] Based on any of the above embodiments, Figure 3 , the detailed process of module configuration is explained.

[0070] Figure 3 A flowchart of a module configuration method provided in an embodiment of the present application is shown in FIG. Figure 3 As shown, the method includes:

[0071] S301, determining the current chassis information list stored in the mainboard.

[0072] The current chassis information list stores the identification of the chassis supported by the current mainboard and the corresponding chassis information.

[0073] Optionally, the chassis information list is continuously updated and iterated, and the current chassis information list is the latest version of the chassis information list.

[0074] Combined with the scenario example, when the chassis information list is updated, the mainboard stores the latest version of the chassis information list and overwrites the historical version of the chassis information list. It can be understood that by updating the chassis information list, the mainboard can accurately identify the new type of chassis, thereby improving the accuracy of automatic module configuration.

[0075] S302: Input the first recognition signal and the current chassis information list into a recognition model to obtain chassis information.

[0076] The recognition model is obtained by model training based on historical recognition signals and historical chassis information lists.

[0077] Combined with the scenario example, the recognition model obtained through model training can learn a method for matching chassis information corresponding to the recognition information from the chassis information list. This method can realize automatic matching of chassis information.

[0078] Based on the above implementation, as the chassis is iteratively updated, the chassis information list will gradually become complex. By matching the chassis information corresponding to the first identification signal from the current chassis information list through the recognition model, the error rate can be reduced compared to the manual method, thereby improving the matching accuracy.

[0079] Optionally, if the identification model does not match the chassis information, it means that the motherboard does not support the chassis, and an alarm can be issued through a warning light.

[0080] S303: Determine multiple target module information corresponding to the multiple target modules according to the chassis information.

[0081] It should be noted that the execution process of S303 refers to S202 and will not be repeated here.

[0082] S304: Determine a plurality of target identification pins corresponding to the target module from the plurality of second identification pins.

[0083] Next, combine Figure 4 Describe the identification pins.

[0084] Figure 4 This is a schematic diagram of the identification pin provided in the embodiment of the present application. Figure 4 As shown, the mainboard is connected to the corresponding module through different identification pins, and the identification information corresponding to each identification pin is the identification signal of the corresponding module.

[0085] Optionally, the mainboard groups the multiple second identification pins in advance, and determines the target identification pin from the multiple second identification pins according to the grouping information.

[0086] Optionally, the second identification pins are grouped according to the type of modules to which the identification pins are connected, and / or the second identification pins are grouped according to the positions at which the identification pins are connected.

[0087] Combined with the scenario example, a grouping example is given according to the module type, and the module type includes but is not limited to at least one of the following: hard disk backplane, power board, or switch backplane (sw backplane for short), etc., where the switch backplane connects the CPU, GPU, etc. For example, identification pin A, identification pin B, and identification pin C are only connected to the power board. When the target module is the power board, the multiple target identification pins are identification pin A, identification pin B, and identification pin C. Taking the grouping example according to the location where the identification pins are connected, the motherboard can be connected to multiple hard disk backplanes, each hard disk backplane corresponds to a disk slot, for example, identification pin D, identification pin E, and identification pin F are only connected to disk slot A. When the target module is located in disk slot A, the multiple target identification pins are identification pin D, identification pin E, and identification pin F.

[0088] S305 . Obtain multiple level states corresponding to the target module through multiple target identification pins.

[0089] Exemplarily, the multiple level states corresponding to the modules are defined when the modules are produced, and the modules correspond to the level states one by one.

[0090] In combination with the scenario example, the level state corresponding to the identification pin can be 1 or 0, for example, the level state corresponding to multiple target identification pins can be 1010.

[0091] S306: Determine the multiple level states as multiple second identification signals.

[0092] Exemplarily, different level states may represent different versions of a module. For example, level state 1100 represents version 1 of the hard disk backplane, and level state 1101 represents version 2 of the hard disk backplane.

[0093] Exemplarily, different level states may represent the number of modules. For example, level state 1000 represents 4 hard disks, level state 1001 represents 8 hard disks, and level state 1010 represents 12 hard disks.

[0094] Exemplarily, different level states may represent the connection topology of the modules, and the types of connection topology may include balance, common, or cascade. In a balanced type of connection topology, multiple modules of the switching backplane are directly and symmetrically connected to the modules of the mainboard (taking the CPU as an example). In a common type of connection topology, multiple modules of the switching backplane are connected to the CPU of the mainboard through a common middle layer. In a cascade type of connection topology, a hierarchical relationship exists between multiple modules of the switching backplane.

[0095] Next, combine Figure 5 Describes the level status of the connection topology.

[0096] Figure 5 This is a schematic diagram of the level state of the connection topology provided in the embodiment of the present application. Figure 5 As shown, in a balanced connection topology, multiple modules of the switch baseboard are connected to different CPUs of the mainboard. In a common connection topology, multiple modules of the switch baseboard are connected to the same CPU of the mainboard. In a cascade connection topology, the sw0 module of the switch baseboard is connected to the sw1 module, and the sw1 module is connected to one of the CPUs of the mainboard. In different connection topologies, the identification pins of the mainboard correspond to different level states.

[0097] Exemplarily, different level states can represent the connection topology of the module. For example, level state 1100 represents a 4-disk slot configuration of the hard disk backplane, level state 1101 represents an 8-disk slot configuration of the hard disk backplane, and level state 1110 represents a 12-disk slot configuration of the hard disk backplane.

[0098] S307 , verify the multiple target modules according to the multiple target module information and the multiple current module information to obtain a verification result, where the verification result includes verification passed or verification failed.

[0099] It should be noted that the execution process of S307 refers to S204 and will not be repeated here.

[0100] S308: Determine the corresponding target firmware file according to the topology information.

[0101] Among them, the multiple target module information includes topology information.

[0102] The topology information is the connection relationship and layout information between modules.

[0103] Exemplarily, the topology information includes topology requirements of the server corresponding to the chassis. When multiple target modules meet the topology requirements, the server corresponding to the chassis can normally execute computing tasks.

[0104] Optionally, the mainboard stores a correspondence between topology information and firmware files, and the correspondence is determined according to topology information that can be implemented by the firmware file. The corresponding target firmware file is determined according to the topology information.

[0105] Optionally, the firmware files supported by each module are obtained, and the target firmware file corresponding to each module is determined by combining the firmware files supported by each module and the topology information.

[0106] In the related art, the firmware corresponding to each module is determined manually one by one, which has the problem of low efficiency. In the present application, the efficiency of module configuration can be effectively improved by uniformly determining the adaptation target firmware file.

[0107] S309: Update the firmware of multiple target modules using the target firmware file.

[0108] Exemplarily, the version of the target firmware file and the firmware version of each target module are determined, and if the versions are inconsistent, the firmware of the target module is updated through the target firmware file.

[0109] Combined with the scenario example, unified update processing for multiple identical modules in multiple target modules can effectively avoid problems caused by version mismatch.

[0110] Next, combine Figure 6 Explains updating the firmware.

[0111] Figure 6 Schematic diagram of updating firmware provided by the embodiment of the present application. Figure 6 As shown, the mainboard verifies whether the chassis matches the mainboard. If the verification fails, an alarm is issued. If the verification passes, the module information and topology information are determined according to the chassis information. Multiple modules are verified according to the module information. If the verification passes, an alarm is issued. If the verification passes, the firmware of multiple target modules is updated according to the topology information.

[0112] S310: Perform configuration processing on multiple target modules respectively according to the topology information.

[0113] Combined with the scenario example, multiple target modules are connected according to the connection relationship and layout information corresponding to the topology information, and the server corresponding to the chassis can perform the computing function. Configuration processing is used to realize the connection.

[0114] A feasible implementation method can be configured by the following method: determining multiple module parameters corresponding to multiple target modules according to topology information; setting multiple target modules to corresponding module parameters respectively; performing functional tests on multiple target modules to obtain test results.

[0115] Among them, the module parameters are parameters for achieving normal topological connection and are used to ensure normal operation of the server. The module parameters include but are not limited to working mode, communication rate, address, etc.

[0116] Combined with the scenario example, each target module has corresponding module parameters. Each target module is set according to the corresponding module parameters to obtain the set target module. Functional testing is used to verify whether the set target module meets the preset requirements.

[0117] A feasible implementation method, the chassis information includes a target test method and a target performance indicator; the functional test can be performed by the following method: a functional test is performed on multiple target modules according to the target test method to obtain test data; the test result is determined according to the test data and the target performance indicator, and the test result includes a test pass or a test fail.

[0118] Exemplarily, the target test method and target performance index in the chassis information are determined according to the application scenario of the chassis. Testing according to the target test method and target performance index can verify whether multiple target modules can correctly perform computing functions in the application scenario of the chassis.

[0119] Optionally, automate functional testing via test tools or test scripts.

[0120] Combined with the scenario example, after setting the module parameters, the mainboard automatically performs functional tests on multiple target modules through test tools or test scripts to verify the module configuration.

[0121] Optionally, if the test result is that the test fails, the firmware versions of multiple target modules are adjusted through the firmware rollback mechanism; the multiple target modules after the adjusted firmware versions are repeatedly functionally tested to obtain the test results, and if the test result of the repeated test is that the test passes, the configuration processing is completed.

[0122] Combined with the scenario example, if the test fails, it may be due to the imperfection of the new version of the firmware. The firmware rollback mechanism will automatically repair it, and the effect of the repair will be verified by repeating the functional test.

[0123] In this feasible implementation, by automatically executing tests and automatically executing repairs, manual operations can be reduced, thereby improving module configuration efficiency.

[0124] Figure 7 This is a schematic diagram of the structure of a module configuration device provided in an embodiment of the present application. Figure 7 As shown, the module configuration device 70 may include: a receiving module 71, a determining module 72, an acquiring module 73, a verifying module 74 and a configuring module 75, wherein:

[0125] The receiving module 71 is used to obtain a first identification signal of the chassis through a first identification pin, and determine chassis information of the chassis according to the first identification signal.

[0126] The determination module 72 is used to determine multiple target module information corresponding to the multiple target modules according to the chassis information.

[0127] The acquisition module 73 is used to acquire multiple second identification signals corresponding to multiple target modules through multiple second identification pins, and determine multiple current module information corresponding to the multiple target modules according to the multiple second identification signals.

[0128] The verification module 74 is used to verify the multiple target modules according to the multiple target module information and the multiple current module information to obtain the verification result, where the verification result includes verification passed or verification failed.

[0129] The configuration module 75 is used to perform configuration processing on multiple target modules if the verification result is verification passed.

[0130] Optionally, the receiving module 71 may execute Figure 2 S201 in the embodiment.

[0131] Optionally, the determination module 72 may execute Figure 2 S202 in the embodiment.

[0132] Optionally, the acquisition module 73 may execute Figure 2 S203 in the embodiment.

[0133] Optionally, the verification module 74 may execute Figure 2 S204 in the embodiment.

[0134] Optionally, the configuration module 75 may execute Figure 2 S205 in the embodiment.

[0135] It should be noted that the module configuration device shown in the embodiment of the present application can execute the technical solution shown in the above method embodiment, and its implementation principle and beneficial effects are similar, which will not be repeated here.

[0136] In a possible implementation manner, the receiving module 71 is specifically configured to:

[0137] Determine the current chassis information list stored in the motherboard;

[0138] The first recognition signal and the current chassis information list are input into the recognition model to obtain the chassis information. The recognition model is obtained by model training based on the historical recognition signal and the historical chassis information list.

[0139] In a possible implementation, for any target module, the acquisition module 73 is specifically configured to:

[0140] Determine a plurality of target identification pins corresponding to the target module from the plurality of second identification pins;

[0141] Obtain multiple level states corresponding to the target module through multiple target identification pins;

[0142] A plurality of level states are determined as a plurality of second identification signals.

[0143] Figure 8 A schematic diagram of the structure of a module configuration device provided in an embodiment of the present application. Figure 7 Based on the embodiment shown, Figure 8 As shown, the module configuration device 80 also includes: an execution module 76, wherein:

[0144] The plurality of target module information includes topology information; an execution module 76, for:

[0145] Determine the corresponding target firmware file according to the topology information;

[0146] Update the firmware of multiple target modules through the target firmware file;

[0147] Multiple target modules are configured and processed separately according to the topology information.

[0148] In a possible implementation, the execution module 76 is specifically configured to:

[0149] Determine multiple module parameters corresponding to multiple target modules according to the topology information;

[0150] Set multiple target modules to corresponding module parameters respectively;

[0151] Perform functional tests on multiple target modules and obtain test results.

[0152] In a possible implementation manner, the chassis information includes a target test method and a target performance indicator; the execution module 76 is specifically configured to:

[0153] Perform functional tests on multiple target modules according to the target test method to obtain test data;

[0154] The test results are determined based on the test data and target performance indicators. The test results include test pass or test fail.

[0155] Fig. 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application is shown in FIG. Fig. 9 As shown, the electronic device includes:

[0156] The electronic device includes a processor 291 and a memory 292; it may also include a communication interface 293 and a bus 294. The processor 291, the memory 292, and the communication interface 293 may communicate with each other through the bus 294. The communication interface 293 may be used for information transmission. The processor 291 may call the logic instructions in the memory 292 to execute the method of the above embodiment.

[0157] In addition, the logic instructions in the above-mentioned memory 292 can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product.

[0158] The memory 292 is a computer-readable storage medium that can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the methods in the embodiments of the present application. The processor 291 executes functional applications and data processing by running the software programs, instructions, and modules stored in the memory 292, that is, implementing the methods in the above method embodiments.

[0159] The memory 292 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory 292 may include a high-speed random access memory and may also include a non-volatile memory.

[0160] An embodiment of the present application provides a non-temporary computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the method as described in the above embodiment.

[0161] An embodiment of the present application provides a computer program product, including a computer program, which implements the method of the above embodiment when the computer program is executed by a processor.

[0162] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required by the present application.

[0163] It should be further noted that, although the various steps in the flowchart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowchart may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0164] It should be understood that the above-mentioned device embodiments are only illustrative, and the device of the present application can also be implemented in other ways. For example, the division of units / modules in the above-mentioned embodiments is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units, modules or components can be combined, or can be integrated into another system, or some features can be ignored or not executed.

[0165] In addition, unless otherwise specified, each functional unit / module in each embodiment of the present application may be integrated into one unit / module, each unit / module may exist physically separately, or two or more units / modules may be integrated together. The above-mentioned integrated unit / module may be implemented in the form of hardware or in the form of a software program module.

[0166] If the integrated unit / module is implemented in the form of hardware, the hardware may be a digital circuit, an analog circuit, etc. The physical implementation of the hardware structure includes but is not limited to transistors, memristors, etc. The processor may be any appropriate hardware processor, such as a CPU, a GPU, an FPGA, a DSP, and an ASIC, etc. The storage unit may be any appropriate magnetic storage medium or magneto-optical storage medium, such as a resistive random access memory RRAM (Resistive Random Access Memory), a dynamic random access memory DRAM (Dynamic Random Access Memory), a static random access memory SRAM (Static Random-Access Memory), an enhanced dynamic random access memory EDRAM (Enhanced Dynamic Random Access Memory), a high-bandwidth memory HBM (High-Bandwidth Memory), a hybrid memory cube HMC (Hybrid Memory Cube), etc.

[0167] If the integrated unit / module is implemented in the form of a software program module and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or all or part of the technical solution, can be embodied in the form of a software product, which is stored in a memory and includes several instructions for a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the various embodiments of the present application. The aforementioned memory includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk and other media that can store program codes.

[0168] In the above embodiments, the description of each embodiment has its own emphasis. For the part not described in detail in a certain embodiment, please refer to the relevant description of other embodiments. The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0169] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0170] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A module configuration method, characterized in that: include: Acquire a first identification signal of the chassis through a first identification pin, and determine chassis information of the chassis according to the first identification signal; Determine, according to the chassis information, multiple target module information corresponding to the multiple target modules; Acquire multiple second identification signals corresponding to the multiple target modules through multiple second identification pins, and determine multiple current module information corresponding to the multiple target modules according to the multiple second identification signals; Performing verification processing on the multiple target modules according to the multiple target module information and the multiple current module information to obtain a verification result, wherein the verification result includes verification passed or verification failed; If the verification result is that the verification is passed, configuration processing is performed on the multiple target modules.

2. The method according to claim 1, characterized in that Determining chassis information of the chassis according to the first identification signal includes: Determine the current chassis information list stored in the motherboard; The first recognition signal and the current chassis information list are input into a recognition model to obtain the chassis information, wherein the recognition model is obtained by performing model training based on historical recognition signals and historical chassis information lists.

3. The method according to claim 1, characterized in that For any target module; Acquiring a plurality of second identification signals corresponding to the target module through a plurality of second identification pins includes: Determine a plurality of target identification pins corresponding to the target module from the plurality of second identification pins; Acquire multiple level states corresponding to the target module through the multiple target identification pins; The plurality of level states are determined as the plurality of second identification signals.

4. The method according to any one of claims 1 to 3, characterized in that The plurality of target module information includes topology information; The configuration process is performed on the multiple target modules, including: Determine a corresponding target firmware file according to the topology information; Performing an update process on the firmware of the multiple target modules through the target firmware file; The multiple target modules are configured and processed respectively according to the topology information.

5. The method according to claim 4, characterized in that The plurality of target modules are configured and processed respectively according to the topology information, including: Determine a plurality of module parameters corresponding to the plurality of target modules according to the topology information; The plurality of target modules are respectively set to corresponding module parameters; Functional tests are performed on the multiple target modules to obtain test results.

6. The method according to claim 5, characterized in that The chassis information includes a target test method and a target performance indicator; Performing functional tests on the multiple target modules to obtain test results includes: Perform the functional test on the multiple target modules according to the target test method to obtain test data; The test result is determined according to the test data and the target performance indicator, and the test result includes a test pass or a test fail.

7. A module configuration device, characterized in that: include: A receiving module, configured to obtain a first identification signal of the chassis through a first identification pin, and determine chassis information of the chassis according to the first identification signal; A determination module, used for determining multiple target module information corresponding to multiple target modules according to the chassis information; an acquisition module, configured to acquire a plurality of second identification signals corresponding to the plurality of target modules through a plurality of second identification pins, and determine a plurality of current module information corresponding to the plurality of target modules according to the plurality of second identification signals; A verification module, used for performing verification processing on the multiple target modules according to the multiple target module information and the multiple current module information to obtain a verification result, wherein the verification result includes verification passed or verification failed; The configuration module is used to perform configuration processing on the multiple target modules if the verification result is that the verification is passed.

8. An electronic device, characterized in that: include: A processor, and a memory communicatively connected to the processor; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory to implement the method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, which are used to implement the method according to any one of claims 1 to 6 when executed by a processor.

10. A computer program product, characterized in that The invention comprises a computer program, which implements the method according to any one of claims 1 to 6 when being executed by a processor.

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