Elastic wave device and module
By designing the bump structure in the elastic wave device used in mobile communication equipment, the problem of poor connection caused by cracks in the adhesion of the metal film during the vacuum evaporation process is solved, and the reliability and stability of the electrical connection are achieved.
Patent Information
- Application Number
- CN202410956793.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-20
- Filing Date
- 2024-07-17
- Publication Date
- 2025-01-21
AI Technical Summary
In elastic wave devices used in mobile communication devices, cracks often occur during vacuum evaporation during the adhesion of the metal film, resulting in poor circuit connection or disconnection of wires.
An elastic wave device including a device chip and a bump is designed. By forming a bump on one side of the device chip, the first end and the second end are located between the bump and the device chip, thereby ensuring reliable electrical connection. properties to prevent cracks from affecting electrical connections.
The bump structure effectively prevents poor connections or disconnections in the circuit, ensuring the reliability and stability of the elastic wave device.
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Figure CN119341497A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an improvement of an elastic wave device suitable for use as a duplexer in mobile communication equipment and the like. Background Art
[0002] The elastic wave devices used as duplexers in mobile communication devices and the like include wafer level packages (WLP / Wafer Level Package) and chip size packages (CSP / Chip Size Package).
[0003] In any package format, the elastic wave device has an internal space that is hermetically sealed, and a plurality of functional elements including an IDT electrode and a wiring pattern are formed by film formation on one surface of the device chip that faces the internal space.
[0004] Here, when the above-mentioned pattern is formed on one surface 100 of the device chip by vacuum deposition in multiple layers, it is necessary to connect the pattern formed previously and the pattern formed subsequently.
[0005] like Fig.11 As shown, when a gap S is provided between a portion of one side of two adjacent wirings 101 and a portion of the other side of the two wirings 101, and a bonding metal film 102 is formed thereon by vacuum evaporation, continuous cracks C are often generated on the bonding metal film 102 at the gap S during the metal adhesion process.
[0006] On the other hand, Fig.12 As shown, even when a portion of the wiring 101 to be subsequently formed is overlapped by vacuum evaporation on a portion of the wiring 101 formed previously, a crack C will often be generated in the subsequent wiring 101 starting from the portion where the side 103 of the thickness of the wiring 101 formed previously contacts one side 100 of the device chip.
[0007] Such cracks C may cause poor connection or disconnection in the circuit formed by the above pattern. Summary of the invention
[0008] The main problem to be solved is to provide a new structure that can effectively prevent the above-mentioned poor connection or disconnection in the circuit constituting this type of elastic wave device.
[0009] In a first aspect, an elastic wave device is provided in this embodiment, including a device chip and a bump; one side of the device chip is provided with a pattern of multiple functional elements and wiring including at least an IDT electrode by film formation; the bump is formed on the one side of the device chip,
[0010] The wiring has:
[0011] a first portion electrically connected to a first element that is one of the plurality of functional elements, and having the same film thickness as that of the first element; and
[0012] a second portion, the second portion being electrically connected to a second element being another one of the plurality of functional elements, and the second portion having the same film thickness as the second element,
[0013] The first end of the first part is connected to the second part, and the second end of the second part is connected to the first part; the first end and the second end are both located between one side of the device chip and the bump.
[0014] In some of the embodiments, the wiring has a third portion, and the third portion is formed on the first end and the second end, so that the first end and the second end are located between the one side of the device chip, and the bump is formed on the third portion.
[0015] In some of the embodiments, the film thickness of the third portion is greater than the thickness of the first portion and the second portion.
[0016] In some of the embodiments, the third portion is formed into a film by vacuum evaporation.
[0017] In some of the embodiments, the first end portion is located on one side of the central axis of the protrusion;
[0018] The second end portion is located on the other side of the central axis of the protrusion.
[0019] In some of these embodiments, the second end is adjacent to the first end.
[0020] In some of the embodiments, at least a portion of the first end overlaps with at least a portion of the second end.
[0021] In some of the embodiments, a film thickness of the first portion is different from a film thickness of the second portion.
[0022] In some embodiments, the first part and the second part are formed into films by vacuum evaporation.
[0023] In a second aspect, a module is provided in this embodiment, comprising the elastic wave device according to any one of the above-mentioned first aspects.
[0024] According to the elastic wave device and module of the present invention, the bump can ensure electrical connection between the first end and the second end, thereby effectively preventing the above-mentioned poor connection or disconnection in the circuit constituting the elastic wave device.
[0025] The details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The drawings described herein are used to provide further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute improper limitations on the present application.
[0027] Figure 1 FIG. 1 is a cross-sectional view of an elastic wave device (first embodiment) according to an embodiment of the present invention. Figure 2 The first embodiment is shown in cross section at the BB line in FIG.
[0028] Figure 2 is a cross-sectional structural diagram of the first embodiment. Figure 1 The first embodiment is shown in cross section along line AA in FIG.
[0029] Figure 3 yes Figure 2 The main part of the enlarged structure diagram.
[0030] Figure 4 yes Figure 1 The main part of the enlarged structure diagram.
[0031] Figure 5 1 is a structural diagram showing an example of a circuit formed in the device chip constituting the first embodiment.
[0032] Figure 6 FIG. 1 is a diagram showing a structure of an example of a resonator formed on the device chip constituting the first embodiment.
[0033] Figure 7 It is a cross-sectional structural diagram of the main part of a partial modification example (second embodiment) of the structure of the above-mentioned first embodiment.
[0034] Figure 8 It is a cross-sectional structural diagram of the main part of a partial modification example (third embodiment) of the structure of the above-mentioned first embodiment.
[0035] Fig. 9 This is a diagram of the main structure intended to show, in an easily understandable manner, two functional elements formed on the device chip constituting the third embodiment, their wiring, and bumps for bonding.
[0036] Fig.10 FIG. 1 is a cross-sectional view showing a main portion of an elastic wave device having a package form different from that of the first embodiment.
[0037] Fig.11 This is a cross-sectional structural diagram of the main parts of an existing elastic wave device.
[0038] Fig.12 This is a cross-sectional structural diagram of the main parts of an existing elastic wave device.
[0039] In the figure: 1, elastic wave device; 2, packaging substrate; 2a, one side of the packaging substrate; 2b, the other side of the packaging substrate; 2c, wiring; 2d, external connection terminal; 2e, outer edge; 2f, terminal; 3, device chip; 3a, functional surface; 3b, non-functional surface; 3c, side; 3d, outer edge; 4, sealing part; 4a, lateral part; 4b, longitudinal part; 5, gap; 6, internal space; 7, functional element; 7a, 7aa, 7ab, resonator; 7b, IDT electrode; 7c, reflector; 7d, electrode finger; 7e, 7g, bus bar; 7f, electrode Finger; 70, first element; 71, second element; 8, wiring; 80, first part; 80a, first end; 80b, side; 81, second part; 81a, second end; 82, third part; 9, external connection terminal; 10, bump; 10a, bump for bonding; 10aa, 10ac, end; 10ab, center axis; 11, circuit; 11a, transmitting side filter; 11b, receiving side filter; 12, ground terminal; 13, wall layer; 14, top cover layer; 15, bottomed hole; 15a, bottom of hole; S, gap; x, propagation direction; C, crack. DETAILED DESCRIPTION
[0040] In order to more clearly understand the purpose, technical solutions and advantages of the present application, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments.
[0041] Unless otherwise defined, the technical terms or scientific terms involved in this application shall have the general meaning understood by people with ordinary skills in the technical field to which this application belongs. The words "one", "a", "a", "the", "these" and the like in this application do not represent quantitative restrictions, and they can be singular or plural. The terms "include", "comprise", "have" and any variants thereof involved in this application are intended to cover non-exclusive inclusions; for example, a process, method and system, product or device comprising a series of steps or modules (units) is not limited to the listed steps or modules (units), but may include unlisted steps or modules (units), or may include other steps or modules (units) inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether directly or indirectly. The "multiple" involved in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, "A and / or B" can mean: A exists alone, A and B exist at the same time, and B exists alone. Usually, the character " / " indicates that the objects associated with each other are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific ordering of the objects.
[0042] The following is based on Figures 1 to 10 A typical embodiment of the present invention will be described below. The elastic wave device 1 of this embodiment is suitable for use as a duplexer in mobile communication equipment and the like.
[0043] Figures 1 to 9 First to third embodiments of the present invention are shown in which the present invention is applied to an elastic wave device of a chip size package (CSP).
[0044] This elastic wave device 1 includes a device chip 3 mounted on a surface 2 a of a package substrate 2 , and the device chip 3 is mounted on the package substrate 2 with a functional element 7 including an IDT electrode 7 b , typically a functional surface 3 a on which a resonator 7 a is formed, facing the package substrate 2 .
[0045] Typically, the device chip 3 is formed in a plate shape, which is a quadrilateral with a side length of 0.5 mm to 1 mm and a thickness of 0.15 mm to 0.2 mm. In addition, the package substrate 2 is formed in a plate shape, which is a quadrilateral with a side length of 0.7 mm to 3 mm and a thickness of 0.15 mm to 0.2 mm. The thickness of the elastic wave device 1 is about 0.4 mm to 0.6 mm.
[0046] The cross-sectional structure is Figure 1 and Figure 2 Reference numeral 3 in the figure denotes a device chip, reference numeral 3a denotes a functional surface on which the functional element 7 is formed, reference numeral 3b denotes a non-functional surface facing the functional surface 3a, reference numeral 7a denotes a resonator, and reference numeral 9 denotes a wiring 8 (see Figure 5 ) at the end of the external output terminal.
[0047] Bumps 10 (projecting electrodes) are interposed between the device chip 3 and the package substrate 2 . The bumps 10 electrically connect the external output terminals 9 to the wiring 2 c formed on the package substrate 2 side, and gaps 5 corresponding to the height of the bumps 10 are formed.
[0048] External connection terminals 2 d for connecting the elastic wave device 1 to a module substrate (not shown) are formed on a surface 2 b of the package substrate 2 opposite to the surface 2 a on which the device chip 3 is mounted.
[0049] When the packaging substrate 2 is observed from a direction perpendicular to one side 2a thereof, the packaging substrate 2 is in the shape of a quadrilateral plate. When the device chip 3 is observed from a direction perpendicular to the functional surface 3a, the device chip 3 is in the shape of a quadrilateral plate and its area is smaller than the packaging substrate 2.
[0050] Moreover, the device chip 3 is mounted on the packaging substrate 2 to ensure that at any position in the direction surrounding the center of the device chip 3, a gap is formed between the outer edge 3d of the device chip 3 (the part where the functional surface 3a of the device chip 3 contacts the side surface 3e) and the outer edge 2e of the packaging substrate 2 (the part where one surface 2a of the packaging substrate 2 contacts the side surface on its thickness side).
[0051] After the device chip 3 is mounted on the one surface 2 a of the package substrate 2 in this manner, the sealing portion 4 is formed on the one surface 2 a of the package substrate 2 .
[0052] Typically, the sealing portion 4 is made of a synthetic resin having insulating properties.
[0053] The sealing portion 4 comprises: a transverse portion 4a, which covers the non-functional surface 3b of the device chip 3 facing the functional surface 3a of the device chip 3; and a longitudinal portion 4b, which continues from the transverse portion 4a and covers the side surface 3e which is the thickness of the device chip 3, the side surface 3e is between the functional surface 3a and the non-functional surface 3b, and the longitudinal portion 4b extends to the one side 2a of the packaging substrate 2, thereby forming an internal space 6 (hollow structure portion or air cavity) between the functional surface 3a of the device chip 3 and the one side 2a of the packaging substrate 2.
[0054] The longitudinal portion 4 b of the sealing part 4 hermetically seals the gap 5 along the entire circumference of the device chip 3 , thereby forming the internal space 6 between the functional surface 3 a of the device chip 3 and the one surface 2 a of the package substrate 2 .
[0055] In the example shown in the figure, sealing portion 4 formed in this way gives elastic wave device 1 a hexahedral appearance.
[0056] The device chip 3 includes a functional element 7 including an IDT electrode 7 b in a portion of the functional surface 3 a facing the internal space 6 . In the example shown in the figure, the functional element 7 includes a resonator 7 a .
[0057] The device chip 3 has the function of propagating elastic waves. Typically, the device chip 3 uses lithium tantalate or lithium niobate as a piezoelectric body. In addition, in other embodiments, the device chip 3 can be formed by stacking lithium tantalate or lithium niobate with a support body such as sapphire, silicon, aluminum oxide, spinel, quartz or glass.
[0058] Figure 5 1 shows a conceptual example of a circuit 11 provided on one device chip 3. Reference numeral 11a denotes a transmission side filter, reference numeral 11b denotes a reception side filter, reference numeral 9 denotes an external connection terminal, reference numeral 7aa denotes a resonator 7a connected in series between the external connection terminals 9, reference numeral 7ab denotes a resonator 7a connected in parallel between the external connection terminals 9, reference numeral 12 denotes a ground terminal, and reference numeral 8 denotes wiring. The number and arrangement of the resonators 7a may be changed as required.
[0059] Figure 6 An example of a resonator 7a constituting a duplexer is shown. The resonator 7a has an IDT electrode 7b and a reflector 7c formed in a manner of sandwiching the IDT electrode 7b. The IDT electrode 7b is composed of an electrode pair, each of which connects one end of a plurality of electrode fingers 7d through a bus bar 7e, and the plurality of electrode fingers 7d are arranged in parallel so that the length direction of the electrode fingers 7d intersects with the propagation direction x of the elastic wave. The reflector 7c connects the ends of a plurality of electrode fingers 7f through a bus bar 7g, and the plurality of electrode fingers 7f are arranged in parallel so that the length direction of the electrode fingers 7f intersects with the propagation direction x of the elastic wave.
[0060] The pattern including the functional element 7 and the wiring 8 is made of a conductive metal and is formed by a photolithography technique.
[0061] In this embodiment, the wiring 8 includes a first portion 80 which is electrically connected to a first element 70 which is one of the plurality of functional elements 7 and has a film thickness equal to that of the first element 70 ; and a second portion 81 which is electrically connected to a second element 71 which is another of the plurality of functional elements 7 and has a film thickness equal to that of the second element 71 .
[0062] In the example shown in the figure, the first element 70 and the second element 71 are adjacent to each other at the center side of the device chip 3. The first part 80 and the second part 81 of the wiring 8 are in the region between the first element 70 and the second element 71, the first part 80 is connected to the first element 70, and the second part 81 is connected to the second element 71. In addition, the first part 80 and the second part 81 are both located in the region between the first element 70 and the second element 71. Figure 1 The outer edge 3d side of the device chip 3 below is extended, and the extended end is used as a first end portion 80a and a second end portion 81a described later.
[0063] In addition, the number of the first element 70 and the second element is not limited to one. When there are two or more first elements 70 on one device chip 3, there will also be two or more second elements 71 on one device chip 3, so that there will be a plurality of combinations of first elements 70 and second elements 71 on one device chip 3.
[0064] In the example shown in the figure, the film thickness of the first portion 80 is different from the film thickness of the second portion 81 .
[0065] In the example shown in the figure, the first portion 80 and the first element 70 have the same film thickness and are formed at the same time, and the second portion 81 and the second element 71 have the same film thickness and are also formed at the same time.
[0066] In addition, the film thickness of the second portion 81 is larger (thicker) than the film thickness of the first portion 80 .
[0067] The first portion 80 and the second portion 81 are formed by a method such as vacuum evaporation.
[0068] like Figure 2 As shown, the device chip 3 connects the terminal 2g to the external connection terminal 9 via the above-mentioned bump 10, wherein the terminal 2g is connected to the wiring 2c on the side of the packaging substrate 2 formed on one side 2a of the packaging substrate 2, and the external connection terminal 9 is formed on the functional surface 3a of the device chip 3, thereby being integrated with the packaging substrate 2.
[0069] In addition, in the present embodiment, the elastic wave device 1 includes a bump (hereinafter referred to as a bonding bump 10 a ) for electrically connecting the first portion 80 and the second portion 81 .
[0070] The bonding bumps 10 a are formed in a protruding shape on the functional surface 3 a of the device chip 3 .
[0071] The bonding bump 10a is formed on the functional surface 3a of the device chip 3 so that the first end 80a of the first portion 80 to be connected to the second portion 81 and the second end 81a of the second portion 81 to be connected to the first portion 80 are located between the functional surface 3a of the device chip 3 and the bonding bump 10a. That is, when viewed from a direction perpendicular to the functional surface 3a of the device chip 3, the first end 80a and the second end 81a are simultaneously located directly below the fixed end 10aa of the bonding bump 10a on the device chip 3 side (see FIG. 1 ). Figure 3 , Figure 4 , Figure 7 , Figure 8 , Fig. 9 ).
[0072] First embodiment
[0073] exist Figure 1 to Figure 6 In the first embodiment shown, the second end 81a is adjacent to the first end 80a but does not contact each other. A gap S is formed between the first end 80a and the second end 81a in a direction parallel to the functional surface 3a of the device chip 3.
[0074] In the first embodiment, the wiring 8 includes a third portion 82 for bonding, and the third portion 82 for bonding is formed on the first end portion 80a and the second end portion 81a so that both the first end portion 80a and the second end portion 81a are located between the functional surfaces 3a of the device chip 3. Figure 2 As shown, the third portion 82 is formed only at a position directly below the bonding bump 10 a and functions as a bump pad of the bonding bump 10 a .
[0075] Furthermore, the above-mentioned bonding bumps 10a are formed on the third portion 82 in the above-mentioned manner.
[0076] In the example shown in the figure, the third portion 82 is formed on the first end portion 80a and the second end portion 81a after the first portion 80 and the second portion 81 are formed. In the example shown in the figure, the thickness of the third portion 82 is greater than that of the first portion 80 and the second portion 81.
[0077] like Figure 3As shown in FIG. 1 , when the third portion 82 is formed by vacuum evaporation, continuous cracks C penetrating the third portion 82 are often generated in the gap S during the metal adhesion process. If such cracks C are generated, even if the third portion 82 is formed in the above manner, reliable electrical connection between the first end portion 80a and the second end portion 81a cannot be achieved.
[0078] In the first embodiment, the bonding bump 10a is formed so that both the first end 80a and the second end 81a are located between the bonding bump 10a and the functional surface 3a of the device chip 3 while the third portion 82 is interposed between the bonding bump 10a and the functional surface 3a of the device chip 3.
[0079] Specifically, the bonding bump 10a is formed on the third portion 82, a first end portion 80a is formed between a portion of the bonding bump 10a on one side across the central axis 10ab and the functional surface 3a of the device chip 3, and a second end portion 81a is formed between a portion of the bonding bump 10a on the other side across the central axis 10ab and the functional surface 3a of the device chip 3. Figure 3 The first end 80a is formed on the left side of the center axis 10ab, and the third portion 82 is formed on the first end 80a. The end 10aa of the bonding bump 10a on the device chip 3 side is fixed to the third portion 82 on the first end 80a across the center axis 10ab. Figure 3 A second end portion 81a is formed on the right side of the center axis 10ab, and a third portion 82 is also formed on the second end portion 81a. The end portion 10aa on the device chip 3 side of the bonding bump 10a is fixed to the third portion 82 on the second end portion 81a via the other side of the center axis 10ab.
[0080] After the bump 10a for bonding is formed on the third portion 82, the end 10aa on the device chip 3 side is fixed to the third portion 82 by a known method, thereby being provided on the device chip 3. Thus, even if the above-mentioned crack C is generated in the third portion 82, the third portion 82 on the first end portion 80a side separated from the crack C and the bump 10a for bonding, and the third portion 82 on the second end portion 81a side separated from the crack C and the bump 10a for bonding can be reliably electrically connected, so that the first end portion 80a and the second end portion 81a can be reliably electrically connected via the bump 10a for bonding.
[0081] In the example shown in the figure, the end 10ac of the bonding bump 10a located on the package substrate 2 side is fixed to the terminal 2f formed on one side 2a of the package substrate 2 (see Figure 2Although not shown in the figure, the end 10ac of the bonding bump 10a on the packaging substrate 2 side is sometimes not fixed to the one side 2a of the packaging substrate 2, but is in contact with each other. In addition, a gap may be formed between the end 10ac of the bonding bump 10a on the packaging substrate 2 side and the one side 2a of the packaging substrate 2.
[0082] Second embodiment
[0083] exist Figure 7 In the second embodiment shown, although the second end 81a is also adjacent to the first end 80a, they are not in contact with each other. A gap S is formed between the first end 80a and the second end 81a in a direction parallel to the functional surface 3a of the device chip 3. In the second embodiment, the third portion 82 is not provided. The remaining structure of the second embodiment is substantially the same as that of the first embodiment, so its description is omitted.
[0084] In this second embodiment, the above-mentioned bonding bump 10a is formed on the above-mentioned third part 82, and a first end 80a is formed between the part of the above-mentioned bonding bump 10a on one side separated by its central axis 10ab and the functional surface 3a of the device chip 3, and a second end 81a is formed between the part on the other side separated by its central axis 10ab and the functional surface 3a of the device chip 3.
[0085] Specifically, the bonding protrusion 10a is formed so that the bonding protrusion 10a is formed on one side ( Figure 7 The bonding bump 10aa is formed on the other side of the central axis 10ab (left side in the figure) and fixed to the end 10aa of the bonding bump 10a located at the first end 80a on the device chip 3 side. Figure 7 The right side in the figure) is fixed to a portion of the other side of the central axis 10ab of the end 10aa of the bonding bump 10a located at the second end 81a on the device chip 3 side.
[0086] After the bonding bump 10a is formed on the first portion 80 and the second portion 81, the end 10aa on the device chip 3 side is fixed to the first portion 80 and the second portion 81 by a known method, thereby being provided on the device chip 3. Thus, even if the first end 80a and the second end 81a are not in contact, reliable electrical connection between the first end 80a and the second end 81a can be achieved through the bonding bump 10a.
[0087] Third embodiment
[0088] exist Figure 8-Figure 9In the third embodiment shown, the wiring 8 is formed so that at least a portion of the first end 80a overlaps with at least a portion of the second end 81a. The remaining structure of the third embodiment is substantially the same as that of the first embodiment, and thus its description is omitted.
[0089] In the example shown in the figure, the first portion 80 and the second portion 81 are formed by Figure 8 In the embodiment, the left edge portion of the second end portion 81 a of the second portion 81 having a larger film thickness than the first portion 80 is stacked on the right edge portion of the first end portion 80 a of the first portion 80 .
[0090] In addition, in the third embodiment, the wiring 8 has a third portion 82 formed on the first end 80a and the second end 81a so that both the first end 80a and the second end 81a are located between the functional surfaces 3a of the device chip 3.
[0091] Furthermore, the above-mentioned bonding bumps 10a are formed on the third portion 82 in the above-mentioned manner.
[0092] In the example shown in the figure, the third portion 82 is formed on the first end portion 80a and the second end portion 81a after the first portion 80 and the second portion 81 are formed. In the example shown in the figure, the thickness of the third portion 82 is greater than that of the first portion 80 and the second portion 81.
[0093] If the second portion 81 is formed by vacuum evaporation after the first portion 80 is formed, the following will occur: Figure 8 In the case shown, crack C often occurs starting from the portion where the side surface 80b formed by the thickness of the first portion 80 contacts the functional surface 3a of the device chip 3. In addition, if such crack C occurs in the second portion 81, crack C often occurs in the third portion 82. If such crack C occurs, even if the third portion 82 is formed as described above, reliable electrical connection between the first end portion 80a and the second end portion 81a cannot be achieved.
[0094] In the third embodiment, the bonding bump 10 a formed on the third portion 82 is formed so as to be sandwiched by the third portion 82 so that both the first end 80 a and the second end 81 a are located between the bonding bump 10 a and the functional surface 3 a of the device chip 3 .
[0095] Specifically, the bonding bump 10a is formed on the third portion 82, a first end portion 80a is formed between a portion of the bonding bump 10a on one side across the central axis 10ab and the functional surface 3a of the device chip 3, and a second end portion 81a is formed between a portion of the bonding bump 10a on the other side across the central axis 10ab and the functional surface 3a of the device chip 3. Figure 8 The first end 80a is formed on the left side of the center axis 10ab, and the third portion 82 is formed on the first end 80a. The end 10aa of the bonding bump 10a on the device chip 3 side is fixed to the third portion 82 on the first end 80a across the center axis 10ab. Figure 8 A second end portion 81a is formed on the right side of the center axis 10ab, and a third portion 82 is also formed on the second end portion 81a. The end portion 10aa on the device chip 3 side of the bonding bump 10a is fixed to the third portion 82 on the second end portion 81a via the other side of the center axis 10ab.
[0096] After the bump 10a for bonding is formed on the third portion 82, the end 10aa on the device chip 3 side is fixed to the third portion 82 by a known method, thereby being provided on the device chip 3. Thus, even if the crack C as described above is generated in the third portion 82, the first end 80a and the third portion 82 on the first end 80a side across the crack C can be reliably electrically connected to the bump 10a for bonding, and the second end 81a and the third portion 82 on the second end 81a side across the crack C can be reliably electrically connected to the bump 10a for bonding, so that the first end 80a and the second end 81a can be reliably electrically connected via the bump 10a for bonding.
[0097] Fourth embodiment
[0098] Fig.10 A fourth embodiment of the present invention is shown in which an elastic wave device 1 is applied to a wafer level package (WLP).
[0099] Fig.10 , reference numeral 3 is a device chip 3, reference numeral 3a is its functional surface 3a, reference numeral 7 is a functional element, reference numeral 6 is an internal space, reference numeral 13 is a synthetic resin wall layer formed on the functional surface 3a in a manner surrounding the functional element 7, and reference numeral 14 is a synthetic resin top cover layer formed on the wall layer 13 and forming the internal space 6 in cooperation with the functional surface 3a and the wall layer 13. That is, the fourth embodiment is a laminate of the device chip 3, the wall layer 13, and the top cover layer 14, and does not have a package substrate 2 as in the first embodiment.
[0100] Although not shown in the figure, in the fourth embodiment, the device chip 3 is also in the shape of a quadrilateral plate, and is typically made to have a flat hexahedral shape by stacking a wall layer 13 and a top cover layer 14 on its functional surface 3a. In addition, in the fourth embodiment, bumps such as the bonding bumps 10a are formed protrudingly on the top cover layer 14 side, and the device is mounted on a module substrate or the like using these bumps. Fig.10 The formation portion of one bonding bump 10 a in the fourth embodiment is shown, and only the cross section thereof is shown in a direction orthogonal to the functional surface 3 a of the device chip 3 .
[0101] Outside the internal space 6, a bottomed hole 15 is formed by the through-wall layer 13 and the top cover layer 14, and the bottom 15a of the hole serves as the functional surface 3a. The bottom 15a of the hole is connected to the first end 80a of the first portion 80 of the wiring 8 of the first element 70 and the second end 81a of the second portion 81 of the wiring 8 of the second element 71, and is adjacent to each other with a gap S therebetween. At the same time, in order to position both the first end 80a and the second end 81a between the functional surface 3a of the device chip 3, a third portion 82 is formed on the first end 80a and the second end 81a. In the fourth embodiment, as in the first embodiment, a bonding bump 10a is formed in the bottomed hole 15. One end 10aa of the bonding bump 10a is fixed to the third portion 82, and the other end 10ac is located on the outer surface of the top cover layer 14. The elastic wave device 1 of the fourth embodiment can be mounted on a module substrate (not shown) or the like by using the bonding bump 10a.
[0102] The present application also provides a module applicable to the first to fourth embodiments, wherein the module includes a package substrate, a plurality of external connection terminals, an integrated circuit component, an elastic wave device, an inductor, and a sealing portion.
[0103] A plurality of external connection terminals are formed on the lower surface of the package substrate and are mounted on a motherboard of a preset mobile communication terminal.
[0104] For example, an integrated circuit component is mounted inside the package substrate. The integrated circuit component includes a switch circuit and a low noise amplifier.
[0105] The elastic wave device is mounted on the main surface of the package substrate.
[0106] Inductors are integrated passive devices (IPDs). They are mounted on the main surface of a package substrate and are used for impedance matching.
[0107] The sealing portion seals a plurality of electronic components including the elastic wave device.
[0108] The expressions and terms used in the present invention are for illustrative purposes only and should not be considered as limiting. The use of "include", "have", "have", "include" and their variations as used herein means including the following listed items, their equivalents and additional items.
[0109] The term "embodiment" in this application refers to a specific feature, structure or characteristic described in conjunction with the embodiment that can be included in at least one embodiment of the present application. The appearance of this phrase in various locations in the specification does not necessarily mean the same embodiment, nor does it mean that it is mutually exclusive with other embodiments and is independent or optional. It is clearly or implicitly understood by those of ordinary skill in the art that the embodiments described in this application can be combined with other embodiments without conflict.
[0110] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of patent protection. It should be pointed out that, for a person of ordinary skill in the art, several variations, corrections and improvements can be made without departing from the concept of the present application, and these all belong to the scope of protection of the present application. Therefore, the scope of protection of the present application shall be subject to the attached claims.
Claims
1. An elastic wave device, comprising a device chip and a bump; one side of the device chip is provided with a pattern of a plurality of functional elements and wiring including at least an IDT electrode by film formation; the bump is formed on the one side of the device chip, characterized in that: The wiring has: a first portion, the first portion being electrically connected to a first element being one of the plurality of functional elements, and the first portion and the first element having the same film thickness; as well as a second portion, the second portion being electrically connected to a second element being another one of the plurality of functional elements, and the second portion having the same film thickness as the second element, The first end of the first part is connected to the second part, and the second end of the second part is connected to the first part; the first end and the second end are both located between one side of the device chip and the bump.
2. The elastic wave device according to claim 1, characterized in that: The wiring includes a third portion, the third portion is formed on the first end portion and the second end portion so that the first end portion and the second end portion are located between the one surface of the device chip, and the bump is formed on the third portion.
3. The elastic wave device according to claim 2, characterized in that: The film thickness of the third part is greater than the thickness of the first part and the second part.
4. The elastic wave device according to claim 2, characterized in that: The third part is formed into a film by vacuum evaporation.
5. The elastic wave device according to claim 2, characterized in that: The first end portion is located on one side of the central axis of the protrusion; The second end portion is located on the other side of the central axis of the protrusion.
6. The elastic wave device according to claim 1, characterized in that: The second end is adjacent to the first end.
7. The elastic wave device according to claim 1, characterized in that: At least a portion of the first end portion overlaps with at least a portion of the second end portion.
8. The elastic wave device according to claim 1, characterized in that The film thickness of the first portion is different from the film thickness of the second portion.
9. The elastic wave device according to claim 1, characterized in that: The first part and the second part are formed into films by vacuum evaporation.
10. A module, characterized in that: A method comprising the elastic wave device according to any one of claims 1 to 9.