An optical phase-locked loop system and method based on a linear feedback algorithm

Abstract

This invention provides an optical phase-locked loop (PLL) system and method based on a linear feedback algorithm, relating to the field of laser control technology. The invention comprises an optical module, a frequency-locked phase-locked loop (PLL) module, and a feedback control module. The optical module obtains the beat frequency electrical signal to be locked. The frequency and phase discrimination module compares this signal with a reference signal to obtain a control signal. This control signal is then processed by the feedback control module to obtain a feedback signal that controls the laser, forming a closed-loop lock in the optical PLL. This invention adds a loop gain adjuster to the feedback control module. When the frequency difference between the beat frequency electrical signal and the reference signal is large, the loop gain is increased; when the difference is small, the loop gain is decreased. This allows the optical PLL to operate in a more suitable environment, significantly improving the performance of the optical PLL.

Description

Technical Field

[0001] This invention relates to the field of laser control technology, specifically to an optical phase-locked loop system and method based on a linear feedback algorithm. Background Technology

[0002] An atomic interferometer (ACI) is a gravity measurement instrument with highly sensitive inertial and rotational sensors, playing a crucial role in various fields such as military and geophysics. The laser source system is the core of the ACI, determining the accuracy of atomic interference fringes and gravity measurements. This system utilizes a pair of phase-locked Raman laser pulses with stable frequency difference, power, and constant phase difference to achieve internal state interference of atoms. Currently, Raman laser generation methods mainly include modulation and optical phase-locked loops (PLLs). Compared to modulation, the optical PLL method offers higher locking accuracy and a larger servo frequency bandwidth, making it the primary choice for laser control technology in ACIs. Traditional PLLs use analog circuits for frequency and phase discrimination and feedback systems. However, due to the large frequency difference required by atomic interferometers, implementing analog circuits is challenging. With the advent of integrated circuits such as digital phase detectors and PLL chips, optical PLLs increasingly employ digital phase detection technology based on frequency and phase detectors. Digital phase-locked loops (PLLs) not only overcome the shortcomings of analog PLLs, such as DC zero-point drift, device saturation, and susceptibility to power supply and ambient temperature variations, but also possess real-time processing capabilities for discrete samples. They offer advantages such as high reliability, high accuracy, and programmable adjustable loop bandwidth and center frequency. However, the locking speed and stability of existing digital optical PLL systems still have room for improvement. Therefore, this invention proposes using a linear feedback algorithm to implement an optical PLL, which can enhance its performance. Summary of the Invention

[0003] To address the problems existing in existing optical phase-locked loops, the purpose of this invention is to provide an optical phase-locked loop system and method based on a linear feedback algorithm. By downconverting the beat frequency electrical signal to be locked to a local oscillator signal and comparing it with a reference signal, a phase detection signal is obtained. After loop filtering, a feedback signal is obtained to control the laser, thus forming a closed-loop lock of the optical phase-locked loop.

[0004] An optical phase-locked loop system based on a linear feedback algorithm, the system includes an optical module, a frequency-locked phase-locked module, and a feedback control module;

[0005] The frequency-locked phase-locked module includes a frequency meter, an N-divider, a comparator, an FPGA chip, a first signal generator, and a second signal generator; the FPGA chip includes a frequency and phase detector, a time-to-digital converter, and a loop filter;

[0006] The frequency meter and the N-divider respectively acquire beat frequency electrical signals. The frequency meter extracts the frequency value of the beat frequency electrical signals and inputs it to the host computer. After being divided by the N-divider, the signals are converted into square wave signals by a comparator.

[0007] The first signal generator and the second signal generator are used to provide frequency and phase discrimination reference signals and clock frequencies to the frequency and phase discrimination detector and the time-to-digital converter, respectively;

[0008] The frequency and phase detector extracts the frequency and phase detection reference signal and the pulse signal carrying phase difference information and inputs them to the time-to-digital converter.

[0009] The time-to-digital converter converts the pulse signal carrying phase difference information into a digital input to the loop filter. After filtering out high-frequency noise, the loop filter generates a control signal which is then input to the feedback control module.

[0010] The feedback control module processes the control signal generated by the loop filter and applies it to the piezoelectric ceramic of the laser; and changes the loop gain according to the difference between the beat frequency electrical signal frequency calculated by the host computer and the target frequency.

[0011] This invention also provides an optical phase-locked loop method based on a linear feedback algorithm, which is implemented by the following steps:

[0012] Step S1: The optical module is used to acquire a pair of lasers with a frequency difference of 6.834 GHz, and converts the beat frequency signal of the laser into a beat frequency electrical signal and transmits it to the frequency-locked phase-locked module.

[0013] Step S2: The frequency-locked phase-locked module converts the pulse signal carrying phase difference information in the beat frequency electrical signal into a control voltage and inputs it to the feedback control module;

[0014] Step S3: The feedback control module processes the control signal generated by the frequency-locked phase-locked module and applies it to the piezoelectric ceramic of the laser; the gain of the loop gain regulator in the feedback control module is changed according to the difference between the beat frequency electrical signal frequency calculated by the host computer and the target frequency.

[0015] The beneficial effects of this invention: The optical phase-locked loop system described in this invention is applied to a cold atom gravimeter. Under the condition that the frequency difference between the non-stabilized laser and the stabilized laser remains locked, a Raman laser pair is generated during the cold atom gravimeter measurement process. The lasers generated by the master and slave lasers are split by a half-wave plate and a polarizer, and then converged in an optical mixer for mixing. The mixed laser enters a photodetector and is converted into a beat frequency electrical signal, which carries the phase difference information between the two laser beams. Since the beat frequency signal has a relatively high frequency, it is first divided by an N-division frequency divider to reduce the frequency. Simultaneously, the beat frequency signal is connected to a frequency meter to extract its frequency. The divided signal is converted into a square wave signal, which then enters a phase-frequency discriminator to extract the phase difference information. It is then converted into a digital quantity by a time-to-digital converter, and finally enters a loop filter to remove high-frequency components before entering the feedback control module. After processing by the feedback control module, the signal is input to the modulation port of the piezoelectric ceramic to control the locking of the master and slave lasers. Specifically, it has the following advantages:

[0016] 1. The optical phase-locked loop system of this invention uses digital frequency division instead of analog frequency mixing. This approach can reduce the system size, facilitate integration into atomic interferometers, and also reduce costs.

[0017] 2. The frequency and phase detector, time-to-digital converter, and loop filter described in this invention are all implemented digitally within an FPGA. The digital phase-locked loop not only solves the shortcomings of analog phase-locked loops, such as DC zero-point drift, device saturation, and susceptibility to power supply and ambient temperature changes, but also has the ability to process discrete samples in real time, offering advantages such as high reliability, high accuracy, and programmable adjustable loop bandwidth and center frequency.

[0018] 3. The frequency and phase detector described in this invention adopts a dual D flip-flop type, which can simultaneously detect frequency difference and phase difference information, and a delay unit is added to prevent the occurrence of phase detection dead zone phenomenon.

[0019] 4. The optical phase-locked loop system described in this invention features an improved structure based on a linear feedback algorithm. Real-time adjustment of the loop gain improves the frequency locking speed when the frequency difference between two signals is large, and also enhances the system's phase-locking stability when the frequencies are approximately the same. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of an optical phase-locked loop system based on a linear feedback algorithm according to the present invention.

[0021] Figure 2 This is a schematic diagram of an optical module in an optical phase-locked loop system based on a linear feedback algorithm as described in this invention.

[0022] Figure 3This is a schematic diagram of a frequency-locked phase-locked module in an optical phase-locked loop system based on a linear feedback algorithm, as described in this invention.

[0023] Figure 4 This is a schematic diagram of a dual-D flip-flop type frequency and phase detector in an optical phase-locked loop system based on a linear feedback algorithm, as described in this invention.

[0024] Figure 5 This is a schematic diagram of the feedback control module in an optical phase-locked loop system based on a linear feedback algorithm, as described in this invention.

[0025] In the diagram: 1. Master laser, 2. Slave laser, 3. First half-wave plate, 4. First optical polarizer, 5. Second half-wave plate, 6. Second optical polarizer, 7. Optical mixer, 8. Photodetector, 9. Frequency meter, 10. N-divider, 11. Comparator, 12. Frequency and phase detector, 13. Time-to-digital converter, 14. Loop filter, 15. First signal generator, 16. Second signal generator, 17. FPGA chip, 18. First D / A converter, 19. Second D / A converter, 20. Voltage-controlled resistor, 21. Voltage amplifier, 22. Loop gain regulator, 23. Piezoelectric ceramic, 24. Host computer. Detailed Implementation

[0026] Specific Implementation Method 1: Combination Figures 1 to 4 This embodiment describes an optical phase-locked loop system based on a linear feedback algorithm. The system includes an optical module, a frequency-locked phase-locked module, and a feedback control module.

[0027] The optical module is used to acquire a pair of lasers with a certain frequency difference (6.834GHz) and convert the beat frequency signals of the pair of lasers into beat frequency electrical signals and transmit them to the frequency-locked phase-locked module.

[0028] like Figure 2 As shown, the optical module in this embodiment includes a master laser 1, a slave laser 2, a first half-wave plate 3, a first optical polarizer 4, a second half-wave plate 5, a second optical polarizer 6, an optical mixer 7, and a photodetector 8.

[0029] The main laser 1's output port is connected to the host computer 24 and the first half-wave plate 3. The first half-wave plate 3 is connected to the first optical polarizer 4, and the first optical polarizer 4 is connected to the optical mixer 7. The slave laser's output port is connected to the host computer 24 and the second half-wave plate 5. The second half-wave plate 5 is connected to the second optical polarizer 6, and the second optical polarizer 6 is connected to the optical mixer 7. The optical mixer 7 is connected to the photodetector 8.

[0030] The main laser 1 is used to emit frequency-stabilized laser light, and the slave laser 2 is used to emit laser light to be locked. Both lasers are controlled and output by a host computer 24. The laser light emitted by the main laser 1 is split into main transmitted light and main reflected light by a first half-wave plate 3 and a first optical polarizer 4; the laser light emitted by the slave laser 2 is split into slave transmitted light and slave reflected light by a second half-wave plate 5 and a second optical polarizer 6; the main transmitted light and slave transmitted light are the final output results; the main reflected light and slave reflected light are combined and then mixed by an optical mixer 7, and finally received by a photoelectric detector 8 and converted into a beat frequency electrical signal, which is then input to the frequency-locked and phase-locked module.

[0031] The host computer 24 is used to extract the real-time frequency difference between the two lasers and to process the feedback control module.

[0032] In this embodiment, both the master laser 1 and the slave laser 2 are semiconductor lasers with an output frequency of approximately 384 THz and a frequency difference of 6.834 GHz. Therefore, the frequency of the electrical signal after frequency beating is also 6.834 GHz. The power of the laser output from the master laser 1 is 2 mW, and the power of the laser output from the slave laser 2 is 2 mW. Both the master and slave lasers are frequency-stabilized cat-eye lasers manufactured by Zhongke Kuyuan Technology. The laser output from the master and slave lasers, after frequency mixing, is approximately 6.834 GHz, which is exactly the laser frequency difference required for Raman laser pairing. The first half-wave plate 3 and the second half-wave plate 5 are both 1 / 2 wave plates, and the beam splitting ratio can be adjusted by using a rotating mirror mount and polarizer. The optical mixer 7 is a 180° optical mixer. The photodetector 8 is a balanced photodetector. The optical mixer used is a COH24-X model, and its function is to convert laser signals with frequencies in the THz range that cannot be directly processed into a processable 6.834 GHz signal. The photodetector used is model PDB415A.

[0033] The frequency-locked phase-locked module is used to convert the phase difference information included in the beat frequency electrical signal into a control voltage and input it into the feedback control module;

[0034] like Figure 3 As shown, in this embodiment, the frequency-locked phase-locked module includes a frequency counter 9, an N-divider 10, a comparator 11, a first signal generator 15, a second signal generator 16, and an FPGA chip 17; the FPGA chip 17 includes a frequency and phase detector 12, a time-to-digital converter 13, and a loop filter 14.

[0035] The frequency counter 9 extracts the beat frequency electrical signal and inputs it to the host computer 24, where it awaits processing by the feedback control module. The frequency counter 9 is a direct frequency counter, which offers high accuracy and speed. The host computer 24 controls the frequency-locked phase-locked module via serial communication. The program is programmed in Verilog on the computer and burned to the FPGA via serial communication. Operators can then modify the parameters by reprogramming the program.

[0036] The beat frequency electrical signal is simultaneously converted into a low-frequency signal by an N-divider 10. The value of N is adjustable and can be set to 1000. Therefore, the frequency of the low-frequency signal after division is approximately 6.834MHz, which is suitable for subsequent processing. The sine wave signal after division is input into a comparator 11 and converted into a square wave signal (a pulse signal carrying phase difference information). The pulse signal carrying phase difference information is then input into the FPGA chip 17 for programming.

[0037] The first signal generator 15 and the second signal generator 16 are connected to the input terminals of the FPGA chip 17, providing frequency and phase discrimination reference signals and clock frequencies to the frequency and phase discrimination detector 12 and the time-to-digital converter 13, respectively. The frequency and phase discrimination reference signal is approximately 6.834MHz, and the clock frequency is approximately 100MHz.

[0038] The frequency and phase detector 12 extracts the frequency and phase detection reference signal and the pulse signal carrying phase difference information, and inputs them to the time-to-digital converter 13; such as Figure 4 As shown, the frequency and phase detector 12 is a dual D flip-flop structure, consisting of two D flip-flops and a delay unit. The frequency and phase detection reference signal and the pulse signal carrying phase difference information are used as the clock signals for the D flip-flops. The inputs of the D flip-flops are kept at 1. When the outputs of both D flip-flops are simultaneously 1, the reset terminal of the D flip-flops is activated, and the final output is set to 0. To maintain a specific pulse width even with zero input phase difference, a delay unit is added. The width of the pulse signal output by the frequency and phase detector 12 is determined by the phase difference between the pulse signal carrying phase difference information and the frequency and phase detection reference signal. When the two signals have different frequencies, the output is a pulse signal with an irregular width. When the two signals have the same frequency, the width of the output pulse signal is determined by the magnitude of the phase difference, depending on whether the phase leads.

[0039] The time-to-digital converter 13 converts the pulse signal carrying phase difference information into a digital quantity, which is then input into the loop filter 14.

[0040] In this embodiment, the time-to-digital converter 13 employs a pulse counting method, controlled by the clock frequency generated by the second signal generator 16. Whenever the clock frequency reaches a rising edge, if the pulse signal is also at a rising edge, the count value is incremented by 1, ultimately achieving the effect of converting the pulse signal carrying phase difference information into a digital quantity. The loop filter 14 is a passive proportional-integral filter that filters out high-frequency noise while generating a control signal for subsequent feedback control module processing.

[0041] The feedback control module is used to process the control signal generated by the loop filter 14 and finally apply it to the piezoelectric ceramic 23; and according to the difference between the beat frequency and the target frequency calculated by the host computer, the loop gain is changed, which can improve the locking speed in the frequency locking stage and improve the system stability in the phase locking stage.

[0042] In this embodiment, the frequency meter 9 is an HP5347A, with a maximum measurement frequency of 20 GHz. The N-divider 10 uses an ADF4106 frequency synthesizer design. The divider reduces the frequency of the beat frequency electrical signal from the GHz range to the MHz range. The FPGA chip 17 is a Xilinx XCZU15EG chip. The first signal generator 15 is a RPG DG1000 with a maximum output frequency of 25 MHz. The second signal generator 16 is a RPG DG4000 with a maximum output frequency of 200 MHz.

[0043] like Figure 5 As shown, in this embodiment, the control signal generated by the frequency-locked phase-locked module is subsequently input to the feedback control module. The feedback control module includes a first D / A converter 18, a second D / A converter 19, a loop gain regulator 22, and a piezoelectric ceramic 23; the main structure of the loop gain regulator 22 adopts an amplifier circuit composed of a voltage-controlled resistor 20 and a voltage amplifier 21.

[0044] Connect the host computer 24 to the control terminal of the voltage-controlled resistor 20, connect the output terminal of the FPGA chip 17 to the input terminal of the loop gain regulator 22, and connect the feedback control module to the modulation port of the piezoelectric ceramic 23.

[0045] The control signal output from the loop filter 14 in the FPGA chip 17 is first input to the first D / A converter 18 for D / A conversion and then input to the loop gain regulator 22. The loop gain regulator 22 amplifies the control signal, changing the voltage value input to the piezoelectric ceramic 23. The control voltage, output from the loop gain regulator 22, is then input to the modulation port of the piezoelectric ceramic 23, modulating the output frequency of the slave laser to lock the frequency and phase of the master and slave lasers. The loop gain regulator 22 allows for a linear change in loop gain with the beat frequency voltage.

[0046] The voltage-controlled resistor 20 is connected to the second D / A converter 19 and is controlled by the host computer 24. The host computer 24 records the frequency of the beat frequency electrical signal, performs a moving median filter on the beat frequency electrical signal to remove spike noise, calculates the difference between the beat frequency and the target frequency, converts it into a digital quantity through the second D / A converter 19, and finally inputs it to the loop gain regulator 22 to change the resistance value of the voltage-controlled resistor 20, thereby changing the overall loop gain. The loop gain regulator enables the system to adapt to both situations where the frequency difference of the frequency locking link is large and the frequency difference of the phase locking link is small, thus completing the frequency and phase locking between the master laser and the slave laser.

[0047] In this embodiment, the amplification factor of the amplifier circuit is determined by the resistance value of the voltage-controlled resistor 20. By designing the amplifier circuit parameters, the loop gain is made to change linearly with the magnitude of the frequency error. The resistance value of the voltage-controlled resistor 20 is determined by the frequency of the beat frequency electrical signal. The voltage-controlled resistor 20 is a 07D220K, and the voltage amplifier 21 is an operational amplifier OP27.

[0048] Specific Implementation Method Two: This implementation method is a phase-locked loop method based on an optical phase-locked loop system using a linear feedback algorithm, as described in Specific Implementation Method One. This method is implemented through the following steps:

[0049] S1: The host computer 24 controls the start of the main laser 1 and the slave laser 2. After beam splitting and beam combining, the laser is mixed and converted into a beat frequency electrical signal by the photodetector 8.

[0050] S2: The frequency meter 9 extracts the frequency of the beat frequency electrical signal and inputs it to the host computer 24 for further processing;

[0051] S3: Start the frequency lock and phase lock module, set the N value of the frequency divider 10, use the host computer 24 to perform Verilog programming, and use the serial communication function to burn it into the FPGA chip 17.

[0052] In this embodiment, the N value of the frequency divider 10 is set to 1000. The first signal generator 15 and the second signal generator 16 are connected to the FPGA chip 17, and the two signal generators are started. The frequency of the first signal generator 15 is 6.834MHz, and the frequency of the second signal generator 16 is 100MHz. Subsequently, the Verilog program is burned into the FPGA chip 17 via serial communication, and the output of the FPGA chip 17 is the control signal.

[0053] S4: The difference between the beat frequency and the target frequency is calculated by the host computer 24 and converted into a digital value by the second D / A converter 19. Finally, it is input to the loop gain regulator 22 to change the resistance value of the voltage-controlled resistor 20, and finally change the entire loop gain.

[0054] S5: The control signal output by the FPGA chip 17 is amplified by the voltage amplifier 21 in the loop gain regulator 22, changing the voltage value input to the piezoelectric ceramic 23, and ultimately changing the output frequency phase of the slave laser. This completes the frequency and phase locking between the master laser and the slave laser.

[0055] In this embodiment, all components should be powered on and preheated for a period of time before startup, and the main laser used should be locked using saturated spectral modulation. It exhibits good anti-interference capability against minor disturbances generated during frequency-locked and phase-locked processes. When disturbances occur, the feedback control module can automatically identify and remove spike noise, and optimize control parameters to ensure the system always operates at its optimal state.

[0056] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0057] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. An optical phase-locked loop system based on a linear feedback algorithm, characterized in that: The system includes a frequency-locked phase-locked module and a feedback control module; The frequency-locked phase-locked module includes a frequency meter (9), an N-divider (10), a comparator (11), an FPGA chip (17), a first signal generator (15), and a second signal generator (16); the FPGA chip (17) includes a frequency and phase detector (12), a time-to-digital converter (13), and a loop filter (14); The frequency meter (9) and the N-divider (10) respectively acquire beat frequency electrical signals. The frequency meter (9) extracts the frequency value of the beat frequency electrical signals and inputs it to the host computer (24). After being divided by the N-divider (20), the signals are converted into square wave signals by the comparator (11). The square wave signals are pulse signals carrying phase difference information. The first signal generator (15) and the second signal generator (16) are respectively used to provide frequency and phase discrimination reference signals and clock frequencies to the frequency and phase discrimination detector (12) and the time-to-digital converter (13); The frequency and phase detector (12) extracts the frequency and phase detection reference signal and the pulse signal carrying phase difference information and inputs them to the time-to-digital converter (13); The time-to-digital converter (13) converts the pulse signal carrying phase difference information into a digital quantity and inputs it to the loop filter (14). After filtering out high-frequency noise, the loop filter (14) generates a control signal and inputs it to the feedback control module. The feedback control module processes the control signal generated by the loop filter (14) and applies it to the piezoelectric ceramic (23) of the laser; and changes the loop gain according to the difference between the beat frequency electrical signal frequency calculated by the host computer (24) and the target frequency. The feedback control module includes a first D / A converter (18), a second D / A converter (19), a loop gain regulator (22), and a piezoelectric ceramic (23); The control signal is converted from D / A by the first DA converter (18) and then output as a control voltage to the loop gain adjustment circuit (22); The loop gain adjustment circuit (22) includes a voltage-controlled resistor (20) and a voltage amplifier (21); The frequency value of the beat frequency electrical signal received by the host computer (24) is converted by the second D / A converter (19) and then input to the loop gain adjustment circuit (22); The control voltage output by the loop gain adjustment circuit (22) is applied to the piezoelectric ceramic to modulate the output frequency of the slave laser to lock the frequency and phase of the master and slave lasers; The loop gain adjustment circuit (22) is a voltage amplification circuit composed of a voltage-controlled resistor (20) and a piezoelectric amplifier (21); The amplification factor of the voltage amplifier circuit is determined by the resistance value of the voltage-controlled resistor (20), which is determined by the control voltage. The control voltage is determined by the frequency difference between the output light of the main laser and the slave laser extracted by the host computer (24).

2. The optical phase-locked loop system based on a linear feedback algorithm according to claim 1, characterized in that: The frequency and phase detector (12) adopts a dual D flip-flop structure and adds a delay unit; The pulse width output by the frequency and phase detector (12) is determined by the phase difference between the beat frequency electrical signal and the frequency and phase detection reference signal. When the frequencies of the two signals are different, the output is a pulse signal with an irregular width. When the frequencies of the two signals are the same, the width of the output pulse signal is determined by the magnitude of the phase difference depending on whether the phase leads.

3. The optical phase-locked loop system based on a linear feedback algorithm according to claim 2, characterized in that: The time-to-digital converter (13) adopts a direct counting structure and is controlled by the clock frequency generated by the second signal generator (16). When the clock frequency is at the rising edge, if the pulse signal is also at the rising edge, the count value is incremented by 1, thus converting the phase difference information into a digital quantity.

4. The optical phase-locked loop system based on a linear feedback algorithm according to claim 1, characterized in that: It also includes an optical module, which includes a master laser (1), a slave laser (2), a first half-wave plate (3), a first optical polarizer (4), a second half-wave plate (5), a second optical polarizer (6), an optical mixer (7), and a photodetector (8); The main laser (1) emits a frequency-stabilized laser, and the secondary laser (2) emits a laser to be locked. The laser emitted by the main laser (1) is divided into main transmitted light and main reflected light by the first half-wave plate (3) and the first optical polarizer (4). The laser emitted by the secondary laser (2) is divided into secondary transmitted light and secondary reflected light by the second half-wave plate (5) and the second optical polarizer (6). The main reflected light and the secondary reflected light are combined and then mixed by the optical mixer (7). Finally, after being received by the photoelectric detector (8), they are converted into beat frequency electrical signals and input to the frequency-locked phase-locked module.

5. An optical phase-locked loop system based on a linear feedback algorithm according to claim 4, characterized in that: The frequency difference between the main laser (1) and the laser (2) is 6.834 GHz; the frequency divider is used to downconvert the beat frequency electrical signal in the GHz range to the MHz range; the N value of the N divider is adjustable, the reference signal frequency is 6.834 MHz, and the clock signal frequency is 100 MHz.

6. The phase-locking method for an optical phase-locked loop system based on a linear feedback algorithm according to claim 4, characterized in that: This method is implemented by the following steps: Step S1: The optical module is used to acquire a pair of lasers with a frequency difference of 6.834 GHz, and converts the beat frequency signal of the laser into a beat frequency electrical signal and transmits it to the frequency-locked phase-locked module. Step S2: The frequency-locked phase-locked module converts the pulse signal carrying phase difference information in the beat frequency electrical signal into a control voltage and inputs it to the feedback control module; Step S3: The feedback control module processes the control signal generated by the frequency-locked phase-locked module and applies it to the piezoelectric ceramic of the laser; and changes the loop gain according to the difference between the beat frequency electrical signal frequency calculated by the host computer and the target frequency.

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