Planar junction three-step photodiode, focal plane and manufacturing method

Abstract

The invention relates to the field of infrared photoelectric devices, in particular to a planar junction three-step photodiode which comprises a diffusion layer, an avalanche layer, a component gradient layer, a charge layer, a light absorption layer, a buffer layer and a substrate. The diffusion layer includes a three-step diffusion region. A first step region, a second step region and a third step region are sequentially arranged in the three-step diffusion region from top to bottom. The width of the first step area is larger than that of the second step area. The width of the second step area is larger than that of the third step area. The avalanche layer is located below the three-step diffusion region. And the charge layer, the component gradient layer, the light absorption layer, the buffer layer and the substrate are sequentially arranged below the avalanche layer. The invention also provides a focal plane, and a manufacturing method of the planar junction three-step photodiode and the focal plane. According to the invention, the electric fields of different devices are modulated through the aperture and depth, the effect of suppressing edge breakdown is achieved, a protection ring can be omitted, the method is compatible with a traditional process, and the manufacturing cost is reduced.

Description

Technical Field

[0001] The invention relates to the field of infrared photoelectric devices, in particular to a planar junction three-step photodiode and a focal plane and a manufacturing method. Background Art

[0002] Avalanche photodiodes are widely used in the field of single photon detection due to their high gain characteristics. In the infrared band, gallium arsenide materials are used as the absorption layer, which is a relatively mature structure. When reverse bias is applied, photons are absorbed and excited in the absorption layer, and the generated electron-hole pairs begin to drift under the action of the electric field. InP, as a material with a hole impact ionization coefficient greater than the electron impact ionization coefficient, is used in back-illuminated photodetectors. From the basic device structure, it can be divided into two structures: table type and planar type.

[0003] At present, avalanche photodiodes mainly adopt the SAGCM structure, in which a buffer layer, a light absorption layer, a gradient layer, a charge layer and a cap layer are grown on an indium phosphide substrate. The formation of a P-type region by diffusion in the cap layer is a typical feature of a planar structure. The formation of a P-type region by diffusion is more conducive to low dark count rates than the table type itself, and is suitable for the detection of single photons. These advantages are due to the modulation of the diffusion morphology, which directly affects the distribution state of the electric field when the device is working. In the field of planar structures, how to achieve the effect of suppressing edge breakdown and reducing the dark count rate through diffusion is a difficult problem that everyone is thinking about.

[0004] In order to optimize the device performance by improving the diffusion structure of the planar InGaAs detector, relevant personnel have explored and proposed a series of methods, including an avalanche photodiode and a method for manufacturing the same with an optimized guard ring on the basis of the guard ring (invention patent application number: CN117913174A). In addition, there is an etching method, which modulates the final diffusion morphology by etching to suppress the edge breakdown of the planar InGaAs / InP Geiger mode APD (Photonic Journal 47, 0523001 (2018)). There are also some methods to strengthen the passivation process, which aims to enhance the pressure resistance and reduce the risk of edge breakdown caused by diffusion by optimizing the passivation method (invention patent application number: CN202310376064.0). In addition, there is a method of forming multiple steps by etching (invention patent application number: CN202211144013.7). Most of these disclosed patents or implementation ideas test the operation of other processes and do not explore the existing diffusion morphology. When new processes such as etching are introduced, damage to the cap layer material may pose potential risks to device performance and service life. In addition, etching also has edge effects, so the diffused morphology may not be ideal. Summary of the invention

[0005] The purpose of the present invention is to provide a planar junction three-step photodiode. The present invention combines the idea of ​​the evolution from the initial single diffusion to the double diffusion, and the work of optimizing the device performance through the diameter-depth combination of the shallow junction, and proposes the idea of ​​three steps. The purpose is to further promote device improvement on the basis of maintaining the many excellent properties of the two junctions by adding new variables, thereby solving the problems existing in the above-mentioned prior art.

[0006] In order to achieve the above-mentioned purpose, the technical solution adopted by the present invention is to provide a planar junction three-step photodiode, characterized in that it includes a diffusion layer, an avalanche layer, a component gradient layer, a charge layer, a light absorption layer, a buffer layer and a substrate; the diffusion layer includes a three-step diffusion zone; in the three-step diffusion zone, from top to bottom, there are a first step zone, a second step zone and a third step zone; the width of the first step zone is greater than the width of the second step zone; the width of the second step zone is greater than the width of the third step zone; the avalanche layer is located below the three-step diffusion zone; below the avalanche layer, there are the charge layer, the component gradient layer, the light absorption layer, the buffer layer and the substrate.

[0007] Furthermore, in the three-step diffusion region, the first step region, the second step region and the third step region form concentric circles; the diameter of the first step region is greater than the diameter of the second step region, but the depth of the first step region is less than the depth of the second step region; the diameter of the second step region is greater than the diameter of the third step region, but the depth of the second step region is less than the depth of the third step region; the material of the diffusion layer is preferably Inp, the thickness is preferably 4.3 microns, the doping type is N type, and the diffusion type is P type.

[0008] Furthermore, the material of the charge layer is preferably Inp, the thickness is preferably 0.125 micrometers, and the doping type is N type.

[0009] Furthermore, the material of the composition gradient layer is preferably InGaAsP, the thickness is preferably 0.06 micrometers, and the doping type is N-type.

[0010] Furthermore, the material of the light absorbing layer is preferably In 0.53 Ga 0.47 As, the thickness is preferably 2.0 microns, and the doping type is N-type.

[0011] Furthermore, the material of the buffer layer is preferably InP, the thickness is preferably 1 micrometer, and the doping type is N-type; the material of the substrate is preferably InP, and the doping type is N-type.

[0012] The present invention also provides a method for manufacturing the above-mentioned planar junction three-step photodiode, which is characterized by comprising the steps of:

[0013] Step S101, obtaining a pre-etching material; the pre-etching material includes, from the bottom layer to the top layer, the buffer layer, the light absorption layer, the component gradient layer, the charge layer, and the diffusion layer in sequence;

[0014] Step S102, using an atomic diffusion process, in the three-step diffusion region, at a position corresponding to the third step region, performing a first diffusion;

[0015] Step S103, using an atomic diffusion process, in the three-step diffusion region, at a position corresponding to the second step region, performing a second diffusion;

[0016] Step S104, using an atomic diffusion process to perform a third diffusion in the three-step diffusion region to form the first step region, the second step region and the third step region;

[0017] Step S105, performing thermal activation to stabilize the first step region, the second step region, and the third step region;

[0018] Step S106, using ultraviolet lithography to generate electrode patterns corresponding to positive and negative electrodes;

[0019] Step S107: using the sputtering coating process to form the positive and negative electrodes using the electrode pattern.

[0020] Furthermore, the first diffusion, the second diffusion and the third diffusion in step S120, step S130 and step S140 further include the following steps:

[0021] Step S201, using plasma enhanced chemical vapor deposition technology to produce a silicon nitride film;

[0022] Step S202, photolithography to generate a diffusion region mask on the silicon nitride film;

[0023] Step S203, using a plasma etching process to generate the diffusion region;

[0024] Step S204, completing atomic diffusion through the diffusion zone.

[0025] The present invention also discloses a focal plane formed by using the above-mentioned planar junction three-step photodiode, which is characterized by comprising a plurality of planar junction three-step photodiodes, a readout circuit and a quartz carrier;

[0026] The planar junction three-step photodiode and the readout circuit are interconnected through indium pillars, and adhesive is filled between the indium pillars; the quartz carrier is fixed to the readout circuit through paraffin.

[0027] The present invention also discloses a method for manufacturing the focal plane of the above-mentioned planar junction three-step photodiode, which is characterized by comprising the steps of:

[0028] Step S301, aligning the readout circuit with a plurality of the planar junction three-step photodiodes;

[0029] Step S302, arranging the indium column between the readout circuit and the planar junction three-step photodiode;

[0030] Step S303, welding the indium column to connect the readout circuit with the planar junction three-step photodiode;

[0031] Step S304, filling adhesive between the indium pillars;

[0032] Step S305, fixing the back side of the readout circuit on the quartz carrier using paraffin;

[0033] Step S306, using a mechanical grinding and polishing machine to load the quartz carrier;

[0034] Step S307, using a polishing liquid, performing a first rotational grinding on the substrate of the planar junction three-step photodiode;

[0035] Step S308, using a polishing liquid, performing a second rotation grinding and polishing on the substrate of the planar junction three-step photodiode.

[0036] In view of the above technical features, the planar junction three-step photodiode and focal plane and manufacturing method of the present invention have the following significant advantages over the prior art:

[0037] 1. The present invention improves and innovates the diffusion morphology of the planar junction three-step photodiode, and can modulate the electric field of the device to varying degrees through a variety of modulation schemes of aperture and depth, while suppressing edge breakdown, and can omit the guard ring.

[0038] 2. In the method for manufacturing the planar junction three-step photodiode of the present invention, the applied process can be combined with the traditional double diffusion process, so that existing equipment can be reused to reduce costs.

[0039] 3. The focal plane produced by the planar junction three-step photodiode of the present invention naturally obtains the advantages of the planar junction three-step photodiode. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a schematic side view of a preferred embodiment of a planar junction three-step photodiode of the present invention;

[0041] Figure 2 It is a schematic diagram of a top view of a preferred embodiment of a planar junction three-step photodiode of the present invention;

[0042] Figure 3 It is a method flow chart of a preferred embodiment of the method for manufacturing a planar junction three-step photodiode of the present invention;

[0043] Figure 4 A schematic diagram of the side view structure of a preferred embodiment of the focal plane of a planar junction three-step photodiode of the present invention;

[0044] Figure 5 It is a schematic diagram of a top view of a preferred embodiment of the focal plane of a planar junction three-step photodiode of the present invention;

[0045] Figure 6 It is a method flow chart of a preferred embodiment of the method for manufacturing the focal plane of a planar junction three-step photodiode of the present invention.

[0046] In the figure: 1-back-illuminated incident light source, 2-P-type metal contact electrode, 3-passivation film layer, 4-three-step diffusion region, 5-avalanche layer, 6-charge layer, 7-composition gradient layer, 8-light absorption layer, 9-buffer layer, 10-substrate, 11-N-type metal contact electrode;

[0047] 12-planar junction three-step photodiode, 13-readout circuit, 14-quartz carrier, 15-indium column, 16-isolation groove;

[0048] 41-first step area, 42-second step area, 43-third step area. DETAILED DESCRIPTION

[0049] The present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention. In addition, it should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall within the scope limited by the appended claims of the application equally.

[0050] See also Figure 1 and Figure 2 The present invention discloses a planar junction three-step photodiode, a preferred embodiment of which includes a passivation film layer 3, a diffusion layer, an avalanche layer 5, a charge layer 6, a composition gradient layer 7, a light absorption layer 8, a buffer layer 9 and a substrate 10.

[0051] The planar junction three-step photodiode is processed on the pre-etched material. The material of the passivation film layer 3 is silicon nitride, which is formed on the diffusion layer. The material of the diffusion layer is Inp, with a thickness of 4.3 microns, and its doping type is N-type, and the doping concentration is N-type 1.6×10 14 cm -3 , the diffusion type is P type.

[0052] The diffusion layer includes a three-step diffusion zone 4. Inside the three-step diffusion zone 4, there are the first step zone 41, the second step zone 42 and the third step zone 43 from top to bottom. The first step zone 41, the second step zone 42 and the third step zone 43 form concentric circles. The first step zone 41 is formed by the third atomic diffusion, and its diameter is larger than the diameter of the second step zone 42, but its depth is smaller than the depth of the second step zone 42. The second step zone 42 is formed by the second atomic diffusion and the third atomic diffusion, and its diameter is larger than the diameter of the third step zone 43, but its depth is smaller than the depth of the third step zone 43. The third step zone 43 is formed by the first atomic diffusion, the second atomic diffusion and the third atomic diffusion, and its diameter is the smallest and the depth is the largest. Below the three-step diffusion zone 4 is the avalanche layer 5.

[0053] Below the avalanche layer 5 is the charge layer 6. The charge layer 6 is made of I np, has a thickness of 0.125 microns, is doped with N type, and has a doping concentration of 2.0×10 17 cm -3 Below the charge layer 6 is the composition graded layer 7. The composition graded layer 7 is made of InGaAsP, has a thickness of 0.06 microns, is doped with N-type, and has a doping concentration of 2.0×10 16 cm -3 Below the composition gradient layer 7 is a light absorbing layer 8. The material of the light absorbing layer 8 is In 0.53 Ga 0.47 As, thickness is 2.0 μm, doping type is N-type, doping concentration is 2.38×10 14 cm -3 Below the light absorption layer 8 is a buffer layer 9. The material of the buffer layer 9 is InP, the thickness is 1 micron, the doping type is N-type, and the doping concentration is 5.0×10 17 cm -3 The buffer layer 9 is located above the substrate 10. The material of the substrate 10 is InP, the doping type is N-type, and the doping concentration is 3.0×10 18 cm -3 .

[0054] The positive and negative electrodes of the diode are respectively arranged on the three-step diffusion region 4 and the substrate 10. The P-type metal contact electrode 2 is arranged on the three-step diffusion region 4, and the N-type metal contact electrode 11 is arranged on the substrate 10. In application, the backlight incident light source 1 is incident from the direction of the substrate 10.

[0055] The planar junction three-step photodiode of the present invention uses a three-step P-type diffusion morphology structure, and changes the edge curvature and electric field distribution of the diffusion morphology through the distance between the steps and the combination of diffusion holes, thereby improving the edge breakdown phenomenon and suppressing the edge breakdown behavior of the device. For example, when the final depth is 3.5 microns, the deepest step width is 10 microns, the middle step is 20 microns, and the shallow junction width is 30 microns, the final depth is kept fixed, and when the difference between the middle step depth and the final depth is adjusted from 0.8 microns to 1.6 microns, the electric field in the top multiplication zone will be modulated as the position of the new step changes.

[0056] See also Figure 3 The present invention also discloses a method for manufacturing the above-mentioned planar junction three-step photodiode, which forms a three-step diffusion morphology by performing three times of photolithography, etching and opening, and zinc atom diffusion. The final diffusion morphology can be accurately controlled by three diffusion times, which can be consistent with the diffusion experience of the previous two diffusion processes. The reliability of the process is improved. A preferred embodiment thereof includes the steps of:

[0057] Step S1001, obtaining a pre-etching material.

[0058] The pre-etched material contains multiple layers of material that have been formed, starting from the substrate upward, which are the buffer layer, light absorption layer, composition gradient layer, charge layer, and diffusion layer. In the subsequent process, a passivation film layer is generated on top of the diffusion layer.

[0059] Step S1002, generating a thin film layer.

[0060] A silicon nitride film is formed on the surface of the diffusion layer by using plasma enhanced chemical vapor deposition technology.

[0061] Step S1003: Photolithography generates a first diffusion mask.

[0062] On the silicon nitride film, a first diffusion mask is generated by photolithography. The first diffusion mask is circular in shape with a diameter of 10 microns.

[0063] Step S1004, forming a first diffusion hole.

[0064] The silicon nitride film in the area not covered by the mask is removed by a plasma etching process, and a first diffusion hole with a diameter of 10 microns is formed in the silicon nitride film.

[0065] Step S1005, first atomic diffusion

[0066] Using the first diffusion hole and zinc phosphide as the diffusion source, zinc atoms are injected at 530 degrees Celsius to complete the first atomic diffusion and form the shape after the first atomic diffusion in the diffusion layer.

[0067] Step S1006, first rinse.

[0068] After rinsing diffusion, the remaining diffusion source is prepared for the second diffusion.

[0069] Step S1007, generating a thin film layer.

[0070] A silicon nitride film is formed on the surface of the diffusion layer by using plasma enhanced chemical vapor deposition technology.

[0071] Step S1008: Photolithography to generate a second diffusion mask.

[0072] On the silicon nitride film, a second diffusion mask is generated by photolithography. The second diffusion mask is circular in shape with a diameter of 20 microns. The second diffusion mask and the second diffusion mask are arranged concentrically, that is, concentric circle engraving.

[0073] Step S1009, forming a second diffusion hole.

[0074] The silicon nitride film in the area not covered by the mask is removed by plasma etching process, and a second diffusion hole with a diameter of 20 microns is formed on the silicon nitride film. The second diffusion hole is arranged concentrically with the first diffusion hole.

[0075] Step S1010, second atomic diffusion

[0076] Using the second diffusion hole, zinc phosphide is used as the diffusion source, and zinc atoms are injected at 530 degrees Celsius to complete the second atomic diffusion. In the diffusion layer, after superimposing with the shape after the first atomic diffusion, a two-step-shaped shape after the second atomic diffusion is formed.

[0077] Step S1011, second rinse.

[0078] After rinsing the diffusion source remaining, prepare for the third diffusion.

[0079] Step S1012, generating a thin film layer.

[0080] A silicon nitride film is formed on the surface of the diffusion layer by using plasma enhanced chemical vapor deposition technology.

[0081] Step S1013: Photolithography to generate a third diffusion mask.

[0082] On the silicon nitride film, photolithography generates a third diffusion mask. The third diffusion mask is circular in shape with a diameter of 30 microns. The third diffusion mask is concentrically arranged with the first diffusion mask and the second diffusion mask, i.e., concentric circle engraving.

[0083] Step S1014, forming a third diffusion hole.

[0084] The silicon nitride film in the area not covered by the mask is removed by plasma etching process, and a third diffusion hole with a diameter of 30 microns is formed on the silicon nitride film. The third diffusion hole is arranged concentrically with the first diffusion hole and the second diffusion hole.

[0085] Step S1015, third atomic diffusion

[0086] Using the third diffusion hole, zinc phosphide is used as the diffusion source, and zinc atoms are injected at 530 degrees Celsius to complete the third atomic diffusion. In the diffusion layer, the shapes after the first atomic diffusion and the second atomic diffusion are superimposed to form a three-step shape after the third atomic diffusion.

[0087] Step S1016, third rinse.

[0088] The diffusion source remaining after rinsing diffusion is prepared for subsequent processes.

[0089] Step S1017, perform thermal activation.

[0090] The diffusion morphology is stabilized by using a thermal activation process.

[0091] Step S1018, generating an electrode pattern.

[0092] On the front side of the pre-etched material, that is, the diffusion layer, ultraviolet lithography is used to generate an electrode pattern corresponding to the electrode. On the substrate, ultraviolet lithography is used to generate an electrode pattern corresponding to the electrode.

[0093] Step S1019, forming positive and negative electrodes.

[0094] Using the sputtering coating process, according to the direction depicted by the electrode pattern, positive and negative electrodes are deposited on the positive and negative sides of the diode, namely the P-type metal contact electrode connected to the diffusion layer, and the N-type metal contact electrode connected to the substrate.

[0095] See also Figure 4 and Figure 5The present invention also discloses a focal plane using the above-mentioned planar junction three-step photodiode, and a preferred embodiment thereof is composed of a plurality of planar junction three-step photodiodes 12, a readout circuit 13 and a quartz carrier 14. A plurality of planar junction three-step photodiodes 12 are arranged in parallel to form an array. An isolation groove 16 is provided between adjacent planar junction three-step photodiodes 12. The readout circuit 13 is located on the front side of the planar junction three-step photodiode 12, that is, on the side close to the P-type metal contact electrode 2. The front side of the readout circuit 13 and the P-type metal contact electrode 2 of each planar junction three-step photodiode 12 are interconnected through an indium column 15. An adhesive is filled between the plurality of indium columns 15. On the back side of the readout circuit 13, it is fixed to the quartz carrier 14 by paraffin.

[0096] See also Figure 6 The present invention also discloses a method for manufacturing the focal plane of the above-mentioned planar junction three-step photodiode, a preferred embodiment of which comprises the steps of:

[0097] Step S2001, aligning the readout circuit and the planar junction three-step photodiode.

[0098] On the focal plane, there are multiple planar junction three-step photodiodes arranged in an array. The readout circuit corresponds to each planar junction three-step photodiode one by one, so during production, the readout circuit needs to be aligned with the planar junction three-step photodiode.

[0099] Step S2002, setting an indium column.

[0100] An indium column is arranged between the readout circuit and the planar junction three-step photodiode, corresponding to the position of the P-type metal contact electrode of the planar junction three-step photodiode.

[0101] Step S2003, connecting the readout circuit and the planar junction three-step photodiode.

[0102] The two ends of the indium column are welded to connect and fix the readout circuit and the P-type metal contact electrode of the planar junction three-step photodiode.

[0103] Step S2004, filling adhesive between the indium pillars.

[0104] Step S2005, fixing the readout circuit and the quartz carrier.

[0105] Melt the paraffin wax and use it to fix the back side of the readout circuit to the quartz carrier.

[0106] Step S2006, loading the quartz carrier on the mechanical grinding and polishing machine.

[0107] Step S2007, first rotation grinding.

[0108] The substrate of the planar junction three-step photodiode is subjected to the first rotation grinding using a polishing liquid to thin the substrate to 50 microns.

[0109] Step S2008, second rotation grinding.

[0110] The substrate of the planar junction three-step photodiode is subjected to a second rotational grinding using a polishing liquid to thin and polish the substrate to 20 microns.

[0111] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A planar junction three-step photodiode, characterized in that: It comprises a diffusion layer, an avalanche layer, a component gradient layer, a charge layer, a light absorption layer, a buffer layer and a substrate; the diffusion layer comprises a three-step diffusion zone; in the three-step diffusion zone, there are a first step zone, a second step zone and a third step zone from top to bottom; the width of the first step zone is greater than the width of the second step zone; the width of the second step zone is greater than the width of the third step zone; the avalanche layer is located below the three-step diffusion zone; below the avalanche layer, there are the charge layer, the component gradient layer, the light absorption layer, the buffer layer and the substrate in order.

2. The planar junction three-step photodiode according to claim 1, characterized in that: In the three-step diffusion region, the first step region, the second step region and the third step region form concentric circles; the diameter of the first step region is greater than the diameter of the second step region, but the depth of the first step region is less than the depth of the second step region; the diameter of the second step region is greater than the diameter of the third step region, but the depth of the second step region is less than the depth of the third step region; the material of the diffusion layer is preferably Inp, the thickness is preferably 4.3 microns, the doping type is N type, and the diffusion type is P type.

3. The planar junction three-step photodiode according to claim 1, characterized in that: The material of the charge layer is preferably Inp, the thickness is preferably 0.125 micrometers, and the doping type is N type.

4. The planar junction three-step photodiode according to claim 1, characterized in that: The material of the composition gradient layer is preferably InGaAsP, the thickness is preferably 0.06 micrometers, and the doping type is N-type.

5. The planar junction three-step photodiode according to claim 1, characterized in that: The material of the light absorbing layer is preferably In 0.53 Ga 0.47 As, the thickness is preferably 2.0 microns, and the doping type is N-type.

6. The planar junction three-step photodiode according to claim 1, characterized in that: The material of the buffer layer is preferably InP, the thickness is preferably 1 micron, and the doping type is N-type; the material of the substrate is preferably InP, and the doping type is N-type.

7. A method for manufacturing the planar junction three-step photodiode as claimed in claim 1, characterized in that: Contains steps: Step S101, obtaining a pre-etching material; the pre-etching material includes, from the bottom layer to the top layer, the buffer layer, the light absorption layer, the component gradient layer, the charge layer, and the diffusion layer in sequence; Step S102, using an atomic diffusion process, in the three-step diffusion region, at a position corresponding to the third step region, performing a first diffusion; Step S103, using an atomic diffusion process, in the three-step diffusion region, at a position corresponding to the second step region, performing a second diffusion; Step S104, using an atomic diffusion process to perform a third diffusion in the three-step diffusion region to form the first step region, the second step region and the third step region; Step S105, performing thermal activation to stabilize the first step region, the second step region, and the third step region; Step S106, using ultraviolet lithography to generate electrode patterns corresponding to the positive and negative electrodes; Step S107: using the sputtering coating process to form the positive and negative electrodes using the electrode pattern.

8. The method for manufacturing a planar junction three-step photodiode according to claim 7, characterized in that: The first diffusion, the second diffusion and the third diffusion in step S120, step S130 and step S140 further include the following steps: Step S201, using plasma enhanced chemical vapor deposition technology to produce a silicon nitride film; Step S202, photolithography to generate a diffusion region mask on the silicon nitride film; Step S203, using a plasma etching process to generate the diffusion region; Step S204, completing atomic diffusion through the diffusion zone.

9. A focal plane using the planar junction three-step photodiode as claimed in claim 1, characterized in that: It includes a plurality of planar junction three-step photodiodes, a readout circuit and a quartz carrier; The planar junction three-step photodiode and the readout circuit are interconnected through indium pillars, and adhesive is filled between the indium pillars; the quartz carrier is fixed to the readout circuit through paraffin.

10. A method for manufacturing the focal plane of the planar junction three-step photodiode as claimed in claim 9, characterized in that: Contains steps: Step S301, aligning the readout circuit with a plurality of the planar junction three-step photodiodes; Step S302, arranging the indium column between the readout circuit and the planar junction three-step photodiode; Step S303, welding the indium column to connect the readout circuit with the planar junction three-step photodiode; Step S304, filling adhesive between the indium pillars; Step S305, fixing the back side of the readout circuit on the quartz carrier using paraffin; Step S306, using a mechanical grinding and polishing machine to load the quartz carrier; Step S307, using a polishing liquid, performing a first rotational grinding on the substrate of the planar junction three-step photodiode; Step S308, using a polishing liquid, performing a second rotation grinding and polishing on the substrate of the planar junction three-step photodiode.

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