Semiconductor optical integrated element

Abstract

The invention provides a semiconductor optical integrated element. The EA modulator (101) and the termination resistor (102) are monolithically integrated on the substrate (1). The termination resistor (102) is electrically connected in parallel with the EA modulator (101). The termination resistor (102) is made of a semiconductor material. The length of the termination resistor (102) is 0.5 to 1.5 times the length of the EA modulator (101). The termination resistor (102) is disposed parallel to the modulator (101) in plan view.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor optical integrated device used in an optical communication system. Background Art

[0002] In recent years, with the continuous growth of communication traffic, an uncooled EA modulator is needed. Generally, if the temperature decreases, the absorption edge wavelength of the EA modulator becomes shorter. Therefore, when the EA modulator is driven uncooled, the extinction ratio becomes smaller on the low temperature side. In order to solve this problem, it is considered to use the Joule heat generated by the terminal resistor used for impedance matching to suppress the temperature drop of the EA modulator. In the past, there was a technology that integrated the EA modulator and the terminal resistor on a single chip (for example, refer to patent document 1).

[0003] Patent Document 1: Japanese Patent Application Publication No. 2004-126108

[0004] However, in the prior art, the length of the terminal resistor that generates heat is much shorter than the length of the EA modulator. In addition, the area of ​​the electrode pad is larger than that of the terminal resistor, and heat is easily dissipated through the electrode pad. Therefore, in the prior art, it is difficult to use the Joule heat of the terminal resistor to suppress the temperature drop of the EA modulator. As a result, non-cooling operation cannot be performed at a wide temperature. Summary of the invention

[0005] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to obtain a semiconductor optical integrated device capable of performing an uncooled operation over a wide temperature range.

[0006] The semiconductor optical integrated component involved in the present disclosure is characterized in that it has a substrate, an EA modulator, and a terminal resistor electrically connected in parallel with the above-mentioned EA modulator, the above-mentioned EA modulator and the above-mentioned terminal resistor are monolithically integrated on the above-mentioned substrate, the above-mentioned terminal resistor is made of semiconductor material, the length of the above-mentioned terminal resistor is 0.5 to 1.5 times the length of the above-mentioned EA modulator, and the above-mentioned terminal resistor is configured to be parallel to the above-mentioned EA modulator when viewed from above.

[0007] In the present disclosure, the terminal resistor and the EA modulator are set to have the same length and are arranged in parallel with the EA modulator. As a result, heat can be evenly transferred from the terminal resistor to the EA modulator in the resonator direction to improve the temperature characteristics. Therefore, non-cooling operation can be performed at a wide temperature. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a plan view showing the semiconductor optical integrated device according to the first embodiment.

[0009] Figure 2 It is along Figure 1 Sectional view of section I-II.

[0010] Figure 3 It is along Figure 1 Cross-sectional view of section III-IV.

[0011] Figure 4 It is along Figure 1 Sectional view of the V-VI section.

[0012] Figure 5 This is a graph showing the relationship between the width of the terminal resistor, the carrier concentration, and the resistance value.

[0013] Figure 6 This is an equivalent circuit diagram showing a device for driving the semiconductor optical integrated device according to the first embodiment.

[0014] Figure 7 It is a graph showing the DC bias voltage at each temperature.

[0015] Figure 8 This is a graph showing the DC bias dependency of the temperature rise amount of the EA modulator absorption layer.

[0016] Fig. 9 It is a plan view showing a semiconductor optical integrated device according to the second embodiment.

[0017] Fig.10 It is along Fig. 9 Sectional view of section I-II.

[0018] Fig.11 It is along Fig. 9 Cross-sectional view of section III-IV.

[0019] Fig.12 It is along Fig. 9 Sectional view of the V-VI section.

[0020] Fig.13 It is a plan view showing a semiconductor optical integrated device according to the third embodiment.

[0021] Fig.14 It is along Fig.13 Sectional view of section I-II.

[0022] Fig.15 It is along Fig.13 Cross-sectional view of section III-IV.

[0023] Fig.16 It is along Fig.13 Cross-sectional view of the V-VI section.

[0024] Fig.17 It is along Fig.13 A cross-sectional view of section VII-VIII.

[0025] Fig.18 It is a plan view showing a semiconductor optical integrated device according to a fourth embodiment.

[0026] Fig.19 It is a plan view showing a semiconductor optical integrated device according to the fifth embodiment.

[0027] Fig. 20 It is a plan view showing a semiconductor optical integrated device according to the sixth embodiment.

[0028] Fig.21 It is along Fig. 20 Sectional view of section I-II.

[0029] Fig. 22 It is along Fig. 20 Cross-sectional view of section III-IV.

[0030] Fig.23 It is along Fig. 20 Cross-sectional view of the V-VI section.

[0031] Fig.24 It is along Fig. 20 A cross-sectional view of section VII-VIII. DETAILED DESCRIPTION

[0032] The semiconductor optical integrated device according to the embodiment will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals and repeated descriptions may be omitted.

[0033] Implementation Method 1

[0034] Figure 1 1 is a plan view showing a semiconductor optical integrated device according to Embodiment 1. In the semiconductor optical integrated device 100, an EA (electric field absorption) modulator 101 for single-phase driving and a terminal resistor 102 are monolithically integrated on a semi-insulating InP substrate 1. The terminal resistor 102 is provided for impedance matching.

[0035] The anode of the EA modulator 101 is connected to the signal side pad 3 on the signal side via the electrode 2. The cathode of the EA modulator 101 is connected to the GND pad 4. One end of the terminal resistor 102 is connected to the anode of the EA modulator 101 via the electrodes 2 and 5 on the signal side. The other end of the terminal resistor 102 is connected to the GND pad 6. The other end of the terminal resistor 102 is connected to the cathode of the EA modulator 101 via the GND pad 6 and the GND pad 4. Therefore, the terminal resistor 102 is electrically connected to the EA modulator 101 in parallel.

[0036] The terminal resistor 102 is composed of, for example, n-type InGaAs. Without limitation thereto, as the material of the terminal resistor 102, a semiconductor material that can be epitaxially grown on the semi-insulating InP substrate 1 can be used. For example, a single layer film of n-type InP, p-type InP, p-type InGaAs, or an epitaxial film stacked with multiple materials can be used. However, ohmic contact is required on the signal side and the GND side of the terminal resistor 102.

[0037] The length of the terminal resistor 102 is 0.5 to 1.5 times the length of the EA modulator 101. The terminal resistor 102 is arranged in parallel with the EA modulator 101 in a plan view. The resistance value of the terminal resistor 102 made of a semiconductor material increases on the low temperature side and decreases on the high temperature side.

[0038] Figure 2 It is along Figure 1 A cross-sectional view taken along the I-II section of the mesa strip 7 of the EA modulator 101 is formed on the semi-insulating InP substrate 1 along the direction of light travel. The mesa strip 7 includes an n-type contact layer 8, an n-type cladding layer 9, an EA modulator absorption layer 10, a p-type cladding layer 11, and a p-type contact layer 12 stacked in sequence on the semi-insulating InP substrate 1. An electrode 2 is formed on the p-type contact layer 12. An insulating film 13 covers the side surfaces of the mesa strip 7. The EA modulator absorption layer 10 is an MQW (Multiple Quantum Well) structure.

[0039] The n-type contact layer 8 is led out to the side and connected to the GND pad 4. The terminal resistor 102 is formed on the opposite side of the GND pad 4 via the mesa strip 7. The GND pad 6 is formed on the terminal resistor 102.

[0040] Figure 3 It is along Figure 1 1 is a cross-sectional view taken along line III-IV of . This cross-sectional view shows a cross section of a central portion of the terminal resistor 102 . The surface of the terminal resistor 102 is covered with an insulating film 13 .

[0041] Figure 4 It is along Figure 1 The signal side pad 3 is formed on the side of the mesa strip 7 and connected to the electrode 2. The electrode 5 is formed on the terminal resistor 102 on the opposite side of the signal side pad 3 across the mesa strip 7 and connected to the electrode 2.

[0042] Figure 5 The figure shows the relationship between the width of the terminal resistor, the carrier concentration and the resistance value. The terminal resistor 102 is an n-type InGaAs with a length of 100um and a thickness of 1um. Generally, the resistance value of the terminal resistor of the EA modulator is mostly selected around 50Ω in the case of single-phase driving. Figure 5 By selecting the width of the terminal resistor and the carrier concentration based on the relationship between the two, the desired resistance value around 50Ω can be obtained.

[0043] As a method for manufacturing the optical semiconductor integrated element involved in the present embodiment, there is a method of utilizing a part of the n-type contact layer 8 as the terminal resistor 102. For example, on a semi-insulating InP substrate 1, the n-type contact layer 8, the n-type cladding layer 9, the EA modulator absorption layer 10, the p-type cladding layer 11, and the p-type contact layer 12 are epitaxially grown in sequence. Next, the high terrace ridge of the EA modulator 101 is patterned by transfer technology, and the n-type cladding layer 9, the EA modulator absorption layer 10, the p-type cladding layer 11, and the p-type contact layer 12 are removed by etching. Next, the n-type contact layer 8 and the terminal resistor 102 are patterned again. Next, the optical semiconductor integrated element involved in the present embodiment is manufactured by patterning the insulating film 13, the electrodes 2, 5, the signal side pads 3, and the GND pads 4, 6 using conventional film forming, transfer, and processing techniques.

[0044] As another method for manufacturing the optical semiconductor integrated element involved in the present embodiment, there is a method of regrowing the layer of the EA modulator 101 after the terminal resistor 102 is patterned. For example, the layer of the terminal resistor 102 is epitaxially grown on the semi-insulating InP substrate 1. Next, the terminal resistor 102 is patterned, and the unnecessary epitaxial layer is removed. Thereafter, the n-type contact layer 8, the n-type cladding layer 9, the EA modulator absorption layer 10, the p-type cladding layer 11, and the p-type contact layer 12 are epitaxially grown while the portion of the terminal resistor 102 is covered with a mask. Then, the EA modulator 101 is formed by using the same method as described above, and the insulating film 13, the electrodes 2, 5, the signal side pads 3, and the GND pads 4, 6 are patterned using conventional film forming, transfer, and processing techniques to manufacture the optical semiconductor integrated element involved in the present embodiment.

[0045] Figure 6 1 is an equivalent circuit diagram showing a device for driving the semiconductor optical integrated device according to Embodiment 1. The bias device 103 applies a DC bias voltage and a modulation signal to the semiconductor optical integrated device 100 . Figure 7 This is a graph showing the DC bias at various temperatures. The DC bias conditions are selected so that the extinction ratio becomes constant at various temperatures. This temperature dependence is a well-known phenomenon because the absorption spectrum of the EA modulator becomes longer as the temperature increases.

[0046] In this embodiment, since the absolute value of the bias voltage applied to the terminal resistor 102 becomes larger on the low temperature side, the heat generated by the terminal resistor 102 becomes larger on the low temperature side. The Joule heat of the terminal resistor 102 is transferred to the EA modulator 101 via the semi-insulating InP substrate 1. Therefore, the temperature change of the EA modulator absorption layer 10 of the semiconductor optical integrated element 100 is smaller than the change of the ambient temperature.

[0047] Figure 8 1 is a graph showing the DC bias dependence of the temperature rise of the EA modulator absorption layer. The terminal resistor 102 has a length of 100 um, a width of 20 um, a thickness of 1 um, a distance of 10 um from the EA modulator 101, and a resistance value of 50 Ω. Figure 7 As shown in FIG. 1 , when the DC bias voltage is 1.8 V at 20°C, the temperature rise is approximately 3.3°C. Figure 7 As shown, when the DC bias voltage is -0.9 V at 70° C., the temperature rise is about 0.8° C. Therefore, the temperature difference of the EA modulator absorption layer 10 is about 47.5° C. relative to the ambient temperature difference of 70° C.-20° C.=50° C.

[0048] As described above, in this embodiment, the terminal resistor 102 and the EA modulator 101 are made to have the same length and are arranged in parallel with the EA modulator 101. As a result, heat can be evenly transferred from the terminal resistor 102 to the EA modulator 101 in the resonator direction to improve the temperature characteristics. Therefore, non-cooling operation can be performed at a wide temperature.

[0049] In order to fully transfer the Joule heat of the terminal resistor 102 to the EA modulator 101, the distance between the EA modulator 101 and the terminal resistor 102 is preferably 10 μm or less. However, whether a sufficient effect can be obtained depends on the design of the length, thickness, width, etc. of the EA modulator 101 and the terminal resistor 102.

[0050] In addition, in addition to the EA modulator 101 and the terminal resistor 102, semiconductor devices such as lasers, SOA, PD, etc. can also be integrated into a single chip. In addition, for optical coupling, semiconductor passive waveguides such as spot size converters or directional couplers can also be formed into a single chip. In addition, the EA modulator 101 is not limited to a high table shape, and can also be a buried waveguide or a low table ridge type. In addition, although the n-type contact layer 8 of the EA modulator 101 is formed on the semi-insulating InP substrate 1 side, the p-type contact layer 12 of the EA modulator 101 can also be formed on the semi-insulating InP substrate 1 side.

[0051] Implementation Method 2

[0052] Fig. 9It is a plan view showing a semiconductor optical integrated device according to the second embodiment. Fig.10 It is along Fig. 9 Sectional view of section I-II. Fig.11 It is along Fig. 9 Cross-sectional view of section III-IV. Fig.12 It is along Fig. 9 Hereinafter, points different from the first embodiment will be mainly described.

[0053] Both sides of the terminal resistor 102 are buried in the semi-insulating InP layer 14. The upper surface of the terminal resistor 102 is electrically connected to the n-type contact layer 8. Fig.11 As shown, the upper surface of the terminal resistor 102 is not connected to the n-type contact layer 8 at the center of the terminal resistor 102. In addition, since the n-type contact layer 8 is formed on the terminal resistor 102, the material of the terminal resistor 102 cannot be selected other than semiconductor.

[0054] In Embodiment 1, the GND pad 6 is connected to the other end of the terminal resistor 102, but in this embodiment, no electrode pad is provided, and the cathode of the EA modulator 101 and the other end of the terminal resistor 102 are electrically connected through the n-type contact layer 8. As a result, since the heat dissipation from the metal of the electrode pad is reduced, the heat generated at the terminal resistor 102 can be used more efficiently than in Embodiment 1. As a result, non-cooling operation can be performed in a wider temperature range.

[0055] Implementation 3

[0056] Fig.13 It is a plan view showing a semiconductor optical integrated device according to the third embodiment. Fig.14 It is along Fig.13 Sectional view of section I-II. Fig.15 It is along Fig.13 Cross-sectional view of section III-IV. Fig.16 It is along Fig.13 Cross-sectional view of the V-VI section. Fig.17 It is along Fig.13 Hereinafter, points different from the second embodiment will be described.

[0057] The terminal resistor 102 and the signal side pad 3 are formed on the same side with respect to the mesa strip 7. A groove 15 is formed in the semi-insulating InP layer 14 and the semi-insulating InP substrate 1 along the side of the mesa strip 7 far from the EA modulator 101, of the two sides of the terminal resistor 102 parallel to the EA modulator 101. Thus, since the heat dissipation from the terminal resistor 102 to the opposite side of the mesa strip 7 is reduced, the heat generated at the terminal resistor 102 can be used more efficiently than in Embodiment 2. As a result, non-cooling operation can be performed in a wider temperature range.

[0058] Implementation 4

[0059] Fig.18 1 is a top view of a semiconductor optical integrated element according to Embodiment 4. The EA modulator 101 and the first and second terminal resistors 102a and 102b are monolithically integrated on a semi-insulating InP substrate 1. The first and second terminal resistors 102a and 102b are electrically connected in series with each other. The total length of the first and second terminal resistors 102a and 102b is 0.5 to 1.5 times the length of the EA modulator 101. The terminal resistors 102a and 102b are respectively configured to be parallel to the EA modulator 101 when viewed from above and to be at the same distance from the EA modulator 101.

[0060] One end of the terminal resistor 102a is connected to the anode of the EA modulator 101 via the electrode 5a and the electrode 2. The other end of the terminal resistor 102a is connected to one end of the terminal resistor 102b via the electrode 22. The other end of the terminal resistor 102b is connected to the cathode of the EA modulator 101 similarly to the second embodiment.

[0061] In this embodiment, by dividing and arranging the first and second terminal resistors 102a and 102b, it is possible to evenly transfer heat to the EA modulator 101 in the resonator direction, thereby improving the temperature characteristics compared with embodiments 1 to 3. In addition, it is also possible to design a desired characteristic by forming a distribution of heat in the resonator direction. In addition, by appropriately designing the shape of the electrode 22, it is possible to add inductance and increase the degree of freedom of high-frequency design.

[0062] Implementation method 5

[0063] Fig.191 is a top view of a semiconductor optical integrated device according to Embodiment 5. The EA modulator 101 and the first and second terminal resistors 102a and 102b are monolithically integrated on a semi-insulating InP substrate 1. The first and second terminal resistors 102a and 102b are electrically connected in parallel to each other and are also electrically connected in parallel to the EA modulator 101. The total length of the first and second terminal resistors 102a and 102b is 0.5 to 1.5 times the length of the EA modulator 101. The first and second terminal resistors 102a and 102b are respectively configured to be parallel to the EA modulator 101 when viewed from above and to be at the same distance from the EA modulator 101.

[0064] One end of the terminal resistor 102a is connected to the anode of the EA modulator 101 via the electrode 5a and the electrode 2. One end of the terminal resistor 102b is connected to the anode of the EA modulator 101 via the electrode 5b and the electrode 2. The other ends of the first and second terminal resistors 102a and 102b are connected to the cathode of the EA modulator 101, similarly to the second embodiment.

[0065] In this embodiment, by dividing and arranging the first and second terminal resistors 102a and 102b, heat can be evenly transferred to the EA modulator 101 in the resonator direction, thereby improving the temperature characteristics compared with Embodiments 1 to 3. In addition, a design can be made such that desired characteristics are obtained by forming a distribution of heat in the resonator direction.

[0066] Implementation 6

[0067] Fig. 20 1 is a plan view showing a semiconductor optical integrated device according to Embodiment 6. In the semiconductor optical integrated device 100 , an EA modulator 101 for differential driving and first and second terminal resistors 102 a and 102 b are monolithically integrated on a semi-insulating InP substrate 1 .

[0068] The anode of the EA modulator 101 is connected to the electrode pad 17 via the electrode 16. The cathode of the EA modulator 101 is connected to the electrode pad 19 via the electrode 18. One end of the first terminal resistor 102a is connected to the electrode 16 via the electrode 20. The other end of the first terminal resistor 102a is connected to the first GND pad 6a. One end of the second terminal resistor 102b is connected to the electrode 18 via the electrode 21. The other end of the second terminal resistor 102b is connected to the second GND pad 6b.

[0069] The first and second terminal resistors 102a and 102b are made of semiconductor materials like the terminal resistor 102. The lengths of the first and second terminal resistors 102a and 102b are 0.5 to 1.5 times the length of the EA modulator 101. The first and second terminal resistors 102a and 102b are arranged parallel to the EA modulator 101 in a plan view.

[0070] Fig.21 It is along Fig. 20 A cross-sectional view taken along the line I-II of . A mesa strip 7 is formed between the first terminal resistor 102a and the second terminal resistor 102b. The structure of the mesa strip 7 is the same as that of the first embodiment. An electrode 16 is formed on the p-type contact layer 12. The n-type contact layer 8 is led out to the side and connected to the electrode 18. The first GND pad 6a is formed on the first terminal resistor 102a. The second GND pad 6b is formed on the second terminal resistor 102b.

[0071] Fig. 22 It is along Fig. 20 This cross-sectional view shows the cross section of the center portion of the first and second terminal resistors 102a and 102b. The surfaces of the first and second terminal resistors 102a and 102b are covered with the insulating film 13 and are not connected to the first GND pad 6a and the second GND pad 6b.

[0072] Fig.23 It is along Fig. 20 The electrode 20 is formed on the first terminal resistor 102a. The electrode 21 is formed on the second terminal resistor 102b. Fig.24 It is along Fig. 20 The electrode 16 is connected to the electrode pad 17 . The electrode 18 is connected to the electrode pad 19 .

[0073] In this embodiment, the first and second terminal resistors 102a and 102b are made to have the same length as the EA modulator 101 and are arranged in parallel with the EA modulator 101. As a result, the temperature characteristics can be improved by evenly transferring heat from the first and second terminal resistors 102a and 102b to the EA modulator 101 in the resonator direction. Therefore, similar to the EA modulator for single-phase drive in Embodiment 1, even in the case of the EA modulator for differential drive, non-cooling operation can be performed at a wide temperature.

[0074] In addition, in order to fully transfer the Joule heat of the first and second terminal resistors 102a and 102b to the EA modulator 101, it is preferred that the distance between the EA modulator 101 and the first and second terminal resistors 102a and 102b is less than 10 μm. However, whether a sufficient effect can be obtained depends on the design of the length of the EA modulator 101, the length, thickness, width, etc. of the first and second terminal resistors 102a and 102b.

[0075] Furthermore, without providing an electrode pad, the cathode of the EA modulator 101 and the other end of the second terminal resistor 102b are electrically connected via the n-type contact layer 8. This reduces heat dissipation from the metal of the electrode pad, and thus heat generated in the second terminal resistor 102b can be efficiently utilized.

[0076] In addition, a groove 15 is provided in the semi-insulating InP layer 14 along the side of the first terminal resistor 102a which is far from the mesa strip 7 of the EA modulator 101, of the two sides parallel to the EA modulator 101. A groove 15 is also provided in the semi-insulating InP layer 14 along the side of the second terminal resistor 102b which is far from the mesa strip 7 of the EA modulator 101, of the two sides parallel to the EA modulator 101. Thus, heat dissipation from the first and second terminal resistors 102a and 102b to the opposite side of the mesa strip 7 is reduced. As a result, the same effect as that of the second embodiment can be obtained.

[0077] Description of reference numerals:

[0078] 1…semi-insulating InP substrate (substrate); 6a…first GND pad; 6b…second GND pad; 8…n-type contact layer (semiconductor material); 14…semi-insulating InP layer (semi-insulating layer); 15…groove; 100…semiconductor optical integrated element; 101…EA modulator; 102…terminal resistor; 102a…first terminal resistor; 102b…second terminal resistor.

Claims

1. A semiconductor optical integrated component, characterized in that: have: substrate; EA modulator; and a terminal resistor electrically connected in parallel with the EA modulator, The EA modulator and the terminal resistor are monolithically integrated on the substrate. The terminal resistor is made of semiconductor material. The length of the terminal resistor is 0.5 to 1.5 times the length of the EA modulator. The terminal resistor is configured to be parallel to the EA modulator when viewed from above.

2. The semiconductor optical integrated component according to claim 1, characterized in that: The distance between the EA modulator and the terminal resistor is less than 10 μm.

3. The semiconductor optical integrated device according to claim 1 or 2, characterized in that: The cathode of the EA modulator is electrically connected to the terminal resistor through a semiconductor material.

4. The semiconductor optical integrated device according to any one of claims 1 to 3, characterized in that: It also includes a semi-insulating layer in which the terminal resistor is buried, A groove is formed in the semi-insulating layer along a side of the terminal resistor that is farther from the EA modulator than the other sides that are parallel to the EA modulator.

5. The semiconductor optical integrated device according to any one of claims 1 to 4, characterized in that: The terminal resistor includes a plurality of resistors connected in series with each other. The total length of the plurality of resistors is 0.5 to 1.5 times the length of the EA modulator. The plurality of resistors are respectively arranged to be parallel to the EA modulator when viewed from a top view and have the same distance from the EA modulator.

6. The semiconductor optical integrated device according to any one of claims 1 to 4, characterized in that: The terminal resistor includes a plurality of resistors connected in parallel with each other. The total length of the plurality of resistors is 0.5 to 1.5 times the length of the EA modulator. The plurality of resistors are respectively arranged to be parallel to the EA modulator when viewed from a top view and have the same distance from the EA modulator.

7. A semiconductor optical integrated component, characterized in that: have: substrate; EA modulator for differential drive; a first terminal resistor, one end of which is connected to the anode of the EA modulator; a second terminal resistor, one end of which is connected to the cathode of the EA modulator; A first GND pad connected to the other end of the first terminal resistor; and The second GND pad is connected to the other end of the second terminal resistor. The EA modulator, the first terminal resistor and the second terminal resistor are monolithically integrated on the substrate. The first terminal resistor and the second terminal resistor are made of semiconductor material. The lengths of the first terminal resistor and the second terminal resistor are 0.5 to 1.5 times the length of the EA modulator. The first terminal resistor and the second terminal resistor are arranged in parallel with the EA modulator in a plan view.

8. The semiconductor optical integrated device according to claim 7, characterized in that: The distance between the EA modulator and the first terminal resistor and the distance between the EA modulator and the second terminal resistor are both less than 10 μm.

9. The semiconductor optical integrated component according to claim 7 or 8, characterized in that: One end of the second terminal resistor is electrically connected to the cathode of the EA modulator via a semiconductor material.

10. The semiconductor optical integrated device according to any one of claims 7 to 9, characterized in that: further comprising a semi-insulating layer in which the first terminal resistor and the second terminal resistor are embedded, A groove is formed in the semi-insulating layer along one side of the first terminal resistor which is far from the EA modulator, out of two sides parallel to the EA modulator. A groove is formed in the semi-insulating layer along a side of the second terminal resistor that is farther from the EA modulator than the two sides parallel to the EA modulator.

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