Chip performance test method and device in multiple environment states

By constructing simulation test models under multiple environmental conditions and using environmental information and historical operating information to identify key factors, the high cost and low efficiency of traditional chip performance testing are solved, achieving efficient and accurate chip performance testing.

CN119355485BActive Publication Date: 2025-11-25SOUTHERN POWER GRID DIGITAL GRID RESEARCH INSTITUTE CO LTD
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Patent Information

Application Number
CN202411465270.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-21
Publication Date
2025-11-25
Estimated Expiration
2044-10-21

AI Technical Summary

Technical Problem

Traditional chip performance testing methods under multiple environmental conditions are costly and inefficient, and cannot simulate all environmental scenarios, resulting in low testing accuracy and efficiency.

Method used

By acquiring environmental and historical operational information, key influencing factors are identified, a simulation test model is constructed, and the simulation model is used for performance testing, replacing actual experiments.

Benefits of technology

It reduces testing costs, improves testing accuracy and efficiency, and avoids low accuracy issues caused by equipment limitations and chip placement problems.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The application relates to the technical field of integrated circuit chips, and discloses a chip performance testing method and device under multiple environment states. The method obtains environment information corresponding to multiple environment states, and identifies multiple key influence factors of a first chip in the environment information; multiple historical running information of the first chip is analyzed in combination with the multiple key influence factors, multiple chip influence parameters corresponding to the environment states are obtained; a simulation test model corresponding to each environment state is constructed based on structure parameter information of the first chip and the multiple chip influence parameters; the simulation test model corresponding to each environment state is used to respectively perform performance testing on the first chip, and test results of the first chip under the environment states are obtained; the test results of the first chip under the environment states are respectively analyzed and adjusted, and the chip running performance of the first chip under the environment states is obtained. The application improves the precision and efficiency of chip performance testing under multiple environment conditions, and reduces the testing cost.
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Description

Technical Field

[0001] This invention relates to the field of integrated circuit chip technology, and in particular to a chip performance testing method and apparatus under multiple environmental conditions. Background Technology

[0002] During chip manufacturing and testing, overall chip performance data can only be obtained by testing the chip under different environments, operating conditions, and influencing factors. Therefore, how to perform chip performance testing under multiple environmental conditions is a current research focus.

[0003] The current traditional method for chip performance testing under multiple environmental conditions involves constructing experimental areas with different environmental conditions to test the chip. However, this method requires the construction of multiple experimental scenarios with various environmental conditions, which is costly. Furthermore, due to equipment limitations, this method cannot simulate all environmental scenarios, resulting in low efficiency and low accuracy in chip performance testing under multiple environmental conditions. Summary of the Invention

[0004] This invention provides a chip performance testing method and apparatus under multiple environmental conditions, which improves the accuracy and efficiency of chip performance testing under multiple environmental conditions and reduces testing costs.

[0005] To address the aforementioned technical problems, this invention provides a chip performance testing method under multiple environmental conditions, comprising:

[0006] Obtain environmental information corresponding to several environmental states, and identify several key influencing factors of the first chip in each of the environmental information.

[0007] Acquire several historical operating information of the first chip, and analyze the historical operating information in combination with the key influencing factors to obtain several chip influence parameters corresponding to the environmental states.

[0008] Based on the structural parameter information of the first chip and several chip influence parameters, a simulation test model corresponding to each of the environmental states is constructed.

[0009] Using the simulation test models corresponding to each of the environmental states, the performance of the first chip is tested respectively, and the test results of the first chip under each of the environmental states are obtained;

[0010] The test results of the first chip under each of the aforementioned environmental conditions are analyzed and adjusted to obtain the chip operating performance of the first chip under each of the aforementioned environmental conditions.

[0011] Furthermore, the identification of several key influencing factors of the first chip in each of the environmental information specifically includes:

[0012] Identify the environmental characteristics of each of the aforementioned environmental information;

[0013] Obtain several factors affecting the operating performance of the first chip from a preset database;

[0014] Identify the key characteristics of each of the aforementioned factors affecting operational performance;

[0015] Among the environmental feature information, select the environmental feature information that has the highest similarity to the key factor feature;

[0016] The environmental information corresponding to each of the environmental feature information is determined as the key influencing factor of the first chip.

[0017] Furthermore, the step of acquiring several historical operating information of the first chip and analyzing the historical operating information in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental state specifically involves:

[0018] Obtain several historical operational information records of the first chip;

[0019] By combining the operational performance information in the historical operational information, we can analyze the impact mechanism of each key influencing factor.

[0020] By analyzing the data of each environmental state in the historical operational information, the range of influencing factor values ​​for each key influencing factor is obtained.

[0021] Based on the influence mode and value range of each of the key influencing factors, chip influence parameters corresponding to each of the environmental states are generated.

[0022] Furthermore, the analysis of the impact mechanisms of each key influencing factor, combining the operational performance information from the historical operational information, specifically involves:

[0023] Identify the factor values ​​of each of the key influencing factors corresponding to each of the aforementioned historical operational information;

[0024] Based on the factor values ​​of the key influencing factors corresponding to each of the historical operation information, several target historical operation information are selected from each of the historical operation information.

[0025] Identify the operational performance information of each target based on its historical operational data;

[0026] Analyze the changes and correspondences between the key influencing factors and the operational performance information of each target in the historical operational information, and determine the influence mode of each key influencing factor.

[0027] Furthermore, the step of obtaining the influence factor value range of each key influencing factor by analyzing the environmental state data in each of the historical operational information specifically involves:

[0028] Obtain the state range information of each environmental state from the historical operation information;

[0029] Identify the influencing factor values ​​of each key influencing factor corresponding to each of the aforementioned state range information;

[0030] The influence factor values ​​of each of the key influencing factors are collected separately to obtain the range of influence factor values ​​for each of the key influencing factors.

[0031] Furthermore, the generation of chip impact parameters corresponding to each environmental state based on the impact mode and value range of each of the key influencing factors specifically involves:

[0032] Based on the influence mode and value range of each of the key influencing factors, identify the change in the operating performance of the first chip corresponding to each value of each of the key influencing factors;

[0033] Based on the aforementioned operational performance change values, parameter change information corresponding to each of the aforementioned operational performance change values ​​is generated, forming a parameter change information group corresponding to each key influencing factor.

[0034] The parameter change information group of all key influencing factors corresponding to each environmental state is determined as the chip influence parameter corresponding to each environmental state.

[0035] Furthermore, the construction of simulation test models corresponding to each environmental state based on the structural parameter information of the first chip and several chip influence parameters specifically involves:

[0036] Obtain the sample structure model and structural parameter information of the first chip from the preset database;

[0037] Based on the structural parameter information, the chip structure in the sample structural model is adjusted to form a simulation structural model of the first chip;

[0038] Based on the chip impact parameters corresponding to each of the environmental states, a performance adjustment group corresponding to each of the environmental states is generated.

[0039] Each of the aforementioned performance adjustment groups is added to the output layer of the simulation structure model to obtain the simulation test model corresponding to each of the aforementioned environmental states.

[0040] Furthermore, the process of using simulation test models corresponding to each of the environmental states to perform performance tests on the first chip, and obtaining the test results of the first chip under each of the environmental states, specifically involves:

[0041] Based on the simulation test models corresponding to each of the aforementioned environmental states, the first chip is subjected to simulation test processing to obtain the initial test results corresponding to each simulation test model.

[0042] Based on the performance adjustment group corresponding to each of the simulation test models, generate each group of operating performance change values.

[0043] Each of the aforementioned performance change value groups is added to the corresponding initial test results to form the test results of the first chip under each of the aforementioned environmental conditions.

[0044] Furthermore, the step of analyzing and adjusting the test results of the first chip under each of the aforementioned environmental conditions to obtain the chip operating performance of the first chip under each of the aforementioned environmental conditions specifically involves:

[0045] Analyze the chip performance corresponding to each test result to obtain the chip performance under various environmental conditions;

[0046] Analyze the initial chip performance corresponding to the initial test results in each of the test results described;

[0047] Based on the performance change value group of each test result, adjust the initial chip performance to obtain the chip performance corresponding to each test result;

[0048] The chip performance corresponding to each of the test results is determined as the chip performance of the first chip under each environmental condition.

[0049] This invention provides a chip performance testing method under multiple environmental conditions. It acquires environmental information corresponding to several environmental conditions and identifies several key influencing factors of a first chip within each environmental information. It acquires several historical operating information records of the first chip and analyzes these records in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental condition. Based on the structural parameter information of the first chip and these influence parameters, it constructs simulation test models corresponding to each environmental condition. Using these simulation test models, it performs performance tests on the first chip under each environmental condition, obtaining test results for the first chip in each condition. Finally, it analyzes and adjusts the test results for each environmental condition to determine the chip's operational performance under each condition. This invention utilizes simulation models to replace actual experiments, avoiding low-accuracy chip performance test results caused by equipment limitations, chip placement issues, etc., thus reducing testing costs, improving testing accuracy, and comprehensively enhancing the efficiency of chip performance testing under multiple environmental conditions.

[0050] Accordingly, the present invention provides a chip performance testing device under multiple environmental conditions, including: an acquisition module, an analysis module, a modeling module, a testing module, and an adjustment module;

[0051] The acquisition module is used to acquire environmental information corresponding to several environmental states, and to identify several key influencing factors of the first chip in each environmental information.

[0052] The analysis module is used to obtain several historical operating information of the first chip, and analyze the historical operating information in combination with the key influencing factors to obtain several chip influence parameters corresponding to each environmental state.

[0053] The modeling module is used to construct simulation test models corresponding to each of the environmental states based on the structural parameter information of the first chip and several chip influence parameters.

[0054] The testing module is used to perform performance tests on the first chip using simulation test models corresponding to each of the environmental states, and to obtain the test results of the first chip under each of the environmental states.

[0055] The adjustment module is used to analyze and adjust the test results of the first chip under each of the environmental conditions to obtain the chip operating performance of the first chip under each of the environmental conditions.

[0056] This invention provides a chip performance testing device under multiple environmental conditions. Based on the organic integration of modules, it acquires environmental information corresponding to several environmental conditions and identifies several key influencing factors of the first chip in each environmental information. It acquires several historical operating information of the first chip and analyzes this information in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental condition. Based on the structural parameter information of the first chip and the several chip influence parameters, it constructs simulation test models corresponding to each environmental condition. Using these simulation test models, it performs performance tests on the first chip in each environmental condition, obtaining test results for the first chip under each condition. Finally, it analyzes and adjusts the test results for the first chip under each environmental condition to obtain the chip's operating performance under each condition. This invention uses simulation models to replace actual experiments, avoiding low-accuracy chip performance test results caused by equipment limitations, chip placement issues, etc., thus reducing testing costs, improving testing accuracy, and comprehensively enhancing the efficiency of chip performance testing under multiple environmental conditions. Attached Figure Description

[0057] Figure 1 This is a flowchart illustrating an embodiment of the chip performance testing method under multiple environmental conditions provided by the present invention.

[0058] Figure 2 This is a schematic diagram of one embodiment of the chip performance testing device under multiple environmental conditions provided by the present invention. Detailed Implementation

[0059] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0060] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content and operations / steps, nor does it necessarily have to be performed in the order described. For example, some operations / steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.

[0061] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0062] Example 1

[0063] See Figure 1 This is a flowchart illustrating an embodiment of the chip performance testing method under multiple environmental conditions provided by the present invention. The method includes steps 101 to 105, each step being as follows:

[0064] Step 101: Obtain environmental information corresponding to several environmental states, and identify several key influencing factors of the first chip in each environmental information.

[0065] Optionally, environmental states include, but are not limited to, high-temperature states, high-pressure states, drought states, humid states, and electromagnetic environment states. The environmental information for each environmental state includes its environmental characteristics; for example, the environmental characteristics of a high-temperature state are abnormal temperature features, and the environmental characteristics of a high-pressure state are abnormal air pressure features. Furthermore, environmental states can also include environmental states corresponding to different combinations of environmental characteristics, such as high-temperature and humid states, high-temperature and high-pressure states, and humid and low-temperature states.

[0066] Furthermore, in the first embodiment of the present invention, several key influencing factors of the first chip are identified from the environmental information, specifically:

[0067] Identify the environmental characteristics of each of the aforementioned environmental information;

[0068] Obtain several factors affecting the operating performance of the first chip from a preset database;

[0069] Identify the key characteristics of each of the aforementioned factors affecting operational performance;

[0070] Among the environmental feature information, select the environmental feature information that has the highest similarity to the key factor feature;

[0071] The environmental information corresponding to each of the environmental feature information is determined as the key influencing factor of the first chip.

[0072] Optionally, factors affecting operational performance include, but are not limited to, factors affecting temperature, humidity, electromagnetic waves, heat dissipation, and other stress-resistant factors. The method for screening key influencing factors affecting the first chip from multiple environmental information sources is as follows: first, extract environmental feature information from each environmental information source; then, obtain multiple operational performance influencing factors of the first chip from a pre-set database, and extract key factor features for each operational performance influencing factor; for each key factor feature, calculate the similarity between it and each environmental feature information, thereby obtaining the environmental feature information with the highest similarity for each key factor feature, and determining the environmental information corresponding to these environmental feature information with the highest similarity as the key influencing factors of the first chip. The cosine similarity algorithm can be used to calculate the similarity between the key factor features and the environmental feature information.

[0073] This invention improves the accuracy of data filtering by screening key influencing factors through similarity calculation.

[0074] Step 102: Obtain several historical operating information of the first chip, and analyze the historical operating information in combination with the key influencing factors to obtain several chip influence parameters corresponding to the environmental states.

[0075] Furthermore, in the first embodiment of the present invention, several historical operating information of the first chip is obtained, and the historical operating information is analyzed in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental state, specifically:

[0076] Obtain several historical operational information records of the first chip;

[0077] By combining the operational performance information in the historical operational information, we can analyze the impact mechanism of each key influencing factor.

[0078] By analyzing the data of each environmental state in the historical operational information, the range of influencing factor values ​​for each key influencing factor is obtained.

[0079] Based on the influence mode and value range of each of the key influencing factors, chip influence parameters corresponding to each of the environmental states are generated.

[0080] Furthermore, in the first embodiment of the present invention, the influence mode of each key influencing factor is analyzed by combining the operational performance information in the historical operational information, specifically as follows:

[0081] Identify the factor values ​​of each of the key influencing factors corresponding to each of the aforementioned historical operational information;

[0082] Based on the factor values ​​of the key influencing factors corresponding to each of the historical operation information, several target historical operation information are selected from each of the historical operation information.

[0083] Identify the operational performance information of each target based on its historical operational data;

[0084] Analyze the changes and correspondences between the key influencing factors and the operational performance information of each target in the historical operational information, and determine the influence mode of each key influencing factor.

[0085] In the first embodiment of the present invention, the influence mode of the key influencing factor is the correspondence between the change information of the key influencing factor and the change information of the operating performance of the first chip. Therefore, the change information of the key influencing factor and the change information of the operating performance of the first chip are first determined, and then the correspondence between these two types of change information is analyzed to derive the influence mode of the key influencing factor.

[0086] Optionally, multiple historical operating information of the first chip can be obtained from a preset database, and the factor values ​​of each key influencing factor of the first chip can be obtained by identifying the historical operating information.

[0087] Optionally, for each key influencing factor, the historical operational information of each target under the single variable condition can be filtered from the historical operational information to obtain the operational performance information of each target historical operational information. Taking the first key influencing factor as an example, the method for filtering the target historical operational information from the historical operational information is as follows: Historical operational information in the historical operational information is selected where the fluctuation range of the influencing factor value of the first key influencing factor is greater than a preset fluctuation range threshold, and the fluctuation range of the influencing factor values ​​of other key influencing factors besides the first key influencing factor is less than the preset fluctuation range threshold. This information is then identified as the target historical operational information. The preset fluctuation range threshold can be adjusted according to the importance of the first key influencing factor.

[0088] Optionally, after filtering the historical operating information of the targets, the operating performance information and the factor values ​​of key influencing factors for each target's historical operating information can be obtained separately. By analyzing the correspondence between the changes in the factor values ​​of key influencing factors and the changes in operating performance information, the influence mode of each key influencing factor can be determined.

[0089] Optionally, the correspondence between changes in the values ​​of key influencing factors and changes in operational performance information can be: the proportional relationship between the amount of change in the value of the influencing factor and the amount of change in operational performance.

[0090] This invention identifies the proportional relationship between changes in influencing factor values ​​and changes in operating performance, thereby determining the impact of key influencing factors and facilitating subsequent adjustments to the chip operating performance efficiency corresponding to the performance test results of the first chip.

[0091] Furthermore, in the first embodiment of the present invention, by analyzing the data of each environmental state in each of the historical operating information, the range of influencing factor values ​​for each of the key influencing factors is obtained, specifically as follows:

[0092] Obtain the state range information of each environmental state from the historical operation information;

[0093] Identify the influencing factor values ​​of each key influencing factor corresponding to each of the aforementioned state range information;

[0094] The influence factor values ​​of each of the key influencing factors are collected separately to obtain the range of influence factor values ​​for each of the key influencing factors.

[0095] Optionally, the environmental state range information is obtained from each historical operation information, and then the influence factor values ​​of each key influencing factor corresponding to the state range information are obtained. After obtaining the influence factor values ​​of each key influencing factor corresponding to each historical operation information, the influence factor values ​​of each key influencing factor are aggregated to obtain the influence factor value range of that key influencing factor.

[0096] Furthermore, in the first embodiment of the present invention, based on the influence mode and value range of each of the key influencing factors, chip influence parameters corresponding to each of the environmental states are generated, specifically as follows:

[0097] Based on the influence mode and value range of each of the key influencing factors, identify the change in the operating performance of the first chip corresponding to each value of each of the key influencing factors;

[0098] Based on the aforementioned operational performance change values, parameter change information corresponding to each of the aforementioned operational performance change values ​​is generated, forming a parameter change information group corresponding to each key influencing factor.

[0099] The parameter change information group of all key influencing factors corresponding to each environmental state is determined as the chip influence parameter corresponding to each environmental state.

[0100] Optionally, for each key influencing factor, based on the influence mode and value range of the key influencing factor, the operating performance change value of the chip corresponding to each value of the key influencing factor can be identified; based on the operating performance change value of the chip corresponding to each value of the key influencing factor, parameter change information corresponding to each operating performance change value can be generated, thus obtaining the parameter change information group corresponding to the key influencing factor.

[0101] Optionally, by using the above method to obtain parameter change information groups of key influencing factors, parameter change information groups of each key influencing factor are obtained separately. For each environmental state, the parameter change information groups of all key influencing factors corresponding to that environmental state are collected to form multiple chip influencing parameters corresponding to that environmental state.

[0102] This invention improves the accuracy of determining chip influence parameters by identifying the changes in chip performance corresponding to each key influencing factor value.

[0103] Step 103: Based on the structural parameter information of the first chip and several chip influence parameters, construct simulation test models corresponding to each of the environmental states.

[0104] Furthermore, in the first embodiment of the present invention, based on the structural parameter information of the first chip and several chip influence parameters, a simulation test model corresponding to each of the environmental states is constructed, specifically as follows:

[0105] Obtain the sample structure model and structural parameter information of the first chip from the preset database;

[0106] Based on the structural parameter information, the chip structure in the sample structural model is adjusted to form a simulation structural model of the first chip;

[0107] Based on the chip impact parameters corresponding to each of the environmental states, a performance adjustment group corresponding to each of the environmental states is generated.

[0108] Each of the aforementioned performance adjustment groups is added to the output layer of the simulation structure model to obtain the simulation test model corresponding to each of the aforementioned environmental states.

[0109] In the first embodiment of the present invention, a simulation structure model of the first chip can be obtained by adjusting the parameters of the sample structure model of the first chip based on the structural parameter information of the first chip. Then, the influence parameters of each chip corresponding to each environmental state are added to the simulation structure model to form a simulation test model corresponding to each environmental state.

[0110] Optionally, a sample structural model and structural parameter information of the first chip can be obtained from a preset database. The sample structural model of the first chip includes historical simulation structural models established during historical periods with the same model parameters as the first chip. The structural parameter information of the first chip includes the chip's hardware structural parameters, derived by constructing a finite element simulation model. Based on the structural parameter information of the first chip, the chip structure corresponding to each structural parameter can be identified. Based on the structural parameter information corresponding to each chip structure, the structural parameters of each chip structure in the sample structural model are adjusted to obtain the simulation structural model of the first chip.

[0111] This invention determines the simulation structure model of the first chip by adjusting the model parameters of the sample structure model, thereby effectively improving the construction efficiency of the simulation structure model.

[0112] In the first embodiment of the present invention, the influence parameters of each chip corresponding to each environmental state are added to the simulation structure model to obtain the simulation test model corresponding to each environmental state.

[0113] Optionally, for each environmental state, a performance adjustment group can be generated based on the chip influence parameter change information group corresponding to each key influencing factor of the environmental state. This performance adjustment group includes the operating performance change value group corresponding to each influencing factor value group of all key influencing factors of the environmental state. Each environmental state corresponds to one performance adjustment group. By adding each performance adjustment group to the output layer of the simulation structure model of the first chip, a simulation test model corresponding to each environmental state can be obtained.

[0114] As an example of the first embodiment of the present invention, assume that environmental state A includes four key influencing factors b, c, d, and e. The operating performance change value corresponding to each group of influencing factor value ranges for each influencing factor is a(1,2,3,4), b(5,6,7,8), c(9,10,11,12), d(13,14,15). Then each operating performance change group includes: 1.(1,5,9,13), 2.(2,6,10,14), 3.(3,7,11,15), 1.(4,8,12,13), 1.(1,5,9,14), ..., n.(4,8,12,15).

[0115] This invention improves the accuracy of chip performance identification by directly adding performance adjustment groups for each environmental state to the model output layer and adjusting the chip's test results to reflect the chip's operating performance in each environmental state.

[0116] Step 104: Using the simulation test models corresponding to each of the environmental states, perform performance tests on the first chip respectively, and obtain the test results of the first chip under each of the environmental states.

[0117] Furthermore, in the first embodiment of the present invention, the first chip is subjected to performance tests using simulation test models corresponding to each of the environmental states, and the test results of the first chip under each of the environmental states are obtained, specifically as follows:

[0118] Based on the simulation test models corresponding to each of the aforementioned environmental states, the first chip is subjected to simulation test processing to obtain the initial test results corresponding to each simulation test model.

[0119] Based on the performance adjustment group corresponding to each of the simulation test models, generate each group of operating performance change values.

[0120] Each of the aforementioned performance change value groups is added to the corresponding initial test results to form the test results of the first chip under each of the aforementioned environmental conditions.

[0121] In the first embodiment of the present invention, the functional test process that the user needs to perform performance testing on the first chip is obtained, and the simulation test process of the first chip is performed based on the simulation test model of each environmental state, so as to obtain the test results of the first chip under each environmental state.

[0122] Optionally, following the performance testing process required for the first chip, each simulation test model is used to perform simulation testing on the first chip to obtain the initial test results corresponding to each simulation test model; based on the performance adjustment group of the environmental state corresponding to each simulation test model, each running performance change value group is added to the initial test results corresponding to each simulation test model to obtain the test results under the environmental state.

[0123] This invention improves the comprehensiveness and efficiency of testing in each environmental state by combining each initial test result with each set of operational performance change values ​​as the test results for each environmental state.

[0124] Step 105: Analyze and adjust the test results of the first chip under each of the environmental conditions to obtain the chip operating performance of the first chip under each of the environmental conditions.

[0125] Furthermore, in the first embodiment of the present invention, the test results of the first chip under each of the aforementioned environmental conditions are analyzed and adjusted to obtain the chip operating performance of the first chip under each of the aforementioned environmental conditions, specifically as follows:

[0126] Analyze the chip performance corresponding to each test result to obtain the chip performance under various environmental conditions;

[0127] Analyze the initial chip performance corresponding to the initial test results in each of the test results described;

[0128] Based on the performance change value group of each test result, adjust the initial chip performance to obtain the chip performance corresponding to each test result;

[0129] The chip performance corresponding to each of the test results is determined as the chip performance of the first chip under each environmental condition.

[0130] In the first embodiment of the present invention, after obtaining the test results output by each simulation test model, the chip operating performance of the first chip under various environmental conditions can be obtained by analyzing the chip operating performance corresponding to each test result. The first chip operating performance includes the chip's operating speed, operating state fluctuation range, number of stutters / packet losses / waits, etc.

[0131] Optionally, for each test result, analyze the initial chip performance corresponding to the initial test result in the test result; adjust the initial chip performance based on the performance change value group of the test result to obtain the chip performance corresponding to the test result; and take the chip performance of each test result in each environmental state as the chip performance of the first chip in each environmental state.

[0132] This invention improves the accuracy and efficiency of identifying chip performance in different environmental states by adjusting the initial chip performance of the initial test results and determining the chip performance corresponding to each environmental state.

[0133] In summary, the first embodiment of this invention provides a chip performance testing method under multiple environmental conditions. It acquires environmental information corresponding to several environmental conditions and identifies several key influencing factors of the first chip within each environmental information. It acquires several historical operating information records of the first chip and analyzes these records in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental condition. Based on the structural parameter information of the first chip and the several chip influence parameters, it constructs simulation test models corresponding to each environmental condition. Using these simulation test models, it performs performance tests on the first chip to obtain test results for each environmental condition. Finally, it analyzes and adjusts the test results for each environmental condition to obtain the chip's operating performance under each environmental condition. This invention utilizes simulation models to replace actual experiments, avoiding low-accuracy chip performance test results caused by equipment limitations, chip placement issues, etc., thus reducing testing costs, improving testing accuracy, and comprehensively enhancing the efficiency of chip performance testing under multiple environmental conditions.

[0134] Example 2

[0135] See Figure 2 This is a schematic diagram of an embodiment of the chip performance testing device under multiple environmental conditions provided by the present invention. The device includes an acquisition module 201, an analysis module 202, a modeling module 203, a testing module 204, and an adjustment module 205.

[0136] The acquisition module 201 is used to acquire environmental information corresponding to several environmental states, and to identify several key influencing factors of the first chip in each environmental information.

[0137] The analysis module 202 is used to acquire several historical operating information of the first chip, and analyze the historical operating information in combination with the key influencing factors to obtain several chip influence parameters corresponding to the environmental states.

[0138] Modeling module 203 is used to construct simulation test models corresponding to each of the environmental states based on the structural parameter information of the first chip and several chip influence parameters;

[0139] The test module 204 is used to perform performance tests on the first chip using the simulation test models corresponding to each of the environmental states, and to obtain the test results of the first chip under each of the environmental states.

[0140] The adjustment module 205 is used to analyze and adjust the test results of the first chip under each of the environmental conditions to obtain the chip operating performance of the first chip under each of the environmental conditions.

[0141] Furthermore, in the second embodiment of the present invention, several key influencing factors of the first chip are identified from the environmental information, specifically:

[0142] Identify the environmental characteristics of each of the aforementioned environmental information;

[0143] Obtain several factors affecting the operating performance of the first chip from a preset database;

[0144] Identify the key characteristics of each of the aforementioned factors affecting operational performance;

[0145] Among the environmental feature information, select the environmental feature information that has the highest similarity to the key factor feature;

[0146] The environmental information corresponding to each of the environmental feature information is determined as the key influencing factor of the first chip.

[0147] Furthermore, in the second embodiment of the present invention, several historical operating information of the first chip is obtained, and the historical operating information is analyzed in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental state, specifically:

[0148] Obtain several historical operational information records of the first chip;

[0149] By combining the operational performance information in the historical operational information, we can analyze the impact mechanism of each key influencing factor.

[0150] By analyzing the data of each environmental state in the historical operational information, the range of influencing factor values ​​for each key influencing factor is obtained.

[0151] Based on the influence mode and value range of each of the key influencing factors, chip influence parameters corresponding to each of the environmental states are generated.

[0152] Furthermore, in the second embodiment of the present invention, the influence mode of each key influencing factor is analyzed by combining the operational performance information in the historical operational information, specifically as follows:

[0153] Identify the factor values ​​of each of the key influencing factors corresponding to each of the aforementioned historical operational information;

[0154] Based on the factor values ​​of the key influencing factors corresponding to each of the historical operation information, several target historical operation information are selected from each of the historical operation information.

[0155] Identify the operational performance information of each target based on its historical operational data;

[0156] Analyze the changes and correspondences between the key influencing factors and the operational performance information of each target in the historical operational information, and determine the influence mode of each key influencing factor.

[0157] Furthermore, in the second embodiment of the present invention, by analyzing the data of each environmental state in each of the historical operating information, the range of influencing factor values ​​for each of the key influencing factors is obtained, specifically as follows:

[0158] Obtain the state range information of each environmental state from the historical operation information;

[0159] Identify the influencing factor values ​​of each key influencing factor corresponding to each of the aforementioned state range information;

[0160] The influence factor values ​​of each of the key influencing factors are collected separately to obtain the range of influence factor values ​​for each of the key influencing factors.

[0161] Furthermore, in the second embodiment of the present invention, based on the influence mode and value range of each of the key influencing factors, chip influence parameters corresponding to each of the environmental states are generated, specifically as follows:

[0162] Based on the influence mode and value range of each of the key influencing factors, identify the change in the operating performance of the first chip corresponding to each value of each of the key influencing factors;

[0163] Based on the aforementioned operational performance change values, parameter change information corresponding to each of the aforementioned operational performance change values ​​is generated, forming a parameter change information group corresponding to each key influencing factor.

[0164] The parameter change information group of all key influencing factors corresponding to each environmental state is determined as the chip influence parameter corresponding to each environmental state.

[0165] Furthermore, in the second embodiment of the present invention, based on the structural parameter information of the first chip and several chip influence parameters, a simulation test model corresponding to each of the environmental states is constructed, specifically as follows:

[0166] Obtain the sample structure model and structural parameter information of the first chip from the preset database;

[0167] Based on the structural parameter information, the chip structure in the sample structural model is adjusted to form a simulation structural model of the first chip;

[0168] Based on the chip impact parameters corresponding to each of the environmental states, a performance adjustment group corresponding to each of the environmental states is generated.

[0169] Each of the aforementioned performance adjustment groups is added to the output layer of the simulation structure model to obtain the simulation test model corresponding to each of the aforementioned environmental states.

[0170] Furthermore, in the second embodiment of the present invention, the first chip is subjected to performance tests using simulation test models corresponding to each of the environmental states, and the test results of the first chip under each of the environmental states are obtained, specifically as follows:

[0171] Based on the simulation test models corresponding to each of the aforementioned environmental states, the first chip is subjected to simulation test processing to obtain the initial test results corresponding to each simulation test model.

[0172] Based on the performance adjustment group corresponding to each of the simulation test models, generate each group of operating performance change values.

[0173] Each of the aforementioned performance change value groups is added to the corresponding initial test results to form the test results of the first chip under each of the aforementioned environmental conditions.

[0174] Furthermore, in the second embodiment of the present invention, the test results of the first chip under each of the aforementioned environmental conditions are analyzed and adjusted to obtain the chip operating performance of the first chip under each of the aforementioned environmental conditions, specifically as follows:

[0175] Analyze the chip performance corresponding to each test result to obtain the chip performance under various environmental conditions;

[0176] Analyze the initial chip performance corresponding to the initial test results in each of the test results described;

[0177] Based on the performance change value group of each test result, adjust the initial chip performance to obtain the chip performance corresponding to each test result;

[0178] The chip performance corresponding to each of the test results is determined as the chip performance of the first chip under each environmental condition.

[0179] In summary, the second embodiment of this invention provides a chip performance testing device under multiple environmental conditions. Based on the organic integration of modules, it acquires environmental information corresponding to several environmental conditions and identifies several key influencing factors of the first chip in each environmental information. It acquires several historical operating information of the first chip and analyzes the historical operating information in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental condition. Based on the structural parameter information of the first chip and the several chip influence parameters, it constructs simulation test models corresponding to each environmental condition. Using the simulation test models corresponding to each environmental condition, it performs performance tests on the first chip to obtain the test results of the first chip under each environmental condition. It analyzes and adjusts the test results of the first chip under each environmental condition to obtain the chip operating performance of the first chip under each environmental condition. This invention uses simulation models to replace actual experiments, avoiding low-accuracy chip performance test results caused by equipment limitations, chip placement problems, etc., reducing testing costs, improving testing accuracy, and comprehensively improving the efficiency of chip performance testing under multiple environmental conditions.

[0180] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0181] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention for those skilled in the art.

Claims

1. A chip performance testing method under multiple environmental conditions, characterized in that, include: Obtain environmental information corresponding to several environmental states, and identify several key influencing factors of the first chip in each environmental information, specifically: Identify the environmental characteristics of each of the aforementioned environmental information; Obtain several factors affecting the operating performance of the first chip from a preset database; Identify the key characteristics of each of the aforementioned factors affecting operational performance; Among the environmental feature information, select the environmental feature information that has the highest similarity to the key factor feature; The environmental information corresponding to each of the environmental feature information is determined as the key influencing factor of the first chip; Several historical operating information data of the first chip are obtained, and the historical operating information is analyzed in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental state, specifically: Obtain several historical operational information records of the first chip; By combining the operational performance information in the historical operational information, we can analyze the impact mechanism of each key influencing factor. By analyzing the data of each environmental state in the historical operational information, the range of influencing factor values ​​for each key influencing factor is obtained. Based on the influence mode and value range of each of the key influencing factors, generate chip influence parameters corresponding to each of the environmental states; Based on the structural parameter information of the first chip and several chip influence parameters, a simulation test model corresponding to each environmental state is constructed, specifically as follows: Obtain the sample structure model and structural parameter information of the first chip from the preset database; Based on the structural parameter information, the chip structure in the sample structural model is adjusted to form a simulation structural model of the first chip; Based on the chip impact parameters corresponding to each of the environmental states, a performance adjustment group corresponding to each of the environmental states is generated. Each of the aforementioned performance adjustment groups is added to the output layer of the simulation structure model to obtain the simulation test model corresponding to each of the aforementioned environmental states; Using the simulation test models corresponding to each of the environmental states, the performance of the first chip is tested respectively, and the test results of the first chip under each of the environmental states are obtained; The test results of the first chip under each of the aforementioned environmental conditions are analyzed and adjusted to obtain the chip operating performance of the first chip under each of the aforementioned environmental conditions.

2. The chip performance testing method under multiple environmental conditions according to claim 1, characterized in that, The analysis of the impact mechanisms of each key influencing factor, based on the operational performance information from the historical operational information, specifically involves: Identify the factor values ​​of each of the key influencing factors corresponding to each of the aforementioned historical operational information; Based on the factor values ​​of the key influencing factors corresponding to each of the historical operation information, several target historical operation information are selected from each of the historical operation information. Identify the operational performance information of each target based on its historical operational data; Analyze the changes and correspondences between the key influencing factors and the operational performance information of each target in the historical operational information, and determine the influence mode of each key influencing factor.

3. The chip performance testing method under multiple environmental conditions according to claim 2, characterized in that, The step involves analyzing the environmental state data from the historical operational information to obtain the influence factor range of each key influencing factor. Specifically: Obtain the state range information of each environmental state from the historical operation information; Identify the influencing factor values ​​of each key influencing factor corresponding to each of the aforementioned state range information; The influence factor values ​​of each of the key influencing factors are collected separately to obtain the range of influence factor values ​​for each of the key influencing factors.

4. The chip performance testing method under multiple environmental conditions according to claim 3, characterized in that, The process of generating chip impact parameters corresponding to each environmental state based on the impact mode and value range of each key influencing factor is as follows: Based on the influence mode and value range of each of the key influencing factors, identify the change in the operating performance of the first chip corresponding to each value of each of the key influencing factors; Based on the aforementioned operational performance change values, parameter change information corresponding to each of the aforementioned operational performance change values ​​is generated, forming a parameter change information group corresponding to each key influencing factor. The parameter change information group of all key influencing factors corresponding to each environmental state is determined as the chip influence parameter corresponding to each environmental state.

5. The chip performance testing method under multiple environmental conditions according to claim 4, characterized in that, The simulation test model corresponding to each of the environmental states is used to perform performance tests on the first chip, and the test results of the first chip under each of the environmental states are obtained, specifically as follows: Based on the simulation test models corresponding to each of the aforementioned environmental states, the first chip is subjected to simulation test processing to obtain the initial test results corresponding to each simulation test model. Based on the performance adjustment group corresponding to each of the simulation test models, generate each group of operating performance change values. Each of the aforementioned performance change value groups is added to the corresponding initial test results to form the test results of the first chip under each of the aforementioned environmental conditions.

6. The chip performance testing method under multiple environmental conditions according to claim 5, characterized in that, The step of analyzing and adjusting the test results of the first chip under each of the aforementioned environmental conditions to obtain the chip operating performance of the first chip under each of the aforementioned environmental conditions specifically involves: Analyze the chip performance corresponding to each test result to obtain the chip performance under various environmental conditions; Analyze the initial chip performance corresponding to the initial test results in each of the test results described; Based on the performance change value group of each test result, adjust the initial chip performance to obtain the chip performance corresponding to each test result; The chip performance corresponding to each of the test results is determined as the chip performance of the first chip under each environmental condition.

7. A chip performance testing device under multiple environmental conditions, characterized in that, include: The module includes: acquisition module, analysis module, modeling module, testing module, and tuning module. The acquisition module is used to acquire environmental information corresponding to several environmental states, and to identify several key influencing factors of the first chip in each environmental information, specifically: Identify the environmental characteristics of each of the aforementioned environmental information; Obtain several factors affecting the operating performance of the first chip from a preset database; Identify the key characteristics of each of the aforementioned factors affecting operational performance; Among the environmental feature information, select the environmental feature information that has the highest similarity to the key factor feature; The environmental information corresponding to each of the environmental feature information is determined as the key influencing factor of the first chip; The analysis module is used to acquire several historical operating information data of the first chip, and analyze the historical operating information in conjunction with the key influencing factors to obtain several chip influence parameters corresponding to each environmental state, specifically: Obtain several historical operational information records of the first chip; By combining the operational performance information in the historical operational information, we can analyze the impact mechanism of each key influencing factor. By analyzing the data of each environmental state in the historical operational information, the range of influencing factor values ​​for each key influencing factor is obtained. Based on the influence mode and value range of each of the key influencing factors, generate chip influence parameters corresponding to each of the environmental states; The modeling module is used to construct simulation test models corresponding to each environmental state based on the structural parameter information of the first chip and several chip influence parameters, specifically: Obtain the sample structure model and structural parameter information of the first chip from the preset database; Based on the structural parameter information, the chip structure in the sample structural model is adjusted to form a simulation structural model of the first chip; Based on the chip impact parameters corresponding to each of the environmental states, a performance adjustment group corresponding to each of the environmental states is generated. Each of the aforementioned performance adjustment groups is added to the output layer of the simulation structure model to obtain the simulation test model corresponding to each of the aforementioned environmental states; The testing module is used to perform performance tests on the first chip using simulation test models corresponding to each of the environmental states, and to obtain the test results of the first chip under each of the environmental states. The adjustment module is used to analyze and adjust the test results of the first chip under each of the environmental conditions to obtain the chip operating performance of the first chip under each of the environmental conditions.

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