Detection method and circuit of connection device of chip pin

Abstract

The embodiment of the present disclosure provides a detection method and circuit for a connector of a chip pin, the circuit comprising: a detection module, configured to charge a function pin coupled to the input end of the connector corresponding to the detection module through a current source, and compare the voltage of the charged function pin with the reference voltage corresponding to the detection module in the detection window corresponding to the connector corresponding to the detection module to obtain a detection result signal corresponding to the detection module; a logic processing module, configured to perform logic processing on the detection result signals of all the detection modules to obtain a final detection result to determine whether all the connectors are connected to a normal signal; and a discharge module, configured to pull the voltage of the function pin coupled to the output end of the second capacitor to zero potential. The problem that the detection method of the connector of the existing chip pin cannot simultaneously monitor the connection of all the connectors output by the chip, affecting the actual results of the chip functional safety detection, is solved.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the technical field of integrated circuits, and in particular, to a detection method and circuit for a connection device of a chip pin. Background Art

[0002] With the development of integrated circuits, functional safety mechanisms are becoming more and more perfect. Functional safety mechanisms require that the chip can detect whether the connecting devices (capacitors, inductors, etc.) of the functional pins are connected properly after power-on. If the connecting devices have open circuits due to poor soldering, the error status needs to be indicated.

[0003] In the prior art, the method for detecting the connecting devices of the chip functional pins is usually to detect whether one of the connected connecting devices is connected normally. If there are multiple connecting devices around the chip, the connections of all connecting devices output by the chip cannot be monitored simultaneously, affecting the efficiency of chip functional safety detection. Summary of the invention

[0004] The embodiments described in the present disclosure provide a method and circuit for detecting a connector of a chip pin, in order to solve the problem that the detection method of the connector of the above-mentioned existing chip functional pins cannot simultaneously monitor the connection of all connectors output by the chip, thus affecting the actual result of the chip functional safety detection.

[0005] According to a first aspect of the present disclosure, a detection circuit for a connecting device of a chip pin is provided, wherein the connecting device includes at least one first capacitor coupled between a functional pin of the chip and a ground terminal and / or at least one second capacitor coupled between two functional pins of the chip, and the circuit includes: a logic processing module, a discharge module, and a detection module corresponding to the connecting device, wherein one connecting device corresponds to one detection module, wherein the detection module is configured to charge the functional pin coupled to the input end of the connecting device corresponding to the detection module through a current source, and compare the voltage of the charged functional pin with a reference voltage corresponding to the detection module within a detection window corresponding to the connecting device corresponding to the detection module to obtain a detection result signal corresponding to the detection module, wherein one detection module corresponds to one reference voltage, and one detection module corresponds to one detection result signal; the logic processing module is configured to perform logic processing on the detection result signals of all the detection modules to obtain a final detection result, wherein the final detection result is a signal for determining whether all the connecting devices are connected normally; and the discharge module is configured to pull the voltage of the functional pin coupled to the output end of the second capacitor to zero potential before the detection module corresponding to the second capacitor is executed.

[0006] Optionally, after the chip is powered on, the detection modules corresponding to each connecting device are executed in sequence according to the preset detection order corresponding to the connecting device, each connecting device corresponds to a detection time period, and the detection window corresponding to each connecting device is a time period selected from the corresponding detection time period.

[0007] Optionally, the detection module includes: a current source, a first resistor, a second resistor, a comparator, and a switch, wherein one end of the current source is coupled to a power supply voltage, and the other end of the current source is coupled to one end of the first resistor; the other end of the first resistor is respectively coupled to one end of the second resistor, the negative input end of the comparator, and one end of the switch; the other end of the second resistor is coupled to a ground end, and the other end of the switch is coupled to a functional pin coupled to the input end of a connecting device corresponding to the detection module; the positive input end of the comparator is coupled to a reference voltage corresponding to the detection module, the output end of the comparator serves as the output end of the detection module for outputting a detection result signal corresponding to the detection module, and the output end of the comparator is coupled to the input end of the logic processing module; the switch corresponding to the detection module is controlled to be in a closed state during the detection period of the connecting device corresponding to the detection module.

[0008] Optionally, the logic processing module includes: a latch unit and a logic operation unit, wherein the latch unit is configured to latch the detection result signal output by each detection module with a latch respectively until all detection modules are detected, and then all detection result signals are input into the logic operation unit; the logic operation unit is configured to perform a logic AND operation on all detection result signals to obtain the final detection result.

[0009] Optionally, if the final detection result is a high-level signal, it is determined that all the connecting devices are connected normally; if the final detection result is a low-level signal, it is determined that not all the connecting devices are connected normally.

[0010] Optionally, the connecting device also includes at least one inductor coupled between a functional pin of the chip and an input end of the first capacitor or an input end of the second capacitor, and the detection module corresponding to the inductor is executed after the detection module corresponding to the first capacitor and the detection module corresponding to the second capacitor are executed.

[0011] Optionally, the chip is a switching voltage converter, the connecting device includes a first capacitor coupled between the output pin and the ground terminal of the chip, a second capacitor coupled between the bootstrap pin and the switch node pin, and an inductor coupled between the switch node pin and the output pin, and the discharge module is the lower power tube of the switching voltage converter.

[0012] According to a second aspect of the present disclosure, a detection method for a connecting device of a chip pin is provided, wherein the connecting device includes at least one first capacitor coupled between a functional pin of the chip and a ground terminal and / or at least one second capacitor coupled between two functional pins of the chip, and the method includes: according to a preset detection sequence corresponding to the connecting device, when a detection period corresponding to the first capacitor is reached, executing a detection module corresponding to the first capacitor; and / or, when a detection period corresponding to the second capacitor is reached, pulling the voltage of the functional pin coupled to the output end of the second capacitor to zero potential and then executing the detection module corresponding to the second capacitor, one connecting device corresponds to one detection module, and the detection process of the detection module is to charge the functional pin coupled to the input end of the connecting device through a current source, and compare the voltage of the charged functional pin with the reference voltage corresponding to the detection module within the detection window corresponding to the connecting device to obtain a detection result signal corresponding to the connecting device, and one detection module corresponds to one detection result signal; latching each detection result signal with a latch respectively, until all detection modules have completed detection, and then performing a logical AND operation on all detection result signals to obtain a final detection result, and the final detection result is a signal for determining whether all connecting devices are connected normally.

[0013] Optionally, executing the detection module corresponding to the connecting device also includes: at the beginning of each detection period corresponding to the connecting device, closing the switch in the detection module to charge the functional pin coupled to the input end of the connecting device through the current source, and the switch is a switch for controlling whether to charge the functional pin; at the end of each detection period corresponding to the connecting device, opening the switch in the detection module.

[0014] Optionally, if the final detection result is a high-level signal, it is determined that all the connecting devices are connected normally; if the final detection result is a low-level signal, it is determined that not all the connecting devices are connected normally.

[0015] Optionally, the connecting device also includes at least one inductor coupled between a functional pin of the chip and an input end of the first capacitor or an input end of the second capacitor, and the detection module corresponding to the inductor is executed after the detection module corresponding to the first capacitor and the detection module corresponding to the second capacitor are executed.

[0016] Optionally, before the detection module corresponding to the inductor is executed, if there is charge on the second capacitor corresponding to the inductor, the charge on the second capacitor corresponding to the inductor is discharged to the ground terminal; if the potential of the function pin of the chip corresponding to the inductor is not zero potential, the potential of the function pin of the chip corresponding to the inductor is pulled to zero potential.

[0017] Optionally, the chip is a switching voltage converter, and the connecting device includes a first capacitor coupled between an output pin and a ground terminal, a second capacitor coupled between a bootstrap pin and a switch node pin, and an inductor coupled between the switch node pin and the output pin, and the voltage of a function pin coupled to the output end of the second capacitor is pulled to zero potential through the lower power tube of the switching voltage converter.

[0018] Optionally, the preset detection order is, from front to back, the second capacitor, the first capacitor, and the inductor.

[0019] In the detection method and circuit of the connector of the chip pin of the embodiment of the present disclosure, a detection module is set for each connector, and the detection module charges the functional pin coupled to the input end of the connector through a current source, and compares the voltage of the charged functional pin with the reference voltage corresponding to the detection module in the detection window corresponding to the connector to obtain the detection result signal corresponding to each connector, and then all the detection result signals are processed by logic to obtain the final detection result, and according to the final detection result, it can be determined whether all the connectors are connected normally. Compared with the prior art, the detection method of the connector of the chip pin of the embodiment of the present disclosure can determine whether all the connectors are connected normally through a final detection result signal, and realizes the simultaneous monitoring of the connection status of multiple connectors, which is very convenient and ensures the accuracy and reliability of functional safety detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It should be noted that the drawings described below only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure, wherein:

[0021] Figure 1 A schematic block diagram of a detection circuit of a chip pin connection device according to an embodiment of the present disclosure is shown;

[0022] Figure 2 An exemplary circuit diagram showing a detection circuit of a connection device for chip pins according to an embodiment of the present disclosure;

[0023] Figure 3-5 Shows Figure 2 Schematic diagram of waveforms of key signals corresponding to the three working conditions corresponding to the circuit example diagram;

[0024] Figure 6 A schematic block diagram showing a detection circuit of a connecting device for chip pins according to another embodiment of the present disclosure is shown;

[0025] Figure 7A schematic block diagram showing a detection circuit of a chip pin connection device according to another embodiment of the present disclosure is shown;

[0026] Figure 8 An exemplary circuit diagram showing another detection circuit of a chip pin connection device according to an embodiment of the present disclosure;

[0027] Fig. 9 A flow chart showing a method for detecting a connecting device of a chip pin according to an embodiment of the present disclosure is shown;

[0028] The elements in the drawings are schematic and not drawn to scale. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.

[0030] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as those commonly understood by those skilled in the art to which the subject matter of the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the specification and the relevant technology, and will not be interpreted in an idealized or overly formal form unless otherwise clearly defined herein. As used herein, statements that two or more parts are "connected" or "coupled" together should refer to these parts being directly combined together or combined through one or more intermediate components. In addition, terms such as "first" and "second" are only used to distinguish one component (or a part of a component) from another component (or another part of a component).

[0031] In all embodiments of the present disclosure, since the source and drain of a metal oxide semiconductor (MOS) transistor are symmetrical, and the conduction current directions between the source and drain of an N-type transistor and a P-type transistor are opposite, in the embodiments of the present disclosure, the controlled middle terminal of the MOS transistor is referred to as a control terminal, and the remaining two terminals of the MOS transistor are referred to as a first terminal and a second terminal, respectively. In addition, terms such as "first" and "second" are only used to distinguish one component (or a portion of a component) from another component (or another portion of a component).

[0032] In order to solve the problem that the existing detection method of the connector of the chip functional pin cannot monitor the connection of all the connectors output by the chip at the same time, which affects the actual result of the chip functional safety detection. A new detection method (method and circuit) of the connector of the chip pin is proposed. The detection method of the connector of the chip pin of the embodiment of the present disclosure sets a detection module for each connector. The detection module charges the functional pin coupled to the input end of the connector through a current source, and compares the voltage of the charged functional pin with the reference voltage corresponding to the detection module in the detection window corresponding to the connector to obtain the detection result signal corresponding to each connector, and then all the detection result signals are processed by logic to obtain the final detection result. According to the final detection result, it can be determined whether all the connectors are connected normally. The detection method and circuit of the connector of the chip pin of the present disclosure are described in detail below.

[0033] like Figure 1 FIG. 1 is a schematic block diagram of a detection circuit 100 for a chip pin connection device according to an embodiment of the present disclosure. Figure 1 The detection circuit 100 of the connecting device of the chip pin includes: a detection module 110 corresponding to the connecting device, one connecting device corresponds to one detection module 110, a logic processing module 120 and a discharge module 130. It should be noted that, in the embodiment of the present disclosure, the connecting device includes at least one first capacitor C1 coupled between the functional pin PIN of the chip and the ground terminal and / or at least one second capacitor C2 coupled between two functional pins PIN of the chip. Figure 1 The schematic diagram is a diagram that takes the connecting device as a first capacitor C1 and a second capacitor C2 as an example. In actual applications, the number of detection modules 110 and the number of discharge modules 130 are set according to the type and number of actual connecting devices. Usually, one second capacitor C2 corresponds to one discharge module 130, but if multiple second capacitors C2 can share one discharge module 130 according to actual circuit connection conditions, they can also be shared, that is, one discharge module 130 corresponds to at least one second capacitor C2.

[0034] The detection module 110 is configured to charge the function pins (PIN1, PIN2) coupled to the input terminals of the connection devices (C1, C2) corresponding to the detection module 110 through a current source, and compare the voltage of the charged function pins (PIN1, PIN2) with the reference voltage corresponding to the detection module 110 within the detection window corresponding to the connection device corresponding to the detection module 110 to obtain the detection result signal A (A1, A2) corresponding to the detection module 110, one detection module 110 corresponds to one reference voltage, and one detection module 110 corresponds to one detection result signal A;

[0035] In the embodiment of the present disclosure, the functional pin PIN does not include a ground pin, and the connecting device of the chip may include only a first capacitor C1, or only a second capacitor C2, or a first capacitor C1 and at least one second capacitor C2, or a second capacitor C2 and at least one first capacitor C1.

[0036] Each connecting device is detected by a detection module 110 to obtain a detection result signal A, and the circuit structure of each detection module 110 is the same. The current value of the current source, the voltage value of the reference voltage, the duration of the detection window and other parameters corresponding to different detection modules 110 can be set to be the same or different according to actual needs, and there is no limitation on this in the embodiment of the present disclosure. The detection principle of the detection module 110 is: if the connecting device is well connected, then after charging through the current source, the function pin PIN ( Figure 1 The voltage of the function pins PIN1 and PIN2 will follow the voltage change relationship of the capacitor charging, and the voltage will rise slowly. If the connection device is not connected properly, after the overcurrent source is charged, the function pins PIN ( Figure 1 The voltage of the corresponding pins PIN1 and PIN2 will rise rapidly. The voltage of the charged pins PIN ( Figure 1 Corresponding to the voltage of PIN1, PIN2) and the reference voltage, if the connecting device is connected well, then the charged function pin PIN ( Figure 1 Corresponding to PIN1, PIN2) voltage will be much lower than the reference voltage; on the contrary, if the connection device is not connected properly, then the charged function pin PIN ( Figure 1 The voltage corresponding to PIN1 and PIN2 will be higher than the reference voltage, so it can be judged whether the connection device corresponding to the detection module 110 is connected normally according to the voltage comparison result. In addition, it should be noted that the detection module 110 corresponding to each connection device needs to be executed in sequence according to the preset detection sequence, each connection device corresponds to a detection period, each detection period is non-overlapping, and the detection window corresponding to each connection device is a time period selected from the corresponding detection period.

[0037] The logic processing module 120 is configured to convert the detection result signal A ( Figure 1 A1 and A2 in the figure are used to perform logical processing to obtain the final detection result DET, which is a signal to determine whether all connected devices are connected normally. Each detection result signal A ( Figure 1 A1 and A2 in the figure are detection result signals for each connection device, and because different detection modules 110 perform detection in different time periods, the obtained detection result signal A ( Figure 1A1 and A2 in the figure are also obtained at different times. In the embodiment of the present disclosure, the detection result signal A ( Figure 1 A1 and A2 in the figure) are logically processed to determine whether all the connection devices are connected normally through a final detection result DET, so as to realize simultaneous monitoring. Specifically, the processing principle of the logic processing module 120 in the embodiment of the present disclosure is: the detection result signal A obtained first is latched until all the detection modules 110 have completed the detection, and then all the detection result signals A are logically ANDed to obtain the final detection result DET. If the final detection result DET is a high-level signal, it is determined that all the connection devices are connected normally; if the final detection result DET is a low-level signal, it is determined that not all the connection devices are connected normally. Usually in current applications, as long as it can be determined whether the connection devices of the chip function pins PIN are all connected normally, the application requirements can be met, that is, if all are connected normally, the functional safety test is passed. If not all are connected normally, the functional safety test cannot be passed.

[0038] The discharge module 130 is configured to pull the voltage of the function pin PIN3 coupled to the output end of the second capacitor C2 to zero potential before the detection module 110 corresponding to the second capacitor C2 is executed. The discharge module 130 is used in conjunction with the second capacitor C2, and the discharge module 130 is coupled to the function pin PIN3 coupled to the output end of the second capacitor C2. Because the function pin PIN4 coupled to the output end of the second capacitor C2 may not be at zero potential due to various reasons before detection, a discharge process is required to ensure that the function pin PIN3 coupled to the output end of the second capacitor C2 is at zero potential before detection, thereby not affecting the accuracy of the corresponding detection result signal A. Specifically, the discharge module 130 can be implemented by a transistor connected to the ground terminal.

[0039] From the above description, it can be seen that in the detection circuit 100 of the connector of the chip pin of the embodiment of the present disclosure, a detection module is set for each connector, and the detection module charges the functional pin coupled to the input end of the connector through a current source, and compares the voltage of the charged functional pin with the reference voltage corresponding to the detection module in the detection window corresponding to the connector to obtain the detection result signal corresponding to each connector, and then all the detection result signals are processed by logic to obtain the final detection result, and according to the final detection result, it can be determined whether all the connectors are connected normally. Compared with the prior art, the detection circuit of the connector of the chip pin of the embodiment of the present disclosure can determine whether all the connectors are connected normally through a final detection result signal, and realizes the simultaneous monitoring of the connection status of multiple connectors, which is very convenient and ensures the accuracy and reliability of functional safety detection.

[0040] Furthermore, Figure 2 An exemplary circuit diagram of two detection modules 110 is shown in FIG. 1 . In order to distinguish the electronic components and parameters contained therein, different numbers are used to distinguish them, such as Figure 2 As shown, the detection module 110 includes: a current source (IB1, IB2), a first resistor (R11, R12), a second resistor (R21, R22), a comparator (COMP1, COMP2), and a switch (K1, K2). The circuit structure of one of the detection modules 110 is described below by taking one of the detection modules 110 as an example: wherein one end of the current source IB1 is coupled to the power supply voltage VCC, and the other end of the current source IB1 is coupled to one end of the first resistor R11; the other end of the first resistor R11 is respectively coupled to one end of the second resistor R21, the negative input end of the comparator COMP1, and one end of the switch K1; the second resistor R2 The other end of the switch K1 is coupled to the ground end, and the other end of the switch K1 is coupled to the function pin PIN1 coupled to the input end of the connecting device C1 corresponding to the detection module 110; the positive input end of the comparator COMP1 is coupled to the reference voltage Vref1 corresponding to the detection module 110, and the output end of the comparator COMP1 is used as the output end of the detection module 110 to output the detection result signal A1 corresponding to the detection module 110, and the output end of the comparator COMP1 is coupled to the input end of the logic processing module 120; during the detection period of the connecting device C1 corresponding to the detection module 110, the switch K1 corresponding to the detection module 110 is controlled to be in a closed state. The input end of the connecting device in the embodiment of the present disclosure refers to the current inflow end. For the first capacitor C1 and the second capacitor C2, the input end usually refers to the upper plate or positive plate of the capacitor.

[0041] Further, such as Figure 2 As shown, the logic processing module 120 includes: a latch unit 121 and a logic operation unit 122, wherein the latch unit 121 is configured to store the detection result signal ( Figure 2 A1 and A2 are included in the detection module 110, and then all the detection result signals ( Figure 2 A1, A2) are input to the logic operation unit 122; the logic operation unit 122 is configured to convert all the detection result signals ( Figure 2A1 and A2 are included in the logic operation unit 122, and a final detection result DET is obtained by performing a logic AND operation. The latch unit 121 is composed of latches, and one detection module 110 corresponds to one latch. The latch can latch the detection result signal obtained by the detection module 110 executed first, and after all the detection modules 110 are executed, they are uniformly transmitted to the logic operation unit 122. The logic operation unit 122 can be implemented by an AND gate, so that when all the detection result signals are high-level signals, the final detection result DET obtained is a high-level signal. As long as one detection result signal is a low-level signal, the final detection result DET obtained is a low-level signal.

[0042] Further, such as Figure 2 As shown, the discharge module 130 includes a first transistor M1, wherein a first electrode of the first transistor M1 is coupled to the ground terminal, a second electrode of the first transistor M1 is coupled to a function pin PIN3 coupled to the output terminal of the second capacitor C2, and the first transistor M1 is turned on during discharge.

[0043] Combination Figure 2The working principle of the detection circuit 100 of the connection device of the chip pin in the embodiment of the present disclosure is explained as follows: Assuming that the preset detection sequence is C2, C1, after the chip is turned on, first, the first transistor M1 is turned on to pull the voltage of the function pin PIN3 down to zero potential; the switch K2 is closed, and the current source IB2 charges PIN2. If C2 is connected normally, the voltage of PIN2 rises slowly. In the detection window corresponding to C2, the voltage of PIN2 and the size of Vref2 are compared. If the voltage of PIN2 in the detection window is much smaller than the voltage of Vref2, then A2 output by COMP2 is high level. If C2 is not connected normally and a circuit is broken, the voltage of PIN2 rises rapidly. In the detection window, the voltage of PIN2 is much larger than the voltage of Vref2, then A2 output by COMP2 is high level. is low level, A2 is latched by the latch unit 121; after the detection period of C2 ends, the switch K2 is disconnected, the detection module 110 corresponding to C1 starts detection, K1 is closed, and the current source IB1 charges PIN1. If C1 is connected normally, the voltage of PIN1 rises slowly. In the detection window corresponding to C1, the voltage of PIN1 and Vref1 are compared. If the voltage of PIN1 in the detection window is much smaller than the voltage of Vref1, then A1 output by COMP1 is high level. If C1 is not connected normally and a circuit is broken, the voltage of PIN1 rises rapidly. In the corresponding detection window, the voltage of PIN1 is much larger than the voltage of Vref1. Then A1 output by COMP1 is low level, and A1 is latched by the latch unit 121; after the detection period of C1 ends, the switch K1 is disconnected. A1 and A2 are transmitted to the operation logic unit to obtain the final detection result DET. If A1 and A2 are both high, DET is a high signal, indicating that all connected devices are connected normally. If only one of A1 and A2 is low, DET is a low signal, indicating that not all connected devices are connected normally. Figure 2 The example in the figure shows two connecting devices. If there are more connecting devices, the detection is also performed according to the preset detection sequence and referring to the above process.

[0044] Furthermore, in order to more intuitively illustrate the effect of the above embodiment, Figure 3-5 As shown, given Figure 2 The waveform diagram of the corresponding key signals under the corresponding three working conditions, where: Figure 3 Corresponding to the normal working condition when both C1 and C2 are connected, Figure 4 Corresponding to the working condition of abnormal connection and circuit break of C1, Figure 5 Corresponding to the abnormal connection and circuit-breaking condition of C2, t1 and t2 are the detection periods corresponding to C1 and C2 respectively, and T1 and T2 are the detection windows corresponding to C1 and C2 respectively. Figure 3In T1, Vref1 is greater than PIN1 voltage VPIN1, and in T2, Vref2 is greater than PIN2 voltage VPIN2, so the obtained DET is high level; Figure 4 In T1, Vref1 is less than PIN1 voltage VPIN1, and in T2, Vref2 is greater than PIN2 voltage VPIN2, and the obtained DET is a low level signal; Figure 5 In T1, Vref1 is greater than PIN1 voltage VPIN1, and in T2, Vref2 is less than PIN2 voltage VPIN2, and the obtained DET is a low level signal. Figure 3-5 The waveform diagram shows that DET can be used to determine whether all connected devices are connected properly.

[0045] The connection devices in the above embodiments are all for capacitors, but the inductors that are connected to the above embodiments can also be detected by the above method. That is, further, the connection device also includes at least one inductor coupled between the function pin of the chip and the input end of the first capacitor C1 or the input end of the second capacitor C2, and the execution of the detection module 110 corresponding to the inductor is after the execution of the detection module 110 corresponding to the first capacitor C1 and the detection module 110 corresponding to the second capacitor C2. Figure 6 , 7 As shown in Figure 1 A schematic block diagram of an inductor L and a detection module 110 corresponding to the inductor L is added on the basis of FIG. Figure 6 Inductor L is coupled between PIN4 and C1. Figure 7 Inductor L is coupled between PIN4 and C2, and inductor L has a corresponding detection module 110. A3 is the detection result signal of the detection module 110 corresponding to L. The structure of the detection module 110 is the same as that of the detection module 110 in the aforementioned embodiment, and the detection principle is also the same, which will not be repeated here. Figure 6 For example, it can be seen that based on the detection principle of the aforementioned detection module 110, when charging PIN4, if L is connected normally, L is equivalent to a connected wire, and C1 is still charged. Therefore, the principle of charging the capacitor by a current source is actually used. Therefore, the detection module 110 with the same structure as the detection module 110 in the aforementioned embodiment can be used to detect the connection status of L. It should be noted that, if Figure 6As shown, when C1 is connected normally, if L is also connected normally, A3 is high level, and if L is disconnected, A3 is low level; when C1 is connected abnormally, regardless of whether L is connected normally, A3 is low level. In this case, although it is impossible to determine whether L is connected normally, it does not affect the final detection result DET, because as long as there is a disconnection in one of the connecting devices, DET will be low level. In addition, "the execution of the detection module 110 corresponding to the inductor L is after the execution of the detection module 110 corresponding to the first capacitor C1 and the detection module 110 corresponding to the second capacitor C2." This is also considering that the capacitors with coupling relationship are needed when detecting the inductor L. This execution order is more reasonable, and it is also easier to analyze if it is necessary to further determine which connecting device is abnormally connected later.

[0046] Furthermore, when DET is a low level signal, that is, it is determined that not all connecting devices are connected normally, if you want to further determine which connecting device is not connected normally, you can also judge it through the detection result signal output by the detection module 110 corresponding to each connecting device.

[0047] Furthermore, the embodiment of the present disclosure also provides an exemplary circuit diagram of a detection circuit 100 for a connection device of a chip pin corresponding to a switching voltage converter, such as Figure 8 As shown, the connecting device includes a first capacitor (output capacitor Cout) coupled between the output pin OUT of the chip and the ground terminal, a second capacitor (bootstrap capacitor CBST) coupled between the bootstrap pin BST and the switch node pin SW, and an inductor L1 coupled between the switch node pin SW and the output pin OUT. The discharge module 130 is implemented by the lower power tube LS_powermos of the switching voltage converter. Figure 8The preset detection sequence corresponding to the connecting device is CBST, Cout, and L1. Based on the detection principle of the aforementioned embodiment, after the chip is turned on, the voltage of SW is first pulled down to zero potential through LS_powermos, and then K4 is closed, and the detection module 110 corresponding to CBST is executed to obtain A4, which is sent to the latch unit 121, and then K4 is disconnected, and LS_powermos is also turned off. Then K6 is closed, and the detection module 110 corresponding to Cout is executed to obtain A6, which is sent to the latch unit 121, and then K6 is disconnected. Then, in order to prevent energy storage on Cout, the voltage of SW is pulled down to zero potential through LS_powermos, and the energy on Cout is discharged to the ground terminal, and then K5 is closed, and the detection module 110 corresponding to L1 is executed to obtain A5, which is sent to the latch unit 121, and then K5 is disconnected. Finally, the logic operation unit 122 performs logic operations on A4, A5, and A6 to obtain the final detection result DET. If DET is high, it means that all the connecting devices are connected normally. If DET is low, it means that not all the connecting devices are connected normally. If you want to further determine which connecting device is not connected normally, you can determine it through the state of each detection result signal A4, A5, and A6. If A4 is low, CBST is not connected normally. If A6 is low, Cout is not connected normally. If A6 is high and A5 is low, L1 is not connected normally. It should be noted that the switching voltage converter in this embodiment can be a BUCK type DCDC or a Boost type DCDC. It should be noted that Figure 8 In order to distinguish the same components of the detection module 110 corresponding to different connection devices, different numbers are used to distinguish them. For example, the current source in the detection module 110 corresponding to CBST is IB4, the first resistor is R14, the second resistor is R24, the comparator is COMP4, the reference voltage is Vref4, and so on.

[0048] Furthermore, the embodiment of the present disclosure also provides a detection method 200 for a chip pin connection device of the detection circuit 100 for a chip pin connection device in the aforementioned embodiment, wherein the connection device includes at least one first capacitor coupled between a functional pin of the chip and a ground terminal and / or at least one second capacitor coupled between two functional pins of the chip, such as Fig. 9As shown, the method includes steps S201-S203: S201. According to the preset detection sequence corresponding to the connecting device, when the detection period corresponding to the first capacitor is reached, the detection module corresponding to the first capacitor is executed; S202. When the detection period corresponding to the second capacitor is reached, the voltage of the function pin coupled to the output end of the second capacitor is pulled to zero potential and then the detection module corresponding to the second capacitor is executed; wherein, one connecting device corresponds to one detection module; S203. Each detection result signal is latched by a latch respectively until all detection modules are detected, and then all detection result signals are logically ANDed to obtain a final detection result; wherein, the final detection result is a signal to determine whether all connecting devices are connected normally.

[0049] In steps S201 and S202, the preset detection sequence determines the execution sequence of the detection modules corresponding to the connecting devices. Each connecting device has a corresponding detection period, and the detection periods corresponding to different connecting devices do not overlap. Step S201 and step S202 are detection instructions for the first capacitor and the second capacitor respectively. The difference is that the second capacitor needs to pull the voltage of the function pin coupled to the output end of the second capacitor to zero potential before executing the detection module, and the detection method flow of the detection modules corresponding to the first capacitor and the second capacitor are the same. Specifically, the detection process of the detection module is: charging the function pin coupled to the input end of the connecting device through a current source, and comparing the voltage of the charged function pin with the reference voltage corresponding to the detection module in the detection window corresponding to the connecting device to obtain the detection result signal corresponding to the connecting device, and one detection module corresponds to one detection result signal. In addition, the detection module corresponding to the executing connecting device also includes: at the beginning of the detection period corresponding to each connecting device, the switch in the detection module is closed to charge the functional pin coupled to the input end of the connecting device through the current source, and the switch is a switch used to control whether the functional pin is charged; at the end of the detection period corresponding to each connecting device, the switch in the detection module is disconnected. The detection principle of the specific detection module can refer to the relevant description in the aforementioned circuit embodiment, which will not be repeated here. It should also be noted that the serial numbers of steps S201 and S202 do not represent the execution order of the detection modules corresponding to the first capacitor and the second capacitor. The execution order of different detection modules is still determined by the preset detection order.

[0050] In step S203, if the final detection result is a high level signal, it is determined that all the connecting devices are connected normally; if the final detection result is a low level signal, it is determined that not all the connecting devices are connected normally.

[0051] From the above description, it can be seen that in the detection method of the connector of the chip pin of the embodiment of the present disclosure, a detection module is set for each connector, and the detection module charges the functional pin coupled to the input end of the connector through a current source, and compares the voltage of the charged functional pin with the reference voltage corresponding to the detection module in the detection window corresponding to the connector to obtain the detection result signal corresponding to each connector, and then all the detection result signals are processed by logic to obtain the final detection result, and according to the final detection result, it can be determined whether all the connectors are connected normally. Compared with the prior art, the detection method of the connector of the chip pin of the embodiment of the present disclosure can determine whether all the connectors are connected normally through a final detection result signal, and realizes the simultaneous monitoring of the connection status of multiple connectors, which is very convenient and ensures the accuracy and reliability of functional safety detection.

[0052] Furthermore, the connection device also includes at least one inductor coupled between the functional pin of the chip and the input terminal of the first capacitor or the input terminal of the second capacitor, and the detection module corresponding to the inductor is executed after the detection module corresponding to the first capacitor and the detection module corresponding to the second capacitor are executed. In addition, before the detection module corresponding to the inductor is executed, if there is electricity on the second capacitor corresponding to the inductor, the electricity on the second capacitor corresponding to the inductor is discharged to the ground terminal, and if the potential of the functional pin of the chip corresponding to the inductor is not zero potential, the potential of the functional pin of the chip corresponding to the inductor is pulled to zero potential.

[0053] Furthermore, if the chip is a switching voltage converter, the connecting device includes a first capacitor (output capacitor) coupled between the output pin and the ground terminal, a second capacitor (bootstrap capacitor) coupled between the bootstrap pin and the switch node pin, and an inductor (output inductor) coupled between the switch node pin and the output pin. The voltage of the functional pin coupled to the output end of the second capacitor is pulled to zero potential through the lower power tube of the switching voltage converter (the lower power tube serves as a discharge module here). For the switching voltage converter, the preset detection order is the second capacitor, the first capacitor, and the inductor from front to back. Specifically, for the switching voltage converter, the detection process of the connecting device of the chip pin can refer to the aforementioned Figure 8 The relevant descriptions in the corresponding embodiments are not repeated here.

[0054] In the above embodiments of the present disclosure, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0055] In summary, the detection method and circuit of the connector of the chip pin in the embodiment of the present disclosure can determine whether all connectors are connected normally through a final detection result signal, thereby realizing simultaneous monitoring of the connection status of multiple connectors, which is very convenient and ensures the accuracy and reliability of functional safety detection.

[0056] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive, unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is placed after a group of terms, "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0057] Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that various aspects of the present disclosure can be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.

[0058] Several embodiments of the present disclosure are described in detail above, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the attached claims.

Claims

1. A detection circuit for a connection device of a chip pin, wherein the connection device comprises at least one first capacitor coupled between a function pin of the chip and a ground terminal and / or at least one second capacitor coupled between two function pins of the chip, characterized in that: The circuit includes: a logic processing module, a discharge module, and a detection module corresponding to the connection device, one connection device corresponds to one detection module. Wherein, the detection module is configured to charge the function pin coupled to the input end of the connecting device corresponding to the detection module through a current source, and compare the voltage of the charged function pin with the reference voltage corresponding to the detection module within the detection window corresponding to the connecting device corresponding to the detection module to obtain the detection result signal corresponding to the detection module, one detection module corresponds to one reference voltage, one detection module corresponds to one detection result signal, and whether the connecting device corresponding to the detection module is connected normally can be judged according to the comparison result; The logic processing module is configured to perform logic processing on the detection result signals of all the detection modules to obtain a final detection result. The processing principle is to perform latch processing on the detection result signals obtained first until all the detection modules have completed detection. Then, all the detection result signals are subjected to logic AND operation to obtain a final detection result. The final detection result is a signal to determine whether all the connection devices are connected normally. The discharge module is configured to pull the voltage of the function pin coupled to the output end of the second capacitor to zero potential before the detection module corresponding to the second capacitor is executed.

2. The detection circuit of the chip pin connection device according to claim 1, characterized in that: After the chip is turned on, the detection modules corresponding to each connecting device are executed in sequence according to the preset detection sequence corresponding to the connecting device. Each connecting device corresponds to a detection period, and the detection window corresponding to each connecting device is a time period selected from the corresponding detection period.

3. The detection circuit of the chip pin connection device according to claim 2, characterized in that: The detection module includes: a current source, a first resistor, a second resistor, a comparator, and a switch. Wherein, one end of the current source is coupled to a power supply voltage, and the other end of the current source is coupled to one end of a first resistor; The other end of the first resistor is respectively coupled to one end of the second resistor, the negative input end of the comparator, and one end of the switch; The other end of the second resistor is coupled to the ground end, and the other end of the switch is coupled to the function pin coupled to the input end of the connecting device corresponding to the detection module; The positive input terminal of the comparator is coupled to the reference voltage corresponding to the detection module, the output terminal of the comparator is used as the output terminal of the detection module to output the detection result signal corresponding to the detection module, and the output terminal of the comparator is coupled to the input terminal of the logic processing module; During a detection period of the connecting device corresponding to the detection module, the switch corresponding to the detection module is controlled to be in a closed state.

4. The detection circuit of the chip pin connection device according to claim 1, characterized in that: The logic processing module includes: a latch unit, a logic operation unit, The latch unit is configured to latch the detection result signal output by each detection module with a latch, until all detection modules have completed detection, and then input all detection result signals into the logic operation unit; The logic operation unit is configured to perform a logic AND operation on all the detection result signals to obtain the final detection result.

5. The detection circuit of the chip pin connection device according to claim 1, characterized in that: If the final detection result is a high level signal, it is determined that all the connecting devices are connected normally; if the final detection result is a low level signal, it is determined that not all the connecting devices are connected normally.

6. The detection circuit of the chip pin connection device according to claim 1, characterized in that: The connecting device also includes at least one inductor coupled between a functional pin of the chip and an input end of the first capacitor or an input end of the second capacitor, and the detection module corresponding to the inductor is executed after the detection module corresponding to the first capacitor and the detection module corresponding to the second capacitor are executed.

7. The detection circuit of the chip pin connection device according to claim 6, characterized in that: The chip is a switching voltage converter, the connecting device includes a first capacitor coupled between the output pin of the chip and the ground terminal, a second capacitor coupled between the bootstrap pin and the switch node pin, and an inductor coupled between the switch node pin and the output pin, and the discharge module is the lower power tube of the switching voltage converter.

8. A method for detecting a connection device of a chip pin, wherein the connection device comprises at least one first capacitor coupled between a functional pin of the chip and a ground terminal and / or at least one second capacitor coupled between two functional pins of the chip, characterized in that: The method comprises: According to the preset detection sequence corresponding to the connecting device, when the detection period corresponding to the first capacitor is reached, executing the detection module corresponding to the first capacitor; and / or, When the detection period corresponding to the second capacitor is reached, the voltage of the function pin coupled to the output end of the second capacitor is pulled to zero potential, and then the detection module corresponding to the second capacitor is executed. One connection device corresponds to one detection module. The detection process of the detection module is to charge the function pin coupled to the input end of the connection device through a current source, and compare the voltage of the charged function pin with the reference voltage corresponding to the detection module within the detection window corresponding to the connection device to obtain a detection result signal corresponding to the connection device. One detection module corresponds to one detection result signal. According to the comparison result, it can be judged whether the connection device corresponding to the detection module is connected normally; Each detection result signal is latched by a latch respectively until all detection modules have completed detection, and then all detection result signals are logically ANDed to obtain a final detection result, which is a signal to determine whether all connection devices are connected normally.

9. The method for detecting a connection device of a chip pin according to claim 8, characterized in that: The detection module corresponding to the execution connection device also includes: At the beginning of the detection period corresponding to each connecting device, the switch in the detection module is closed to charge the function pin coupled to the input end of the connecting device through the current source, and the switch is a switch for controlling whether to charge the function pin; When the detection period corresponding to each connecting device ends, the switch in the detection module is disconnected.

10. The method for detecting a connection device of a chip pin according to claim 8, characterized in that: If the final detection result is a high level signal, it is determined that all the connecting devices are connected normally; if the final detection result is a low level signal, it is determined that not all the connecting devices are connected normally.

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