Process method for improving thermal stability of source-drain contact and MOS (Metal Oxide Semiconductor) device

Abstract

The invention provides a process method for improving source-drain contact thermal stability and an MOS device, and the method comprises the steps: providing a substrate, forming a gate region and a source / drain region on the substrate, forming a dielectric layer with a through hole on the substrate, and enabling the surface of the source / drain region to be exposed through the through hole; doping the source / drain region; a first metal layer is deposited, the bottom and the side wall of the through hole and the surface of the dielectric layer are covered with the first metal layer, and the first metal layer is made of high-work-function metal; depositing a second metal layer, wherein the second metal layer covers the first metal layer; and forming metal silicide on the surface of the source / drain region. According to the process method provided by the invention, the thermal stability of the source-drain contact at different annealing temperatures is maintained, and the specific contact resistivity of the source-drain contact is reduced.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a process method for improving the thermal stability of source-drain contact and a MOS device. Background Art

[0002] The reduction of resistance of dynamic random access memory (DRAM) peripheral transistors plays an important role in the development of advanced DRAM transistors.

[0003] The source-drain contact must meet the thermal stability requirements of DRAM. x Ge 1-x In the film layer, as the annealing temperature increases, the diffusion of Si and Ge intensifies. When the annealing temperature reaches 700℃, due to the intensified mutual diffusion of Ti and Si atoms at high temperature, Ti-Si x Ge 1-x The film layer will have obvious agglomeration phenomenon. Silicide crystallization forms C49-TiSi 2 or C54-TiSi 2 , resulting in TiSi 2 The groove phenomenon degrades the morphology of the silicide / silicon interface, thereby increasing the specific contact resistivity of the source-drain contact. Further diffusion of Ge at high temperature will also lead to an increase in the specific contact resistivity.

[0004] Therefore, the prior art lacks a method that can prevent Ti and Si x Ge 1-x A process method for improving the thermal stability of source-drain contacts by mutual diffusion between them. Summary of the invention

[0005] To solve the above problems, the present application provides a process method and a MOS device for improving the thermal stability of source-drain contact, by x Ge 1-x Adding high work function metal between them effectively hinders Ge diffusion, maintains the thermal stability of the source-drain contact at different annealing temperatures, and reduces the specific contact resistivity of the source-drain contact.

[0006] This application adopts the following technical solutions:

[0007] In a first aspect, the present application provides a process for improving the thermal stability of source-drain contacts, the method comprising the following steps:

[0008] Providing a substrate, on which a gate region and a source / drain region are formed, and a dielectric layer having a through hole is also formed on the substrate, wherein the through hole exposes the surface of the source / drain region;

[0009] Doping the source / drain regions;

[0010] Depositing a first metal layer, where the first metal layer covers the bottom and sidewalls of the through hole and the surface of the dielectric layer, and the first metal layer is made of a high work function metal;

[0011] depositing a second metal layer, wherein the second metal layer covers the first metal layer;

[0012] Metal silicide is formed on the surface of the source / drain region.

[0013] Optionally, the source / drain regions are formed by growing Si Ge strained materials using an epitaxial process.

[0014] Optionally, doping the source / drain region includes:

[0015] The doping is performed by ion implantation or in-situ doping.

[0016] Optionally, the first metal layer is a Mo metal layer, a W metal layer or a Co metal layer.

[0017] Optionally, the thickness of the first metal layer is

[0018] Optionally, the second metal layer is a Ti layer, a TiN layer, or a combination of Ti and TiN.

[0019] Optionally, when the second metal layer is a combination of Ti and TiN, the thickness of Ti is 5-10 nm, and the thickness of TiN is 5-10 nm.

[0020] Optionally, forming a metal silicide on the surface of the source / drain region includes:

[0021] The source / drain region is thermally treated to form metal silicide on the surface of the source / drain region.

[0022] Optionally, the source / drain region is subjected to a heat treatment, including:

[0023] The source / drain region is thermally treated by rapid annealing or laser annealing at a temperature of 400 to 900° C. for a time of 10 to 60 seconds.

[0024] In a second aspect, the present application also provides a MOS device obtained by any of the above-mentioned process methods for improving the thermal stability of source-drain contacts.

[0025] At least one of the above technical solutions adopted in this application can achieve the following beneficial effects:

[0026] The present application provides a process method for improving the thermal stability of source-drain contact, wherein the thermal stability of the source-drain contact is improved by x Ge 1-xAn ultra-thin refractory high work function metal layer is inserted between the source and drain contacts to effectively hinder the diffusion of Ge, making Si the main diffusion atom, thereby maintaining the thermal stability of the source-drain contact at different annealing temperatures and reducing the specific contact resistivity of the source-drain contact. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0028] Figure 1 A flow chart showing a process method for improving thermal stability of source-drain contacts according to an embodiment of the present application;

[0029] Figure 2 A schematic diagram showing providing a substrate according to one embodiment of the present application;

[0030] Figure 3 A schematic diagram showing doping of source / drain regions according to an embodiment of the present application;

[0031] Figure 4 A schematic diagram showing deposition of a first metal layer according to an embodiment of the present application;

[0032] Figure 5 A schematic diagram showing deposition of a second metal layer according to an embodiment of the present application;

[0033] Figure 6 A schematic diagram showing the formation of metal silicide according to one embodiment of the present application;

[0034] Figure 7 A flow chart showing a process method for improving thermal stability of source-drain contacts according to another embodiment of the present application;

[0035] FIG8 shows a comparison diagram of the interface conformal effect of Example 1 of the present application and Comparative Example 1, wherein: Figure 8a The TEM characterization image of the source / drain region slice after heat treatment of Comparative Example 1 is shown. Figure 8b The TEM characterization image of the source / drain region slice after the heat treatment of Example 1 is shown. DETAILED DESCRIPTION

[0036] The exemplary embodiments of the present application will be described in more detail below. However, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present application and to enable the scope of the present application to be fully communicated to those skilled in the art.

[0037] The disclosure of the present invention provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described in the present invention. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplicity and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0038] Generally, the terms may be understood at least in part based on the usage of the above invention. For example, the term "one or more" used in the present invention depends at least in part on the above invention, and may be used to describe any component, structure or feature in a singular form, or may be used to describe a combination of components, structures or features in a plural form. Similarly, terms such as "one", "an" or "the" may also be understood at least in part based on the above invention as conveying singular usage or conveying plural usage. In addition, the term "based on..." may be understood as not necessarily intended to convey a set of exclusive factors, but may alternatively, at least in part depending on the context, allow for the presence of additional factors that do not necessarily have to be explicitly described.

[0039] It should be noted that, in the description of the present application, the meanings of the terms "on", "over", "above", "over", etc. should be interpreted in the broadest way, meaning that the description containing these terms is interpreted as "the component can be set on another component in direct contact, or there can be intermediate components or layers between the components."

[0040] For ease of description, the present application may also use spatially relative terms such as "under", "beneath", "below", "under", "upper", "lower", etc. to describe the relationship of one component to another component shown in the drawings. In addition to the orientations described in the drawings, the spatially relative terms are also intended to cover different orientations of the device in use or operation. The device can be oriented in other ways, and the spatially relative descriptions used in the present application can be interpreted accordingly.

[0041] Figure 1 A schematic flow chart of a process method for improving the thermal stability of source-drain contact proposed in one embodiment of the present application is shown. Figure 1 As shown, a process method for improving the thermal stability of source-drain contact provided in an embodiment of the present application includes the following steps:

[0042] S101, providing a substrate, on which a gate region and a source / drain region are formed, and a dielectric layer having a through hole is also formed on the substrate, wherein the through hole exposes the surface of the source / drain region;

[0043] S102, doping the source / drain region;

[0044] S103, depositing a first metal layer, the first metal layer covers the bottom and sidewalls of the through hole and the surface of the dielectric layer, and the first metal layer is made of a high work function metal;

[0045] S104, depositing a second metal layer, wherein the second metal layer covers the first metal layer;

[0046] S105, forming metal silicide on the surface of the source / drain region.

[0047] Figures 2 to 6 The schematic diagram corresponding to each step in a process method for improving the thermal stability of source-drain contact proposed in one embodiment of the present application is shown. Figures 2 to 6 In the figure, 1 represents the gate region, 2 represents the source / drain region, 3 represents the dielectric layer, 4 represents the spacer layer, 5 represents the shallow trench isolation, 6 represents the first metal layer, 7 represents the Ti layer in the second metal layer, 8 represents the TiN layer in the second metal layer, and 9 represents the metal silicide. Figures 2 to 6 , the process method provided in the embodiments of the present application is introduced.

[0048] Figure 2 FIG. 1 is a schematic diagram showing a substrate provided in accordance with an embodiment of the present application. Figure 2 As shown, a gate region 1 and a source / drain region 2 are formed on the substrate, and a dielectric layer 3 having a through hole is also formed on the substrate, and the through hole exposes the surface of the source / drain region 2.

[0049] In this embodiment, the substrate may be a Si substrate or an n-Si multilayer silicon substrate. A gate region 1 is formed on the substrate, and the periphery of the gate region 1 may be surrounded by a spacer layer 4. The gate region 1 may adopt an HKMG process, that is, the gate oxide uses a high dielectric constant material (High-K material) instead of the traditional SiO 2 Or SiON to improve quantum tunneling effect, the gate uses metal gate (Metal Gate) instead of traditional polysilicon gate to improve silicon depletion effect. A source / drain region 2 is formed on the substrate, and a shallow trench isolation 5 can also be formed. A dielectric layer 3 is provided on the substrate, and the dielectric layer 3 has a through hole, and the through hole makes the surface of the source / drain region 2 exposed to the outside. The source / drain region 2 uses an epitaxial process to grow SiGe strained material.

[0050] The substrate provided above may be a semi-finished substrate having formed thereon a gate region 1, a source / drain region 2, a dielectric layer 3, a spacer layer 4, and a shallow trench isolation 5. The formation process thereof may refer to the existing preparation process and is not limited here.

[0051] Figure 3 FIG. 1 is a schematic diagram showing doping of source / drain regions according to an embodiment of the present application. Figure 3 As shown, if the MOS device is a PMOS device, the source / drain region 2 is doped with P-type impurities, such as boron, aluminum, gallium or indium; if the MOS device is an NMOS device, the source / drain region 2 is doped with N-type impurities, such as phosphorus, arsenic or antimony.

[0052] When doping, ion implantation can be used, and ion implantation can include advanced ion implantation processes such as cold implantation. Taking phosphorus ions as an example, the energy is 0.5 to 3 keV and the dose is 1×10 15 ~1×10 16 cm -3 The source / drain region 2 may also be doped with impurities of a certain concentration by in-situ doping.

[0053] Figure 4 FIG. 1 is a schematic diagram showing a first metal layer deposited according to an embodiment of the present application. Figure 4 As shown, a first metal layer 6 is deposited on the bottom and sidewalls of the through hole and the upper surface of the dielectric layer 3 .

[0054] The function of the first metal layer 6 is to form an ultra-thin refractory high work function metal layer between the second metal layer and the source / drain region. The first metal layer 6 can be a Mo metal layer, a W metal layer, or a Co metal layer.

[0055] The thickness of the first metal layer 6 is

[0056] Figure 5 FIG. 1 is a schematic diagram showing a second metal layer deposited according to an embodiment of the present application. Figure 5 As shown, a second metal layer is deposited on the first metal layer 6 .

[0057] The second metal layer may be a Ti metal layer, a TiN metal layer, or a combination of Ti and TiN. When a combination of Ti and TiN is used as the second metal layer, refer to Figure 5 The Ti layer 7 is close to the first metal layer, and the TiN layer 8 is far from the first metal layer 6. The thickness of the Ti layer 7 is 5-10 nm, and the thickness of the TiN layer 8 is 5-10 nm. The second metal layer can also be made of other metals used to form silicide, such as Ni, NiPt, etc.

[0058] Figure 6 FIG. 1 is a schematic diagram showing the formation of metal silicide according to an embodiment of the present application. Figure 6 As shown, the source / drain region 2 is heat treated to form a metal silicide 9 on the surface of the source / drain region 2.

[0059] Rapid thermal processing (RTP) or laser annealing can be used to heat treat the source / drain region 2. The heat treatment temperature is 400-900° C. and the time is 10-60 seconds.

[0060] For example, when the first metal layer 6 is a Mo metal layer and the second metal layer is a combination of Ti and TiN, the first metal layer 6 and the second metal layer react to form Ti-Mo silicide after heat treatment, thereby improving the thermal stability of the source-drain contact.

[0061] Through the above process method, the source-drain contact resistance is still maintained at a low level under the back-end thermal budget at a longer temperature.

[0062] Specifically, taking PMOS devices as an example, Figure 7 FIG. 1 is a flow chart of a process method for improving the thermal stability of source-drain contact proposed in another embodiment of the present application. Figure 7 As shown, the following steps are included:

[0063] Step S701, providing an n-type substrate, on which a gate region, a source / drain region, a shallow trench isolation, and a dielectric layer with a through hole are formed, the periphery of the gate region is surrounded by a spacer layer, the gate region adopts an HKMG process, the source / drain region adopts an epitaxial process to grow a p-type SiGe strained material, and the through hole exposes the surface of the source / drain region to the outside;

[0064] Step S702, performing P-type doping on the source / drain regions by ion implantation or in-situ doping;

[0065] Step S703, depositing a Mo metal layer on the bottom and sidewalls of the through hole and the surface of the dielectric layer, the thickness of the Mo metal layer is

[0066] Step S704, depositing a Ti layer on the Mo metal layer, wherein the thickness of Ti is 5 to 10 nm; depositing a TiN layer on the Ti layer, wherein the thickness of TiN is 5 to 10 nm;

[0067] Step S705 , performing heat treatment on the source / drain region by rapid annealing or laser annealing at a temperature of 400 to 900° C. for a time of 10 to 60 seconds to form Ti—Mo silicide on the surface of the source / drain region.

[0068] Based on this, the process method proposed in the embodiment of the present application, in which Ti and Si x Ge 1-xAn ultra-thin refractory high work function metal layer is inserted between the source and drain contacts to effectively hinder the diffusion of Ge, making Si the main diffusion atom, thereby maintaining the thermal stability of the source-drain contact at different annealing temperatures and reducing the specific contact resistivity of the source-drain contact.

[0069] A specific embodiment of a process method for improving the thermal stability of source-drain contacts is given below.

[0070] Example 1

[0071] The process provided in Example 1 comprises the following steps:

[0072] Step 1, providing an n-type substrate, on which a gate region, a source / drain region, a shallow trench isolation, and a dielectric layer with a through hole are formed; the periphery of the gate region is surrounded by a spacer layer, and the gate region adopts an HKMG process; the source / drain region uses an epitaxial process to grow a p-type Si Ge strained material, and the through hole makes the surface of the source / drain region exposed to the outside;

[0073] Step 2: P-type doping is performed on the source / drain region by ion implantation;

[0074] Step 3: Deposit a Mo metal layer on the bottom and sidewalls of the through hole and the surface of the dielectric layer. The thickness of the Mo metal layer is

[0075] Step 4: deposit a Ti layer on the Mo metal layer. The thickness of the Ti layer is

[0076] Step 5, heat treatment at 850°C for 60s.

[0077] Comparative Example 1

[0078] The process provided in Example 1 comprises the following steps:

[0079] Step 1, providing an n-type substrate, on which a gate region, a source / drain region, a shallow trench isolation, and a dielectric layer with a through hole are formed; the periphery of the gate region is surrounded by a spacer layer, and the gate region adopts an HKMG process; the source / drain region uses an epitaxial process to grow a p-type Si Ge strained material, and the through hole makes the surface of the source / drain region exposed to the outside;

[0080] Step 2: P-type doping is performed on the source / drain region by ion implantation;

[0081] Step 3: Deposit a Ti layer on the bottom and sidewalls of the through hole and on the surface of the dielectric layer. The thickness of the Ti layer is

[0082] Step 4: heat treatment at 850°C for 60s.

[0083] FIG8 shows a comparison diagram of the interface conformal effects of Example 1 and Control Example 1. Figure 8a and Figure 8b In the figure, from left to right, green represents N, pink represents Ti, dark blue represents O, yellow represents Si, light blue represents Ge, and orange represents Mo. Figure 8a and Figure 8b By comparison, it can be seen that, by adopting the process method proposed in Example 1, the interface morphology can still be well maintained after heat treatment at 850°C for 60s; while by adopting the method of Control Example 1, the interface morphology has undergone significant changes after heat treatment at 850°C for 60s.

[0084] It can be seen that the process method proposed in Example 1 of the present application has the advantages of x Ge 1-x A Mo metal layer is inserted between the source and drain contacts to effectively hinder the diffusion of Ge, so that Si remains as the main diffusion atom, thereby maintaining the thermal stability of the source-drain contact at different annealing temperatures and reducing the specific contact resistivity of the source-drain contact.

[0085] In addition, the embodiment of the present application also provides a MOS device, which can be obtained by using the above-mentioned process method for improving the thermal stability of source-drain contact. It is particularly noted that after forming the metal silicide, some other subsequent processes are also involved to form the MOS device. The other subsequent processes are all conventional technologies in the art and are not limited here.

[0086] The above is only a specific implementation of the present application. Under the above teachings of the present application, those skilled in the art can make other improvements or modifications based on the above embodiments. Those skilled in the art should understand that the above specific description is only to better explain the purpose of the present application, and the protection scope of the present application shall be based on the protection scope of the claims.

[0087] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims below, any one of the claimed embodiments may be used in any combination.

Claims

1. A process for improving the thermal stability of source-drain contact, characterized in that: The following steps are involved: Providing a substrate, on which a gate region and a source / drain region are formed, and on which a dielectric layer having a through hole is also formed, wherein the through hole exposes the surface of the source / drain region; doping the source / drain region; Depositing a first metal layer, wherein the first metal layer covers the bottom and sidewalls of the through hole and the surface of the dielectric layer, and the first metal layer is made of a high work function metal; depositing a second metal layer, wherein the second metal layer covers the first metal layer; Metal silicide is formed on the surface of the source / drain region.

2. A process for improving the thermal stability of source-drain contact according to claim 1, characterized in that: The source / drain regions are grown with SiGe strained material using an epitaxial process.

3. A process for improving the thermal stability of source-drain contact according to claim 1, characterized in that: The step of doping the source / drain region comprises: The doping is performed by ion implantation or in-situ doping.

4. A process for improving thermal stability of source-drain contact according to claim 1, characterized in that: The first metal layer is a Mo metal layer, a W metal layer or a Co metal layer.

5. A process for improving thermal stability of source-drain contact according to claim 1, characterized in that: The thickness of the first metal layer is 6. A process for improving thermal stability of source-drain contact according to claim 1, characterized in that: The second metal layer is a Ti layer, a TiN layer or a combination of Ti and TiN.

7. A process for improving thermal stability of source-drain contact according to claim 6, characterized in that: When the second metal layer is a combination of Ti and TiN, the thickness of the Ti is 5 to 10 nm, and the thickness of the TiN is 5 to 10 nm.

8. A process for improving thermal stability of source-drain contact according to claim 1, characterized in that: The forming of metal silicide on the surface of the source / drain region comprises: The source / drain region is subjected to a heat treatment to form a metal silicide on the surface of the source / drain region.

9. A process for improving thermal stability of source-drain contact according to claim 8, characterized in that: The heat treatment of the source / drain region comprises: The source / drain region is thermally treated by rapid annealing or laser annealing at a temperature of 400 to 900° C. for a time of 10 to 60 seconds.

10. A MOS device obtained according to the process for improving thermal stability of source-drain contact according to any one of claims 1 to 9.

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