Circuit for accelerating turn-off of insulated gate bipolar transistor and reducing turn-off loss

By designing a circuit including IGBT and SIC JFET, using auxiliary components to connect IGBT and JFET's gate and launch poles to achieve IGBT acceleration and reduction loss loss. The poor reliability of SIC MOSFET has improved the reliability and short -circuit tolerance of the system.

CN119363085APending Publication Date: 2025-01-24HUNAN UNIV OF TECH
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Patent Information

Application Number
CN202411423809.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-12
Publication Date
2025-01-24

AI Technical Summary

Technical Problem

There is current tailing during the shutdown process of existing IGBT devices, resulting in a decrease in shutdown speed and an increase in shutdown loss. At the same time, the gate oxide layer reliability of SiC MOSFET also exists, affecting the reliability of the system.

Method used

Design a circuit including IGBT and SiC JFET. The gate of IGBT is connected to the driving control circuit. The collector of IGBT is connected to the source of JFET. The gate of JFET is connected to the emitter of IGBT through auxiliary components to achieve acceleration. turn off and reduce turn-off losses.

Benefits of technology

This circuit can effectively accelerate the turnover process of IGBT, reduce the loss of control, and solve the reliability problem of SIC MOSFET, and improve the reliability and short -circuit tolerance of the system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a circuit for accelerating turn-off of an insulated gate bipolar transistor and reducing turn-off loss, which comprises two core power semiconductor devices, a first auxiliary element and a second auxiliary element, the two core power semiconductor devices are an insulated gate bipolar transistor (IGBT) and a junction field effect transistor (JFET), the grid electrode of the IGBT is connected with a driving control circuit, and the grid electrode of the IGBT is connected with the driving control circuit. The collector electrode of the IGBT is connected with the source electrode of the JFET, the grid electrode of the JFET is connected with the source electrode of the JFET and the collector electrode of the IGBT through the first auxiliary element, and the grid electrode of the JFET is connected with the emitter electrode of the IGBT through the second auxiliary element. The JFET and the two auxiliary elements in the circuit can accelerate the turn-off of the IGBT, the turn-off loss of the IGBT is reduced, the IGBT and the JFET do not have the reliability problem of a gate oxide layer, and the problem that the reliability of a SiC MOSFET is poor is completely solved.
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Description

Technical Field

[0001] The invention relates to the technical field of power semiconductor devices, and in particular to a circuit for accelerating the turn-off of an insulated gate bipolar transistor and reducing turn-off loss. Background Art

[0002] Insulated Gate Bipolar Transistor (IGBT) has the advantages of large current capacity and low on-state voltage drop of bipolar BJT devices and fast switching speed, low driving power consumption and simple control circuit of unipolar MOSFET devices. It has become the core component of large-capacity power electronic systems and is widely used in new energy, rail transportation and smart grid. However, during the shutdown process, due to the existence of conductivity modulation effect, IGBT devices store a large number of minority carriers in the drift region of the shutdown process, resulting in current tailing, which reduces the shutdown speed and increases the shutdown loss.

[0003] At present, the reliability of SiO2 gate oxide layer in SiC MOSFET has always been a pain point for researchers. The aging and reliability of gate oxide layer are particularly prominent under high current and short circuit conditions. SiC JFET does not have a gate oxide layer, and there is no problem of device degradation and gate oxide layer aging at all, but it cannot achieve isolation between the drive end and the circuit end, which makes the device prone to crosstalk between the main circuit and the drive circuit during operation, and complex drive, startup and protection circuits must be designed.

[0004] like Figure 1 As shown in the figure, the current Si IGBT + SiC MOSFET parallel hybrid tube requires complex drive circuits and control strategies, and still has not solved the problem of poor reliability of SiC MOSFET, which is a fatal hidden danger for power systems that require high reliability. Figure 2 As shown in the figure, the SiC JFET + Si MOSFET series hybrid has the following disadvantages: ① Limited by the current conduction capacity of Si MOSFET, the series hybrid has a low current conduction capacity. ② The short-circuit and overload capacity of Si MOSFET is weak, and a large transient power consumption is generated during a short circuit. In order to protect the Si MOSFET from damage, an external circuit is required to limit the transient current. The short-circuit and overload capacity of the series hybrid is poor. Summary of the invention

[0005] In order to solve the above technical problems, the present invention provides a circuit for accelerating the turn-off of an insulated gate bipolar transistor and reducing the turn-off loss, which has a simple driving control circuit, high reliability and strong short-circuit tolerance.

[0006] The technical solution of the present invention to solve the above technical problems is: a circuit for accelerating the turn-off of an insulated gate bipolar transistor and reducing the turn-off loss, comprising two core power semiconductor devices, a first auxiliary element and a second auxiliary element, the two core power semiconductor devices are an insulated gate bipolar transistor IGBT and a junction field effect transistor JFET, the gate of the IGBT is connected to a drive control circuit, the collector of the IGBT is connected to the source of the JFET, the gate of the JFET is connected to the source of the JFET and the collector of the IGBT through the first auxiliary element, and the gate of the JFET is connected to the emitter of the IGBT through the second auxiliary element.

[0007] In the above-mentioned circuit for accelerating the turn-off of the insulated gate bipolar transistor and reducing the turn-off loss, the first auxiliary element is one of a resistor, a capacitor, a diode, a combination of a resistor and a capacitor in series, a combination of a resistor and a diode in series, a combination of a capacitor and a diode in series, a combination of a resistor and a capacitor in parallel, a combination of a resistor and a diode in parallel, and a combination of a capacitor and a diode in parallel.

[0008] In the above-mentioned circuit for accelerating the turn-off of the insulated gate bipolar transistor and reducing the turn-off loss, the second auxiliary element is one of a wire, a resistor, a capacitor, a diode, a combination of a resistor and a capacitor in series, a combination of a resistor and a diode in series, a combination of a capacitor and a diode in series, a combination of a resistor and a capacitor in parallel, a combination of a resistor and a diode in parallel, and a combination of a capacitor and a diode in parallel.

[0009] In the above-mentioned circuit for accelerating the turn-off of the insulated gate bipolar transistor and reducing the turn-off loss, the first auxiliary element and the second auxiliary element can be used alone or both at the same time. When only the first auxiliary element is used alone, the second auxiliary element is equivalent to an open circuit; when only the second auxiliary element is used alone, the first auxiliary element is equivalent to an open circuit.

[0010] The beneficial effects of the present invention are: 1. The JFET and two auxiliary elements in the circuit of the present invention can accelerate the IGBT turn-off and reduce the IGBT turn-off loss. In addition, there is no gate oxide layer reliability problem for the IGBT and the JFET, which completely solves the problem of poor reliability of the SiC MOSFET.

[0011] 2. The JFET of the present invention bears high voltage, and the IGBT is the main current-conducting device. Through the conduction of the gate control circuit of the IGBT, in the blocking mode, the voltage between the collector and emitter of the IGBT generates a negative voltage on the JFET gate, so that the JFET can withstand the required high blocking voltage.

[0012] 3. The present invention adopts an IGBT drive control circuit to control the on and off of the entire circuit. The drive control circuit is simple, which solves the problem that the Si IGBT + SiC MOSFET parallel hybrid tube requires a complex drive circuit and control strategy.

[0013] 4. The high current density, conduction current capability and good short-circuit tolerance capability of the IGBT and JFET of the present invention can solve the problem of poor short-circuit capability of SiC MOSFET, and can solve the problem of low conduction current capability and poor short-circuit capability of SiC JFET + Si MOSFET series hybrid tube. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of the structure of the existing Si IGBT + SiC MOSFET parallel hybrid tube.

[0015] Figure 2 This is a schematic diagram of the structure of the existing SiC JFET + Si MOSFET series hybrid tube.

[0016] Figure 3 It is a circuit schematic diagram of the present invention.

[0017] Figure 4 The structural model diagram of the Si IGBT and SiC JFET devices of the circuit of the present invention is simulated using Sentaurus-TCAD software.

[0018] Figure 5 The circuit of the present invention is simulated by Sentaurus-TCAD software. Z1 , R Z2 The turn-off waveform when it is a resistor.

[0019] Figure 6 The circuit of the present invention is simulated by Sentaurus-TCAD software. Z1 is the resistance, R Z2 Turn-off waveform when disconnected.

[0020] Figure 7 The circuit of the present invention is simulated by Sentaurus-TCAD software. Z2 is the resistance, R Z1 Turn-off waveform when disconnected.

[0021] Figure 8 The circuit of the present invention is simulated by Sentaurus-TCAD software. Z1 , R Z2 The turn-off waveform is the capacitor.

[0022] Fig. 9 The circuit of the present invention is simulated by Sentaurus-TCAD software. Z1 is the capacitance, R Z2 Turn-off waveform when disconnected.

[0023] Fig.10 The circuit of the present invention is simulated by Sentaurus-TCAD software. Z2 is the capacitance, R Z1 Turn-off waveform when disconnected.

[0024] Fig.11 The circuit of the present invention is simulated by Sentaurus-TCAD software. Z2 For the wire, R Z1 Turn-off waveform when disconnected. DETAILED DESCRIPTION

[0025] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0026] like Figure 3 As shown, a circuit for accelerating the turn-off of an insulated gate bipolar transistor and reducing the turn-off loss includes two core power semiconductor devices, a first auxiliary element R Z1 and the second auxiliary element R Z2 The two core power semiconductor devices are an insulated gate bipolar transistor IGBT and a junction field effect transistor JFET. The gate of the IGBT is connected to the drive control circuit, the collector of the IGBT is connected to the source of the JFET, and the gate of the JFET is connected to the first auxiliary element R Z1 The source of the JFET and the collector of the IGBT are connected, and the gate of the JFET is connected to the collector of the IGBT through the second auxiliary element R Z2 Connected to the emitter of the IGBT.

[0027] The first auxiliary element R Z1 It is one of a resistor, a capacitor, a diode, a combination of a resistor and a capacitor in series, a combination of a resistor and a diode in series, a combination of a capacitor and a diode in series, a combination of a resistor and a capacitor in parallel, a combination of a resistor and a diode in parallel, and a combination of a capacitor and a diode in parallel.

[0028] The second auxiliary element R Z2 It is one of a wire, a resistor, a capacitor, a diode, a combination of a resistor and a capacitor in series, a combination of a resistor and a diode in series, a combination of a capacitor and a diode in series, a combination of a resistor and a capacitor in parallel, a combination of a resistor and a diode in parallel, and a combination of a capacitor and a diode in parallel.

[0029] The first auxiliary element R Z1 and the second auxiliary element R Z2You can choose to use one or both at the same time. When only the first auxiliary element R is used Z1 When the second auxiliary element R Z2 Equivalent to a circuit breaker; when only the second auxiliary element R is used Z2 When the first auxiliary element R Z1 It is equivalent to breaking the circuit.

[0030] When the gate voltage changes from positive to negative, the device switches from the on state to the blocking state. First, the collector voltage of the IGBT begins to rise, and then feeds back to the gate voltage of the JFET, closing the channel of the JFET, and finally turning off the entire device. Unlike Si IGBT, the collector voltage of the hybrid tube IGBT only needs to rise to the turn-off voltage required by the gate of the JFET. Then the SiC JFET, with its excellent switching performance, allows the circuit to be turned off quickly. Compared with Si IGBT, the rise time of its bus voltage will be much smaller. Therefore, this circuit can achieve much lower turn-off losses than Si IGBT.

[0031] Using Sentaurus-TCAD software, the structural models of the two devices were built. Figure 4 As shown, Figure 4 (a) is Si IGBT, Figure 4 (b) is SiC JFET.

[0032] (1) Using hybrid simulation to simulate R Z1 , R Z2 When R is a resistor, Z1 =R Z2 =1M ohm, the shutdown waveform of the proposed circuit is as follows Figure 5 The simulation results show that R Z1 , R Z2 When is a resistor, compared with IGBT, the turn-off speed of the proposed circuit is faster and the turn-off loss is reduced, which verifies the proposed circuit.

[0033] (2) Using hybrid simulation to simulate R Z1 When R is a resistor, Z1 =1M ohm, R Z2 Disconnect, the shutdown waveform of the proposed circuit is as follows: Figure 6 The simulation results show that R Z1 When R is a resistor, Z2 Compared with IGBT, the turn-off speed of the proposed circuit is faster and the turn-off loss is reduced, which verifies the proposed circuit.

[0034] (3) Using hybrid simulation to simulate R Z2 When R is a resistor, Z2 =1M ohm, R Z1Disconnect, the shutdown waveform of the proposed circuit is as follows: Figure 7 The simulation results show that R Z2 When R is a resistor, Z1 Compared with IGBT, the turn-off speed of the proposed circuit is faster and the turn-off loss is reduced, which verifies the proposed circuit.

[0035] (4) Using hybrid simulation to simulate R Z1 , R Z2 When it is a capacitor, R Z1 =R Z2 =1 microfarad, the shutdown waveform of the proposed circuit is as follows Figure 8 The simulation results show that R Z1 , R Z2 When the capacitor is used, compared with IGBT, the turn-off speed of the proposed circuit is faster and the turn-off loss is reduced, which verifies the proposed circuit.

[0036] (5) Using hybrid simulation to simulate R Z1 When it is a capacitor, R Z1 = 1 microfarad, R Z2 Disconnect, the shutdown waveform of the proposed circuit is as follows: Fig. 9 The simulation results show that R Z1 When it is a capacitor, R Z2 Compared with IGBT, the turn-off speed of the proposed circuit is faster and the turn-off loss is reduced, which verifies the proposed circuit.

[0037] (6) Using hybrid simulation to simulate R Z2 When it is a capacitor, R Z2 = 1 microfarad, R Z1 Disconnect, the shutdown waveform of the proposed circuit is as follows: Fig.10 The simulation results show that R Z2 When it is a capacitor, R Z1 Compared with IGBT, the turn-off speed of the proposed circuit is faster and the turn-off loss is reduced, which verifies the proposed circuit.

[0038] (7) R was simulated using hybrid simulation Z1 Disconnect, R Z2 is the wire, the shutdown waveform of the proposed circuit is as follows: Fig.11 The simulation results show that R Z1 Disconnect, R Z2 For the wire, compared with IGBT, the turn-off speed of the proposed circuit is faster and the turn-off loss is reduced, which verifies the proposed circuit.

Claims

1. A circuit for accelerating the turn-off of an insulated gate bipolar transistor and reducing turn-off loss, characterized in that: The invention comprises two core power semiconductor devices, a first auxiliary element and a second auxiliary element. The two core power semiconductor devices are an insulated gate bipolar transistor IGBT and a junction field effect transistor JFET. The gate of the IGBT is connected to a driving control circuit, the collector of the IGBT is connected to the source of the JFET, the gate of the JFET is connected to the source of the JFET and the collector of the IGBT through the first auxiliary element, and the gate of the JFET is connected to the emitter of the IGBT through the second auxiliary element.

2. The circuit for accelerating the turn-off of an insulated gate bipolar transistor and reducing turn-off loss according to claim 1, characterized in that: The first auxiliary element is one of a resistor, a capacitor, a diode, a combination of a resistor and a capacitor in series, a combination of a resistor and a diode in series, a combination of a capacitor and a diode in series, a combination of a resistor and a capacitor in parallel, a combination of a resistor and a diode in parallel, and a combination of a capacitor and a diode in parallel.

3. The circuit for accelerating the turn-off of an insulated gate bipolar transistor and reducing turn-off loss according to claim 1, characterized in that: The second auxiliary element is one of a wire, a resistor, a capacitor, a diode, a combination of a resistor and a capacitor in series, a combination of a resistor and a diode in series, a combination of a capacitor and a diode in series, a combination of a resistor and a capacitor in parallel, a combination of a resistor and a diode in parallel, and a combination of a capacitor and a diode in parallel.

4. The circuit for accelerating the turn-off of an insulated gate bipolar transistor and reducing turn-off loss according to claim 1, characterized in that: The first auxiliary element and the second auxiliary element can be used alone or both at the same time. When only the first auxiliary element is used, the second auxiliary element is equivalent to a circuit breaker; when only the second auxiliary element is used, the first auxiliary element is equivalent to a circuit breaker.